WO2017190416A1 - 栅极扫描线驱动方法、驱动模块及tft-lcd显示面板 - Google Patents

栅极扫描线驱动方法、驱动模块及tft-lcd显示面板 Download PDF

Info

Publication number
WO2017190416A1
WO2017190416A1 PCT/CN2016/088697 CN2016088697W WO2017190416A1 WO 2017190416 A1 WO2017190416 A1 WO 2017190416A1 CN 2016088697 W CN2016088697 W CN 2016088697W WO 2017190416 A1 WO2017190416 A1 WO 2017190416A1
Authority
WO
WIPO (PCT)
Prior art keywords
gate scan
row
scan line
gate
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2016/088697
Other languages
English (en)
French (fr)
Inventor
王照
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to US15/119,719 priority Critical patent/US10170066B2/en
Publication of WO2017190416A1 publication Critical patent/WO2017190416A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0248—Precharge or discharge of column electrodes before or after applying exact column voltages
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular, to a gate scan line driving method, a driving system, and a TFT-LCD display panel.
  • FIG. 1 is a timing diagram of gate scan line driving in a TFT-LCD display panel of the prior art. Taking N rows of gate scan lines as an example, charging time of all row gate scan lines is T, and row gates are The scan lines are turned on at the same time.
  • FIG. 2 is a waveform diagram showing the gate scan line turn-on time and the number of rows in the prior art. The turn-on time of each row of gate scan lines is equal, so the waveform is a vertical line.
  • the middle area of the TFT-LCD display panel may be insufficiently charged, which affects the image quality of the TFT-LCD.
  • an object of the present invention is to provide a gate scan line driving method, a driving system, and a TFT-LCD display panel.
  • a gate scan line driving method comprising:
  • the intermediate row gate scan line is the N/2th row gate scan line and the N/2+1th row gate scan line, and N is an even number.
  • the turn-on time is gradually increased from the minimum turn-on time Tmin by a predetermined amplitude ⁇ to a maximum turn-on time Tmax ;
  • the turn-on time is gradually reduced from the maximum turn-on time Tmax by a predetermined amplitude ⁇ to a minimum turn-on time Tmin .
  • the method for generating the variable frequency CKV waveform in the method is specifically:
  • the high frequency reference signal is down-converted by a variable value counter and a flip-flop to form a variable frequency CKV waveform of the drive gate scan line.
  • a gate scan line driving module wherein the driving module is configured to form a variable frequency CKV waveform, comprising: a high frequency reference signal crystal for generating and a frequency conversion frequency for forming a variable frequency
  • the driving module is configured to form a variable frequency CKV waveform, comprising: a high frequency reference signal crystal for generating and a frequency conversion frequency for forming a variable frequency
  • the variable value downscaling module comprising a variable value counter and a flip flop.
  • variable value counter includes a fixed value counter, and an adder and/or a subtractor.
  • a TFT-LCD display panel includes a pixel array and a plurality of gate scan lines, the gate scan lines being driven by the above method.
  • Each row of the invention adopts a scanning mode in which the gate scanning lines of different rows are not unequal in time, the charging time of the middle row is the longest, the charging time from the middle row to the two sides is decreased, the charging time of the TFT-LCD in the middle area of the display panel is increased, and the overall painting is optimized. Quality performance.
  • FIG. 1 is a timing diagram of gate scan line driving in a prior art TFT-LCD display panel.
  • FIG. 2 is a waveform diagram of a gate scan line turn-on time and a number of rows in the prior art.
  • FIG. 3 is a flow chart of a method of driving a gate scan line in a preferred embodiment of the present invention.
  • FIG. 4 is a timing diagram of gate scan line driving in a preferred embodiment of the present invention.
  • FIG. 5 is a waveform diagram of gate scan line turn-on time and number of rows in a preferred embodiment of the present invention.
  • FIG. 6 is a schematic block diagram of a gate scan line driving module in the prior art.
  • FIG. 7 is a schematic block diagram of a gate scan line driving module according to another embodiment of the present invention.
  • the gate scan line driving method includes the following steps:
  • the method for generating the variable frequency CKV waveform is specifically:
  • the high frequency reference signal is down-converted by a variable value counter and a flip-flop to form a variable frequency CKV waveform of the drive gate scan line.
  • the display panel in this embodiment includes N rows of gate scan lines, N is an even number, and the middle row gate scan lines are the N/2th row gate scan lines and the N/2+1th row gate scan lines.
  • the gate scan line is driven row by row by the variable frequency CKV waveform of the gate driver.
  • the turn-on time is gradually increased from the minimum on time T min to the predetermined amplitude ⁇ to the maximum on Time T max .
  • T 1 T min ;
  • T (N/2) T max .
  • the opening time of the N/2th line (Line(N/2)) gate scan line and the N/2+1th line (Line(N/2)+1) gate scan line are both the maximum value T max ,
  • the charging time of the middle row gate scan line is maximized, so as to optimize the image quality of the middle area of the display panel.
  • the turn-on time is gradually reduced from the maximum turn-on time T max by a predetermined amplitude ⁇ to Minimum opening time T min .
  • the turn-on time of the gate scan lines of the N/2+1th row to the Nth row is equal to the difference, and the difference is also ⁇ , T (N/2+1) > T (N/2+2). ) >...>T N and satisfy the following relationship:
  • T N T min ;
  • T (N/2+1) T max .
  • the average turn-on time in FIG. 1 may not be equal, and the detailed description thereof will not be repeated here.
  • FIG. 5 is a waveform diagram showing the gate scan line turn-on time and the number of rows in the present embodiment. It can be seen that the turn-on time of the gate scan line in the middle region is the longest, and the charging time in the middle region of the TFT-LCD is obtained. Additional optimization to optimize the picture quality of the TFT-LCD mid-section.
  • FIG. 6 is a schematic diagram of a module of a gate scan line driving module in the prior art, and the CKV waveform is generated by a timing control chip (T-con IC) on the driving circuit board, and the gate scanning line driver is driven in the prior art.
  • the module 100' is formed by a crystal 10' for generating a high frequency reference signal and a fixed value downscaling module 20' for downconverting the high frequency reference signal to form a fixed frequency CKV waveform.
  • the fixed value counter 21' and the flip-flop 22' constitute a fixed value down-converting module 20', and the high-frequency reference signal generated by the crystal oscillator 10' is down-converted by the fixed-value down-conversion module 20' to a fixed-frequency signal required for driving the CKV.
  • the fixed frequency of CKV is determined by the setting of the fixed value counter.
  • the CKV frequency is 1/M of the reference frequency of the crystal oscillator.
  • FIG. 7 is a schematic diagram of a module of a gate scan line driving module according to another embodiment of the present invention.
  • a fixed value down-frequency module needs to be redesigned, and a “fixed value counter + adder”
  • the +subtractor design replaces the conventional fixed-value counter design, and by adjusting the value of the counter, it is possible to control the magnitude of the CKV frequency that is adjusted.
  • the gate scan line driving module 100 is formed by the crystal oscillator 10 and the variable value down-converting module 20, the crystal oscillator 10 is used to generate a high frequency reference signal, and the variable value down-converting module 20 is used to be high.
  • the frequency reference signal is down-converted to form an equal-difference frequency CKV waveform.
  • the fixed value counter 21, the adder 23, the subtractor 24 and the flip-flop 22 constitute a variable value down-converting module 20, and the high-frequency reference signal generated by the crystal oscillator 10 is required to be down-converted by the variable-value down-conversion module 20 to the CKV drive.
  • the difference frequency signal The difference frequency signal.
  • a TFT-LCD display panel is also disclosed.
  • the TFT-LCD display panel is identical to the existing display panel, and includes a pixel array and a plurality of gate scan lines.
  • the gate scan lines pass through The method in the above embodiment is driven, and details are not described herein again.
  • each row of the present invention adopts a scanning mode in which the gate scanning lines of different rows are not unequal in time, the charging time of the middle row is the longest, and the charging time from the middle row to the two sides is decreased, and the TFT in the middle region of the display panel is added.
  • the charging time of the LCD optimizes the overall picture quality.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

一种栅极扫描线驱动方法、驱动系统及TFT-LCD显示面板，所述方法包括：通过栅极驱动器的变值频率CKV波形，逐行驱动栅极扫描线；从第1行栅极扫描线至中间行栅极扫描线，开启时间逐渐增大；从中间行栅极扫描线至第N行栅极扫描线，开启时间逐渐减小。采用各行栅极扫描线不等时间的扫描方式，中间行的充电时间最长，从中间行向两侧充电时间递减，增加了显示面板中间区域TFT-LCD的充电时间，优化整体画质表现。

Description

栅极扫描线驱动方法、驱动模块及TFT-LCD显示面板 技术领域
本发明涉及液晶显示技术领域，特别是涉及一种栅极扫描线驱动方法、驱动系统及TFT-LCD显示面板。
背景技术
随着液晶显示器的解析度和尺寸越来越大型化，以薄膜型晶体管(TFT)为主要驱动方式的TFT-LCD显示面板对应的等效传输途径上的等效电阻和电容负载越来越大。液晶显示器画质的判定受中间区域的影响最大，正常状况下，TFT-LCD充电时间越充足，画质表现越佳。而常规的Gate等时扫描的技术并没有对大尺寸液晶显示器中间区域作的作用，所以无法通过调整中间区域TFT-LCD充电状态来优化整个液晶显示器的画质。
参图1所示为现有技术TFT-LCD显示面板中栅极扫描线驱动的时序图，以N行栅极扫描线为例，所有行栅极扫描线的充电时间均为T，各行栅极扫描线的开启时间相等。图2所示为现有技术中栅极扫描线开启时间和行数的波形图，每一行栅极扫描线的开启时间相等，所以波形为一条垂直线。
由于每一行栅极扫描线的开启时间相同，TFT-LCD显示面板的中间区域会出现充电不足的情况，影响了TFT-LCD的画质。
因此，针对上述技术问题，有必要提供一种栅极扫描线驱动方法、驱动系统及TFT-LCD显示面板。
发明内容
为克服现有技术的不足，本发明的目的在于提供一种栅极扫描线驱动方法、驱动系统及TFT-LCD显示面板。
为了实现上述目的，本发明实施例提供的技术方案如下：
一种栅极扫描线驱动方法，所述方法包括：
通过栅极驱动器的变值频率CKV波形，逐行驱动栅极扫描线；
从第1行栅极扫描线至中间行栅极扫描线，开启时间逐渐增大；
从中间行栅极扫描线至第N行栅极扫描线，开启时间逐渐减小。
作为本发明的进一步改进，所述中间行栅极扫描线为第N/2行栅极扫描线和第N/2+1行栅极扫描线，N为偶数。
作为本发明的进一步改进，所述方法中，第n行栅极扫描线和第N+1-n行栅极扫描线的开启时间相等，即Tn＝TN+1-n，1≤n≤N。
作为本发明的进一步改进，所述方法中：
从第1行栅极扫描线至中间行栅极扫描线，开启时间从最小开启时间Tmin以预定幅值μ逐渐增大至最大开启时间Tmax；
从中间行栅极扫描线至第N行栅极扫描线，开启时间从最大开启时间Tmax以预定幅值μ逐渐减小至最小开启时间Tmin。
作为本发明的进一步改进，所述方法中变值频率CKV波形的产生方法具体为：
通过晶振产生高频基准信号；
将高频基准信号通过变值计数器和触发器降频，形成驱动栅极扫描线的变值频率CKV波形。
相应地，一种栅极扫描线驱动模块，所述驱动模块用于形成变值频率CKV波形，其包括用于产生高频基准信号晶振及与用于将高频基准信号降频形成变值频率CKV波形的可变值降频模块，所述可变值降频模块包括变值计数器及触发器。
作为本发明的进一步改进，所述变值计数器包括定值计数器、以及加法器和/或减法器。
相应地，一种TFT-LCD显示面板，所述TFT-LCD显示面板包括像素阵列及若干栅极扫描线，所述栅极扫描线通过上述的方法驱动。
本发明各行采用各行栅极扫描线不等时间的扫描方式，中间行的充电时间最长，从中间行向两侧充电时间递减，增加了显示面板中间区域TFT-LCD的充电时间，优化整体画质表现。
附图说明
图1为现有技术TFT-LCD显示面板中栅极扫描线驱动的时序图。
图2为现有技术中栅极扫描线开启时间和行数的波形图。
图3为本发明一优选实施方式中栅极扫描线驱动方法的流程图。
图4为本发明一优选实施方式中栅极扫描线驱动的时序图。
图5为本发明一优选实施方式中栅极扫描线开启时间和行数的波形图。
图6为现有技术中栅极扫描线驱动模块的模块示意图。
图7为本发明另一实施方式中栅极扫描线驱动模块的模块示意图。
具体实施方式
为了使本技术领域的人员更好地理解本发明中的技术方案，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都应当属于本发明保护的范围。
参图3所示，在本发明的一优选实施方式中，栅极扫描线驱动方法包括以下步骤：
通过栅极驱动器的变值频率CKV波形，逐行驱动栅极扫描线；
从第1行栅极扫描线至中间行栅极扫描线，开启时间逐渐增大；
从中间行栅极扫描线至第N行栅极扫描线，开启时间逐渐减小。
优选地，变值频率CKV波形的产生方法具体为：
通过晶振产生高频基准信号；
将高频基准信号通过变值计数器和触发器降频，形成驱动栅极扫描线的变值频率CKV波形。
本实施方式中的显示面板包括N行栅极扫描线，N为偶数，中间行栅极扫描线为第N/2行栅极扫描线和第N/2+1行栅极扫描线，驱动时通过栅极驱动器的变值频率CKV波形，逐行驱动栅极扫描线。
结合图4、图5所示，对本实施方式中栅极扫描线的驱动方法进行详细说明。
从第1行(Line 1)栅极扫描线至第N/2行(Line(N/2))栅极扫描线，开启时间从最小开启时间Tmin以预定幅值μ逐渐增大至最大开启时间Tmax。
具体地，第1行至第N/2行栅极扫描线的开启时间呈等差递增，其差值为μ，Tmin＝T1<T2<T3<…T(N/2)＝Tmax，且满足以下关系：
T(N/2)＝T(N/2-1)+μ＝T(N/2-2)+2μ＝…＝T2+(N/2-2)*μ＝T1+(N/2-1)*μ；
T1＝Tmin；
T(N/2)＝Tmax。
第N/2行(Line(N/2))栅极扫描线和第N/2+1行(Line(N/2)+1)栅极扫描线的开启时间均为最大值Tmax，以使中间行栅极扫描线的充电时间最长，从而达到优化显示面板中间区域画质的目的。
从第N/2+1行(Line N/2+1)栅极扫描线至第N行(Line N)栅极扫描线，开启时间从最大开启时间Tmax以预定幅值μ逐渐减小至最小开启时间Tmin。
具体地，第N/2+1行至第N行栅极扫描线的开启时间呈等差递减，其差值为同样为μ，T(N/2+1)>T(N/2+2)>…>TN，且满足以下关系：
T(N/2+1)＝T(N/2+1)+μ＝T(N/2+2)+2μ＝…＝T(N-1)+(N/2-2)*μ＝TN+(N/2-1)*μ；
TN＝Tmin；
T(N/2+1)＝Tmax。
具体地，本实施方式中的μ的取值根据需要进行设计，第1行至第N/2行栅极扫描线的开启时间与第N/2+1行至第N行栅极扫描线的开启时间呈对称序列，第n行栅极扫描线和第N+1-n行栅极扫描线的开启时间相等，即Tn＝TN+1-n，1≤n≤N。
优选地，本实施方式中所有行栅极扫描线的开启时间与图1中常规模式保持不变，通过设置Tmin、Tmax及μ的取值，使得T1+T2+…+TN＝N*T。当然，在其他实施方式中也可以不与图1中的平均开启时间不等，此处不再详细进行说明。
参图5所示为本实施方式中栅极扫描线开启时间和行数的波形图，可看出中间区域的栅极扫面线的开启时间达到最长，TFT-LCD中间区域的充电时间得到额外优化，从而可以优化TFT-LCD中间区域的画质。
参图6所示为现有技术中栅极扫描线驱动模块的模块示意图，CKV波形是由驱动电路板上的时序控制芯片(T-con IC)产生的，现有技术中栅极扫描线驱动模块100’由晶振10’和固定值降频模块20’形成，晶振10’用于产生高频基准信号，固定值降频模块20’用于将高频基准信号降频形成固定频率CKV波形。
其中，定值计数器21’及触发器22’组成固定值降频模块20’，晶振10’产生的高频基准信号通过固定值降频模块20’降频至CKV驱动所需要的定值频率信号。CKV固定频率的大小是定值计数器设定决定的，CKV频率为晶振产生基准频率的1/M。
参图7所示为本发明另一实施方式中栅极扫描线驱动模块的模块示意图，为实现可变频率CKV波形，需要对固定值降频模块进行重新设计，将“定值计数器+加法器+减法器”设计替代常规的定值计数器设计，通过计数器数值的变化，从而可以控制所调节产生CKV频率的大小。
具体地，本实施方式中栅极扫描线驱动模块100由晶振10和可变值降频模块20形成，晶振10用于产生高频基准信号，可变值降频模块20用于将高 频基准信号降频形成等差频率CKV波形。
其中，定值计数器21、加法器23、减法器24及触发器22组成可变值降频模块20，晶振10产生的高频基准信号通过可变值降频模块20降频至CKV驱动所需要的等差频率信号。
具体地，驱动第1行(Line 1)栅极扫描线至第N/2行(Line(N/2))栅极扫描线时，可变值降频模块中的定值计数器21、加法器23及触发器22工作，通过加法器“+1”的运算逐步增大栅极扫描线的开启时间；而驱动第N/2+1行(Line N/2+1)栅极扫描线至第N行(Line N)栅极扫描线时，可变值降频模块中的定值计数器21、减法器24及触发器22工作，通过减法器“-1”的运算逐步减小栅极扫描线的开启时间。
在本发明的另一实施方式中还公开了一种TFT-LCD显示面板，该TFT-LCD显示面板与现有的显示面板完全相同，包括像素阵列及若干栅极扫描线，栅极扫描线通过上述实施方式中的方法进行驱动，此处不再详细进行赘述。
由以上实施方式可以看出，本发明各行采用各行栅极扫描线不等时间的扫描方式，中间行的充电时间最长，从中间行向两侧充电时间递减，增加了显示面板中间区域TFT-LCD的充电时间，优化整体画质表现。
对于本领域技术人员而言，显然本发明不限于上述示范性实施例的细节，而且在不背离本发明的精神或基本特征的情况下，能够以其他的具体形式实现本发明。因此，无论从哪一点来看，均应将实施例看作是示范性的，而且是非限制性的，本发明的范围由所附权利要求而不是上述说明限定，因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。
此外，应当理解，虽然本说明书按照实施方式加以描述，但并非每个实施方式仅包含一个独立的技术方案，说明书的这种叙述方式仅仅是为清楚起见，本领域技术人员应当将说明书作为一个整体，各实施例中的技术方案也可以经适当组合，形成本领域技术人员可以理解的其他实施方式。

Claims (8)

  1. 一种栅极扫描线驱动方法，其中，所述方法包括：
    通过栅极驱动器的变值频率CKV波形，逐行驱动栅极扫描线；
    从第1行栅极扫描线至中间行栅极扫描线，开启时间逐渐增大；
    从中间行栅极扫描线至第N行栅极扫描线，开启时间逐渐减小。
  2. 根据权利要求1所述的栅极扫描线驱动方法，其中，所述中间行栅极扫描线为第N/2行栅极扫描线和第N/2+1行栅极扫描线，N为偶数。
  3. 根据权利要求2所述的栅极扫描线驱动方法，其中，所述方法中，第n行栅极扫描线和第N+1-n行栅极扫描线的开启时间相等，即Tn＝TN+1-n，1≤n≤N。
  4. 根据权利要求3所述的栅极扫描线驱动方法，其中，所述方法中：
    从第1行栅极扫描线至中间行栅极扫描线，开启时间从最小开启时间Tmin以预定幅值μ逐渐增大至最大开启时间Tmax；
    从中间行栅极扫描线至第N行栅极扫描线，开启时间从最大开启时间Tmax以预定幅值μ逐渐减小至最小开启时间Tmin。
  5. 根据权利要求1所述的栅极扫描线驱动方法，其中，所述方法中变值频率CKV波形的产生方法具体为：
    通过晶振产生高频基准信号；
    将高频基准信号通过变值计数器和触发器降频，形成驱动栅极扫描线的变值频率CKV波形。
  6. 一种栅极扫描线驱动模块，其中，所述驱动模块用于形成变值频率CKV波形，其包括用于产生高频基准信号晶振及与用于将高频基准信号降频形成变值频率CKV波形的可变值降频模块，所述可变值降频模块包括变值计数器及触发器。
  7. 根据权利要求6所述的栅极扫描线驱动模块，其中，所述变值计数器包括定值计数器、以及加法器和/或减法器。
  8. 一种TFT-LCD显示面板，所述TFT-LCD显示面板包括像素阵列及若干栅极扫描线，其中所述栅极扫描线通过权利要求1所述的方法驱动。
PCT/CN2016/088697 2016-05-04 2016-07-05 栅极扫描线驱动方法、驱动模块及tft-lcd显示面板 Ceased WO2017190416A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/119,719 US10170066B2 (en) 2016-05-04 2016-07-05 Driving method and driving module for gate scanning line and TFT-LCD display panel

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201610288480.5A CN105761691A (zh) 2016-05-04 2016-05-04 栅极扫描线驱动方法、驱动模块及tft-lcd显示面板
CN201610288480.5 2016-05-04

Publications (1)

Publication Number Publication Date
WO2017190416A1 true WO2017190416A1 (zh) 2017-11-09

Family

ID=56323349

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/088697 Ceased WO2017190416A1 (zh) 2016-05-04 2016-07-05 栅极扫描线驱动方法、驱动模块及tft-lcd显示面板

Country Status (3)

Country Link
US (1) US10170066B2 (zh)
CN (1) CN105761691A (zh)
WO (1) WO2017190416A1 (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106128408A (zh) * 2016-09-18 2016-11-16 深圳市华星光电技术有限公司 一种液晶显示面板的驱动电路及液晶显示面板
CN106898325A (zh) * 2017-04-27 2017-06-27 南京中电熊猫平板显示科技有限公司 液晶显示面板装置及其驱动方法
CN108806631A (zh) * 2018-07-06 2018-11-13 青岛海信电器股份有限公司 一种驱动控制方法、装置及液晶电视
US11315327B1 (en) * 2018-11-02 2022-04-26 Facebook Technologies, Llc. Beam-racing fallbacks in a display engine
KR102870521B1 (ko) * 2020-08-04 2025-10-16 삼성디스플레이 주식회사 표시장치
CN115699156A (zh) * 2021-05-25 2023-02-03 京东方科技集团股份有限公司 用于显示面板的控制方法及其控制装置、显示装置
CN117980979A (zh) * 2022-08-31 2024-05-03 京东方科技集团股份有限公司 驱动方法和显示装置
JP2025115702A (ja) * 2024-01-26 2025-08-07 キヤノン株式会社 発光装置、表示装置、光電変換装置、電子機器、照明装置及び移動体

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101191924A (zh) * 2006-11-24 2008-06-04 奇美电子股份有限公司 液晶显示面板数据信号失真补偿的方法与电路
WO2013187196A1 (ja) * 2012-06-15 2013-12-19 シャープ株式会社 表示装置および表示方法
CN104361877A (zh) * 2014-12-09 2015-02-18 京东方科技集团股份有限公司 一种显示面板的驱动方法、其驱动装置及显示装置
CN104361878A (zh) * 2014-12-10 2015-02-18 京东方科技集团股份有限公司 一种显示面板、其驱动方法及显示装置
CN104718704A (zh) * 2012-10-25 2015-06-17 株式会社特瑞君思半导体 转换器

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI319556B (en) * 2005-12-23 2010-01-11 Chi Mei Optoelectronics Corp Compensation circuit and method for compensate distortion of data signals of liquid crystal display device
CN201159982Y (zh) * 2008-02-29 2008-12-03 上海广电光电子有限公司 液晶显示装置
US8982027B2 (en) * 2011-07-28 2015-03-17 Shenzhen China Star Optoelectronics Technology Co., Ltd. LCD drive circuit and driving method for scanning at least two adjacent scan lines simultaneously
CN102568430A (zh) * 2012-03-06 2012-07-11 深圳市华星光电技术有限公司 一种液晶面板的驱动方法、显示驱动电路及液晶显示装置
CN103745694A (zh) * 2013-11-27 2014-04-23 深圳市华星光电技术有限公司 一种显示面板的驱动方法和驱动电路
CN104021768B (zh) * 2014-05-28 2016-08-31 京东方科技集团股份有限公司 一种显示装置及其驱动方法
CN105139818B (zh) * 2015-09-29 2019-02-19 南京中电熊猫液晶显示科技有限公司 一种液晶显示面板的驱动方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101191924A (zh) * 2006-11-24 2008-06-04 奇美电子股份有限公司 液晶显示面板数据信号失真补偿的方法与电路
WO2013187196A1 (ja) * 2012-06-15 2013-12-19 シャープ株式会社 表示装置および表示方法
CN104718704A (zh) * 2012-10-25 2015-06-17 株式会社特瑞君思半导体 转换器
CN104361877A (zh) * 2014-12-09 2015-02-18 京东方科技集团股份有限公司 一种显示面板的驱动方法、其驱动装置及显示装置
CN104361878A (zh) * 2014-12-10 2015-02-18 京东方科技集团股份有限公司 一种显示面板、其驱动方法及显示装置

Also Published As

Publication number Publication date
US10170066B2 (en) 2019-01-01
US20180151140A1 (en) 2018-05-31
CN105761691A (zh) 2016-07-13

Similar Documents

Publication Publication Date Title
WO2017190416A1 (zh) 栅极扫描线驱动方法、驱动模块及tft-lcd显示面板
US10741139B2 (en) Goa circuit
US10235958B2 (en) Gate driving circuits and liquid crystal devices
US8902203B2 (en) Liquid crystal display and pulse adjustment circuit thereof
US10121442B2 (en) Driving methods and driving devices of gate driver on array (GOA) circuit
US8643638B2 (en) Multiple mode driving circuit and display device including the same
CN111489710A (zh) 显示器件的驱动方法、驱动器以及显示器件
JP2009086630A (ja) 液晶表示装置の駆動方法
US10204579B2 (en) GOA circuits, display devices and the driving methods of the GOA circuits
US10657864B2 (en) Drive circuit of display device and driving method for display device having single-ended to differential modules
WO2016201730A1 (zh) 一种驱动电路及其驱动方法、液晶显示器
US10984745B2 (en) Driving method and device of display panel, and display device
WO2016070540A1 (zh) 阵列基板、像素驱动方法和显示装置
WO2018028017A1 (zh) 液晶显示面板及液晶显示装置
WO2019033492A1 (zh) Goa电路及液晶显示装置
JP2011027915A (ja) 液晶表示装置
US9741313B2 (en) Gate driving circuit with an auxiliary circuit for stabilizing gate signals
US20190049768A1 (en) Goa circuit and liquid crystal display device
US10360866B2 (en) GOA circuit and liquid crystal display device
US10290274B2 (en) Array substrate
WO2016179856A1 (zh) 一种阵列基板和显示装置
US20090135121A1 (en) Driving circuit and related method of a display apparatus
CN106033282A (zh) 显示器及触控显示器
KR102244985B1 (ko) 표시패널
KR101112063B1 (ko) 게이트드라이버 및 이를 구비한 액정표시장치

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15119719

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: DE

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16900938

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 16900938

Country of ref document: EP

Kind code of ref document: A1