WO2018120324A1 - 像素结构、阵列基板及显示面板 - Google Patents

像素结构、阵列基板及显示面板 Download PDF

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Publication number
WO2018120324A1
WO2018120324A1 PCT/CN2017/071283 CN2017071283W WO2018120324A1 WO 2018120324 A1 WO2018120324 A1 WO 2018120324A1 CN 2017071283 W CN2017071283 W CN 2017071283W WO 2018120324 A1 WO2018120324 A1 WO 2018120324A1
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Prior art keywords
pixel
pixel unit
voltage
line
signal
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PCT/CN2017/071283
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English (en)
French (fr)
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应见见
杜鹏
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深圳市华星光电技术有限公司
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Priority to US15/329,368 priority Critical patent/US10283061B2/en
Publication of WO2018120324A1 publication Critical patent/WO2018120324A1/zh

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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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Definitions

  • the present invention relates to the field of liquid crystal display technologies, and in particular, to a pixel structure, and to an array substrate having the pixel structure, and a display panel having the array substrate.
  • low color shift (Low Color) technology is generally employed to increase the viewing angle of the display device to achieve a wide viewing angle of the display device.
  • a low color shift technique is usually implemented by designing a 3T (three TFT) structure.
  • FIG. 1 shows a schematic diagram of a prior art 3T structure.
  • the 3T structure includes three TFTs disposed in the same pixel unit.
  • the pixel unit includes a main pixel unit 1 provided with a first TFT and a sub-pixel unit 2 having a second TFT and a third TFT (and a shared TFT).
  • the pixel electrode of the sub-pixel unit 2 is discharged to the regulated potential (ie, the Acom potential) through the third TFT, thereby achieving a potential different from that of the pixel electrode of the main pixel unit 1, thereby realizing that the main pixel unit 1 and the sub-pixel unit 2 have different The pixel voltage.
  • the gamma curve you can achieve a large viewing angle.
  • the large viewing angle of the display panel does not need to be adjusted.
  • the same voltage-stabilizing signal is always supplied to all of the voltage stabilizing lines, which causes the main pixel unit 1 and the sub-pixel unit 2 to always have a potential difference. Therefore, the above 3T structure causes a decrease in display panel transmittance and contrast when displaying a high grayscale image.
  • the technical problem to be solved by the present invention is that the voltage stabilizing lines of the 3T structure in the prior art are connected to each other, so that when the low-order image and the high-gray image are displayed, the same voltage stabilizing signal is always supplied to all the voltage stabilizing lines.
  • This causes the main pixel unit and the sub-pixel unit to always have a potential difference, which causes a decrease in display panel transmittance and contrast.
  • the present invention provides a pixel structure, an array substrate, and a display panel.
  • a pixel structure including a plurality of pixel unit groups, each pixel unit group including a plurality of pixel units sequentially arranged in a data line direction; wherein each pixel unit include:
  • a main pixel unit configured to receive a scan signal from the scan line, thereby receiving a data signal from the data line, and having a main pixel voltage
  • a sub-pixel unit configured to receive a scan signal from the scan line, thereby receiving a data signal from the data line and a voltage stabilization signal from the voltage stabilization line, and having a sub-pixel voltage
  • Each of the voltage stabilizing lines is in one-to-one correspondence with each group of pixel units, and the voltage stabilizing line is configured to provide a voltage stabilizing signal to each pixel unit in the corresponding pixel unit group;
  • the voltage stabilizing line When the high gray scale image is displayed, the voltage stabilizing line provides the same voltage signal as the data signal received by the pixel unit currently turned on in the corresponding pixel unit group.
  • the voltage-stabilizing signal provided by the voltage stabilizing line is different from the data signal received by the pixel unit currently turned on in the corresponding pixel unit group.
  • the voltage stabilizing signal provided by the voltage stabilizing line is a direct current signal.
  • the voltage stabilizing line and the drain of the switching element of the sub-pixel unit of each pixel unit in the pixel unit group corresponding thereto are disposed in the same layer.
  • the switching element is a thin film transistor.
  • the column inversion driving mode is employed to drive the pixel structure.
  • the dot inversion driving mode is employed to drive the pixel structure.
  • the flip pixel driving mode is employed to drive the pixel structure.
  • an array substrate comprising:
  • a display panel includes: the above array substrate; a color filter substrate; and a liquid crystal layer disposed between the array substrate and the color filter substrate.
  • the gray scale brightness of the display panel can be improved in the case of displaying a high gray scale image, thereby improving the light transmittance and contrast of the display panel, and the low gray scale image in the display.
  • the large viewing angle compensation function of the display panel is realized in the case.
  • Figure 1 shows a schematic diagram of a 3T structure in the prior art
  • FIG. 2 is a schematic structural diagram of a pixel structure in a column inversion driving mode according to an embodiment of the present invention
  • FIG. 3 is a diagram showing driving voltage waveforms for driving the pixel structure shown in FIG. 2 in one frame time;
  • FIG. 4 is a schematic structural diagram of a pixel structure in a dot inversion driving mode according to an embodiment of the present invention
  • Figure 5 is a diagram showing driving voltage waveforms for driving the pixel structure shown in Figure 4 in one frame time
  • FIG. 6 is a schematic structural diagram of a pixel structure in a flip pixel driving mode according to an embodiment of the present invention.
  • Fig. 7 is a view showing a driving voltage waveform for driving the pixel structure shown in Fig. 6 in one frame time.
  • an embodiment of the present invention provides a pixel structure.
  • the pixel structure of the embodiment of the present invention includes a plurality of pixel unit groups.
  • Each of the pixel unit groups includes a plurality of pixel units sequentially arranged in the data line direction.
  • the scanning lines are arranged in the horizontal direction
  • the data lines are arranged in the vertical direction.
  • Each pixel unit includes one main pixel unit 1 and one sub-pixel unit 2.
  • the main pixel unit 1 and the sub-pixel unit 2 belonging to the same pixel unit are controlled by the same scanning line and the same data line.
  • the main pixel unit 1 is arranged to receive a scan signal from a scan line, thereby receiving a data signal from the data line, and having a main pixel voltage.
  • the sub-pixel unit 2 is arranged to receive a scan signal from the same scan line as the main pixel unit 1, and further receive a data signal from the same data line as the main pixel unit 1 and a voltage stabilization signal from the voltage stabilization line, and has sub-pixels Voltage.
  • Each of the voltage stabilizing lines has a one-to-one correspondence with each group of pixel units. That is, each pixel unit group uniquely corresponds to one voltage stabilizing line.
  • the voltage stabilizing line is arranged to provide a voltage stabilizing signal to each pixel unit in its corresponding pixel unit group.
  • the voltage stabilizing line When displaying a high grayscale image, the voltage stabilizing line provides the same voltage signal as the data signal received by the pixel unit currently turned on in the corresponding pixel unit group.
  • the voltage-stabilizing signal provided by the voltage-stabilizing line is different from the data signal received by the pixel unit currently turned on in the corresponding pixel unit group.
  • the high grayscale image refers to an image having a grayscale value of 255.
  • the medium-low grayscale image refers to an image in which the grayscale value satisfies [0, 255), that is, an image in which the grayscale value is greater than or equal to 0 and less than 255.
  • the voltage stabilization signal when displaying a high gray scale image, for each pixel unit in the pixel structure, since the voltage stabilization signal is the same as the current data signal, the voltage stabilization signal does not pull down the sub pixel voltage. In this case, the main pixel voltage is equal to the sub-pixel voltage. It can be seen that, in the case of displaying a high gray scale image, the pixel structure of the embodiment is applied, which is advantageous for improving the gray scale brightness of the display panel, thereby improving the light transmittance and contrast of the display panel.
  • the voltage stabilization signal when displaying a medium-low gray-scale image, for each pixel unit in the pixel structure, since the voltage stabilization signal is different from the current data signal, the voltage stabilization signal pulls down the sub-pixel voltage. In this case, the main pixel voltage is different from the sub-pixel voltage. It can be seen that, in the case of displaying a medium-low gray-scale image, the pixel structure of the embodiment is applied to realize a large viewing angle compensation function that is advantageous for realizing the display panel.
  • This embodiment optimizes the voltage stabilizing line on the basis of the first embodiment.
  • the voltage-stabilizing signal provided by the voltage stabilizing line is a DC signal.
  • the switching element of this embodiment is a thin film transistor.
  • the drain line and the drain of the switching element of the sub-pixel unit 2 of each pixel unit in the pixel unit group corresponding thereto are disposed in the same layer.
  • the Zener line can be directly connected to the drain of the switching element disposed in the same layer without connecting to the drain via the via.
  • the one-time patterning process can be used to synchronously form the drains of the voltage stabilizing lines and the switching elements, thereby reducing the manufacturing steps and the difficulty, and improving the manufacturing efficiency and product performance of the display device.
  • the column inversion driving mode, the dot inversion driving mode, and the flip pixel driving mode are sequentially used to drive the pixel structure described in Embodiment 1 or Embodiment 2. Also, when displaying a high grayscale image, the forward data signal transmitted by the data line is set to 14.2 V, and the negative data signal transmitted by the data line is set to -0.2 V. It is worth noting that the actual data signal can be adjusted according to the panel conditions, and will not be described in detail herein.
  • a column inversion driving mode (Column Inversion) is employed to drive the pixel structure.
  • the polarities of the data signals corresponding to the adjacent two columns of pixels are opposite, as shown by the positive and negative polarity symbols in FIG.
  • FIG. 2 is a schematic structural diagram of a pixel structure in a column inversion driving mode according to an embodiment of the present invention.
  • Fig. 3 is a view showing a driving voltage waveform for driving the pixel structure shown in Fig. 2 in one frame time.
  • the laterally arranged scan lines are interleaved with the longitudinally arranged data lines and the longitudinally arranged voltage lines.
  • the voltage regulation line is arranged in a similar manner to the data line. There is no connection between the voltage regulator lines.
  • Each column of the voltage stabilizing line is in one-to-one correspondence with one pixel unit group 3 (shown by the dotted line on the left side in FIG. 2) for providing the same voltage stabilizing signal for each pixel unit in the pixel unit group 3.
  • Each of the pixel units includes a main pixel unit 1 provided with a first TFT and a first pixel electrode, and a sub-pixel unit 2 having a second TFT, a third TFT (and a shared TFT), and a second pixel electrode.
  • the first TFT, the second TFT, and the third TFT constitute a 3T structure.
  • the gate of the first TFT, the gate of the second TFT, and the gate of the third TFT are connected to the same scan line to be simultaneously turned on by the scan line.
  • the source of the first TFT and the source of the second TFT are connected to the same data line.
  • the drain of the first TFT is connected to the first pixel electrode of the main pixel unit 1, and the drain of the second TFT is connected to the second pixel electrode of the sub-pixel unit 2.
  • the drain of the second TFT is also connected to the source of the third TFT, and the drain of the third TFT is connected to the corresponding voltage stabilizing line.
  • the Nth voltage stabilizing line supplies the voltage stabilizing signal Acom N to each of the N-th pixel unit group 3 surrounded by the broken-line frame, and the voltage-stabilizing signal Acom and the N-th line
  • the data signal DATA N provided by the data line is different.
  • the drain of the second TFT can be discharged by using the third TFT that introduces the voltage stabilization signal.
  • the Gamma curve is synchronously adjusted to achieve a large viewing angle effect.
  • the voltage stabilizing line provides a 7V DC signal while the data signal varies from -0.2V to 14.2V.
  • the Nth voltage stabilizing line supplies the voltage stabilizing signal Acom N to each of the Nth pixel unit group 3 surrounded by the broken line frame, and the voltage stabilizing signal Acom N and the Nth strip
  • the data signal DATA N provided by the data line is the same.
  • the voltage stabilization signal is the same as the corresponding data signal.
  • the third TFT does not discharge the drain of the second TFT, so that the sub-pixel voltage is equal to the main pixel voltage. It can be seen that the embodiment is advantageous for improving the high gray level brightness of the panel and improving the transmittance and contrast of the panel.
  • the data signal DATA N is positive polarity
  • the data signal DATA N+1 is negative polarity.
  • the voltage of the data signal DATA N is 14.2 V
  • the voltage of the data signal DATA N+1 is -0.2 V.
  • the voltage of the voltage stabilizing signal Acom N is 14.2 V
  • the voltage of the voltage stabilizing signal Acom N+1 is -0.2 V. It can be seen that when the high gray scale image is displayed, the voltage stabilization signal and the corresponding data signal potential are the same, so that the third TFT does not function as a discharge.
  • the potential of the voltage stabilizing signal Acom can be switched according to different display images to achieve brightness enhancement under high grayscale image display, thereby achieving the purpose of improving panel transmittance and contrast.
  • a dot inversion driving mode (Dot Inversion) is employed to drive the pixel structure.
  • Dot Inversion driving mode the polarities of the data signals corresponding to adjacent pixels (including laterally adjacent and longitudinally adjacent) are opposite, as shown by the positive and negative polarity symbols in FIG.
  • FIG. 4 is a schematic structural diagram of a pixel structure in a dot inversion driving mode according to an embodiment of the present invention.
  • Fig. 5 is a view showing a driving voltage waveform for driving the pixel structure shown in Fig. 4 in one frame time.
  • the laterally arranged scan lines are interlaced with the longitudinally arranged data lines and the longitudinally arranged voltage lines.
  • the voltage regulation line is arranged in a similar manner to the data line. There is no connection between the voltage regulator lines.
  • Each column of the voltage stabilizing line is in one-to-one correspondence with one pixel unit group 3 (shown by the dotted line on the left side in FIG. 4) for providing the same voltage stabilizing signal for each pixel unit in the pixel unit group 3.
  • Each of the pixel units includes a main pixel unit 1 provided with a first TFT and a first pixel electrode, and a sub-pixel unit 2 having a second TFT, a third TFT (and a shared TFT), and a second pixel electrode.
  • the first TFT, the second The TFT and the third TFT constitute a 3T structure.
  • the gate of the first TFT, the gate of the second TFT, and the gate of the third TFT are connected to the same scan line, and are synchronously turned on by the scan line.
  • the source of the first TFT and the source of the second TFT are connected to the same data line.
  • the drain of the first TFT is connected to the first pixel electrode of the main pixel unit 1, and the drain of the second TFT is connected to the second pixel electrode of the sub-pixel unit 2.
  • the drain of the second TFT is also connected to the source of the third TFT, and the drain of the third TFT is connected to the corresponding voltage stabilizing line.
  • the Nth voltage stabilizing line supplies the voltage stabilizing signal Acom N to each of the N-th pixel unit group 3 surrounded by the broken-line frame, and the voltage-stabilizing signal Acom and the N-th line
  • the data signal DATA N provided by the data line is different.
  • the drain of the second TFT can be discharged by using the third TFT that introduces the voltage stabilization signal.
  • the Gamma curve is synchronously adjusted to achieve a large viewing angle effect.
  • the voltage stabilizing line provides a 7V DC signal while the data signal varies from -0.2V to 14.2V.
  • the Nth voltage stabilizing line supplies the voltage stabilizing signal Acom N to each of the Nth pixel unit group 3 surrounded by the broken line frame, and the voltage stabilizing signal Acom N and the Nth strip
  • the data signal DATA N provided by the data line is the same.
  • the voltage stabilization signal is the same as the corresponding data signal.
  • the third TFT does not discharge the drain of the second TFT, so that the sub-pixel voltage is equal to the main pixel voltage. It can be seen that the embodiment is advantageous for improving the high gray level brightness of the panel and improving the transmittance and contrast of the panel.
  • the leakage mechanism of the third TFT will be disabled, so that the main pixel voltage and the sub-pixel voltage are the same, and the potential difference from the signal CF com is the largest, so that the liquid crystal deflection angle is large.
  • the pixel area corresponding to the main pixel unit 1 and the pixel area corresponding to the sub-pixel unit 2 are kept uniform, so that the transmittance and contrast of the panel can be improved.
  • the Nth data line and the N+1th data line adjacent thereto are opposite in polarity, and the Mth scanning line and the The polarity of the data signals of the pixels corresponding to the M+1 scan lines are also opposite.
  • the switching time tw of the data signal is the charging time of one pixel.
  • the regulated signal is synchronized with the corresponding data signal and equipotential. That is, the voltage stabilizing signal Acom N is the same as the data signal DATA N, and the voltage stabilizing signal Acom N+1 is the same as the data signal DATA N+1. In this way, it is possible to realize that the third TFT does not discharge the drain TFT of the second TFT when the high gray scale image is displayed, thereby improving the transmittance and contrast of the panel.
  • the flip pixel driving mode (Flip Pixel) is used to drive the pixel structure.
  • the flip pixel driving mode refers to an effect of implementing the dot inversion driving mode by means of the column inversion driving mode.
  • the polarities of the data signals corresponding to adjacent pixels are opposite, as shown by the positive and negative polarity symbols in FIG.
  • FIG. 6 is a schematic structural diagram of a pixel structure in a flip pixel driving mode according to an embodiment of the present invention.
  • Fig. 7 is a view showing a driving voltage waveform for driving the pixel structure shown in Fig. 6 in one frame time.
  • the laterally arranged scan lines are interleaved with the longitudinally arranged data lines and the longitudinally arranged voltage lines.
  • the voltage regulation line is arranged in a similar manner to the data line. There is no connection between the voltage regulator lines.
  • Each column of the voltage stabilizing line is in one-to-one correspondence with one pixel unit group 3 (shown by the dotted line on the left side in FIG. 6) for providing the same voltage stabilizing signal for each pixel unit in the pixel unit group 3.
  • Each of the pixel units includes a main pixel unit 1 provided with a first TFT and a first pixel electrode, and a sub-pixel unit 2 having a second TFT, a third TFT (and a shared TFT), and a second pixel electrode.
  • the first TFT, the second TFT, and the third TFT constitute a 3T structure.
  • the gate of the first TFT, the gate of the second TFT, and the gate of the third TFT are connected to the same scan line, and are synchronously turned on by the scan line.
  • the source of the first TFT and the source of the second TFT are connected to the same data line.
  • the drain of the first TFT is connected to the first pixel electrode of the main pixel unit 1, and the drain of the second TFT is connected to the second pixel electrode of the sub-pixel unit 2.
  • the drain of the second TFT is also connected to the source of the third TFT, and the drain of the third TFT is connected to the corresponding voltage stabilizing line.
  • the Nth voltage stabilizing line supplies the voltage stabilizing signal Acom N to each of the N-th pixel unit group 3 surrounded by the broken-line frame, and the voltage-stabilizing signal Acom and the N-th line
  • the data signal DATA N provided by the data line is different.
  • the drain of the second TFT can be discharged by using the third TFT that introduces the voltage stabilization signal.
  • the Gamma curve is synchronously adjusted to achieve a large viewing angle effect.
  • the voltage stabilizing line provides a 7V DC signal while the data signal varies from -0.2V to 14.2V. The arrangement can realize the discharge of the third TFT to the second TFT, so that the main pixel voltage is different from the sub-pixel voltage, thereby realizing a large viewing angle compensation function.
  • the Nth voltage stabilizing line supplies a voltage stabilizing signal Acom N to each of the Nth pixel unit groups 3 surrounded by the broken line frame, and the voltage stabilizing signal Acom N is currently turned on.
  • the data signals (DATA N or DATA N+1) received by the pixel unit are the same.
  • the voltage stabilizing signal Acom N is the same as the data signal DATA N .
  • the voltage stabilizing signal Acom N is the same as the data signal DATA N+1.
  • the voltage stabilization signal is the same as the data signal corresponding to the currently turned on pixel unit.
  • the third TFT does not discharge the drain of the second TFT, so that the sub-pixel voltage is equal to the main pixel voltage. It can be seen that the embodiment is advantageous for improving the high gray level brightness of the panel and improving the transmittance and contrast of the panel.
  • the leakage mechanism of the third TFT will be disabled, so that the main pixel voltage and the sub-pixel voltage are the same, and the potential difference from the signal CF com is the largest, so that the liquid crystal deflection angle is large.
  • the pixel area corresponding to the main pixel unit 1 and the pixel area corresponding to the sub-pixel unit 2 are kept uniform, so that the transmittance and contrast of the panel can be improved.
  • the Nth data line and the N+1th data line adjacent thereto are opposite in polarity, and the pixel flip design realizes dot inversion.
  • the data signal corresponding to the pixel unit connected to the Nth voltage stabilizing line includes a data signal DATA N and a data signal DATA N+1. Therefore, the regulated signal is switched between the data signals DATA N and DATA N+1, and the switching time tw is the charging time of one pixel. Of course, the switching time can be adjusted according to the actual charging condition of the panel. Similarly, the potential of the regulated signal Acom N+1 is switched between the data signals DATA N+1 and DATA N+2.
  • the voltages of the voltage regulator signals Acom N and Acom N+1 are opposite. In this way, it is possible to realize that the third TFT does not discharge the drain TFT of the second TFT when the high gray scale image is displayed, thereby improving the transmittance and contrast of the panel.
  • the present embodiment provides an array substrate including a plurality of scanning lines and a plurality of data lines which are criss-crossed, and a pixel structure according to any one of Embodiments 1 to 5.
  • the gray scale brightness of the display panel can be improved in the case of displaying a high gray scale image, thereby improving the light transmittance and contrast of the display panel, and displaying the low gray scale image in the display.
  • the large viewing angle compensation function of the display panel is realized in the case.
  • the embodiment provides a display panel including an array substrate, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate.
  • the array substrate is the array substrate described in the above sixth embodiment.
  • the display panel described in this embodiment can be applied to, for example, a mobile phone, a notebook computer, a tablet computer, or a television.
  • the gray of the display panel can be improved while displaying a high gray scale image.
  • the brightness of the order thereby improving the light transmittance and contrast of the display panel, and realizing the large viewing angle compensation function of the display panel in the case of displaying a low-gray image in the middle.

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Abstract

一种像素结构、阵列基板及显示面板。在像素结构中，稳压线设置为向相应的像素单元组（3）中的各个像素单元提供稳压信号；在显示高灰阶图像时，稳压线提供的稳压信号（Acom）和相应的像素单元组中（3）当前开启的像素单元接收的数据信号（DATA）相同。在显示高灰阶图像时提高显示面板的光穿透率和对比度。

Description

像素结构、阵列基板及显示面板
本申请要求享有2016年12月30日提交的名称为“像素结构、阵列基板及显示面板”的中国专利申请CN201611257495.1的优先权，其全部内容通过引用并入本文中。
技术领域
本发明涉及液晶显示技术领域，尤其涉及一种像素结构，还涉及具有该像素结构的阵列基板，以及具有该阵列基板的显示面板。
背景技术
随着液晶显示技术的发展，液晶显示器的分辨率越来越高，呈现出的画质越来越清晰，同时像素尺寸越来越小。为了确保显示器的画面质量，像素设计就需要满足更高的要求。在现有技术中，通常采用低色偏(Low Color)技术来增加显示设备的视角，以实现显示设备的广视角。在现有技术中，由于不易出现残像等面板问题，通常采用设计3T(三TFT)结构的方式来实现低色偏技术。
图1示出了现有技术中3T结构的示意图。如图1所示，3T结构包括设置在同一像素单元中的三个TFT。其中，像素单元包括设置有第一TFT的主像素单元1以及具有第二TFT和第三TFT(及共享TFT)的子像素单元2。子像素单元2的像素电极通过第三TFT放电到稳压电位(即Acom电位)上，从而达到与主像素单元1的像素电极不同的电位，进而实现主像素单元1、子像素单元2具有不同的像素电压。通过调整伽马(gamma)曲线，即可实现提升大视角的效果。在上述3T结构中，用于提供稳压电位的所有稳压线连接在一起。无论在显示255高灰阶图像的情况下，还是在显示中低灰阶图像的情况下，各条稳压线提供的稳压信号都相同。
然而，在显示高灰阶图像的情况下，显示面板的大视角是不需要调整的。而利用上述3T结构显示中低阶图像以及高灰阶图像时，始终会向所有的稳压线提供同样的稳压信号，这使得主像素单元1和子像素单元2始终存在电位差。因此，上述3T结构会导致在显示高灰阶图像时显示面板穿透率和对比度的下降。
发明内容
本发明所要解决的技术问题是由于现有技术中3T结构的稳压线彼此相连，使得在显示中低阶图像以及高灰阶图像时，始终会向所有的稳压线提供同样的稳压信号，这使得主像素单元和子像素单元始终存在电位差，从而会导致显示面板穿透率和对比度的下降。
为了解决上述技术问题，本发明提供了一种像素结构、阵列基板及显示面板。
根据本发明的第一个方面，提供了一种像素结构，其包括多个像素单元组，每个像素单元组包括沿数据线方向顺次排布的多个像素单元；其中，每个像素单元包括：
主像素单元，设置为接收来自扫描线的扫描信号，进而接收来自数据线的数据信号，而具有主像素电压；以及
子像素单元，设置为接收来自所述扫描线的扫描信号，进而接收来自所述数据线的数据信号以及来自稳压线的稳压信号，而具有子像素电压；
其中，各条稳压线分别与各组像素单元组一一对应，所述稳压线设置为向与其相对应的像素单元组中的各个像素单元提供稳压信号；
在显示高灰阶图像时，所述稳压线提供的稳压信号和与其相对应的像素单元组中当前开启的像素单元接收的数据信号相同。
优选的是，在显示中低灰阶图像时，所述稳压线提供的稳压信号不同于与其相对应的像素单元组中当前开启的像素单元接收的数据信号。
优选的是，在显示中低灰阶图像时，所述稳压线提供的稳压信号为直流信号。
优选的是，所述稳压线和与其相对应的像素单元组中各个像素单元的子像素单元的开关元件的漏极同层设置。
优选的是，所述开关元件为薄膜晶体管。
优选的是，采用列反转驱动模式来驱动所述像素结构。
优选的是，采用点反转驱动模式来驱动所述像素结构。
优选的是，采用翻转像素驱动模式来驱动所述像素结构。
根据本发明的第二个方面，提供了一种阵列基板，其包括：
纵横交错的多条扫描线和多条数据线；以及上述像素结构。
根据本发明的第三个方面，提供了一种显示面板，其包括：上述阵列基板；彩膜基板；以及设置在所述阵列基板和所述彩膜基板之间的液晶层。
与现有技术相比，上述方案中的一个或多个实施例可以具有如下优点或有益效果：
应用本实施例所述的像素结构，既能够在显示高灰阶图像的情况下提高显示面板的灰阶亮度，从而提高显示面板的光穿透率和对比度，又能够在显示中低灰阶图像的情况下实现显示面板的大视角补偿功能。
本发明的其它特征和优点将在随后的说明书中阐述，并且部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例共同用于解释本发明，并不构成对本发明的限制。在附图中：
图1示出了现有技术中3T结构的示意图；
图2示出了本发明实施例列反转驱动模式下的像素结构的结构示意图；
图3示出了在一帧时间内，用于驱动图2所示的像素结构的驱动电压波形图；
图4示出了本发明实施例点反转驱动模式下的像素结构的结构示意图；
图5示出了在一帧时间内，用于驱动图4所示的像素结构的驱动电压波形图；
图6示出了本发明实施例翻转像素驱动模式下的像素结构的结构示意图；
图7示出了在一帧时间内，用于驱动图6所示的像素结构的驱动电压波形图。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术手段来解决技术问题，并达成技术效果的实现过程能充分理解并据以实施。需要说明的是，只要不构成冲突，本发明中的各个实施例以及各实施例中的各个特征可以相互结合，所形成的技术方案均在本发明的保护范围之内。
在现有技术中，采用传统的3T结构显示中低阶图像以及高灰阶图像时，始终会向所有的稳压线提供同样的稳压信号，这使得主像素单元和子像素单元始终存在电位差。可以看出，传统3T结构会导致在显示高灰阶图像时显示面板穿透率和对比度的下降。
为解决现有技术中存在的上述技术问题，本发明实施例提供了一种像素结构。
实施例一
本发明实施例的像素结构包括多个像素单元组。每个像素单元组包括沿数据线方向顺次排布的多个像素单元。在本实施例中，扫描线沿水平方向布设，数据线沿竖直方向布设。每个像素单元包括一个主像素单元1和一个子像素单元2。隶属于同一个像素单元的主像素单元1和子像素单元2受控于同一条扫描线和同一条数据线。
具体地，在一个像素单元中，主像素单元1设置为接收来自扫描线的扫描信号，进而接收来自数据线的数据信号，而具有主像素电压。子像素单元2设置为接收来自与主像素单元1相同的扫描线的扫描信号，进而接收来自与主像素单元1相同的数据线的数据信号以及来自稳压线的稳压信号，而具有子像素电压。
各条稳压线分别与各组像素单元组一一对应。即，每个像素单元组唯一地对应一条稳压线。稳压线设置为向与其相对应的像素单元组中的各个像素单元提供稳压信号。
在显示高灰阶图像时，稳压线提供的稳压信号和与其相对应的像素单元组中当前开启的像素单元接收的数据信号相同。而在显示中低灰阶图像时，稳压线提供的稳压信号不同于与其相对应的像素单元组中当前开启的像素单元接收的数据信号。这里，高灰阶图像是指灰阶值为255的图像。中低灰阶图像是指灰阶值满足[0,255)的图像，即灰阶值大于或者等于0、并且小于255的图像。
在本实施例中，在显示高灰阶图像时，对于像素结构中的每个像素单元，由于稳压信号与当前数据信号相同，因此稳压信号不会拉低子像素电压。这种情况下，主像素电压等于子像素电压。可以看出，在显示高灰阶图像的情况下，应用本实施例的像素结构，有利于提高显示面板的灰阶亮度，从而提高了显示面板的光穿透率和对比度。
在本实施例中，在显示中低灰阶图像时，对于像素结构中的每个像素单元，由于稳压信号不同于当前数据信号，因此稳压信号会拉低子像素电压。这种情况下，主像素电压不同于子像素电压。可以看出，在显示中低灰阶图像的情况下，应用本实施例的像素结构，实现有利于实现显示面板的大视角补偿功能。
实施例二
本实施例在实施例一的基础上，对稳压线进行优化。
在本实施例中，在显示中低灰阶图像时，稳压线提供的稳压信号为直流信号。另外，本实施例的开关元件为薄膜晶体管。
在本实施例中，稳压线和与其相对应的像素单元组中各个像素单元的子像素单元2的开关元件的漏极同层设置。这样，稳压线可以直接与同层设置的开关元件的漏极相连接，而无需经由过孔与该漏极相连接。
应用本实施例，能够采用一次构图工艺来同步形成稳压线与开关元件的漏极，减小了制程步骤及难度，提高了显示装置的制造效率与产品性能。
在以下的三个实施例中，依次采用列反转驱动模式、点反转驱动模式和翻转像素驱动模式来驱动实施例一或实施例二所述的像素结构。并且，在显示高灰阶图像时，由数据线传输的正向数据信号设定为14.2V，由数据线传输的负向数据信号设定为-0.2V。值得注意的是，实际的数据信号可根据面板情况进行调整，不本文中不再赘述。
实施例三
在本实施例中，采用列反转驱动模式(Column Inversion)来驱动像素结构。在列反转驱动模式下，相邻两列像素对应的数据信号的极性相反，如图2中的正负极性符号所示。
图2示出了本发明实施例列反转驱动模式下的像素结构的结构示意图。图3示出了在一帧时间内，用于驱动图2所示的像素结构的驱动电压波形图。参照图2和图3，横向排布的扫描线，与纵向排布的数据线和纵向排布的稳压线之间纵横交错。稳压线与数据线的排布方式类似。稳压线之间是没有连接的。每列稳压线与一个像素单元组3(如图2中左侧虚线框所示)一一对应，用于为该像素单元组3中的每个像素单元提供同一稳压信号。
每个像素单元包括设置有第一TFT和第一像素电极的主像素单元1，以及具有第二TFT、第三TFT(及共享TFT)和第二像素电极的子像素单元2。其中，第一TFT、第二TFT和第三TFT(即共享TFT)构成了一个3T结构。具体地，第一TFT的栅极、第二TFT的栅极和第三TFT的栅极连接同一条扫描线，以被该条扫描线同步开启。第一TFT的源极和第二TFT的源极连接同一条数据线。第一TFT的漏极连接主像素单元1的第一像素电极，第二TFT的漏极连接子像素单元2的第二像素电极。另外，第二TFT的漏极还连接第三TFT的源极，第三TFT的漏极连接相对应的稳压线。
在显示中低灰阶图像时，第N条稳压线向虚线框包围的第N个像素单元组3中的每一个像素单元提供稳压信号Acom N，并使稳压信号Acom与第N条数据线提供的数据信号DATA N不同。
这样，在显示中低灰阶图像时，能够利用引入稳压信号的第三TFT对第二TFT的漏极进行放电，此时同步调整Gamma曲线，即可实现大视角效果。在本实施例中，稳压线提供7V直流信号，同时数据信号在-0.2V到14.2V的区间里面变化。如此设置可以实现第三TFT对第二TFT的漏极的放电，从而使主像素电压不同于子像素电压，进而实现了大视角补偿功能。
在显示高灰阶图像时，第N条稳压线向虚线框包围的第N个像素单元组3中的每一个像素单元提供稳压信号Acom N，并使稳压信号Acom N与第N条数据线提供的数据信号DATA N相同。
这样，在显示高灰阶图像时，稳压信号与对应的数据信号相同。第三TFT不会对第二TFT的漏极进行放电，从而子像素电压与主像素电压相等。可见，本实施例有利于提升面板的高灰阶亮度，同时提高面板的穿透率和对比度。
在具体实施过程中，参照图3，数据信号DATA N为正极性，数据信号DATA N+1为负极性。在显示高灰阶图像时，数据信号DATA N的电压为14.2V，数据信号DATA N+1的电压为-0.2V。同样地，稳压信号Acom N的电压为14.2V，稳压信号Acom N+1的电压为-0.2V。可见，在显示高灰阶图像时，稳压信号与相对应的数据信号电位相同，从而第三TFT不会起到放电作用。
在具体实施过程中，稳压信号Acom的电位可以根据不同显示图像进行电位的切换，以实现高灰阶图像显示情况下的亮度提升，从而达到提升面板穿透率和对比度的目的。
实施例四
在本实施例中，采用点反转驱动模式(Dot Inversion)来驱动像素结构。在点反转驱动模式下，相邻像素(包括横向相邻和纵向相邻)对应的数据信号的极性都是相反的，如图4中的正负极性符号所示。
图4示出了本发明实施例点反转驱动模式下的像素结构的结构示意图。图5示出了在一帧时间内，用于驱动图4所示的像素结构的驱动电压波形图。参照图4和图5，横向排布的扫描线，与纵向排布的数据线和纵向排布的稳压线之间纵横交错。稳压线与数据线的排布方式类似。稳压线之间是没有连接的。每列稳压线与一个像素单元组3(如图4中左侧虚线框所示)一一对应，用于为该像素单元组3中的每个像素单元提供同一稳压信号。
每个像素单元包括设置有第一TFT和第一像素电极的主像素单元1，以及具有第二TFT、第三TFT(及共享TFT)和第二像素电极的子像素单元2。其中，第一TFT、第二 TFT和第三TFT(即共享TFT)构成了一个3T结构。具体地，第一TFT的栅极、第二TFT的栅极和第三TFT的栅极连接同一条扫描线，被该条扫描线同步开启。第一TFT的源极和第二TFT的源极连接同一条数据线。第一TFT的漏极连接主像素单元1的第一像素电极，第二TFT的漏极连接子像素单元2的第二像素电极。另外，第二TFT的漏极还连接第三TFT的源极，第三TFT的漏极连接相对应的稳压线。
在显示中低灰阶图像时，第N条稳压线向虚线框包围的第N个像素单元组3中的每一个像素单元提供稳压信号Acom N，并使稳压信号Acom与第N条数据线提供的数据信号DATA N不同。
这样，在显示中低灰阶图像时，能够利用引入稳压信号的第三TFT对第二TFT的漏极进行放电，此时同步调整Gamma曲线，即可实现大视角效果。在本实施例中，稳压线提供7V直流信号，同时数据信号在-0.2V到14.2V的区间里面变化。如此设置可以实现第三TFT对第二TFT的漏极的放电，从而使主像素电压不同于子像素电压，进而实现了大视角补偿功能。
在显示高灰阶图像时，第N条稳压线向虚线框包围的第N个像素单元组3中的每一个像素单元提供稳压信号Acom N，并使稳压信号Acom N与第N条数据线提供的数据信号DATA N相同。
这样，在显示高灰阶图像时，稳压信号与对应的数据信号相同。第三TFT不会对第二TFT的漏极进行放电，从而子像素电压与主像素电压相等。可见，本实施例有利于提升面板的高灰阶亮度，同时提高面板的穿透率和对比度。
在具体实施过程中，参照图5，第三TFT的漏电机制将失效，使得主像素电压和子像素电压相同，且与信号CF com的电位差最大，从而液晶偏转角度大。同时，主像素单元1对应的像素区域和子像素单元2对应的像素区域的亮度保持一致，因此可提高面板的穿透率和对比度。
具体地，在点反转驱动模式下，在显示高灰阶图像时，第N条数据线和与其相邻的第N+1条数据线提供的信号极性相反，第M条扫描线和第M+1条扫描线对应的像素的数据信号的极性也是相反的。数据信号的切换时间tw为一个像素的充电时间。当然，该切换时间可根据面板的实际充电情况进行调整。稳压信号与相对应的数据信号同步且等电位。即稳压信号Acom N与数据信号DATA N相同，稳压信号Acom N+1与数据信号DATA N+1相同。这样，能够实现在显示高灰阶图像时，第三TFT不对第二TFT的漏极TFT放电，从而提高了面板的穿透率和对比度。
实施例五
在本实施例中，采用翻转像素驱动模式(Flip Pixel)来驱动像素结构。翻转像素驱动模式是指利用列反转驱动模式的方式来实现点反转驱动模式的效果。在翻转像素驱动模式下，相邻像素(包括横向相邻和纵向相邻)对应的数据信号的极性都是相反的，如图6中的正负极性符号所示。
图6示出了本发明实施例翻转像素驱动模式下的像素结构的结构示意图。图7示出了在一帧时间内，用于驱动图6所示的像素结构的驱动电压波形图。参照图6和图7，横向排布的扫描线，与纵向排布的数据线和纵向排布的稳压线之间纵横交错。稳压线与数据线的排布方式类似。稳压线之间是没有连接的。每列稳压线与一个像素单元组3(如图6中左侧虚线框所示)一一对应，用于为该像素单元组3中的每个像素单元提供同一稳压信号。
每个像素单元包括设置有第一TFT和第一像素电极的主像素单元1，以及具有第二TFT、第三TFT(及共享TFT)和第二像素电极的子像素单元2。其中，第一TFT、第二TFT和第三TFT(即共享TFT)构成了一个3T结构。具体地，第一TFT的栅极、第二TFT的栅极和第三TFT的栅极连接同一条扫描线，被该条扫描线同步开启。第一TFT的源极和第二TFT的源极连接同一条数据线。第一TFT的漏极连接主像素单元1的第一像素电极，第二TFT的漏极连接子像素单元2的第二像素电极。另外，第二TFT的漏极还连接第三TFT的源极，第三TFT的漏极连接相对应的稳压线。
在显示中低灰阶图像时，第N条稳压线向虚线框包围的第N个像素单元组3中的每一个像素单元提供稳压信号Acom N，并使稳压信号Acom与第N条数据线提供的数据信号DATA N不同。
这样，在显示中低灰阶图像时，能够利用引入稳压信号的第三TFT对第二TFT的漏极进行放电，此时同步调整Gamma曲线，即可实现大视角效果。在本实施例中，稳压线提供7V直流信号，同时数据信号在-0.2V到14.2V的区间里面变化。如此设置可以实现第三TFT对第二TFT的放电，从而使主像素电压不同于子像素电压，进而实现了大视角补偿功能。
在显示高灰阶图像时，第N条稳压线向虚线框包围的第N个像素单元组3中的每一个像素单元提供稳压信号Acom N，并使稳压信号Acom N与当前被开启的像素单元接收的数据信号(DATA N或者DATA N+1)相同。参照图6和图7，在开启虚线框中的第M个像素单元时，稳压信号Acom N与数据信号DATA N相同。在开启虚线框中的第M+1个像素单元中，稳压信号Acom N与数据信号DATA N+1相同。
这样，在显示高灰阶图像时，稳压信号与当前被开启的像素单元对应的数据信号相同。第三TFT不会对第二TFT的漏极进行放电，从而子像素电压与主像素电压相等。可见，本实施例有利于提升面板的高灰阶亮度，同时提高面板的穿透率和对比度。
在具体实施过程中，参照图7，第三TFT的漏电机制将失效，使得主像素电压和子像素电压相同，且与信号CF com的电位差最大，从而液晶偏转角度大。同时，主像素单元1对应的像素区域和子像素单元2对应的像素区域的亮度保持一致，因此可提高面板的穿透率和对比度。
具体地，在翻转像素驱动模式下，在显示高灰阶图像时，第N条数据线和与其相邻的第N+1条数据线提供的信号极性相反，像素翻转设计实现了点反转驱动模式的效果。参照图7，与第N条稳压线连接像素单元对应的数据信号包括数据信号DATA N和数据信号DATA N+1。因此，稳压信号会在数据信号DATA N和DATA N+1之间切换，并且切换时间tw为一个像素的充电时间。当然，该切换时间可根据面板的实际充电情况进行调整。同样地，稳压信号Acom N+1的电位在数据信号DATA N+1和DATA N+2之间切换。可以看出，稳压信号Acom N与Acom N+1的信号极性相反。这样，能够实现在显示高灰阶图像时，第三TFT不对第二TFT的漏极TFT放电，从而提高了面板的穿透率和对比度。
实施例六
本实施例提供了一种阵列基板，其包括纵横交错的多条扫描线和多条数据线，以及如上述实施例一至实施例五中任一项所述的像素结构。
应用本实施例所述的阵列基板，既能够在显示高灰阶图像的情况下提高显示面板的灰阶亮度，从而提高显示面板的光穿透率和对比度，又能够在显示中低灰阶图像的情况下实现显示面板的大视角补偿功能。
实施例七
本实施例提供了一种显示面板，其包括阵列基板、彩膜基板以及设置在阵列基板和彩膜基板之间的液晶层。在本实施例中，阵列基板为上述实施例六所述的阵列基板。本实施例所述的显示面板可应用于例如手机、笔记本电脑、平板电脑、电视中。
应用本实施例所述的显示面板，既能够在显示高灰阶图像的情况下提高显示面板的灰 阶亮度，从而提高显示面板的光穿透率和对比度，又能够在显示中低灰阶图像的情况下实现显示面板的大视角补偿功能。
虽然本发明所公开的实施方式如上，但所述的内容只是为了便于理解本发明而采用的实施方式，并非用以限定本发明。任何本发明所属技术领域内的技术人员，在不脱离本发明所公开的精神和范围的前提下，可以在实施的形式上及细节上作任何的修改与变化，但本发明的保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (20)

  1. 一种像素结构，包括多个像素单元组，每个像素单元组包括沿数据线方向顺次排布的多个像素单元；其中，每个像素单元包括：
    主像素单元，设置为接收来自扫描线的扫描信号，进而接收来自数据线的数据信号，而具有主像素电压；以及
    子像素单元，设置为接收来自所述扫描线的扫描信号，进而接收来自所述数据线的数据信号以及来自稳压线的稳压信号，而具有子像素电压；
    其中，各条稳压线分别与各组像素单元组一一对应，所述稳压线设置为向与其相对应的像素单元组中的各个像素单元提供稳压信号；
    在显示高灰阶图像时，所述稳压线提供的稳压信号和与其相对应的像素单元组中当前开启的像素单元接收的数据信号相同。
  2. 根据权利要求1所述的像素结构，其中，采用列反转驱动模式来驱动所述像素结构。
  3. 根据权利要求1所述的像素结构，其中，采用点反转驱动模式来驱动所述像素结构。
  4. 根据权利要求1所述的像素结构，其中，采用翻转像素驱动模式来驱动所述像素结构。
  5. 根据权利要求1所述的像素结构，其中，在显示中低灰阶图像时，所述稳压线提供的稳压信号不同于与其相对应的像素单元组中当前开启的像素单元接收的数据信号。
  6. 根据权利要求5所述的像素结构，其中，采用列反转驱动模式来驱动所述像素结构。
  7. 根据权利要求5所述的像素结构，其中，采用点反转驱动模式来驱动所述像素结构。
  8. 根据权利要求5所述的像素结构，其中，采用翻转像素驱动模式来驱动所述像素结构。
  9. 根据权利要求5所述的像素结构，其中，在显示中低灰阶图像时，所述稳压线提供的稳压信号为直流信号。
  10. 根据权利要求1所述的像素结构，其中，所述稳压线和与其相对应的像素单元组中各个像素单元的子像素单元的开关元件的漏极同层设置。
  11. 根据权利要求10所述的像素结构，其中，采用列反转驱动模式来驱动所述像素结构。
  12. 根据权利要求10所述的像素结构，其中，采用点反转驱动模式来驱动所述像素结构。
  13. 根据权利要求10所述的像素结构，其中，采用翻转像素驱动模式来驱动所述像素结构。
  14. 根据权利要求10所述的像素结构，其中，所述开关元件为薄膜晶体管。
  15. 一种阵列基板，包括：
    纵横交错的多条扫描线和多条数据线；以及
    像素结构；
    其中，所述像素结构包括多个像素单元组，每个像素单元组包括沿数据线方向顺次排布的多个像素单元；其中，每个像素单元包括：
    主像素单元，设置为接收来自扫描线的扫描信号，进而接收来自数据线的数据信号，而具有主像素电压；以及
    子像素单元，设置为接收来自所述扫描线的扫描信号，进而接收来自所述数据线的数据信号以及来自稳压线的稳压信号，而具有子像素电压；
    其中，各条稳压线分别与各组像素单元组一一对应，所述稳压线设置为向与其相对应的像素单元组中的各个像素单元提供稳压信号；
    在显示高灰阶图像时，所述稳压线提供的稳压信号和与其相对应的像素单元组中当前开启的像素单元接收的数据信号相同。
  16. 根据权利要求15所述的阵列基板，其中，在显示中低灰阶图像时，所述稳压线提供的稳压信号不同于与其相对应的像素单元组中当前开启的像素单元接收的数据信号。
  17. 根据权利要求15所述的阵列基板，其中，所述稳压线和与其相对应的像素单元组中各个像素单元的子像素单元的开关元件的漏极同层设置。
  18. 一种显示面板，包括：
    阵列基板；
    彩膜基板；以及
    设置在所述阵列基板和所述彩膜基板之间的液晶层；
    所述阵列基板，包括：
    纵横交错的多条扫描线和多条数据线；以及
    像素结构；
    其中，所述像素结构包括多个像素单元组，每个像素单元组包括沿数据线方向顺次排布的多个像素单元；其中，每个像素单元包括：
    主像素单元，设置为接收来自扫描线的扫描信号，进而接收来自数据线的数据信号，而具有主像素电压；以及
    子像素单元，设置为接收来自所述扫描线的扫描信号，进而接收来自所述数据线的数据信号以及来自稳压线的稳压信号，而具有子像素电压；
    其中，各条稳压线分别与各组像素单元组一一对应，所述稳压线设置为向与其相对应的像素单元组中的各个像素单元提供稳压信号；
    在显示高灰阶图像时，所述稳压线提供的稳压信号和与其相对应的像素单元组中当前开启的像素单元接收的数据信号相同。
  19. 根据权利要求18所述的显示面板，其中，在显示中低灰阶图像时，所述稳压线提供的稳压信号不同于与其相对应的像素单元组中当前开启的像素单元接收的数据信号。
  20. 根据权利要求18所述的显示面板，其中，所述稳压线和与其相对应的像素单元组中各个像素单元的子像素单元的开关元件的漏极同层设置。
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