WO2019119890A1 - 液晶显示器及其驱动电路、驱动方法 - Google Patents

液晶显示器及其驱动电路、驱动方法 Download PDF

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Publication number
WO2019119890A1
WO2019119890A1 PCT/CN2018/105063 CN2018105063W WO2019119890A1 WO 2019119890 A1 WO2019119890 A1 WO 2019119890A1 CN 2018105063 W CN2018105063 W CN 2018105063W WO 2019119890 A1 WO2019119890 A1 WO 2019119890A1
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Prior art keywords
pixel unit
data line
scan line
row
pixel
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PCT/CN2018/105063
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English (en)
French (fr)
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李泽尧
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惠科股份有限公司
重庆惠科金渝光电科技有限公司
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Priority to US16/954,304 priority Critical patent/US11069316B2/en
Publication of WO2019119890A1 publication Critical patent/WO2019119890A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0465—Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery

Definitions

  • the present disclosure relates to the field of liquid crystal display technology, and in particular to improvements in driving circuits in liquid crystal display devices.
  • liquid crystal display has the characteristics of low power consumption, low radiation, small size, and soft picture, and is widely used in display screens of televisions, mobile phones, and public information.
  • the picture quality of the liquid crystal display is the primary condition for product success, and in many parameters that determine the picture quality, resolution and brightness are two important parameters.
  • a driving circuit of a liquid crystal display device includes: a scan line, a data line, a thin film transistor, a pixel electrode, a common electrode wiring, and the like.
  • the demand for display quality, especially resolution, is further increased, along with improvements in the inherent structure of the array substrate. For example, it is necessary to increase or increase the number of devices such as scan lines, data lines, thin film transistors, and common electrode wiring. Big. The space occupied by these devices will become larger and larger, so that the space occupied by the pixel electrodes will become smaller and smaller, resulting in a decrease in the aperture ratio of the pixel region, a decrease in transmittance, and an influence on the display brightness of the liquid crystal display device.
  • an embodiment of the present disclosure provides a driving circuit, including:
  • a liquid crystal display including: an array substrate disposed opposite to each other, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate,
  • the array substrate includes: at least one scan line; at least one data line disposed across the scan line; a first pixel unit disposed at an intersection of the data line and the scan line; the first pixel unit includes a first pixel electrode and a first switching element, the first pixel electrode connecting the data line and the scan line through the first switching element; a second pixel unit disposed on the data line and the scan line
  • the second pixel unit includes a second pixel electrode and a second switching element, the second pixel electrode connecting the data line and the scan line through the second switching element; wherein a two-pixel unit and the first pixel unit are respectively located in two adjacent rows and share one scan line; the switching states of the first switching element and the second switching element are opposite
  • the present disclosure also provides a driving method of a driving circuit, comprising: a plurality of pixel units arranged in a matrix; at least one scanning line, the adjacent two rows of the pixel units sharing one scanning line; the scanning lines respectively to the ith
  • the pixel unit of the row inputs a first driving voltage, a second driving voltage input to the pixel unit of the i+1th row, the first driving voltage and the second driving voltage are opposite in polarity; at least one data line, Each of the data lines is connected to a corresponding column of the pixel unit; a controller is simultaneously connected to the scan line and the data line for controlling timing output of the scan line and the data line;
  • the scan line s(i) to input a positive high voltage to the pixel unit of the i-th row at the first time, so that the pixel unit of the i-th row is turned on, the first The pixel unit of the i+1 row remains off; the data line D(j) is charged to the pixel unit of the jth column to obtain the charging information of the pixel unit of the i-th row and the j-th column; in the control unit Controlling, the scan line s(i) inputs a negative low voltage to the pixel unit of the (i+1)th row at the second timing, so that the pixel unit of the (i+1)th row is turned on, the ith row The pixel unit remains off; the data line D(j) is charged to the pixel unit of the jth column, so that the pixel unit of the (i+1)th row and the jth column obtain charging information; the i, j are A positive integer.
  • the present disclosure further provides another driving circuit, including: a plurality of pixel units arranged in a matrix; at least one scan line, the adjacent two rows of the pixel units share one scan line; the scan lines respectively to the ith row
  • the pixel unit inputs a first driving voltage, a second driving voltage input to the pixel unit of the i+1th row, the first driving voltage and the second driving voltage are opposite in polarity; the pixel of the ith row
  • the switching element of the cell is an n-type thin film transistor; the switching element of the pixel unit of the i+1th row is a p-type thin film transistor; at least one data line, each data line is connected with a corresponding column of the pixel unit; And connecting to the scan line and the data line at the same time, for controlling timing output of the scan line and the data line.
  • the pixel units of two adjacent rows have different types of switching elements, and the driving voltages have opposite polarities.
  • the input driving voltage property of controlling one scanning line can control pixel units of two adjacent rows, thereby greatly reducing scanning lines.
  • the number and the occupied area can make more space for the pixel unit, so that the aperture ratio is increased, and the brightness is effectively improved at the same resolution.
  • FIG. 1a is a schematic structural diagram of a driving circuit according to an embodiment of the present disclosure.
  • FIG. 1b is another schematic structural diagram of a driving circuit according to an embodiment of the present disclosure.
  • Figure 1c is a partially enlarged schematic view of the P of Figure 1a.
  • FIG. 1d is an equivalent circuit diagram of a driving circuit according to an embodiment of the present disclosure.
  • FIG. 2 is a timing diagram of scan signals and data signals according to another embodiment of the present disclosure.
  • FIG. 3a is a schematic structural diagram of a liquid crystal display according to still another embodiment of the present disclosure.
  • FIG. 3b is a schematic structural diagram of a driving circuit according to still another embodiment of the present disclosure.
  • FIG. 3c is an equivalent circuit diagram of a driving circuit according to still another embodiment of the present disclosure.
  • the embodiment provides a driving circuit applied in a liquid crystal display, which can greatly save the number of scan lines and the occupied area, and improve the aperture ratio of the pixel unit.
  • the driving circuit 10 includes a plurality of pixel units 11 arranged in a matrix, a scanning line 131, a data line 151, and a controller 17.
  • the scan line 131 and the data line 151 are disposed to intersect each other, and the pixel unit 11 is disposed at an intersection of the data line 151 and the scan line 131.
  • a plurality of scanning lines 131 are provided in the driving circuit 10 of the array substrate (not shown), and these scanning lines 131 may be connected to the scanning driver 13 for example, to obtain a driving voltage supplied from the scanning driver 13.
  • the controller 17 can be connected to the scan line 131 through the scan driver 13, and a drive voltage of a preset polarity can be input to the scan line 131 through the scan driver 13 at a preset timing.
  • the pixel units 11 of two adjacent rows share one scan line 131, that is, the pixel unit 11 of the i-th row (for example, one of the odd rows), the i+1th row (for example, in the even row)
  • the pixel units 11 of one row are respectively disposed on both sides of the same scanning line 131, and are connected to the same scanning line 131 at the same time.
  • the scan line 131 inputs the first driving voltage V1 and the second driving voltage V2 input by the pixel unit 11 of the i+1th row to the pixel unit 11 of the i-th row, the first driving voltage V1 and
  • the second driving voltage V2 is opposite in polarity; the scanning line 131 can input different driving voltages at different times.
  • i is a positive integer.
  • a plurality of data lines 151 are also disposed on the driving circuit 10 of the array substrate (not shown), and the data lines 151 can be connected, for example, to a data driver 15 to obtain charging information provided by the data driver 15. .
  • Each of the data lines 151 is connected to a corresponding column of the pixel units 11.
  • the pixel units 11 of the same column may be connected to the same data line 151 at intervals, or may be connected to the same side of the same data line 151.
  • the controller 17 can be connected to the data line 151 through the data driver 15, and the preset charging information can be input to the data line 151 through the data driver 15 at a preset time.
  • the controller 17 is connected to the scan line driver 13 and the data line driver 15 to control the timing output of the scan line driver 13 and the data line driver 15.
  • FIG. 1b is another schematic structural diagram of a driving circuit of the embodiment
  • FIG. 1c is a partially enlarged structural diagram of P of FIG. 1a.
  • each of the pixel units 11 includes a pixel electrode 111, a switching element (thin film transistor, TFT) 112, a common electrode wiring 113, and a capacitor (not shown).
  • TFT thin film transistor
  • the switching element (TFT) 112 includes a gate 112a, a drain 112b, and a source 112c.
  • the gate 112a is connected to the scan line 131, and the drain is connected.
  • One of the source 112b and the source 112c is connected to the data line 151, and the other is connected to the pixel electrode 111.
  • the switching elements 112 of different rows may be set to have different conductivity types.
  • the switching element 112 in the pixel unit 11 of the odd row may be the n-type thin film transistor 112N; and the switching element 112 in the pixel unit 11 of the even row is the p-type thin film transistor 112P.
  • the n-type thin film transistor 112N When the scan line 131 inputs the positive first drive voltage V1 to the connected two rows of pixel units 11, the n-type thin film transistor 112N can be turned on, and the p-type thin film transistor 112P is turned off; similarly, when the scan line When the second driving voltage V2 of the negative polarity is input to the two rows of pixel units 11 connected, the p-type thin film transistor 112P is turned on, and the n-type thin film transistor 112N is turned off.
  • Such a scan line can control the turn-on or turn-off of two rows of pixel cells.
  • the switching elements in the pixel units of the even rows can be made into n-type thin film transistors; the switching elements in the odd-numbered rows of pixel units are p-type thin film transistors, and the matching driving voltage can also be adjusted to achieve the object of the present disclosure.
  • the first driving voltage V1 is higher than a common voltage V Acom in the pixel unit is defined as a high voltage of positive polarity
  • the second driving voltage V2 is lower than a common voltage V Acom in the pixel unit is defined as Negative low voltage.
  • the common electrode wiring 113 is disposed opposite to the pixel electrode 111 to form a storage capacitor Cst so that the charged voltage can be maintained until the next time the picture is updated.
  • the pixel units of two adjacent rows have different types of switching elements, and the driving voltages have opposite polarities, and the input driving voltage property of controlling one scanning line can control pixel units of two adjacent rows, thereby greatly reducing
  • the number of scan lines and the occupied area can give more space to the pixel unit, which increases the aperture ratio and effectively increases the brightness at the same resolution.
  • FIG. 2 is a timing chart of scanning signals and data signals applied to the pixel unit of FIG. 1a, driving the driving of the circuit shown in FIG. 1a.
  • the method includes the steps of:
  • the power of the driving circuit is turned on so that the respective pixel electrodes are in an energized state.
  • the scan driver 13 in the scanning line s (i) at a first time t 1 to the i-th row (odd-numbered rows, for example, may be in a row)
  • the pixel unit inputs a positive high voltage V 1 to turn on the pixel unit of the i-th row connected to the scan line s(i).
  • i is a positive integer.
  • the switching element thereof may be an n-type TFT, and when the first driving voltage V1 is higher than the common voltage V Acom , the n-type TFT can be turned on.
  • the switching element of the i+1th row (for example, a p-type TFT) connected to the scanning line s(i) is turned off.
  • the data line D(j) of the data driver 15 charges the pixel unit of the jth column, and the charging information is stored in the storage capacitor Cst of the pixel unit of the ith row and the jth column, corresponding to the The pixel units of the i row and the jth column are charged.
  • j is a positive integer.
  • the scan driver 13 the scanning line s (i) at a second time t 2 i + 1 to the second row (even-numbered rows, for example, may be The pixel unit of one row) inputs a negative low voltage V 2 , and turns on the pixel unit of the i+1th row connected to the scan line s(i).
  • the switching element in the pixel unit of the i+1th row may be a p-type TFT, and the p-type TFT can be turned on when the second driving voltage V2 is lower than the common voltage V Acom .
  • the first driving The voltage V1 is opposite in polarity to the second driving voltage V2, and the switching elements in the pixel unit of the i-th row remain in the off state.
  • the data line D(j) of the data driver 15 charges the pixel unit of the jth column, and the charging information is stored in the storage capacitor Cst of the pixel unit of the (i+1)th row and the jth column, The corresponding pixel units of the i+1th row and the jth column are charged. The pixel units of the i-th row and the j-th column remain in a closed state, and cannot be charged by the data line, and the original charging information is maintained until the next screen refresh.
  • the scan line s(i+1) can be respectively input at the third time t 3 and the fourth time t 4 , respectively, the first driving voltage V1 and the second driving voltage V2; and the data line D (j) charging to the pixel unit of the j-th column, and the charge information at the third time t 3, respectively, are stored in the second row i + 2, the storage capacitor Cst of the pixel unit in the j-th column, and the first The fourth time t 4 is stored in the storage capacitor Cst of the pixel unit of the i+3th row and the jth column; the corresponding i+2th row, the jth column, and the pixels of the i+3th row and the jth column The unit is charged.
  • the pixel units of different rows are selectively turned on, so that the turned-on pixel unit receives the charging information input by the data line, and different images can be displayed by using the backlight.
  • the pixel units of two adjacent rows have different types of switching elements, and the driving voltages have opposite polarities, and one scanning line can control the turning on or off of the pixel units of two adjacent rows.
  • the driving circuit of the present embodiment can greatly reduce the number of scan lines and the occupied area, and greatly increases the aperture ratio of the pixel unit at the same resolution.
  • a liquid crystal display 300 including an array substrate 320, a color filter substrate 340, and a liquid crystal layer disposed between the array substrate 320 and the color filter substrate 340.
  • the array substrate 320 is provided with a driving circuit 30.
  • the array substrate 320 can be, for example, a thin film transistor array substrate.
  • the driving circuit 30 includes a plurality of pixel units 31 arranged in a matrix, a scanning line 331, a data line 351, and a controller 37.
  • the scan line 131 and the data line 151 are disposed to intersect each other, and the pixel unit 11 is disposed at an intersection of the data line 151 and the scan line 131.
  • scan lines 331 there are a plurality of scan lines 331 in the drive circuit 30 of the array substrate 320, and these scan lines 331 can be connected to the scan driver 33, for example, to obtain the driving voltage supplied from the scan driver 33.
  • the controller 37 can be connected to the scan line 331 through the scan driver 33, and a drive voltage of a preset polarity can be input to the scan line 331 through the scan driver 33 at a preset timing.
  • the pixel units 31 of two adjacent rows share one scan line 331, that is, the first pixel unit of the i-th row (for example, one row of odd rows) and the i+1th row (for example, one row of even rows).
  • the second pixel units are respectively disposed on both sides of the same scanning line 331 and are connected to the same scanning line 331 at the same time.
  • the scan line 331 inputs the first driving voltage V1 and the second driving voltage V2 input by the second pixel unit 31 of the i+1th row to the first pixel unit 31 of the i-th row, respectively.
  • the first driving voltage V1 and the second driving voltage V2 are opposite in polarity, and the scan line 331 can output different driving voltages at different times; wherein i is a positive integer.
  • a plurality of data lines 351 are also disposed on the driving circuit 30 of the array substrate 320, and these data lines 351 can be connected, for example, to a data driver 35 to obtain charging information provided by the data driver 35.
  • Each of the data lines 351 is connected to a corresponding column of the pixel units 31.
  • the pixel units 31 of the same column may be connected to the same data line 351 at intervals, or may be connected to the same side of the same data line 351.
  • the controller 37 can be connected to the data line 351 through the data driver 35, and the preset charging information can be input to the data line 351 through the data driver 35 at a preset time.
  • the controller 37 is connected to the scan line driver 33 and the data line driver 35 to control the timing output of the scan line driver 33 and the data line driver 35.
  • FIG. 3b is a schematic structural diagram of a pixel unit
  • FIG. 3c is an equivalent circuit of a pixel unit.
  • each pixel unit 31 includes a pixel electrode 311, a switching element (thin film transistor, TFT) 312, a common electrode wiring 313, and a capacitor (FIG. 3c). Not shown).
  • TFT switching element
  • the switching elements 312 of different rows may be set to have different conductivity types and the switching states may be reversed.
  • the switching element 312 in the pixel unit 31 of the odd row may be the n-type thin film transistor 312N
  • the switching element 312 in the pixel unit 31 of the i+1th row is p.
  • Thin film transistor 312P is the switching element 312 in the pixel unit 31 of the odd row.
  • the n-type thin film transistor 312N can be turned on, and the p-type thin film transistor 312P is turned off; similarly, when the scan line When the second driving voltage V2 of the negative polarity is input to the two rows of pixel units 31 connected at the same time, the p-type thin film transistor 312P is turned on, and the n-type thin film transistor 312N is turned off.
  • the switching elements in the pixel units of the even rows can also be n-type thin film transistors; the switching elements in the odd-numbered rows of pixel units are p-type thin film transistors, and the matching driving voltage can also be adjusted to achieve the object of the present disclosure.
  • the first driving voltage V1 is higher than a common voltage V Acom in the pixel unit is defined as a high voltage of positive polarity
  • the second driving voltage V2 is lower than a common voltage V Acom in the pixel unit is defined as Negative low voltage.
  • the common electrode wiring 313 is disposed opposite to the pixel electrode 311 to form a storage capacitor Cst so that the charged voltage can be maintained until the next time the picture is updated, as shown in FIG. 3c.
  • the array substrate 320 and the color filter substrate 340 are also filled with liquid crystal molecules (not shown).
  • a common electrode layer (not shown) is disposed on a side of the color filter substrate 340 facing the liquid crystal molecules, and each of the pixel units 31 is structurally regarded as a sandwich between the pixel electrode and the common electrode layer.
  • Layer liquid crystal molecules the structure can be equivalent to a liquid crystal capacitor C LC .
  • the liquid crystal capacitor C LC cannot hold the voltage until the next time the TFT tube charges the point and re-updates the picture data (for example, in the case of a general 60 Hz picture update frequency, it needs to be maintained for about 16 ms).
  • a storage capacitor Cst is added (which can be formed, for example, by the pixel electrode 311 and the common electrode wiring 313). ), so that the charged voltage can be maintained until the next time the picture is updated.
  • the switching elements of the adjacent two rows of pixel units in the driving circuit are different in type and the driving voltages are opposite in polarity, and the pixel characteristics of the adjacent two rows can be controlled by controlling the input driving voltage property of one scanning line. Turn it on or off.
  • the driving circuit of the present embodiment greatly reduces the number of scanning lines and the occupied area, and can make more space for the pixel unit, so that the aperture ratio is increased, and the brightness is effectively improved at the same resolution.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)

Abstract

一种驱动电路（10，30），其包括：呈矩阵排列的多个像素单元（11，31）；至少一条扫描线（131，331），相邻两行像素单元（11，31）共用一条扫描线（131，331）；扫描线（131，331）分别向第i行的像素单元（11，31）输入第一驱动电压、向第i+1行的像素单元（11，31）输入的第二驱动电压，第一驱动电压、第二驱动电压极性相反；至少一条数据线（151，351），每条数据线与对应的一列像素单元（11，31）连接；控制器，其同时与扫描线（131，331）、数据线（151，351）连接，用于控制扫描线（131，331）、数据线（151，351）的时序输出。

Description

液晶显示器及其驱动电路、驱动方法 技术领域
本公开涉及液晶显示技术领域，尤其是对液晶显示装置中的驱动电路的改进。
背景技术
目前，液晶显示器(LCD，Liquid Crystal Display)具有低电耗、低辐射、体积小、画面柔和的特点，被广泛应用在电视、手机以及公共信息的显示屏幕上。
其中，液晶显示器的画面质量是产品成功的首要条件，而决定画面质量的众多参数里，分辨率和亮度是两个重要的参数。
在示例性的技术中，液晶显示装置的驱动电路中包括：扫描线、数据线、薄膜晶体管、像素电极、公共电极配线等器件。而人们对显示质量尤其是分辨率的需求进一步提高，伴随着对阵列基板上固有结构的改进，例如，需要使扫描线、数据线、薄膜晶体管、公共电极配线等器件的数量增多或体积增大。这些器件占用的空间会越来越大，使得像素电极占用的空间会越来越小，从而导致像素区的开口率降低，减少了透光率，影响了液晶显示装置的显示亮度。
因此，人们亟待寻找如何提高高分辨的液晶显示装置的开口率、提高显示亮度的解决方式。
发明内容
为了解决上述问题，本公开实施例提供一种驱动电路，其包括：
呈矩阵排列的多个像素单元；至少一条扫描线，相邻两行所述像素单元共用一条扫描线；所述扫描线分别向第i行的所述像素单元输入第一驱动电压、向第i+1行的所述像素单元输入的第二驱动电压，所述第一驱动电压、第二驱动电 压极性相反；至少一条数据线，每条数据线与对应的一列所述像素单元连接；控制器，其同时与所述扫描线、所述数据线连接，用于控制所述扫描线、所述数据线的时序输出。
本公开另一实施例还提供一种液晶显示器，包括：其包括相对设置的阵列基板、彩色滤光片基板，以及设置于所述阵列基板、彩色滤光片基板之间的液晶层，所述阵列基板包括：至少一条扫描线；至少一条数据线，其与所述扫描线交叉设置；第一像素单元，设置在所述数据线和所述扫描线的交叉处；所述第一像素单元包括第一像素电极和第一开关元件，所述第一像素电极通过所述第一开关元件连接所述数据线和所述扫描线；第二像素单元，设置在所述数据线和所述扫描线的交叉处；所述第二像素单元包括第二像素电极和第二开关元件，所述第二像素电极通过所述第二开关元件连接所述数据线和所述扫描线；其中，所述第二像素单元和所述第一像素单元分别位于相邻两行且共用一条所述扫描线；所述第一开关元件和所述第二开关元件的开关状态相反。
本公开还提供一种驱动电路的驱动方法，其包括：呈矩阵排列的多个像素单元；至少一条扫描线，相邻两行所述像素单元共用一条扫描线；所述扫描线分别向第i行的所述像素单元输入第一驱动电压、向第i+1行的所述像素单元输入的第二驱动电压，所述第一驱动电压、第二驱动电压极性相反；至少一条数据线，每条数据线与对应的一列所述像素单元连接；控制器，其同时与所述扫描线、所述数据线连接，用于控制所述扫描线、所述数据线的时序输出；
在所述控制单元的控制下，使扫描线s(i)在第一时刻向第i行的像素单元输入正极性的高电压，以使所述第i行的像素单元导通、所述第i+1行的像素单元保持关闭；使数据线D(j)向第j列的像素单元充电，以使所述第i行、第j列的像素单元获得充电信息；在所述控制单元的控制下，使扫描线s(i)在第二 时刻向第i+1行的像素单元输入负极性的低电压，以使所述第i+1行的像素单元导通、所述第i行的像素单元保持关闭；使数据线D(j)向所述第j列的像素单元充电，以使所述第i+1行、第j列的像素单元获得充电信息；所述i、j为正整数。
本公开还提供另一种驱动电路，其包括：呈矩阵排列的多个像素单元；至少一条扫描线，相邻两行所述像素单元共用一条扫描线；所述扫描线分别向第i行的所述像素单元输入第一驱动电压、向第i+1行的所述像素单元输入的第二驱动电压，所述第一驱动电压、第二驱动电压极性相反；第i行的所述像素单元的开关元件为n型薄膜晶体管；第i+1行的所述像素单元的述开关元件为p型薄膜晶体管；至少一条数据线，每条数据线与对应的一列所述像素单元连接；控制器，其同时与所述扫描线、所述数据线连接，用于控制所述扫描线、所述数据线的时序输出。
本实施例的驱动电路，相邻两行的像素单元其开关元件的类型不同，驱动电压极性相反，控制一条扫描线的输入驱动电压性质可控制相邻两行的像素单元，大大减少扫描线的数量和占有面积，能为像素单元让出更多空间，使得开口率增加，在相同分辨率的情况下，有效提高亮度。
附图说明
图1a为本公开一实施例驱动电路的结构示意图。
图1b为本公开一实施例驱动电路另一结构示意图。
图1c为图1a的P局部放大结构示意图。
图1d为本公开一实施例驱动电路的等效电路图。
图2为本公开另一实施例的扫描信号和数据信号时序图。
图3a为本公开又一实施例液晶显示器的结构示意图。
图3b为本公开又一实施例驱动电路的结构示意图。
[根据细则91更正 30.10.2018]　
图3c为本公开又一实施例驱动电路的等效电路图。
具体实施方式
下面，结合具体实施例详细介绍本公开。
本实施例提供一种应用在液晶显示器中的驱动电路，能够大大节省扫描线的数量和占有面积，提高像素单元的开口率。
结合图1a所示，这种驱动电路10包括：呈矩阵排列的多个像素单元11、扫描线131、数据线151、控制器17。所述扫描线131、数据线151交叉设置，所述像素单元11设置于述数据线151和所述扫描线131的交叉处。
其中，在阵列基板(图中未示出)的驱动电路10中有多条扫描线131，这些扫描线131可例如均连接到扫描驱动器13上，以获得扫描驱动器13提供的驱动电压。例如，所述控制器17可通过所述扫描驱动器13与所述扫描线131连接，可在预设的时刻通过所述扫描驱动器13向所述扫描线131输入预设极性的驱动电压。
在本实施例中，相邻两行的所述像素单元11共用一条扫描线131，即第i行(例如奇数行中的一行)的像素单元11、第i+1行(例如偶数行中的一行)的所述像素单元11分别设置在同一条扫描线131的两侧，并同时连接同一条扫描线131。所述扫描线131分别向第i行的所述像素单元11输入第一驱动电压V1、第i+1行的所述像素单元11输入的第二驱动电压V2，所述第一驱动电压V1与第二驱动电压V2极性相反；所述扫描线131可在不同时刻输入不同的驱动电压。其中i为正整数。
类似地，在阵列基板(图中未示出)的驱动电路10上也设置有多条数据线151，这些数据线151可例如连接到一数据驱动器15上，以获得数据驱动器15 提供的充电信息。每条数据线151与对应的一列所述像素单元11连接。例如，同一列的像素单元11可间隔地、分别连接在同一条数据线上151上，也可以均连接于同一条数据线151的同一侧。所述控制器17可通过所述数据驱动器15与所述数据线151连接，可在预设的时刻通过所述数据驱动器15向所述数据线151输入预设的充电信息。
控制器17其与所述扫描线驱动器13、所述数据线驱动器15连接，以控制所述扫描线驱动器13、所述数据线驱动器15的时序输出。
图1b为本实施例驱动电路的另一结构示意图，图1c为图1a中P局部放大结构示意图。
结合图1b，本实施例的像素单元11阵列中，每个像素单元11包括：像素电极111、开关元件(薄膜晶体管，TFT)112、公共电极配线113、电容器(图中未示出)。
其中，结合图1c、图1d所示，所述开关元件(TFT)112包括：栅极112a、漏极112b、源极112c；所述栅极112a与所述扫描线131连接，所述漏极112b、源极112c中的之一与所述数据线151连接、另一与所述像素电极111连接。
可选地，为了使所述扫描线131可以通过控制高低电平来控制不同行的开关元件112，可设置不同行的开关元件112的导电类型不同。例如可令奇数行的所述像素单元11中所述开关元件112为n型薄膜晶体管112N；偶数行的所述像素单元11中所述开关元件112为p型薄膜晶体管112P。当扫描线131向所连接的两行像素单元11输入正极性的第一驱动电压V1时，n型薄膜晶体管112N则可导通，而p型薄膜晶体管112P处于关闭状态；类似地，当扫描线131向所连接的两行像素单元11输入负极性的第二驱动电压V2时，p型薄膜晶体管112P则可导通，而n型薄膜晶体管112N则处于关闭状态。如此一条扫描线可控制两 行像素单元的导通或关闭。当然，也可以令偶数行的像素单元中开关元件为n型薄膜晶体管；奇数行的像素单元中开关元件为p型薄膜晶体管，再调整与之匹配的驱动电压也能够实现本公开目的。
其中，所述第一驱动电压V1高于所述像素单元中的公共电压V Acom定义为正极性的高电压，所述第二驱动电压V2低于所述像素单元中的公共电压V Acom定义为负极性的低电压。
所述公共电极配线113与所述像素电极111相对设置，以形成一存储电容器Cst，以便让充好电的电压能保持到下一次更新画面的时刻。
本实施例的像素单元矩阵中，相邻两行的像素单元其开关元件的类型不同，驱动电压极性相反，控制一条扫描线的输入驱动电压性质可控制相邻两行的像素单元，大大减少扫描线的数量和占有面积，能为像素单元让出更多空间，使得开口率增加，在相同分辨率的情况下，有效提高亮度。
本公开另一实施例提供一种驱动电路的驱动方法，结合图2所示，图2是施加到图1a的像素单元上的扫描信号和数据信号时序图，驱动如图1a所示电路的驱动方法包括步骤：
首先，打开驱动电路的电源，使得各个像素电极处于通电状态。
然后，在所述控制单元17的控制下，使所述扫描驱动器13中的所述扫描线s(i)在第一时刻t 1向所述第i行(可例如为奇数行中的一行)的像素单元输入正极性的高电压V 1，使与所述扫描线s(i)连接的第i行的像素单元导通。其中，i为正整数。可选地，本实施例中奇数行的像素单元其开关元件可为n型TFT，当第一驱动电压V1高于公共电压V Acom时，n型TFT能够被打开。而同时与扫描线s(i)连接的第i+1行的开关元件(例如为p型TFT)处于关闭状态。
同时，所述数据驱动器15中数据线D(j)向第j列像素单元充电，且该充 电信息被保存在所述第i行、第j列的像素单元的存储电容器Cst中，对应的第i行、第j列的像素单元获得充电。其中，j为正整数。
进一步地，在所述控制单元17的控制下，使所述扫描驱动器13中的所述扫描线s(i)在第二时刻t 2向所述第i+1行(可例如为偶数行中一行)的像素单元输入负极性的低电压V 2，使与所述扫描线s(i)连接的所述第i+1行的像素单元导通。可选地，第i+1行的像素单元中开关元件可为p型TFT，当第二驱动电压V2低于公共电压V Acom时，p型TFT能够被打开。而此时，纵使第i行的像素单元与第i+1行的像素单元均连接所述扫描线s(i)，但由于第i行的像素单元中开关元件为n型TFT、第一驱动电压V1与第二驱动电压V2极性相反，第i行的像素单元中开关元件仍保持关闭状态。
接着，所述数据驱动器15中数据线D(j)向第j列的像素单元充电，且该充电信息被保存在所述第i+1行、第j列的像素单元的存储电容器Cst中，对应的第i+1行、第j列的像素单元获得充电。而所述第i行、第j列的像素单元保持关闭状态，不能够通过数据线充电，保持原有的充电信息至下一次画面刷新。
如此类推，通过扫描驱动器控制，扫描线s(i+1)可分别在第三时刻t 3、第四时刻t 4，分别输入的第一驱动电压V1、第二驱动电压V2的；而数据线D(j)向第j列的像素单元充电，且该充电信息分别在第三时刻t 3被保存在所述第i+2行、第j列的像素单元的存储电容器Cst中、以及在第四时刻t 4被保存在所述第i+3行、第j列的像素单元的存储电容器Cst中；对应的第i+2行、第j列以及第i+3行、第j列的像素单元获得充电。如此达到对不同行的像素单元选择导通，使导通的像素单元接收数据线输入的充电信息，通过背光源配合下可显示不同图像。
对于其他列、其他行的像素单元，驱动原理相似。
本实施例的驱动电路中，相邻两行的像素单元其开关元件的类型不同，驱动电压极性相反，利用一条扫描线可控制相邻两行的像素单元的导通或关闭。本实施的驱动电路可大大减少扫描线的数量和占有面积，在相同分辨率的情况下，大大提高了像素单元的开口率。
本公开又一实施例提供一种液晶显示器300，其包括相对设置的阵列基板320、彩色滤光片基板340，以及设置于所述阵列基板320、彩色滤光片基板340之间的液晶层(图中未示出)，所述阵列基板320设置有驱动电路30。本实施例中，阵列基板320可例如为薄膜晶体管阵列基板。
如图3a、图3b所示，这种驱动电路30包括：呈矩阵排列的多个像素单元31、扫描线331、数据线351、控制器37。所述扫描线131、数据线151交叉设置，所述像素单元11设置于述数据线151和所述扫描线131的交叉处。
其中，在阵列基板320的驱动电路30中有多条扫描线331，这些扫描线331可例如均连接到扫描驱动器33上，以获得扫描驱动器33提供的驱动电压。例如，所述控制器37可通过所述扫描驱动器33与所述扫描线331连接，可在预设的时刻通过所述扫描驱动器33向所述扫描线331输入预设极性的驱动电压。
本实施例中，相邻两行的所述像素单元31共用一条扫描线331，即第i行(例如奇数行的一行)的第一像素单元、第i+1行(例如偶数行的一行)的第二像素单元分别设置在同一条扫描线331的两侧，并同时连接同一条扫描线331。可选地，所述扫描线331分别向第i行的所述第一像素单元31输入第一驱动电压V1、第i+1行的所述第二像素单元31输入的第二驱动电压V2，所述第一驱动电压V1与第二驱动电压V2极性相反，所述扫描线331可在不同的时刻输出不同的驱动电压；其中i为正整数。
类似地，在阵列基板320的驱动电路30上也设置有多条数据线351，这些 数据线351可例如连接到一数据驱动器35上，以获得数据驱动器35提供的充电信息。每条数据线351与对应的一列所述像素单元31连接。例如，同一列的像素单元31可间隔地、分别连接在同一条数据线上351上，也可以均连接于同一条数据线351的同一侧。所述控制器37可通过所述数据驱动器35与所述数据线351连接，可在预设的时刻通过所述数据驱动器35向所述数据线351输入预设的充电信息。
控制器37其与所述扫描线驱动器33、所述数据线驱动器35连接，以控制所述扫描线驱动器33、所述数据线驱动器35的时序输出。
图3b为一个像素单元的结构示意图，图3c为一个像素单元的等效电路。结合图3b、图3c所示，本实施例的像素单元二维阵列中，每个像素单元31包括：像素电极311、开关元件(薄膜晶体管，TFT)312、公共电极配线313、电容器(图中未示出)。
其中，所述开关元件(TFT)312的结构可参考图1c所示，本实施例不再赘述。
可选地，为了使所述扫描线331可以通过控制高低电平来控制不同行的开关元件312，可设置不同行的开关元件312的导电类型不同而使开关状态相反。例如可令奇数行的所述像素单元31中所述开关元件312为n型薄膜晶体管312N，；第i+1行(例如为偶数行)的所述像素单元31中所述开关元件312为p型薄膜晶体管312P。当扫描线331向同时连接的两行像素单元31输入正极性的第一驱动电压V1时，n型薄膜晶体管312N则可导通，而p型薄膜晶体管312P处于关闭状态；类似地，当扫描线331向同时连接的两行像素单元31输入负极性的第二驱动电压V2时，p型薄膜晶体管312P则可导通，而n型薄膜晶体管312N则处于关闭状态。当然，也可以令偶数行的像素单元中开关元件为n型薄 膜晶体管；奇数行的像素单元中开关元件为p型薄膜晶体管，再调整与之匹配的驱动电压也能够实现本公开目的。
其中，所述第一驱动电压V1高于所述像素单元中的公共电压V Acom定义为正极性的高电压，所述第二驱动电压V2低于所述像素单元中的公共电压V Acom定义为负极性的低电压。
所述公共电极配线313与所述像素电极311相对设置，以形成一存储电容器Cst，以便让充好电的电压能保持到下一次更新画面的时刻，结合图3c所示。
阵列基板320、彩色滤光片基板340之间还填充有液晶分子(图中未示出)。在彩色滤光片基板340面对液晶分子的一侧设有公共电极层(图中未示出)，则每个像素单元31从结构上可以看作是像素电极和公共电极层之间夹一层液晶分子，该结构可等效为一个液晶电容C LC。在实际应用中，这个液晶电容C LC无法将电压保持直到下一次TFT管再对此点充电、再更新画面数据的时刻(以一般60Hz的画面更新频率举例，需要保持约16ms)。也就是说，当TFT管对这个液晶电容C LC充好电时，它无法将电压保持16ms。这样一来，电压有了变化，所显示的灰阶就会不正确，因此，在驱动电路中，会再加一个储存电容Cst(可例如由像素电极311与公共电极配线313走线所形成)，以便让充好电的电压能保持到下一次更新画面的时刻。
本实施例的液晶显示器中，其驱动电路中相邻两行像素单元的开关元件类型不同、驱动电压极性相反，可通过控制一条扫描线的输入驱动电压性质以控制相邻两行的像素单元导通或关闭。本实施的驱动电路大大减少扫描线的数量和占有面积，能为像素单元让出更多空间，使得开口率增加，在相同分辨率的情况下，有效提高亮度。
以上内容是结合具体的可选实施方式对本公开所作的进一步详细说明，不 能认定本公开的具体实施只局限于这些说明。对于本公开所属技术领域的普通技术人员来说，在不脱离本公开构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本公开的保护范围。

Claims (20)

  1. 一种驱动电路，包括：
    呈矩阵排列的多个像素单元；
    至少一条扫描线，相邻两行所述像素单元共用一条扫描线；所述扫描线分别向第i行的所述像素单元输入第一驱动电压、向第i+1行的所述像素单元输入的第二驱动电压，所述第一驱动电压、第二驱动电压极性相反；
    至少一条数据线，每条数据线与对应的一列所述像素单元连接；
    控制器，其同时与所述扫描线、所述数据线连接，用于控制所述扫描线、所述数据线的时序输出。
  2. 根据权利要求1所述驱动电路，其中，所述像素单元包括：
    像素电极；
    开关元件，其包括：栅极、漏极、源极；所述栅极与所述扫描线连接，所述漏极、源极中的之一与所述数据线连接、另一与所述像素电极连接；
    公共电极配线，其与所述像素电极相对设置以形成存储电容器。
  3. 根据权利要求2所述驱动电路，其中，第i行的所述像素单元中所述开关元件为n型薄膜晶体管。
  4. 根据权利要求3所述驱动电路，其中，第i+1行的所述像素单元中所述开关元件为p型薄膜晶体管。
  5. 根据权利要求1所述驱动电路，还包括扫描线驱动器，其同时与所述控制器、所述至少一条扫描线连接。
  6. 根据权利要求5所述驱动电路，还包括数据线驱动器，其同时与所述控制器、所述至少一条数据线连接。
  7. 一种液晶显示器，包括相对设置的阵列基板、彩色滤光片基板，以及设置于所述阵列基板、彩色滤光片基板之间的液晶层，其中，所述阵列基板包括：
    至少一条扫描线；
    至少一条数据线，其与所述扫描线交叉设置；
    第一像素单元，设置在所述数据线和所述扫描线的交叉处；所述第一像素单元包括第一像素电极和第一开关元件，所述第一像素电极通过所述第一开关元件连接所述数据线和所述扫描线；
    第二像素单元，设置在所述数据线和所述扫描线的交叉处；所述第二像素单元包括第二像素电极和第二开关元件，所述第二像素电极通过所述第二开关元件连接所述数据线和所述扫描线；
    其中，所述第二像素单元和所述第一像素单元分别位于相邻两行且共用一条所述扫描线；所述第一开关元件和所述第二开关元件的开关状态相反。
  8. 根据权利要求7所述液晶显示器，其中，所述第一开关元件为n型薄膜晶体管，所述第二开关元件为p型薄膜晶体管。
  9. 根据权利要求7所述液晶显示器，其中，所述第一像素电极和所述第二像素电极分别位于所述扫描线的相对两侧、且分别位于同一条所述数据线的相对两侧。
  10. 根据权利要求8所述液晶显示器，其中，所述第一像素电极和所述第二像素电极分别位于所述扫描线的相对两侧、且分别位于同一条所述数据线的相对两侧。
  11. 根据权利要求7所述的液晶显示器，其中，所述阵列基板还包括公共电极配线，其与所述第一像素电极、所述第二像素电极相对设置形成存储电容器。
  12. 根据权利要求10所述的液晶显示器，其中，所述阵列基板还包括公共电极配线，其与所述第一像素电极、所述第二像素电极相对设置形成存储电容 器。
  13. 根据权利要求7所述的液晶显示器，还包括：
    扫描线驱动器，其与所述至少一条扫描线连接；
    数据线驱动器，其与所述至少一条数据线连接。
  14. 根据权利要求13所述的液晶显示器，还包括控制器，其与所述扫描线驱动器、所述数据线驱动器连接，以控制所述扫描线驱动器、所述数据线驱动器的时序输出。
  15. 一种驱动电路的驱动方法，包括：
    呈矩阵排列的多个像素单元；
    至少一条扫描线，相邻两行所述像素单元共用一条扫描线；所述扫描线分别向第i行的所述像素单元输入第一驱动电压、向第i+1行的所述像素单元输入的第二驱动电压，所述第一驱动电压、第二驱动电压极性相反；
    至少一条数据线，每条数据线与对应的一列所述像素单元连接；
    控制器，其同时与所述扫描线、所述数据线连接，用于控制所述扫描线、所述数据线的时序输出；
    在所述控制单元的控制下，使扫描线s(i)在第一时刻向第i行的像素单元输入正极性的高电压，以使所述第i行的像素单元导通、所述第i+1行的像素单元保持关闭；使数据线D(j)向第j列的像素单元充电，以使所述第i行、第j列的像素单元获得充电信息；
    在所述控制单元的控制下，使扫描线s(i)在第二时刻向第i+1行的像素单元输入负极性的低电压，以使所述第i+1行的像素单元导通、所述第i行的像素单元保持关闭；使数据线D(j)向所述第j列的像素单元充电，以使所述第i+1行、第j列的像素单元获得充电信息；
    所述i、j为正整数。
  16. 根据权利要求15所述驱动电路的驱动方法，其中，所述像素单元包括：
    像素电极；
    开关元件，其包括：栅极、漏极、源极；所述栅极与所述扫描线连接，所述漏极、源极中的之一与所述数据线连接、另一与所述像素电极连接；
    公共电极配线，其与所述像素电极相对设置以形成存储电容器。
  17. 根据权利要求15所述驱动电路的驱动方法，其中，第i行的所述像素单元中所述开关元件为n型薄膜晶体管。
  18. 根据权利要求17所述驱动电路的驱动方法，其中，第i+1行的所述像素单元中所述开关元件为p型薄膜晶体管。
  19. 根据权利要求15所述驱动电路的驱动方法，其中，还包括：
    扫描线驱动器，其与所述至少一条扫描线连接；
    数据线驱动器，其与所述至少一条数据线连接。
  20. 根据权利要求19所述驱动电路的驱动方法，还包括控制器，其与所述扫描线驱动器、所述数据线驱动器连接，以控制所述扫描线驱动器、所述数据线驱动器的时序输出。
PCT/CN2018/105063 2017-12-21 2018-09-11 液晶显示器及其驱动电路、驱动方法 WO2019119890A1 (zh)

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