WO2017169867A1 - 送信装置、送信方法、受信装置、受信方法および送受信システム - Google Patents
送信装置、送信方法、受信装置、受信方法および送受信システム Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
- G09G5/008—Clock recovery
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
- H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
- H04N7/0352—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal for regeneration of the clock signal
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/16—Sound input; Sound output
- G06F3/165—Management of the audio stream, e.g. setting of volume, audio stream path
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0075—Arrangements for synchronising receiver with transmitter with photonic or optical means
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- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
- H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
- H04N21/233—Processing of audio elementary streams
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- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/4302—Content synchronisation processes, e.g. decoder synchronisation
- H04N21/4307—Synchronising the rendering of multiple content streams or additional data on devices, e.g. synchronisation of audio on a mobile phone with the video output on the TV screen
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- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/4302—Content synchronisation processes, e.g. decoder synchronisation
- H04N21/4307—Synchronising the rendering of multiple content streams or additional data on devices, e.g. synchronisation of audio on a mobile phone with the video output on the TV screen
- H04N21/43076—Synchronising the rendering of multiple content streams or additional data on devices, e.g. synchronisation of audio on a mobile phone with the video output on the TV screen of the same content streams on multiple devices, e.g. when family members are watching the same movie on different devices
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- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/435—Processing of additional data, e.g. decrypting of additional data, reconstructing software from modules extracted from the transport stream
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- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/436—Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home
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- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/439—Processing of audio elementary streams
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- H04—ELECTRIC COMMUNICATION TECHNIQUE
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- H04N7/22—Adaptations for optical transmission
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/18—Use of optical transmission of display information
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/85—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression
- H04N19/88—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving rearrangement of data among different coding units, e.g. shuffling, interleaving, scrambling or permutation of pixel data or permutation of transform coefficient data among different blocks
Definitions
- the present technology relates to a transmission device, a transmission method, a reception device, a reception method, and a transmission / reception system, and more particularly to a transmission device that enables high-quality audio reproduction on the reception side.
- Patent Document 1 a transmission clock is supplied from a reception side to a transmission side using a clock signal line, and audio is synchronized with an audio clock obtained by dividing the transmission clock from the transmission side to the reception side.
- a technique has been proposed that enables high-quality audio reproduction on the receiving side by transmitting data.
- An object of the present technology is to enable high-quality audio reproduction on the reception side without supplying a transmission clock using a clock signal line from the reception side to the transmission side.
- An encoded data receiving unit for receiving encoded data capable of clock recovery from an external device;
- An audio clock generator for generating an audio clock based on the carrier clock regenerated from the received encoded data;
- the transmission device includes an audio data transmission unit that transmits audio data to the external device in synchronization with the generated audio clock.
- the encoded data receiving unit receives encoded data from an external device.
- This encoded data can be recovered from the clock.
- the encoded data that can be reproduced by the clock may be encoded data of 8B10B coding.
- the audio clock generation unit generates an audio clock based on the carrier clock (transmission clock) reproduced from the received encoded data.
- the audio clock generation unit may generate the audio clock by dividing the carrier clock based on the division ratio information acquired from the received encoded data.
- the frequency division is performed based on the frequency division ratio information sent from the external device, and the audio clock can be generated easily and appropriately.
- Audio data transmission unit transmits audio data to an external device in synchronization with the generated audio clock.
- the audio data transmitting unit transmits audio data to an external device through a first transmission path
- the encoded data receiving unit receives encoded data from the external device through a second transmission path.
- the first transmission path and the second transmission path may each be a transmission path using an optical cable.
- audio data is transmitted to an external device in synchronization with an audio clock generated based on a carrier clock reproduced from received encoded data. Therefore, high-quality audio reproduction can be performed in the external device without supplying a transmission clock using the clock signal line from the external device.
- the audio clock generator when a request to use an audio clock generated from a reproduced carrier clock is obtained, the audio clock generator generates an audio clock based on the carrier clock reproduced from encoded data.
- the generating and audio data transmitting unit may be configured to transmit the audio data to an external device in synchronization with the generated audio clock. As described above, the transmission process of the audio data based on the audio clock generated from the reproduction carrier clock is performed in response to a request from the external device, whereby the transmission process can be effectively performed.
- An audio clock generator for generating an audio clock
- An encoded data transmission unit that transmits to the external device encoded data that can be regenerated in synchronization with the carrier clock generated based on the generated audio clock
- An audio data receiving unit for receiving audio data from the external device
- a receiving apparatus includes an audio data processing unit that processes the received audio data based on the generated audio clock.
- an audio clock is generated by the audio clock generator.
- the encoded data transmission unit transmits encoded data that can be reproduced by the clock in synchronization with the carrier clock generated based on the generated clock.
- Audio data reception unit receives audio data from an external device.
- the audio data processing unit processes the received audio data based on the audio clock generated by the audio clock generation unit.
- the audio data receiving unit receives audio data from an external device through a first transmission path
- the encoded data transmission unit transmits the encoded data to the external device through a second transmission path.
- the first transmission path and the second transmission path may each be a transmission path using an optical cable.
- the encoded data that can be reproduced in synchronization with the carrier clock generated based on the generated audio clock is transmitted to the external device, and the audio data received from the external device is transmitted to the external device. Processing is based on the audio clock. Therefore, high-quality audio reproduction can be performed without supplying a transmission clock using a clock signal line to an external device.
- encoded data of division ratio information for obtaining an audio clock from a carrier clock may be included as encoded data.
- an external device can obtain an audio clock by dividing the carrier clock reproduced from the encoded data based on the division ratio information, and generate an audio clock. Can be performed easily and appropriately.
- encoded data that is a request for using an audio clock generated from a carrier clock may be included as encoded data.
- the external device can effectively perform audio data transmission processing based on the audio clock generated by dividing the reproduced carrier clock.
- high-quality audio reproduction can be performed on the reception side without supplying a transmission clock using a clock signal line from the reception side to the transmission side.
- the effects described in this specification are merely examples and are not limited, and may have additional effects.
- regeneration part It is a block diagram which shows the structural example of a carrier clock generation part. It is a block diagram which shows the structural example of the disc player as a specific example of a transmitter. It is a block diagram which shows the structural example of the television receiver as a specific example of a receiver.
- FIG. 1 shows an outline of an AV (Audio and Visual) transmission system 10 as an embodiment.
- the AV transmission system 10 includes a main stream link 60 and a sub stream link 70.
- the main stream link 60 mainly transmits audio / video signals.
- a plurality of video and audio to be transmitted, metadata associated therewith, and the like are packed for each stream by a data packing unit (Data Packing) 601.
- the division ratios for reproducing the video and audio clocks from the carrier clock are the video clock recovery information (VCR) and the audio clock recovery information (ACR), respectively, and a VCR / ACR generation unit (VCR / ACR gen) 602. Is generated.
- a lane frame (Lane frame) including the packed transmission data and the generated recovery information is generated by a frame generation unit (Frame generator) 603.
- the lane frames obtained by a plurality of frame generation units 603 are combined into one by a multi-stream construction unit (Multi-stream Constructor) 604, and each channel (Physical Mapper) 605 further transmits individual transmission paths (Physical Channels) and transmitted.
- Multi-stream Constructor Multi-stream Constructor
- Physical Mapper Physical Mapper
- a lane frame transmitted through each transmission path is demapped by a channel demapping unit (Channel-De-Mapper) 606, and further, a multi-stream decomposition unit (Multi-stream De-Constructor) 607 is used for a plurality of lane frames. Is broken down into In each system, a packet generator (Packet Generator) 608 extracts a packet including video, audio, metadata associated therewith, and the like from the lane frame.
- a packet generator Packet Generator
- a data depacking unit (Data De-Packing) 609 extracts video, audio, metadata associated therewith from a packet including video, audio, metadata associated therewith, and the like. Further, the video / audio clock unit (Vide0 / Audio) Clock) 610 extracts the recovery information from the packet including the recovery information (VCR, ACR), and uses it to reproduce the video or audio clock.
- Data De-Packing data depacking unit 609 extracts video, audio, metadata associated therewith from a packet including video, audio, metadata associated therewith, and the like.
- the video / audio clock unit (Vide0 / Audio) Clock) 610 extracts the recovery information from the packet including the recovery information (VCR, ACR), and uses it to reproduce the video or audio clock.
- control information that is, control signals (Control), Ethernet data (IP data), plug-and-play data (PnP neg), etc. are transmitted bidirectionally.
- Control information and the like are packed by data packing units (Data Packing) 701a and 701b.
- Lane frames (LaneLFrame) including the packed control information are generated by the frame generators (Frame Generators) 702a and 702b and transmitted through the transmission channel (Physical Channels).
- Packets including control signals (Control), Ethernet data (IP data), plug-and-play data (PnP neg), and the like are generated from the lane frame transmitted through the transmission path by packet generators 703a and 703b. It is taken out. Data depacking units (Data De-Packing) 704a and 704b extract control signals (Control), Ethernet data (IP data), plug and play data (PnP neg), and the like from the extracted packets.
- Data De-Packing Data De-Packing units
- the following normal mode operations are usually performed. That is, audio data is transmitted from the transmitter to the receiver in synchronization with the audio clock generated in the transmitter through the main stream link, and the frequency division for reproducing the audio clock from the carrier clock of the main stream link is performed. Ratio information (recovery information) is transmitted over the mainstream link. In the receiver, an audio clock is reproduced from the carrier clock of the main stream link using the frequency division ratio indicated by the frequency division ratio information, and audio data is processed using the audio clock.
- the transmitter divides the carrier clock of the substream link of the receiver to generate an audio clock, and audio data is transmitted on the main stream link in synchronization with the audio clock.
- the received audio data is processed based on the audio clock generated in the receiver.
- FIG. 2 shows a sequence diagram when transitioning from the normal mode to the option mode with respect to transmission of audio data.
- the receiver (Receiver) is an ACMSW packet unit (Audio Clock Master Switch) in which AMCLK (Audio Master Clock Switch Request) indicating a switch request to the option mode using the receiver's audio clock as a master is set in the substream link. Packet Unit) is sent to the transmitter.
- ACMSW packet unit Audio Clock Master Switch
- AMCLK Audio Master Clock Switch Request
- the transmitter that has received the ACMSW packet unit can respond to the request, the audio based on the division ratio information (ACR information) stored in the ACMSW packet unit from the carrier clock of the substream link of the receiver as an audio clock.
- a clock is generated, the state is switched to a state in which audio data is transmitted in synchronization with the audio clock, and an ACK command is returned to the receiver through a substream link.
- the receiver that has received the ACK command switches the audio clock to the audio clock generated in the receiver and reproduces the audio.
- FIG. 3 shows a configuration example of a portion related to audio data transmission of the transmitter (Transmitter) 300 and the receiver (Receiver) 400 in the above-described option mode.
- the transmitter 300 includes an audio source 301, a FIFO memory unit 302, an ASPU (Audio Sample Packet Unit) generation unit 303, an AAPU (Ancillary Audio Data Packet Unit) generation unit 304, and a lane frame (Lane Frame). ) Generator 305 and main stream link transmitter 306.
- the transmitter 300 also includes a substream link receiving unit 307, a lane frame decoding unit 309, an ACMSW decoding unit 310, and an audio clock reproduction unit (Re-gen Audio Clock) 311. .
- the receiver 400 includes a main stream link receiving unit 401, a lane frame decoding unit 402, an ASPU decoding unit 403, an AAPU decoding unit 404, and an audio decoding unit 405.
- the receiver 400 includes an audio clock source (Audio Clock Source) 406, a lane clock (Lane Clock) generation unit 407, an ACMSW generation unit 408, a lane frame (Lane Frame) generation unit 409, and a substream link.
- a transmission unit 410 is included.
- the audio source 301 outputs uncompressed or compressed audio data (audio sample data) as audio data to be transmitted, and outputs audio additional information.
- the audio additional information includes information such as a sampling frequency, a sample size, and an encoding method (non-compression, compression method).
- the FIFO memory unit 302 receives the audio data to be transmitted output from the audio source 301 and outputs the audio data in synchronization with the audio clock reproduced by the audio clock reproduction unit 311.
- the ASPU generation unit 303 packs audio data input from the FIFO memory unit 302 in synchronization with the audio clock, and generates an AS packet unit (ASPU) in which the audio data is inserted into the payload.
- the AAPU generating unit 304 packs the audio additional information output from the audio source 301 and generates an AA packet unit (AAPU) in which the audio additional information is inserted into the payload.
- the lane frame generation unit 305 generates a lane frame including the AS packet unit generated by the ASPU generation unit 303 and the AA packet unit generated by the AAPU generation unit 304 as payload units.
- FIG. 4 shows an example of the structure of the lane frame.
- the structure of the lane frame is a collection of structures called units.
- the lane frame is composed of, for example, 6000 units, and includes a header unit (Header Unit) including attributes of the lane frame and synchronization information, and a payload unit (Payload Unit) for storing the respective data.
- Each unit has a fixed length and has a special code called delimiter in the first 2 bytes and the last byte.
- the lane frame decoder (Lane Frame dec) on the receiving side can determine the contents of each payload unit by looking at the contents of the delimiter.
- an SS packet unit for transmitting a control signal bidirectionally on the substream link is used.
- Sub Stream Packet Unit Sub Stream Packet Unit
- the transmission unit 306 optically or optically uses the main stream link lane frame generated by the lane frame generation unit 305 using the optical cable in the main stream link. To the receiver 400.
- FIG. 5A shows a configuration example of the transmission unit 306.
- the transmission unit 306 includes a scrambler 511, an 8B / 10B encoder (8b / 10b Encode) 512, a serializer 513, a laser diode driver (Laser Diode Driver) 514, and a laser diode (Laser Diode). ) 515.
- the lane frame data output from the lane frame generation unit 305 is input to the scrambler 511.
- the scrambler 511 scrambles the lane frame data. In this case, the data of the lane frames are rearranged randomly, and the continuity of the data is removed. Such scramble processing not only realizes data retention on the AC coupling transmission line, but also suppresses unnecessary radiation on the transmission line.
- the scrambler 511 is composed of a linear feedback shift register having a feedback path based on a generator polynomial.
- the scrambled data (scrambled data (scrambled data) obtained by taking exclusive OR (XOR) with the input data (data input). data).
- FIG. 6 shows a configuration example of the scrambler 511.
- the data output from the scrambler 511 is input to the 8B / 10B encoder 512.
- the 8B / 10B encoder 512 performs 8B10B coding encoding processing on input data.
- the 8-bit data is converted to 10-bit data in order to guarantee the frequency of data change so that the DC component of the transmitted data can be removed and the reception clock can be extracted from the reception data by the reception circuit.
- FIG. 7A shows a circuit configuration example of the 8B / 10B encoder 512.
- input data (Transmit) from the scrambler 511 is input to the encoder (8b-> 10b Encode) as 9-bit data together with the control bit (Z), and is output as 10-bit data.
- control symbols fixed data for synchronization called control symbols may be inserted as appropriate.
- the data output from the 8B / 10B encoder 512 is input to the serializer 513.
- the serializer 513 converts input data from parallel data to serial data.
- 8B10B coding encoding processing is performed so that the byte delimiter of each data can be easily recognized by the receiving circuit.
- Data output from the serializer 513 is input to the laser diode driver 514.
- the laser diode driver 514 drives the laser diode 515 based on the input data, and outputs an optical signal to be transmitted from the laser diode 515 through the main stream link.
- the receiving unit 307 receives a lane frame of a substream link that is transmitted from the receiver 400 electrically or optically by a substream link, and optically using an optical cable in this embodiment.
- FIG. 5B shows a configuration example of the receiving unit 307.
- the receiving unit 307 includes a photo detector 521, an amplifier (Trans Impedance Amplifier) 522, a deserializer 523, an 8B / 10B decoder (8b / 10b Decode) 524, a descrambler (Descrambler). ) 525.
- an amplifier Trans Impedance Amplifier
- 8b / 10b Decode 8b / 10b Decode
- Descrambler descrambler
- the optical signal sent through the substream link is input to the photo detector 521 and converted into an electric signal. This electric signal is amplified by an amplifier 522. Data (electrical signal) output from the amplifier 522 is input to the deserializer 523. The deserializer 523 converts input data from serial data to parallel data.
- the deserializer 523 includes a clock and data recovery circuit (CDR) 308 in the preceding stage, and regenerates a carrier clock (Lane clock) from input data from the amplifier 522, and this carrier. Data is reliably received based on the clock.
- CDR clock and data recovery circuit
- FIG. 8 shows a configuration example of the clock / data recovery circuit 308.
- Serial data Serial Data Input
- phase comparator 308a Phase Frequency Detector
- the phase comparator 308a, the loop filter (Loop? Filter) 308b, and the voltage controlled oscillator (VCO: Voltage? Controlled? Oscillator) 308c constitute a phase locked loop (PLL: Phase? Locked? Loop).
- the clock (Recovery clock) obtained by the voltage controlled oscillator 308c is phase-compared with serial data (Serial Data Input) which is input data from the amplifier 522 by the phase comparator 308a, and the comparison error signal is output from the loop filter 308b.
- the control signal Vcon is supplied to the voltage controlled oscillator 308c.
- the clock (Recovery clock) obtained by the voltage controlled oscillator 308 c is synchronized with the input data from the amplifier 522.
- serial data Serial Data Input
- data register 308d serial data (Serial Data Input) that is input data from the amplifier 522 is input to the data register 308d and latched by a clock (Recovery clock) obtained by the voltage controlled oscillator 308c.
- a clock Recovery clock
- output data Output Data
- the data output from the deserializer 523 is input to the 8B / 10B decoder 524.
- the 8B / 10B decoder 524 performs 8B10B coding decoding processing on the input data to obtain 8-bit data.
- FIG. 7B shows a circuit configuration example of the 8B / 10B decoder 524.
- the configuration is opposite to that of the 8B / 10B encoder 512 in FIG. 7A, and 10-bit data from the deserializer 523 is input to the decoder (10b-> 8b Decode) and includes the control bit (Z). It is output as 9-bit data.
- the data output from the 8B / 10B decoder 524 is input to the descrambler 525.
- the descrambler 525 performs descrambling processing reverse to that of the scrambler 511 of the transmission unit 306, and outputs lane frame data.
- the lane frame decoding unit 309 takes out the payload unit included in the lane frame received by the receiving unit 307, here the ACMSW packet unit.
- the ACMSW decoding unit 310 acquires frequency division ratio information (ACR information) stored in the ACMSW packet unit extracted by the lane frame decoding unit 309. This frequency division ratio information consists of two values, Maud and Naud.
- the audio clock reproduction unit 311 reproduces an audio clock (Audio Clock) from the carrier clock (Lane Clock) reproduced by the CDR 308 of the receiving unit 307 and Maud and Naud.
- a carrier clock Lithane (Clock) of 1.215 GHz is divided to generate a 270 MHz video clock (Link Video Clock), and an audio clock is generated from this video clock (Link Video Clock) and Maud and Naud. (Audio Clock) is played.
- Naud is defined as the count interval of the audio clock (Audio Clock)
- Maud is defined as the count value of the video clock (Link Video Clock) in that interval.
- FIG. 9 shows a configuration example of the audio clock reproducing unit 311.
- the carrier clock (Lane Clock) is divided by 1/10 by the frequency divider 311a, and the output clock is further divided by 2/9 by the frequency divider 311b to obtain the video clock (Link Video Clock).
- the clock obtained by dividing the video clock (Link (Video Clock) by 1 / Maud by the frequency divider 311c and the output clock of the PLL circuit 311d by 1 / Naud by the frequency divider 311e are obtained.
- An audio clock (AudioPLClock) is obtained as an output clock of the PLL circuit 311d by inputting the clock to the PLL circuit 311d and performing phase comparison.
- the receiving unit 401 receives a lane frame transmitted from the transmitter 300 electrically or optically via a main frame link, and optically using an optical cable in this embodiment. Although detailed description is omitted, the receiving unit 401 is configured similarly to the receiving unit 307 in the transmitter 300 described above (see FIG. 5B).
- the lane frame decoding unit 402 performs a decoding process on the lane frame received by the receiving unit 401, and extracts an AS packet unit (ASPU) and an AA packet unit (AAPU).
- ASPU AS packet unit
- AA packet unit AA packet unit in which audio additional information is inserted into the payload.
- the ASPU decoding unit 403 performs decoding processing on the AS packet unit extracted by the lane frame decoder 402, and extracts audio data.
- the AAPU decoding unit 404 performs a decoding process on the AA packet unit extracted by the lane frame decoder 402, and extracts audio additional information.
- the audio clock source 406 generates an audio clock.
- the audio decoding unit 405 synchronizes the audio data extracted by the ASPU decoding unit 403 with the audio clock (Audio Clock) generated by the audio clock source 406 based on the audio additional information extracted by the AAPU decoding unit 404. Processing is performed to obtain output audio data for voice output.
- the audio decoding unit 405 outputs the output audio data in synchronization with the audio clock (Audio (Clock) generated by the audio clock source 406.
- a carrier clock (Lane Clock) generator 407 generates a 1.215 GHz carrier clock (Lane Clock) based on an audio clock (Audio Clock) and a 270 MHz video clock (Link Video Clock), and a frequency division ratio.
- Two values of Maud and Naud are output as information.
- Naud is defined as the count interval of the audio clock
- Maud is defined as the count value of the video clock (Link Video Clock) in that interval.
- FIG. 10 shows a configuration example of the carrier clock generation unit 407.
- the count unit 407b functions as a Naud advance counter based on the value of Naud generated by the Naud generation unit 407a, and performs a count operation using the audio clock (Audio Clock) as a count clock.
- the carry output of the count unit 407b is supplied as a reset signal to the count unit 407c and also supplied as a latch (hold) signal to the latch unit 407d.
- the count unit 407c is reset by the carry output of the count unit 407b and performs a count operation using a 270 MHz video clock (Link Video Clock) as a count clock.
- the count output of the count unit 407c is input to the latch unit 407d.
- the latch unit 407d holds the count output of the count unit 407c by the output of the count unit 407b, and obtains the value of Maud.
- the multiplication unit 407e multiplies the 270 MHz video clock (Link Video Clock) by 9/2. Further, the multiplier 407f multiplies the output clock of the multiplier 407e by 10 to obtain a carrier clock (Lane Clock) of 1.215 GHz.
- the carrier clock generation unit 407 outputs the 1.215 GHz carrier clock (Lane Clock) obtained by the multiplication unit 407f, and the Naud value generated by the Naud generation unit 407a and the Maud value held by the latch unit 407d. Output the value.
- the carrier clock (Lane Clock) and the video clock (Link Video Clock) satisfy the relationship of the above formula (1).
- the audio clock (Audio Clock), the video clock (Link Video Clock), and Maud and Naud satisfy the relationship of the above equation (2).
- the ACMSW generation unit 408 generates an ACMSW packet unit (Audio ⁇ ⁇ ⁇ ⁇ Clock ⁇ ⁇ ⁇ Master Switch Packet Unit) as an SS packet unit.
- This ACMSW packet unit includes AMCLK (Audio Master Clock Switch Request) indicating a switch request to the option mode using the audio clock on the receiver 400 side as a master, and the frequency division output from the carrier clock generation unit 407 Maud and Naud as ratio information are also included.
- AMCLK Audio Master Clock Switch Request
- the lane frame generation unit 409 generates a lane frame including an SS packet unit such as an ACMSW packet unit generated by the ACMSW generation unit 408 as a payload unit (Payload unit) (see FIG. 4).
- an SS packet unit such as an ACMSW packet unit generated by the ACMSW generation unit 408 as a payload unit (Payload unit) (see FIG. 4).
- the transmission unit 410 transmits the lane frame of the substream link generated by the lane frame generation unit 409 to the transmitter 300 electrically or optically using the substream link, or optically using an optical cable in this embodiment.
- the transmission unit 410 is configured in the same manner as the transmission unit 306 in the transmitter 300 described above (see FIG. 5A). In this case, the output data from the 8B / 10B encoder 512 is converted from parallel data to serial data by the serializer 513, and the serial data is transmitted as an optical signal in synchronization with the carrier clock.
- the audio clock (Audio Clock) generated by the audio clock source 406 of the receiver 400 is supplied to the carrier clock generation unit 407.
- the carrier clock generation unit 407 is supplied with a 270 MHz video clock (Link (VideolockClock).
- the carrier clock generation unit 407 generates a 1.215 GHz carrier clock (Lane Clock) based on the audio clock (Audio Clock) and the 270 MHz video clock (Link Video Clock), and as frequency division ratio information. Maud and Naud are obtained (see FIG. 10).
- the ACMSW generation unit 408 generates an ACMSW packet unit as an SS packet unit.
- the ACMSW packet unit includes AMCLK indicating a switch request to the option mode using the audio clock on the receiver 400 side as a master, and Maud and Naud as frequency division ratio information output from the carrier clock generation unit 407. Is also included.
- the ACMSW packet unit generated by the ACMSW generation unit 408 is supplied to the lane frame generation unit 409.
- the lane frame generation unit 409 generates a lane frame including an SS packet unit such as an ACMSW packet unit as a payload unit (see FIG. 4).
- the lane frame of the substream link generated by the lane frame generation unit 409 is supplied to the transmission unit 410.
- the lane frame of the substream link is optically transmitted to the transmitter 300 using an optical cable (see FIG. 5A).
- transmission data is transmitted as an optical signal in synchronization with the carrier clock.
- the receiving unit 307 of the transmitter 300 receives the lane frame of the substream link that is optically transmitted from the receiver 400 using the optical cable through the substream link (see FIG. 5B).
- the clock / data recovery circuit 308 included in the preceding stage of the deserializer 613 reproduces the carrier clock (Lane Clock) from the input data from the amplifier 612, and the data is reliably generated based on this carrier clock. Is received.
- the lane frame of the substream link received by the receiving unit 307 is supplied to the lane frame decoding unit 309.
- the lane frame decoding unit 309 the lane frame of the substream link is decoded, and the SS packet unit included in the lane frame, here, the ACMSW packet unit is extracted.
- the ACMSW packet unit extracted by the lane frame decoding unit 309 is supplied to the ACMSW decoding unit 310.
- the ACMSW decoding unit 310 decodes the ACMSW packet unit and stores AMCLK indicating the switch request to the option mode using the audio clock on the receiver 400 side as a master stored in the ACMSW packet unit, and the frequency division ratio Maud and Naud are acquired as information.
- the carrier clock (Lane Clock) regenerated by the clock / data regenerating circuit 308 and Maud as the frequency division ratio information acquired by the ACMSW decoding unit 310 are displayed.
- the audio clock is reproduced based on Naud, and the audio data is transmitted in synchronization with the reproduced audio clock.
- the carrier clock (Lane Clock) regenerated by the clock / data regenerating circuit 308 and the Maud and Naud as the division ratio information acquired by the ACMSW decoding unit 310 are supplied to the audio clock regenerating unit 311.
- the audio clock reproduction unit 311 reproduces an audio clock (Audio Clock) from the carrier clock (Lane Clock) and Maud and Naud (see FIG. 9).
- Uncompressed or compressed audio data (audio sample data) output from the audio source 301 is input to the FIFO memory unit 302.
- the audio data input from the audio source 301 is sequentially output in synchronization with the audio clock reproduced by the audio clock reproduction unit 311.
- the audio data output from the FIFO memory unit 302 is supplied to the ASPU generation unit 303.
- the ASPU generation unit 303 performs packing of the audio data, and generates an AS packet unit (ASPU) in which the audio data is inserted into the payload. This AS packet unit is supplied to the lane frame generation unit 305.
- ASPU AS packet unit
- the audio additional information output from the audio source 301 is supplied to the AAPU generation unit 304.
- the AAPU generation unit 304 performs packing of the audio additional information, and generates an AA packet unit in which the audio additional information is inserted into the payload.
- the audio additional information includes information such as a sampling frequency, a sample size, and an encoding method (non-compression, compression method).
- the AA packet unit is supplied to the lane frame generation unit 305.
- the lane frame generation unit 305 generates a lane frame including an AS packet unit and an AA packet unit as a payload unit.
- the lane frame of the substream link generated by the lane frame generation unit 305 is supplied to the transmission unit 306.
- the lane frame of the main stream link is optically transmitted to the receiver 400 using an optical cable (see FIG. 5A).
- the carrier clock (Lane Clock) regenerated by the clock / data regenerating circuit 308 and the frequency division acquired by the ACMSW decoding unit 310 are obtained.
- An audio clock is reproduced based on Maud and Naud as ratio information, and audio data is transmitted in synchronization with the reproduced audio clock.
- an ACK command is returned from the transmitter 300 side to the receiver 400 side via a substream link. Then, the receiver 400 is switched to a state where an audio clock (Audio ⁇ ⁇ Clock) generated from the audio clock source 406 is used as the audio clock.
- an audio clock (Audio ⁇ ⁇ Clock) generated from the audio clock source 406 is used as the audio clock.
- the reception unit 401 of the receiver 400 receives the lane frame of the main stream link that is optically transmitted from the transmitter 300 using the optical cable through the main stream link (see FIG. 5B).
- the lane frame of the main stream link is supplied to the lane frame decoding unit 402.
- the lane frame decoding unit 402 performs a decoding process on the lane frame of the main stream link, and extracts an AS packet unit (ASPU) and an AA packet unit (AAPU) included in the lane frame. As described above, audio data is inserted into the AS packet unit, and audio additional information is inserted into the AA packet unit.
- ASPU AS packet unit
- AAPU AA packet unit
- the AS packet unit extracted by the lane frame decoding unit 402 is supplied to the ASPU decoding unit 403.
- the AS packet unit is subjected to decoding processing, and audio data is extracted.
- the AA packet unit extracted by the lane frame decoding unit 402 is supplied to the AAPU decoding unit 404.
- the AA packet unit is decoded and audio additional information is extracted.
- the audio data (audio sample data) extracted by the ASPU decoding unit 403 and the audio additional information extracted by the AAPU decoding unit 404 are supplied to the audio decoding unit 405.
- the audio data is processed in synchronization with an audio clock (Audio Clock) generated by the audio clock source 406 based on the audio additional information, and output audio data for audio output is obtained.
- the output audio data is output from the audio decoding unit 405 in synchronization with the audio clock (Audio (Clock) generated by the audio clock source 406.
- FIG. 11 shows a configuration example of a disc player 11 as a specific example of the transmitter 300.
- the disc player 11 includes a main stream link transmission unit 125, a sub stream link transmission unit 126, and a sub stream link reception unit 127.
- the main stream link transmission unit 125 includes processing units corresponding to the FIFO memory unit 302, the ASPU generation unit 303, the AAPU generation unit 304, the lane frame generation unit 305, the transmission unit 306, and the like in the transmitter 300 of FIG. Yes.
- the substream link reception unit 127 includes processing units corresponding to the reception unit 307, the lane frame decoding unit 309, the ACMSW decoding unit 310, the audio clock reproduction unit 311 and the like in the transmitter 300 of FIG.
- the disc player 11 includes a CPU (Central Processing Unit) 104, an internal bus 105, a flash ROM (Read Only Memory) 106, an SDRAM (Synchronous Random Access Memory) 107, a remote control receiving unit 108, and remote control transmission.
- a CPU Central Processing Unit
- an internal bus 105 a flash ROM (Read Only Memory) 106
- an SDRAM Synchronous Random Access Memory
- remote control receiving unit 108 and remote control transmission.
- Machine 109 Central Processing Unit
- the disc player 11 has a SATA (Serial Advanced Technology Attachment) interface 110, a BD (Blu-Ray Disc) drive 111, an Ethernet interface (Ethernet I / F) 112, and a network terminal 113.
- the disc player 11 has an MPEG (Moving Picture Picture Expert Group) decoder 115, a graphic generation circuit 116, a video output terminal 117, and an audio output terminal 118.
- the disc player 11 may include a display control unit 121, a panel drive circuit 122, a display panel 123, and a power supply unit 124.
- “Ethernet” and “Ethernet” are registered trademarks.
- the CPU 104, flash ROM 106, SDRAM 107, SATA interface 110, Ethernet interface 112, MPEG decoder 115 and display control unit 121 are connected to the internal bus 105.
- the CPU 104 controls the operation of each part of the disc player 11.
- the flash ROM 106 stores control software and data.
- the SDRAM 107 constitutes a work area for the CPU 104.
- the CPU 104 develops software and data read from the flash ROM 106 on the SDRAM 107 and activates the software to control each unit of the disc player 11.
- the remote control receiving unit 108 receives a remote control signal (remote control code) transmitted from the remote control transmitter 109 and supplies it to the CPU 104.
- the CPU 104 controls each part of the disc player 11 according to the remote control code.
- the remote control unit is shown as the user instruction input unit.
- the user instruction input unit has other configurations, for example, a switch, a wheel, a touch panel unit for inputting an instruction by proximity / touch, a mouse It may be a keyboard, a gesture input unit for detecting an instruction input with a camera, a voice input unit for inputting an instruction by voice, or the like.
- the BD drive 111 records content data on a BD disc (not shown) as a disc-shaped recording medium, or reproduces content data from this BD.
- the BD drive 111 is connected to the internal bus 105 via the SATA interface 110.
- the MPEG decoder 115 performs decoding processing on the MPEG2 stream reproduced by the BD drive 111 to obtain image and audio data.
- the image and audio data is supplied from the MPEG decoder 115 to the main stream link transmission unit 125.
- the image and audio data may be compressed data or non-compressed data.
- the MPEG decoder 115 constitutes the audio source 301 in the portion related to audio data transmission in FIG.
- the graphic generation circuit 116 performs graphics data superimposition processing on the image data obtained by the MPEG decoder 115 as necessary.
- the video output terminal 117 outputs the image data output from the graphic generation circuit 116.
- the audio output terminal 118 outputs the audio data obtained by the MPEG decoder 115.
- the panel drive circuit 122 drives the display panel 123 based on the video (image) data output from the graphic generation circuit 260.
- the display control unit 121 controls the display on the display panel 123 by controlling the graphics generation circuit 116 and the panel drive circuit 122.
- the display panel 123 includes, for example, an LCD (Liquid Crystal Display), a PDP (Plasma Display Panel), an organic EL (Organic Electro-Luminescence) panel, and the like.
- the display control unit 121 may directly control the display on the display panel 123.
- the CPU 104 and the display control unit 121 may be a single chip or a plurality of cores.
- the power supply unit 124 supplies power to each unit of the disc player 11.
- the power supply unit 124 may be an AC power supply or a battery (storage battery, dry battery).
- content data to be recorded is acquired via a digital tuner (not shown) or from the network terminal 113 via the Ethernet interface 112.
- This content data is input to the SATA interface 110 and recorded on the BD by the BD drive 111.
- the content data may be recorded in an HDD (hard disk drive) (not shown) connected to the SATA interface 110.
- content data (MPEG stream) reproduced from the BD by the BD drive 111 is supplied to the MPEG decoder 115 via the SATA interface 110.
- the MPEG decoder 115 the reproduced content data is decoded, and uncompressed image and audio data is obtained.
- the image data is output to the video output terminal 117 through the graphic generation circuit 116.
- the audio data is output to the audio output terminal 118.
- the image data obtained by the MPEG decoder 115 is supplied to the panel drive circuit 122 through the graphic generation circuit 116 in accordance with a user operation, and the reproduced image is displayed on the display panel 123. Also, audio data obtained by the MPEG decoder 115 is supplied to a speaker (not shown) according to a user operation, and audio corresponding to the reproduced image is output.
- image and audio data when image and audio data are transmitted from the disc player 11 to an external device (receiver) during reproduction, image and audio data (uncompressed data or uncompressed data) is transmitted from the MPEG decoder 115 to the main stream link transmission unit 125. Data) is supplied and transmitted to the external device (receiver) via the main stream link.
- the content data reproduced by the BD drive 111 is transmitted to the network during reproduction, the content data is output to the network terminal 113 via the Ethernet interface 112.
- the image data may be transmitted (transmitted) after being encrypted using a copyright protection technique such as HDCP, DTCP, DTCP +, or the like.
- the substream link receiver 127 reproduces based on the carrier clock (Lane Clock) and Maud and Naud as the division ratio information.
- An audio clock (Audio Clock) is supplied to the main stream link transmission unit 125.
- the main stream link transmission unit 125 performs transmission processing of audio data (audio sample data) based on the reproduced audio clock (Audio ⁇ ⁇ ⁇ ⁇ Clock).
- FIG. 12 illustrates a configuration example of the television receiver 12 as a specific example of the receiver 400.
- the television receiver 12 includes a main stream link receiver 233, a substream link receiver 234, a substream link transmitter 235, and an audio clock source 236.
- the main stream link reception unit 233 includes processing units corresponding to the reception unit 401, the lane frame decoding unit 402, the ASPU decoding unit 403, the AAPU decoding unit 404, and the audio decoding unit 405 in the receiver 400 of FIG. .
- the substream link transmission unit 235 includes a lane clock generation unit 407, an ACMSW generation unit 408, a lane frame generation unit 409, a substream link transmission unit 410, and the like in the receiver 400 of FIG.
- the television receiver 12 includes an antenna terminal 205, a digital tuner 206, an MPEG decoder 207, a video signal processing circuit 208, a graphic generation circuit 209, a panel drive circuit 210, and a display panel 211. Yes.
- the television receiver 12 includes an audio signal processing circuit 212, an audio amplification circuit 213, a speaker 214, an internal bus 220, a CPU 221, a flash ROM 222, and an SDRAM (Synchronous Random Access Memory) 223. Yes.
- the television receiver 12 includes an Ethernet interface (Ethernet I / F) 224, a network terminal 225, a remote control receiving unit 226, and a remote control transmitter 227.
- the television receiver 12 includes a display control unit 231 and a power supply unit 232. “Ethernet” and “Ethernet” are registered trademarks.
- the CPU 221 controls the operation of each unit of the television receiver 12.
- the flash ROM 222 stores control software and data.
- the SDRAM 223 constitutes a work area for the CPU 221.
- the CPU 221 develops software and data read from the flash ROM 222 on the SDRAM 223 to activate the software, and controls each unit of the television receiver 12.
- the remote control receiving unit 226 receives the remote control signal (remote control code) transmitted from the remote control transmitter 227 and supplies it to the CPU 221.
- the CPU 221 controls each part of the television receiver 12 based on this remote control code.
- a remote control unit is shown as the user instruction input unit.
- the user instruction input unit has other configurations, for example, a touch panel unit that inputs an instruction by proximity / touch, a mouse, a keyboard, a camera It may be a gesture input unit that detects an instruction input, a voice input unit that inputs an instruction by voice, and the like.
- the network terminal 225 is a terminal connected to the network, and is connected to the Ethernet interface 224.
- the CPU 221, flash ROM 222, SDRAM 223, Ethernet interface 224, MPEG decoder 207, and display control unit 231 are connected to the internal bus 220.
- the antenna terminal 205 is a terminal for inputting a television broadcast signal received by a receiving antenna (not shown).
- the digital tuner 206 processes a television broadcast signal input to the antenna terminal 205 and generates a partial TS (Transport Stream) (TS packet of video data, audio data) from a predetermined transport stream corresponding to the user's selected channel. TS packet) is extracted.
- TS Transport Stream
- the digital tuner 206 extracts PSI / SI (Program Specific Information / Service Information) from the obtained transport stream and outputs it to the CPU 221.
- PSI / SI Program Specific Information / Service Information
- the process of extracting a partial TS of an arbitrary channel from a plurality of transport streams obtained by the digital tuner 206 is performed by obtaining packet ID (PID) information of the arbitrary channel from PSI / SI (PAT / PMT). It becomes possible.
- PID packet ID
- the MPEG decoder 207 decodes a video PES (Packetized Elementary Stream) packet composed of TS packets of video data obtained by the digital tuner 206 to obtain image data. Also, the MPEG decoder 207 performs a decoding process on an audio PES packet configured by an audio data TS packet obtained by the digital tuner 206 to obtain audio data. Also, the MPEG decoder 207 performs decoding processing on content data (image data and audio data) supplied from the network terminal 225 via the Ethernet interface 224 to obtain image and audio data.
- a video PES Packetized Elementary Stream
- the video signal processing circuit 208 and the graphic generation circuit 209 perform scaling processing (resolution conversion processing) and graphics on the image data obtained by the MPEG decoder 207 or the image data received by the receiving unit 233 as necessary. Performs data superimposition processing.
- the panel drive circuit 210 drives the display panel 211 based on the video (image) data output from the graphic generation circuit 209.
- the display control unit 231 controls display on the display panel 211 by controlling the graphics generation circuit 209 and the panel drive circuit 210.
- the display panel 211 includes, for example, an LCD (Liquid Crystal Display), a PDP (Plasma Display Panel), an organic EL (Organic Electro-Luminescence) panel, and the like.
- the power supply unit 232 supplies power to each unit of the television receiver 12.
- the power supply unit 232 may be an AC power supply or a battery (storage battery, dry battery).
- the audio signal processing circuit 212 performs necessary processing such as D / A conversion on the audio data obtained by the MPEG decoder 207 or the audio data received by the receiving unit 233.
- the audio amplifier circuit 213 amplifies the audio signal output from the audio signal processing circuit 212 and supplies the amplified audio signal to the speaker 214.
- the speaker 214 may be monaural or stereo. Further, the number of speakers 214 may be one, or two or more.
- the speaker 214 may be an earphone or a headphone.
- the speaker 214 may be compatible with 2.1 channel, 5.1 channel, or the like.
- the speaker 214 may be connected to the television receiver 12 wirelessly.
- the speaker 214 may be another device.
- the received content data when the received content data is sent to the network, the content data is output to the network terminal 225 via the Ethernet interface 224.
- the image data before outputting the image data, it may be transmitted after being encrypted using a copyright protection technology such as HDCP, DTCP, DTCP +, or the like.
- a television broadcast signal input to the antenna terminal 205 is supplied to the digital tuner 206.
- the digital tuner 206 processes a television broadcast signal and outputs a predetermined transport stream corresponding to a user's selected channel. From the transport stream, a partial TS (TS packet of video data, TS packet of audio data) is output. Are extracted, and the partial TS is supplied to the MPEG decoder 207.
- video data is obtained by performing a decoding process on a video PES packet composed of TS packets of video data.
- This video data is supplied to the panel drive circuit 210 after being subjected to scaling processing (resolution conversion processing), graphics data superimposition processing, and the like in the video signal processing circuit 208 and the graphic generation circuit 209 as necessary.
- scaling processing resolution conversion processing
- graphics data superimposition processing and the like in the video signal processing circuit 208 and the graphic generation circuit 209 as necessary.
- the display panel 211 displays an image corresponding to the user's selected channel.
- audio data is obtained by performing a decoding process on the audio PES packet configured by the TS packet of the audio data.
- the audio data is subjected to necessary processing such as D / A conversion in the audio signal processing circuit 212, further amplified by the audio amplification circuit 213, and then supplied to the speaker 214. Therefore, sound corresponding to the user's selected channel is output from the speaker 214.
- content data (image data, audio data) supplied from the network terminal 225 to the Ethernet interface 224 is supplied to the MPEG decoder 207. Thereafter, the operation is the same as when the above-described television broadcast signal is received, an image is displayed on the display panel 211, and sound is output from the speaker 214.
- the image and audio data received by the main stream link receiving unit 233 are the video signal processing circuit 212 and the audio signal, respectively. It is supplied to the processing circuit 212. Thereafter, the operation is the same as when the above-described television broadcast signal is received, an image is displayed on the display panel 211, and sound is output from the speaker 214.
- the audio clock (Audio (Clock) generated by the audio clock source 236 is used as shown by the broken line.
- the substream link transmission unit 235 generates a carrier clock (Lane Clock) based on the audio clock (Audio Clock) and the video clock (Link Video Clock) generated by the audio clock source 236 and divides the frequency.
- the values of Maud and Naud as ratio information are obtained.
- the substream link transmission unit 235 then transmits the transmission data (serial data) of the lane frame of the substream link including the SS packet unit such as the ACMSW packet unit having values of Maud and Naud, and the generated carrier clock (LaneLClock). ) In synchronization with the transmission.
- the main stream link receiving unit 233 processes the received audio data (audio sample data) in synchronization with the audio clock (Audio Clock) generated by the audio clock source 406, and outputs audio data for audio output. Is obtained.
- the transmitter 300 (see FIG. 3) synchronizes with the audio clock obtained by dividing the carrier clock reproduced from the received encoded data. Audio data is transmitted to the receiver 400 (see FIG. 3). Therefore, high-quality audio reproduction can be performed in the receiver 400 without supplying a transmission clock from the receiver 400 using the clock signal line.
- the transmitter 300 sends audio data to the receiver 400 in synchronization with the audio clock generated from the carrier clock reproduced from the received encoded data.
- the transmission is performed in response to a request from the receiver 400. Therefore, the transmitter 300 can perform transmission processing effectively, that is, according to the processing capability of the receiver 400.
- the transmitter 300 divides the carrier clock based on the division ratio information acquired from the received encoded data to generate an audio clock. .
- the frequency division is performed based on the frequency division ratio information sent from the external device, and the audio clock can be generated easily and appropriately.
- the receiver 400 transmits encoded data that can be clock-reproduced in synchronization with a carrier clock generated based on the generated audio clock.
- the audio data transmitted to (see FIG. 3) and received from the transmitter 300 is processed based on the audio clock. Therefore, high-quality audio reproduction can be performed without supplying a transmission clock using the clock signal line to the transmitter 300.
- the receiver 400 uses the division ratio information for obtaining the audio clock from the carrier clock as encoded data that can be reproduced by the clock transmitted to the transmitter 300. Include encoded data. Therefore, the transmitter 300 can divide the carrier clock reproduced from the encoded data based on the division ratio information to obtain an audio clock, and can easily and appropriately generate the audio clock. It becomes.
- the receiver 400 uses an audio clock generated from the reproduced carrier clock as encoded data that can be reproduced by the clock transmitted to the transmitter 300. Include the encoded data of the request. Therefore, the transmitter 300 can effectively perform audio data transmission processing based on the audio clock generated from the reproduced carrier clock.
- the disc player 11 (see FIG. 11) is shown as a specific example of the transmitter 300
- the television receiver 12 (see FIG. 12) is shown as a specific example of the receiver 400.
- the transmitter 300 and the receiver 400 are not limited to these.
- this technique can also take the following structures.
- an encoded data receiving unit that receives encoded data that can be recovered from a clock from an external device;
- An audio clock generator for generating an audio clock based on the carrier clock regenerated from the received encoded data;
- a transmission apparatus comprising: an audio data transmission unit configured to transmit audio data to the external device in synchronization with the generated audio clock.
- the audio clock generation unit The transmission apparatus according to (1), wherein the audio clock is generated by dividing the carrier clock based on the division ratio information acquired from the received encoded data.
- the audio clock generation unit When a request to use an audio clock generated based on the reproduced carrier clock is obtained, The audio clock generation unit generates an audio clock based on the carrier clock reproduced from the encoded data, The transmission apparatus according to (1) or (2), wherein the audio data transmission unit transmits audio data to the external device in synchronization with the generated audio clock. (4) The audio data transmitting unit transmits the audio data to the external device through a first transmission path, The transmission apparatus according to any one of (1) to (3), wherein the encoded data receiving unit receives the encoded data from the external device through a second transmission path. (5) The transmission device according to (4), wherein each of the first transmission path and the second transmission path is a transmission path using an optical cable.
- a receiving apparatus comprising: an audio data processing unit that processes the received audio data based on the generated audio clock.
- the reception apparatus includes encoded data of frequency division ratio information for obtaining the audio clock from the carrier clock.
- the reception device includes encoded data that is requested to use an audio clock generated based on the carrier clock.
- the audio data receiving unit receives the audio data from the external device through the first transmission path, The reception apparatus according to any one of (7) to (9), wherein the encoded data transmission unit transmits the encoded data to the external device through a second transmission path.
- each of the first transmission path and the second transmission path is a transmission path using an optical cable.
- an audio clock generation step for generating an audio clock
- An encoded data transmission step of transmitting, to an external device, encoded data that can be regenerated in synchronization with a carrier clock generated based on the generated audio clock
- An audio data receiving step for receiving audio data from the external device by an audio data receiving unit
- a receiving method comprising: an audio data processing step for processing the received audio data based on the generated audio clock.
- a transmission / reception system in which a transmission device and a reception device are connected via a transmission line,
- the transmitter is An encoded data receiving unit for receiving encoded data capable of clock recovery from the receiving device;
- An audio clock generator for generating an audio clock based on the carrier clock regenerated from the received encoded data;
- An audio data transmitting unit that transmits audio data to the receiving device in synchronization with the generated audio clock;
- the receiving device is An audio clock generator for generating an audio clock;
- An encoded data transmission unit that transmits encoded data that can be recovered in synchronization with a carrier clock generated based on the generated audio clock to the transmission device;
- An audio data receiver for receiving audio data from the transmitter;
- a transmission / reception system comprising: an audio data processing unit that processes the received audio data based on the generated audio clock.
- MPEG decoder 208 .. video signal processing circuit 209. ... Panel drive circuit 11 ... display panel 212 ... audio signal processing circuit 213 ... audio amplifier circuit 214 ... speaker 220 ... internal bus 221 ... CPU 222 ... Flash ROM 223 SDRAM 224 ... Ethernet interface 225 ... Network terminal 226 ... Remote control receiver 227 ... Remote control transmitter 231 ... Display control unit 232 ... Power supply unit 233 ... Main stream link receiver 234 ..Substream link receiving unit 235... Substream link transmitting unit 236... Audio clock source 300... Transmitter 301... Audio source 302... FIFO memory unit 303. ... AAPU generator 305 ... lane frame generator 306 ... main stream link transmitter 307 ...
- substream link receiver 308 ... CDR unit 308a ... phase comparator 308b ⁇ Loop filter 308c ⁇ ⁇ ⁇ Voltage controlled oscillator 3 08d: Data register 309 ... Lane frame decoding unit 310 ... ACMSW decoding unit 311 ... Audio clock reproduction unit 311a, 311b, 311c, 311e ... Frequency divider 311d ... PLL circuit 400 .. Receiver 401... Main stream link receiver 402. Lane frame decoding unit 403... ASPU decoding unit 404... AAPU decoding unit 405 .. Audio decoding unit 406. 407 ... Lane clock generator 407a ... Naud generator 407b, 407c ... Count unit 407d ...
- Multi-stream configuration unit 605 ⁇ Channel mapping unit 606 ⁇ Channel demapping unit 607 ⁇ Multi-stream decomposition unit 608 ⁇ Packet generating unit 609 ⁇ Data depacking unit 610 ⁇ Video / audio clock unit 701a, 701b ⁇ Data packing part 02a, 702b ⁇ frame generation unit 703a, 703b ⁇ packet generation unit 704a, 704b ⁇ data de-packing unit
Abstract
Description
外部機器から、クロック再生が可能な符号化データを受信する符号化データ受信部と、
上記受信された符号化データから再生された搬送クロックに基づいてオーディオクロックを生成するオーディオクロック生成部と、
上記生成されたオーディオクロックに同期してオーディオデータを上記外部機器に送信するオーディオデータ送信部を備える
送信装置にある。
オーディオクロックを発生するオーディオクロック発生部と、
上記発生されたオーディオクロックに基づいて生成された搬送クロックに同期してクロック再生が可能な符号化データを外部機器に送信する符号化データ送信部と、
上記外部機器からオーディオデータを受信するオーディオデータ受信部と、
上記受信されたオーディオデータを上記発生されたオーディオクロックに基づいて処理するオーディオデータ処理部を備える
受信装置にある。
1.実施の形態
2.変形例
[AV伝送システムの構成]
図1は、実施の形態としてのAV(Audio and Visual)伝送システム10の概要を示している。このAV伝送システム10は、メインストリームリンク(Main Stream Link)60と、サブストリームリンク(Sub Stream Link)70により構成されている。
Link Video Clock × 9/2 × 10 = Lane Clock ・・・(1)
Audio Clock × Maud = Link Video Clock × Naud ・・・(2)
図11は、送信機300の具体例としてのディスクプレーヤ11の構成例を示している。このディスクプレーヤ11は、メインストリームリンク送信部125と、サブストリームリンク送信部126と、サブストリームリンク受信部127を有している。
図12は、受信機400の具体例としてのテレビ受信機12の構成例を示している。このテレビ受信機12は、メインストリームリンク受信部233と、サブストリームリンク受信部234と、サブストリームリンク送信部235と、オーディオクロックソース236を有している。
なお、上述実施の形態において、送信機300の具体例としてディスクプレーヤ11(図11参照)を示し、また、受信機400の具体例としてテレビ受信機12(図12参照)を示した。しかし、送信機300および受信機400は、これらに限定されないことは勿論である。
(1)外部機器から、クロック再生が可能な符号化データを受信する符号化データ受信部と、
上記受信された符号化データから再生された搬送クロックに基づいてオーディオクロックを生成するオーディオクロック生成部と、
上記生成されたオーディオクロックに同期してオーディオデータを上記外部機器に送信するオーディオデータ送信部を備える
送信装置。
(2)上記オーディオクロック生成部は、
上記受信された符号化データから取得された分周比情報に基づいて上記搬送クロックを分周して上記オーディオクロックを生成する
前記(1)に記載の送信装置。
(3)上記再生された搬送クロックに基づいて生成されたオーディオクロックを用いることの要求が得られるとき、
上記オーディオクロック生成部は、上記符号化データから再生された上記搬送クロックに基づいてオーディオクロックを生成し、
上記オーディオデータ送信部は、上記生成されたオーディオクロックに同期してオーディオデータを上記外部機器に送信する
前記(1)または(2)に記載の送信装置。
(4)上記オーディオデータ送信部は、上記オーディオデータを上記外部機器に第1の伝送路を通じて送信し、
上記符号化データ受信部は、上記符号化データを上記外部機器から第2の伝送路を通じて受信する
前記(1)から(3)のいずれかに記載の送信装置。
(5)上記第1の伝送路および上記第2の伝送路はそれぞれ光ケーブルを用いた伝送路である
前記(4)に記載の送信装置。
(6)外部機器から、クロック再生が可能な符号化データを受信する符号化データ受信ステップと、
上記受信された符号化データから再生された搬送クロックに基づいてオーディオクロックを生成するオーディオクロック生成ステップと、
オーディオデータ送信部により、上記生成されたオーディオクロックに同期してオーディオデータを上記外部機器に送信するオーディオデータ送信ステップを有する
送信方法。
(7)オーディオクロックを発生するオーディオクロック発生部と、
上記発生されたオーディオクロックに基づいて生成された搬送クロックに同期してクロック再生が可能な符号化データを外部機器に送信する符号化データ送信部と、
上記外部機器からオーディオデータを受信するオーディオデータ受信部と、
上記受信されたオーディオデータを上記発生されたオーディオクロックに基づいて処理するオーディオデータ処理部を備える
受信装置。
(8)上記符号化データとして、上記搬送クロックから上記オーディオクロックを得るための分周比情報の符号化データが含まれる
前記(7)に記載の受信装置。
(9)上記符号化データとして、上記搬送クロックに基づいて生成されたオーディオクロックを用いることの要求の符号化データが含まれる
前記(7)または(8)に記載の受信装置。
(10)上記オーディオデータ受信部は、上記オーディオデータを上記外部機器から第1の伝送路を通じて受信し、
上記符号化データ送信部は、上記符号化データを上記外部機器に第2の伝送路を通じて送信する
前記(7)から(9)のいずれかに記載の受信装置。
(11)上記第1の伝送路および上記第2の伝送路はそれぞれ光ケーブルを用いた伝送路である
前記(10)に記載の受信装置。
(12)オーディオクロックを発生するオーディオクロック発生ステップと、
上記発生されたオーディオクロックに基づいて生成された搬送クロックに同期してクロック再生が可能な符号化データを外部機器に送信する符号化データ送信ステップと、
オーディオデータ受信部により、上記外部機器からオーディオデータを受信するオーディオデータ受信ステップと、
上記受信されたオーディオデータを上記発生されたオーディオクロックに基づいて処理するオーディオデータ処理ステップを有する
受信方法。
(13)送信装置および受信装置が伝送路を介して接続されてなる送受信システムであって、
上記送信装置は、
上記受信装置から、クロック再生が可能な符号化データを受信する符号化データ受信部と、
上記受信された符号化データから再生された搬送クロックに基づいてオーディオクロックを生成するオーディオクロック生成部と、
上記生成されたオーディオクロックに同期してオーディオデータを上記受信装置に送信するオーディオデータ送信部を備え、
上記受信装置は、
オーディオクロックを発生するオーディオクロック発生部と、
上記発生されたオーディオクロックに基づいて生成された搬送クロックに同期してクロック再生が可能な符号化データを上記送信装置に送信する符号化データ送信部と、
上記送信装置からオーディオデータを受信するオーディオデータ受信部と、
上記受信されたオーディオデータを上記発生されたオーディオクロックに基づいて処理するオーディオデータ処理部を備える
送受信システム。
60・・・メインストリームリンク
70・・・サブストリームリンク
104・・・CPU
105・・・内部バス
106・・・フラッシュROM
107・・・SDRAM
108・・・リモコン受信部
109・・・リモコン送信機
110・・・SATAインタフェース
111・・・BDドライブ
112・・イーサネットインタフェース
113・・・ネットワーク端子
115・・・MPEGデコーダ
116・・・グラフィック生成回路
117・・・映像出力端子
118・・音声出力端子
121・・・表示制御部
122・・・パネル駆動回路
123・・・表示パネル
124・・・電源部
125・・・メインストリームリンク送信部
126・・・サブストリームリンク送信部
127・・・サブストリームリンク受信部
205・・・アンテナ端子
206・・・デジタルチューナ
207・・・MPEGデコーダ
208・・・映像信号処理回路
209・・・グラフィック生成回路
210・・・パネル駆動回路
211・・・表示パネル
212・・・音声信号処理回路
213・・・音声増幅回路
214・・・スピーカ
220・・・内部バス
221・・・CPU
222・・・フラッシュROM
223・・・SDRAM
224・・・イーサネットインタフェース
225・・・ネットワーク端子
226・・・リモコン受信部
227・・・リモコン送信機
231・・・表示制御部
232・・・電源部
233・・・メインストリームリンク受信部
234・・・サブストリームリンク受信部
235・・・サブストリームリンク送信部
236・・・オーディオクロックソース
300・・・送信機
301・・・オーディオソース
302・・・FIFOメモリ部
303・・・ASPU生成部
304・・・AAPU生成部
305・・・レーンフレーム生成部
306・・・メインストリームリンクの送信部
307・・・サブストリームリンクの受信部
308・・・CDR部
308a・・・位相比較器
308b・・・ループフィルタ
308c・・・電圧制御発振子
308d・・・データレジスタ
309・・・レーンフレームデコード部
310・・・ACMSWデコード部
311・・・オーディオクロック再生部
311a,311b,311c,311e・・・分周器
311d・・・PLL回路
400・・・受信機
401・・・メインストリームリンクの受信部
402・・・レーンフレームデコード部
403・・・ASPUデコード部
404・・・AAPUデコード部
405・・・オーディオデコード部
406・・・オーディオクロックソース
407・・・レーンクロック生成部
407a・・・Naud発生部
407b,407c・・・カウント部
407d・・・ラッチ部
407e,407f・・・逓倍部
408・・・ACMSW生成部
409・・・レーンフレーム生成部
410・・・サブストリームリンクの送信部
511・・・スクランブラ
512・・・8B/10Bエンコーダ
513・・・シリアライザ
514・・・レーザダイオードドライバ
515・・・レーザダイオード
521・・・フォトデディテクタ
522・・・アンプ
523・・・デシリアライザ
524・・・8B/10Bデコーダ
525・・・デスクランブラ
601・・・データパッキング部
602・・・VCR/ACR生成部
603・・・フレーム生成部
604・・・マルチストリーム構成部
605・・・チャネルマッピング部
606・・・チャネルデマッピング部
607・・・マルチストリーム分解部
608・・・パケット発生部
609・・・データデパッキング部
610・・・ビデオ/オーディオクロック部
701a,701b・・・データパッキング部
702a,702b・・・フレーム生成部
703a,703b・・・パケット発生部
704a,704b・・・データデパッキング部
Claims (13)
- 外部機器から、クロック再生が可能な符号化データを受信する符号化データ受信部と、
上記受信された符号化データから再生された搬送クロックに基づいてオーディオクロックを生成するオーディオクロック生成部と、
上記生成されたオーディオクロックに同期してオーディオデータを上記外部機器に送信するオーディオデータ送信部を備える
送信装置。 - 上記オーディオクロック生成部は、
上記受信された符号化データから取得された分周比情報に基づいて上記搬送クロックを分周して上記オーディオクロックを生成する
請求項1に記載の送信装置。 - 上記再生された搬送クロックに基づいて生成されたオーディオクロックを用いることの要求が得られるとき、
上記オーディオクロック生成部は、上記符号化データから再生された上記搬送クロックに基づいてオーディオクロックを生成し、
上記オーディオデータ送信部は、上記生成されたオーディオクロックに同期してオーディオデータを上記外部機器に送信する
請求項1に記載の送信装置。 - 上記オーディオデータ送信部は、上記オーディオデータを上記外部機器に第1の伝送路を通じて送信し、
上記符号化データ受信部は、上記符号化データを上記外部機器から第2の伝送路を通じて受信する
請求項1に記載の送信装置。 - 上記第1の伝送路および上記第2の伝送路はそれぞれ光ケーブルを用いた伝送路である
請求項4に記載の送信装置。 - 外部機器から、クロック再生が可能な符号化データを受信する符号化データ受信ステップと、
上記受信された符号化データから再生された搬送クロックに基づいてオーディオクロックを生成するオーディオクロック生成ステップと、
オーディオデータ送信部により、上記生成されたオーディオクロックに同期してオーディオデータを上記外部機器に送信するオーディオデータ送信ステップを有する
送信方法。 - オーディオクロックを発生するオーディオクロック発生部と、
上記発生されたオーディオクロックに基づいて生成された搬送クロックに同期してクロック再生が可能な符号化データを外部機器に送信する符号化データ送信部と、
上記外部機器からオーディオデータを受信するオーディオデータ受信部と、
上記受信されたオーディオデータを上記発生されたオーディオクロックに基づいて処理するオーディオデータ処理部を備える
受信装置。 - 上記符号化データとして、上記搬送クロックから上記オーディオクロックを得るための分周比情報の符号化データが含まれる
請求項7に記載の受信装置。 - 上記符号化データとして、上記搬送クロックに基づいて生成されたオーディオクロックを用いることの要求の符号化データが含まれる
請求項7に記載の受信装置。 - 上記オーディオデータ受信部は、上記オーディオデータを上記外部機器から第1の伝送路を通じて受信し、
上記符号化データ送信部は、上記符号化データを上記外部機器に第2の伝送路を通じて送信する
請求項7に記載の受信装置。 - 上記第1の伝送路および上記第2の伝送路はそれぞれ光ケーブルを用いた伝送路である
請求項10に記載の受信装置。 - オーディオクロックを発生するオーディオクロック発生ステップと、
上記発生されたオーディオクロックに基づいて生成された搬送クロックに同期してクロック再生が可能な符号化データを外部機器に送信する符号化データ送信ステップと、
オーディオデータ受信部により、上記外部機器からオーディオデータを受信するオーディオデータ受信ステップと、
上記受信されたオーディオデータを上記発生されたオーディオクロックに基づいて処理するオーディオデータ処理ステップを有する
受信方法。 - 送信装置および受信装置が伝送路を介して接続されてなる送受信システムであって、
上記送信装置は、
上記受信装置から、クロック再生が可能な符号化データを受信する符号化データ受信部と、
上記受信された符号化データから再生された搬送クロックに基づいてオーディオクロックを生成するオーディオクロック生成部と、
上記生成されたオーディオクロックに同期してオーディオデータを上記受信装置に送信するオーディオデータ送信部を備え、
上記受信装置は、
オーディオクロックを発生するオーディオクロック発生部と、
上記発生されたオーディオクロックに基づいて生成された搬送クロックに同期してクロック再生が可能な符号化データを上記送信装置に送信する符号化データ送信部と、
上記送信装置からオーディオデータを受信するオーディオデータ受信部と、
上記受信されたオーディオデータを上記発生されたオーディオクロックに基づいて処理するオーディオデータ処理部を備える
送受信システム。
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- 2017-03-16 EP EP17774411.7A patent/EP3439224B1/en active Active
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EP3439224A4 (en) | 2019-09-18 |
TWI720153B (zh) | 2021-03-01 |
TW201735598A (zh) | 2017-10-01 |
US20190014285A1 (en) | 2019-01-10 |
US20220116568A1 (en) | 2022-04-14 |
KR20180124836A (ko) | 2018-11-21 |
EP3439224B1 (en) | 2022-05-04 |
US11245869B2 (en) | 2022-02-08 |
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