WO2017138773A1 - Puce à semiconducteur de sécurité et procédé d'utilisation associé - Google Patents

Puce à semiconducteur de sécurité et procédé d'utilisation associé Download PDF

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Publication number
WO2017138773A1
WO2017138773A1 PCT/KR2017/001491 KR2017001491W WO2017138773A1 WO 2017138773 A1 WO2017138773 A1 WO 2017138773A1 KR 2017001491 W KR2017001491 W KR 2017001491W WO 2017138773 A1 WO2017138773 A1 WO 2017138773A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor chip
pull
switch
data
down resistor
Prior art date
Application number
PCT/KR2017/001491
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English (en)
Korean (ko)
Inventor
고형호
최병덕
Original Assignee
한양대학교 산학협력단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 한양대학교 산학협력단 filed Critical 한양대학교 산학협력단
Priority to CN201780010930.7A priority Critical patent/CN108701192B/zh
Priority to US16/076,473 priority patent/US10778679B2/en
Priority claimed from KR1020170018692A external-priority patent/KR102666954B1/ko
Publication of WO2017138773A1 publication Critical patent/WO2017138773A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/55—Detecting local intrusion or implementing counter-measures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities

Definitions

  • It relates to a security-enhanced semiconductor chip and its operation method, and more particularly to the detection of a physical attack on the semiconductor chip.
  • a highly time sensitive XOR gate for probe attempt detectors proposes a technique for detecting a probing capacitance delay that occurs when probing an internal data bus after depackaging of a semiconductor chip.
  • the present invention is to provide a security semiconductor chip for detecting a physical attack, and to perform a countermeasure according to the attack detection and its operation method.
  • the semiconductor chip is packaged together with at least one data bus for transmitting data processed through the semiconductor chip, the at least one data bus is in a state that the light from the outside is blocked by the package, the package A potential generating block for detecting an event that fails to block light from the outside, and a switch for blocking transmission of at least some data of the at least one data bus when the event is detected.
  • the potential generating block includes an energy harvesting element that generates energy using the light when exposed to light from the outside.
  • the potential generating block comprises at least one photodiode that generates a current when exposed to light from the outside, a capacitor that stores charge by at least a portion of the current, and wherein the charge is from the capacitor. And a pull-down resistor to cause the discharge.
  • the switch is turned on by a potential difference across the pull-down resistor during the discharge of the charge through the pull-down resistor to ground at least some data of the at least one data bus.
  • the transmission is interrupted by discharging.
  • the pull-down resistor comprises an active device whose resistance value is programmable by setting.
  • increasing the pull-down resistance setpoint reduces the amount of discharge current required to turn on the switch so that the switch is turned on relatively easily, and when the pull-down resistance setpoint is lowered The amount of discharge current required to turn on the switch increases, making the switch relatively difficult to turn on.
  • the at least one photodiode comprises a plurality of photodiodes that are cascaded at least in part.
  • the at least one photodiode includes a plurality of photodiodes hierarchically connected in a tree structure.
  • the at least one data bus comprises a plurality of data buses each transmitting data in parallel, the plurality of data buses sharing the potential generating block.
  • a protection device embedded in a semiconductor chip packaging includes a potential generating block that detects an event in which the package fails to block light from the outside, and at least some data transmission paths in the semiconductor chip when the event is detected. It includes a switch to cut off.
  • the potential generating block comprises at least one photodiode that generates a current when exposed to light from the outside, a capacitor that stores charge by at least a portion of the current, and wherein the charge is from the capacitor. And a pull-down resistor to cause the discharge.
  • the switch is turned on by a potential difference across the pull-down resistor in the process of discharging the charge through the pull-down resistor to ground the transfer path by grounding a portion of the transfer path. Block it.
  • the pull-down resistor comprises an active device whose resistance value is programmable by setting.
  • increasing the pull-down resistance setpoint reduces the amount of discharge current required to turn on the switch so that the switch is turned on relatively easily, and when the pull-down resistance setpoint is lowered The amount of discharge current required to turn on the switch increases, making the switch relatively difficult to turn on.
  • the at least one photodiode includes a plurality of photodiodes hierarchically connected in a tree structure.
  • a method in which a semiconductor chip detects a damage to a packaging may include a pull-down of a potential generating block embedded in an on-chip module form when light penetrates from outside the packaging of the semiconductor chip due to the damage of the packaging. Generating a potential difference across the resistor, and at least a portion of the data transfer path in the semiconductor chip is grounded by the potential difference to block data transfer.
  • the present invention it is possible to detect a physical attack and to perform a countermeasure according to the attack detection.
  • FIG. 1 is a block diagram illustrating a security semiconductor chip according to an embodiment.
  • FIG. 2 is a schematic view of a portion of a secure semiconductor chip according to an embodiment.
  • FIG. 3 is an exemplary diagram for describing an operation of a security semiconductor chip according to an exemplary embodiment.
  • FIG. 4 is an exemplary diagram for describing an operation of a security semiconductor chip according to an exemplary embodiment.
  • FIG. 5 is a timing diagram illustrating a method of detecting damage to a packaging by a semiconductor chip according to an exemplary embodiment.
  • FIG. 6 is a diagram illustrating an example of an on-chip photodiode of a security device of a semiconductor chip according to an embodiment.
  • FIG. 7 is a flowchart illustrating a method of detecting damage to a packaging by a semiconductor chip according to an exemplary embodiment.
  • first or second may be used to describe various components, but such terms should be interpreted only for the purpose of distinguishing one component from another component.
  • first component may be referred to as a second component
  • second component may also be referred to as a first component.
  • semiconductor chips include energy harvesting elements in a package.
  • the energy harvesting device may include an on-chip photo diode.
  • the depackaging attack causes the voltage generation of the photodiode to detect the penetration of light into the packaging.
  • energy harvesters accumulate light energy from ambient light to trigger a protective trigger signal even when the package is removed or damaged, even when the chip is not powered.
  • the secure semiconductor chip 100 may include a potential generating block 110, a switch 120, and a data bus 130.
  • the security semiconductor chip 100 may detect an abnormal state such as a depackaging attack by collecting optical energy as described above.
  • the potential generating block 110 may be configured to generate a potential difference when more than a predetermined level of light energy is collected using a structure capable of collecting light energy.
  • the potential generating block 110 collects the light energy penetrated into the packaging by using an energy harvesting element or a photodiode, and uses at least a portion of the collected light energy to supply a capacitor and a pull-down resistor. The potential difference can be generated by this.
  • the potential generating block 110 includes at least one photodiode that generates a current when exposed to light from outside, a capacitor that stores charge by at least a portion of the current, and a full-charge that causes the charge to be discharged from the capacitor. It may include a down resistor.
  • the switch 120 may block the data output of the data bus 130 of the semiconductor chip by using the potential difference generated by the capacitor and the pull-down resistor. For example, the switch 120 is turned off when no light energy is collected to allow the data output of the data bus 130 to proceed normally, and the light energy is collected and depackaged by the potential generating block 110. When an abnormal state such as the like is detected, the data output of the data bus 130 may be blocked so as not to proceed normally.
  • one potential generation block 110 may be configured to be shared by the plurality of data buses 130.
  • a structure in which the potential generating block 110 is connected to the plurality of switches 120 corresponding to each of the plurality of data buses 130 may be selected.
  • the secure semiconductor chip may include a potential generation block 210, a switch 220, and a data bus 230.
  • the potential generating block 210 may include a photodiode 211, a capacitor 212, and a pull-down resistor 213.
  • the photodiode 211 when it is exposed to light from the outside, charge is stored in the capacitor 212 using the generated current.
  • the discharge current by the pull-down resistor 213 is generated by the voltage difference between the upper node of the capacitor 212 and the ground.
  • the protection circuit for the semiconductor chip may be operated through the switch 220 in consideration of an abnormal state such as depacking in the semiconductor chip.
  • an abnormal state such as depacking in the semiconductor chip.
  • the voltage at the node of the upper node of the capacitor 212 gradually increases, and the voltage of the upper node of the capacitor 212 is increased.
  • a protective measure may be performed on the semiconductor chip.
  • the output of the second inverter inv2 is forced to be low so that the outputs of the data bus 230 are all low. can do.
  • the PAD output of the internal data may be blocked to prevent the data input 240 of the data bus 230 from being transmitted to the data output 250 so that the data output may not be leaked by an external attack. .
  • the blocking of the data transmission path as described above is one of various embodiments of protection measures performed when a package removal or a damage event occurs, and a package damage or removal situation of a semiconductor chip to a semiconductor chip through optical energy harvesting.
  • protective measures that differ in electrical state from circuits before the city.
  • a protective measure for the semiconductor chip data erasing, data scrambling, destruction or deactivation of the semiconductor chip may be performed. Protection measures are therefore not to be construed as limited to the examples set forth explicitly herein.
  • the protection The circuit may not work. If the charge generated by the energy harvesting is small enough to not make a sufficient potential difference across the capacitor 212, the protection circuit may not operate because it is not regarded as an abnormal state such as depackaging in the semiconductor chip.
  • This operating threshold is related to the sensitivity of how sensitive the circuit is to take protective action. Sensitivity may be set appropriately to prevent the protection circuit from operating unnecessarily by dark current that may temporarily occur during normal operation or by X-rays radiating from outside the semiconductor packaging and penetrating the package. Can be.
  • the pull-down resistor 213 is configured to adjust the timing at which the protection circuit starts to operate in accordance with the intensity of light being sensed. For example, when the resistance value of the pull-down resistor 213 increases, the discharge current decreases, so that the data output blocking through the switch 220 may proceed even if the current generated by the photodiode 211 is relatively small. On the contrary, when the resistance value of the pull-down resistor 213 decreases, the discharge current increases, so that the data output blocking through the switch 220 may proceed when the current generated by the photodiode 211 is relatively large.
  • the operation timing of the protection circuit may be adjusted according to the magnitude of the current.
  • the size of the resistance value of the pull-down resistor 213 may be designed to a suitable value based on the characteristics of the semiconductor chip, the type of packaging, the environment in which the semiconductor chip is used, and the like.
  • one potential generation block 210 may be configured to be shared by the plurality of data buses 230.
  • the structure in which the potential generating block 210 is connected to the plurality of switches 220 corresponding to each of the plurality of data buses 230 may be selected.
  • FIG. 3 is an exemplary diagram for describing an operation of a security semiconductor chip according to an exemplary embodiment.
  • the secure semiconductor chip of FIG. 3 may be part of the secure semiconductor chip shown in FIG. 2, for example.
  • the secure semiconductor chip may include a photodiode 311, a capacitor 312, a pull-down resistor 313, a switch 320, and a data bus 330.
  • FIG. 3 exemplarily illustrates an operation of a security semiconductor chip before a security attack such as depacking occurs.
  • the voltage at the upper node of the capacitor 312 is maintained at a value close to ground.
  • the voltage at the top node of the capacitor 312 can be maintained at a value close to ground through a structure that is discharged through the pull-down resistor 313 even when a small current is generated temporarily.
  • the node and the switch top of the capacitor 312 (The voltage at the gate terminal of 320 is maintained at a value close to ground.
  • the pulse train provided at the data input 340 of the data bus 330 may be normally transmitted to the pad data output 350 of the internal data. have.
  • FIG. 4 is an exemplary diagram for describing an operation of a security semiconductor chip according to an exemplary embodiment.
  • the secure semiconductor chip of FIG. 4 may be part of the secure semiconductor chip shown in FIG. 2, for example.
  • the secure semiconductor chip may include a photodiode 311, a capacitor 312, a pull-down resistor 313, a switch 320, and a data bus 330, as described in FIG. 3. have.
  • FIG. 4 exemplarily illustrates an operation of a secure semiconductor chip after a security attack such as depacking occurs.
  • a security attack such as depacking occurs.
  • the photo energy of the photodiode 311 allows the photosensitive energy to be reduced. Will rise.
  • the current generated by the photodiode 211 is designed to be larger than the current discharged through the pull-down resistor 213, so that the node and the switch 320 at the upper end of the capacitor 312.
  • the voltage at the gate terminal of increases gradually.
  • the data bus 230 is assumed through the switch 320.
  • FIG. 5 is a timing diagram illustrating a method of detecting damage to a packaging by a semiconductor chip according to an exemplary embodiment.
  • V PD refers to a voltage formed at the upper node of the capacitor using the current generated by the photodiode
  • CLK refers to a clock signal
  • the de-photodiode by the packaging attack begins to rise the V PD at a first time 510 to start generating the current and voltage is raised for a period of time
  • the rise of V PD is stopped at the second time point 520 where the current generated by the photodiode is equal to the current discharged through the pull-down resistor.
  • the threshold voltage may be selected as a value between the V PD value at the first time point 510 and the V PD value at the second time point 520.
  • the switch to cut off the output of the data bus based on the threshold voltage can be turned on.
  • the output of the data bus can be forced all low as described above.
  • the PAD outputs PAD0, PAD1, PAD2, and PAD3 of the four data buses output only low signals without outputting normal data after a certain time due to the operation of the cutoff switch. In this way, the internal data can be prevented from being leaked.
  • FIG. 6 is a diagram illustrating an example of an on-chip photodiode of a security device of a semiconductor chip according to an embodiment.
  • the on-chip photodiode of FIG. 6 may be used, for example, to implement the potential generating block 110 of the secure semiconductor chip 100 of FIG. 1.
  • the on-chip photo diode may include a tree structure in which a plurality of photo diodes are cascaded to easily generate a high voltage required for driving a circuit.
  • a tree structure in which a plurality of photo diodes are cascaded to easily generate a high voltage required for driving a circuit.
  • the light energy penetrating inside the packaging is collected through such a structure, at least a part of the collected light energy may be transferred to a capacitor to generate a potential difference.
  • the photodiode can be replaced or used together with any device that can perform the same or similar function.
  • a structure in which it is applied or modified may be used to suit the embodiment.
  • the photosensitive performance and detailed design of the on-chip photodiode can be optimized in consideration of the characteristics of the pull-down resistor and the disconnect switch.
  • FIG. 7 is a flowchart illustrating a method of detecting damage to a packaging by a semiconductor chip according to an exemplary embodiment.
  • the method of FIG. 7 may be implemented as a method of operating the secure semiconductor chip 100 of FIG. 1.
  • step 710 light may penetrate from outside the packaging of the semiconductor chip. Since the penetration of light refers to a case in which the packaging of the semiconductor chip is damaged by a depackaging attack or other abnormal situation, it is desirable to take measures to fundamentally block hacking attempts that may occur after the packaging of the semiconductor chip.
  • a potential difference across the pull-down resistor may be generated by the potential generating block. That is, since it is considered that a security attack such as depacking occurs due to light penetration in step 710, a potential difference for the protection circuit operation may be generated in the potential generating block.
  • the current generated by the photodiode is designed to be greater than the current discharged through the pull-down resistor, thereby gradually increasing the voltage at the capacitor top node and the gate terminal of the disconnect switch.
  • the data transfer path in the semiconductor chip may be blocked using the potential difference.
  • the pad outputs of each data bus can be forced low so that normal data outputs are not delivered.
  • data erase, data scrambling, destruction or deactivation of the semiconductor chip may be performed additionally or alternatively as necessary.
  • the protection measures for the semiconductor chip are limited to the examples explicitly described herein. It should not be.
  • an energy harvesting device such as a photo-diode operates a trigger circuit such as to initialize or erase security data by harvesting ambient light energy.
  • the light response of the illuminance and the PN junction of the CMOS is 0.5W / m 2 , 0.5A ⁇ cm ⁇ 2 / W ⁇ cm ⁇ 2, respectively.
  • a 100 ⁇ m 2 photodiode can generate 2.5 nA photocurrent.
  • the time required for the protection circuit operation is about 72ms.
  • the device described above may be implemented as a hardware component of a memory, a memory as a control software component, and / or a combination of hardware components and software components.
  • the devices and components described in the embodiments may be, for example, processors, controllers, arithmetic logic units (ALUs), digital signal processors, microcomputers, field programmable arrays (FPAs), It may be implemented using one or more general purpose or special purpose computers, such as a programmable logic unit (PLU), microprocessor, or any other device capable of executing and responding to instructions.
  • ALUs arithmetic logic units
  • FPAs field programmable arrays
  • PLU programmable logic unit
  • microprocessor or any other device capable of executing and responding to instructions.
  • the software may include a computer program, code, instructions, or a combination of one or more of the above, and configure the processing device to operate as desired, or process it independently or collectively. You can command the device.
  • Software and / or data may be any type of machine, component, physical device, virtual equipment, computer storage medium or device in order to be interpreted by or to provide instructions or data to the processing device. Or may be permanently or temporarily embodied in a signal wave to be transmitted.
  • the software may be distributed over networked computer systems so that they may be stored or executed in a distributed manner.
  • Software and data may be stored on one or more computer readable recording media.
  • Memory operation control method is implemented in the form of program instructions that can be executed by various computer means may be recorded on a computer readable medium.
  • the computer readable medium may include program instructions, data files, data structures, etc. alone or in combination.
  • the program instructions recorded on the media may be those specially designed and constructed for the purposes of the embodiments, or they may be of the kind well-known and available to those having skill in the computer software arts.
  • Examples of computer-readable recording media include magnetic media such as hard disks, floppy disks, and magnetic tape, optical media such as CD-ROMs, DVDs, and magnetic disks, such as floppy disks.
  • Examples of program instructions include not only machine code generated by a compiler, but also high-level language code that can be executed by a computer using an interpreter or the like.
  • the hardware device described above may be configured to operate as one or more software modules to perform the operations of the embodiments, and vice versa.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

L'invention concerne une puce à semi-conducteur de sécurité. Lorsqu'une attaque physique, telle qu'une attaque de déballage se produit, la puce à semi-conducteur peut détecter l'attaque physique. Selon un mode de réalisation, une puce à semi-conducteur comprend un élément de collecte d'énergie à l'intérieur d'un emballage. Par exemple, l'élément de collecte d'énergie peut comprendre une photodiode sur puce. Une attaque de déballage provoque la génération d'une tension d'une photodiode, ce qui permet de détecter un changement d'état physique de l'emballage.
PCT/KR2017/001491 2016-02-12 2017-02-10 Puce à semiconducteur de sécurité et procédé d'utilisation associé WO2017138773A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201780010930.7A CN108701192B (zh) 2016-02-12 2017-02-10 安全半导体芯片及其工作方法
US16/076,473 US10778679B2 (en) 2016-02-12 2017-02-10 Secure semiconductor chip and operating method thereof

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR10-2016-0016587 2016-02-12
KR20160016587 2016-02-12
KR1020170018692A KR102666954B1 (ko) 2016-02-12 2017-02-10 보안 반도체 칩 및 그 동작 방법
KR10-2017-0018692 2017-02-10

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019211726A1 (fr) 2018-04-29 2019-11-07 Trilicon Llc Système à base de matériel pour la protection de cybersécurité de systèmes à microprocesseur
CN112214804A (zh) * 2020-10-16 2021-01-12 天津津航计算技术研究所 一种防止真空封装开帽破解的微系统芯片

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4910707A (en) * 1984-09-27 1990-03-20 Siemens Aktiengesellschaft EEPROM with protective circuit
KR100252563B1 (ko) * 1990-10-04 2000-04-15 매클린토크 샤운 엘 집적회로칩
KR20040049117A (ko) * 2002-12-05 2004-06-11 삼성전자주식회사 보안 기능을 갖는 반도체 집적 회로
KR20050066558A (ko) * 2003-12-26 2005-06-30 매그나칩 반도체 유한회사 광검출 회로를 이용하여 보안성을 강화한 반도체 소자
KR20080112803A (ko) * 2007-06-22 2008-12-26 삼성전자주식회사 비정상 동작을 감시하기 위한 반도체 장치 및 방법

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4910707A (en) * 1984-09-27 1990-03-20 Siemens Aktiengesellschaft EEPROM with protective circuit
KR100252563B1 (ko) * 1990-10-04 2000-04-15 매클린토크 샤운 엘 집적회로칩
KR20040049117A (ko) * 2002-12-05 2004-06-11 삼성전자주식회사 보안 기능을 갖는 반도체 집적 회로
KR20050066558A (ko) * 2003-12-26 2005-06-30 매그나칩 반도체 유한회사 광검출 회로를 이용하여 보안성을 강화한 반도체 소자
KR20080112803A (ko) * 2007-06-22 2008-12-26 삼성전자주식회사 비정상 동작을 감시하기 위한 반도체 장치 및 방법

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019211726A1 (fr) 2018-04-29 2019-11-07 Trilicon Llc Système à base de matériel pour la protection de cybersécurité de systèmes à microprocesseur
US11182509B2 (en) 2018-04-29 2021-11-23 Trilicon Llc Hardware-based system for cybersecurity protection of microprocessor systems
CN112214804A (zh) * 2020-10-16 2021-01-12 天津津航计算技术研究所 一种防止真空封装开帽破解的微系统芯片

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