WO2017119706A1 - Method of manufacturing circuit board - Google Patents

Method of manufacturing circuit board Download PDF

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Publication number
WO2017119706A1
WO2017119706A1 PCT/KR2017/000081 KR2017000081W WO2017119706A1 WO 2017119706 A1 WO2017119706 A1 WO 2017119706A1 KR 2017000081 W KR2017000081 W KR 2017000081W WO 2017119706 A1 WO2017119706 A1 WO 2017119706A1
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WO
WIPO (PCT)
Prior art keywords
curable resin
auxiliary electrode
pattern
electrode pattern
layer
Prior art date
Application number
PCT/KR2017/000081
Other languages
French (fr)
Korean (ko)
Inventor
손용구
이승헌
서한민
임창윤
명지은
이기석
Original Assignee
주식회사 엘지화학
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020170000724A external-priority patent/KR20170081571A/en
Application filed by 주식회사 엘지화학 filed Critical 주식회사 엘지화학
Priority to CN201780002485.XA priority Critical patent/CN107852819A/en
Priority to EP17736079.9A priority patent/EP3300468A4/en
Priority to US15/741,993 priority patent/US10606175B2/en
Priority to JP2017567369A priority patent/JP6677379B2/en
Publication of WO2017119706A1 publication Critical patent/WO2017119706A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings

Definitions

  • the present specification relates to a method of manufacturing a circuit board. Specifically, the present disclosure relates to a circuit board and a method of manufacturing an electronic device including the same.
  • a transparent conductive film formed of a material such as ITO, ZnO, or the like is used as an electrode, but these have a problem of low conductivity.
  • the present specification is to provide a method for manufacturing a circuit board. Specifically, the present specification is to provide a circuit board and a method of manufacturing an electronic device including the same.
  • a step of forming an auxiliary electrode pattern having a thickness of 1 ⁇ m or more on the transparent substrate Forming a UV curable resin layer by applying a UV curable resin composition on the transparent substrate provided with the auxiliary electrode pattern; Stacking a release film on the UV curable resin layer; Pressing the surface of the release film; An exposure step of irradiating light from an opposite side of a surface of the transparent substrate on which an auxiliary electrode pattern is formed; And developing an uncured portion of the UV curable resin layer after exposure to form a UV curable resin pattern, and before or after the exposing step, further comprising removing the release film.
  • a method of manufacturing a circuit board is provided.
  • the method according to an exemplary embodiment of the present specification has an advantage of forming a transparent electrode without a crack on a thick auxiliary electrode.
  • the method according to an exemplary embodiment of the present specification has an advantage of forming a transparent and low resistance electrode.
  • FIG 2 shows an electrode pattern manufactured by the method according to the present specification.
  • FIG 3 shows a procedure of a method according to a first exemplary embodiment of the present specification.
  • FIG. 4 shows a procedure of a method according to a second exemplary embodiment of the present specification.
  • FIG. 5 is a scanning electron microscope (SEM) image of the auxiliary electrode pattern of Example 1.
  • SEM scanning electron microscope
  • FIG. 6 is an SEM image showing a UV curable resin pattern and an exposed auxiliary electrode pattern of Example 2.
  • Example 7 is an SEM image showing the surface on which ITO of Example 2 is deposited.
  • FIG. 9 is an SEM image showing the UV curable resin patterns and the exposed auxiliary electrode patterns of Examples 1 to 3.
  • FIG. 9 is an SEM image showing the UV curable resin patterns and the exposed auxiliary electrode patterns of Examples 1 to 3.
  • a step of forming an auxiliary electrode pattern having a thickness of 1 ⁇ m or more on the transparent substrate Forming a UV curable resin layer by applying a UV curable resin composition on the transparent substrate provided with the auxiliary electrode pattern; An exposure step of irradiating light from an opposite side of a surface of the transparent substrate on which an auxiliary electrode pattern is formed; And developing an uncured portion of the UV curable resin layer after exposure to form a UV curable resin pattern.
  • the method of manufacturing the circuit board includes forming an auxiliary electrode pattern having a thickness of 1 ⁇ m or more on a transparent substrate.
  • the transparent substrate may be a rigid substrate or a flexible substrate.
  • the transparent substrate is preferably a flexible substrate
  • the flexible substrate may be a plastic substrate or a plastic film.
  • the plastic substrate or the plastic film is not particularly limited, but for example, polyacrylate, polypropylene (PP, polypropylene), polyethylene terephthalate (PET), polyethylene ether phthalate, Polyethylene phthalate, polybutylene phthalate, polyethylene naphthalate (PEN), polycarbonate (PC), polystyrene (PS, polystyrene), polyether imide, poly It may include any one or more of polyether sulfone (polyether sulfone), polydimethyl siloxane (PDMS; polydimethyl siloxane), polyether ether ketone (PEEK; Polyetheretherketone) and polyimide (PI).
  • PP polypropylene
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • PC polycarbon
  • the substrate may be a substrate having a high transparency, the light transmittance of the substrate may be 50% or more.
  • a method of forming an auxiliary electrode pattern on the transparent substrate is not particularly limited, and for example, roll printing, inkjet printing, screen printing, deposition, photolithography, etching, or the like may be used.
  • the auxiliary electrode pattern may be regular or irregular.
  • it may be a stripe, a rhombus, a square lattice, a circle, a wave pattern, a grid, a two-dimensional grid, and the like, but is not limited to a specific form.
  • a pattern that minimizes the regularity of the pattern may be used.
  • a wavy pattern and a sine wave may be used.
  • a pattern in which the spacing of the lattice structure and the thickness of the line are irregularly configured.
  • the auxiliary electrode pattern may be a combination of two or more patterns.
  • the auxiliary electrode pattern may include a boundary line of the figures forming the Voronoi diagram or a boundary line forming the Delaunay triangle.
  • the line constituting the auxiliary electrode pattern may be a straight line, but various modifications such as curved lines, wavy lines, and zigzag lines are possible.
  • the auxiliary electrode pattern may have a thickness of 1 ⁇ m or more, specifically 1 ⁇ m or more and 10 ⁇ m or less, and more specifically 1 ⁇ m or more and 3 ⁇ m or less.
  • the line width of the auxiliary electrode pattern may be 3 ⁇ m or more and 100 ⁇ m or less, and specifically, 5 ⁇ m or more and 50 ⁇ m or less.
  • the method of manufacturing the circuit board includes forming a UV curable resin layer by applying a UV curable resin composition on a transparent substrate having the auxiliary electrode pattern.
  • the UV curable resin refers to a photosensitive material in which a chemical change of a resist layer material occurs in an exposed area during exposure, and a material not exposed to light falls during development.
  • the UV curable resin composition is not particularly limited as long as it includes a resin cured by ultraviolet rays, but the UV curable resin composition may be a negative photoresist composition.
  • the negative photoresist composition may mean a composition including a polymer that is resistant to a developer by exposure to light, and the negative photoresist composition may include a polymer that is exposed to light and thus develops resistance to a developer. have.
  • the UV curable resin composition may further include at least one of a photoinitiator, a crosslinking agent, an additive, and a solvent.
  • the polymer, photoinitiator, crosslinking agent, additives and solvents are not particularly limited, and materials generally used in the art may be employed.
  • the method for applying the UV curable resin composition is not particularly limited, and for example, bar coating, slot die coating, spin coating, comma coating, and microgravure It may be a coating or a dip coating.
  • the forming of the UV curable resin layer may include applying a UV curable resin composition on a transparent substrate having the auxiliary electrode pattern and drying the applied UV curable resin composition.
  • the drying method is not particularly limited, but may be a hot air drying method or an infrared drying method.
  • the method of manufacturing a circuit board may include: stacking a release film on the UV curable resin layer after forming the UV curable resin layer; And pressing the surface of the release film.
  • the release film is not particularly limited as long as the release film is laminated on the UV curable resin layer and can be removed without damaging the UV curable resin layer.
  • the release film may include at least one of a silicone release film and a fluorine release film.
  • the method of compressing the surface of the release film is not particularly limited, but the surface of the release film may be compressed using a pressing plate, a thermocompression plate, a compression roll, or a thermocompression roll.
  • the pressing time and the pressing force may be selected by changing the material and the thickness of the release film and the material of the UV curable resin layer.
  • the manufacturing method of the circuit board may further include removing the release film before or after the exposure step.
  • the release film may be removed before the exposure step or after the exposure step.
  • the method of removing the release film is not particularly limited, but the release film may be removed by an adhesive roll.
  • the manufacturing method of the circuit board includes an exposure step of irradiating light from the side of the transparent substrate opposite the surface on which the auxiliary electrode pattern is formed.
  • the exposure conditions of the exposure step may be adjusted according to the properties of the applied photoresist, it is not particularly limited. If the UV-curable resin layer is not sufficiently exposed, the UV-curable resin layer may not be sufficiently cured, and the surface of the UV-curable resin layer may be damaged during the development process, and a gap may occur between the auxiliary electrode pattern and the UV-curable resin layer. have. On the other hand, when the UV-curable resin layer is excessively exposed, a problem may occur in which all or part of the UV-curable resin layer formed on the auxiliary electrode is exposed so that all or part of the upper part of the auxiliary electrode is not exposed after development.
  • the manufacturing method of the circuit board may include forming a UV curable resin pattern by developing a portion of the UV curable resin layer not exposed to light after exposure.
  • the portion of the UV-curable resin layer not irradiated with light is a portion located on the auxiliary electrode pattern among the UV-curable resin layers, and a portion of the UV-curable resin layer positioned on the auxiliary electrode pattern is formed by the auxiliary electrode pattern. The light is blocked and does not receive the emitted light.
  • the UV-curable resin on the auxiliary electrode pattern may be developed by a developer to expose the auxiliary electrode pattern.
  • the portion of the UV-curable resin layer to which light is irradiated is a portion in which the auxiliary electrode pattern is not formed and receives the light irradiated from the side opposite to the surface on which the auxiliary electrode pattern is formed, and specifically, the exposure After the light irradiated portion of the UV curable resin layer is a part of the UV curable resin layer formed between the auxiliary electrode pattern.
  • the UV curable resin pattern formed by developing a portion of the UV curable resin layer to which light is not irradiated after the exposure may be formed between the auxiliary electrode patterns.
  • the difference between the thickness of the auxiliary electrode pattern and the thickness of the UV curable resin pattern may be 200 nm or less.
  • the difference between the thickness of the auxiliary electrode pattern and the thickness of the UV curable resin pattern may be 0 nm or more and 200 nm or less, and 50 nm or more and 150 nm or less.
  • the method of developing a portion of the UV-curable resin layer that is not irradiated with light is not particularly limited.
  • the developer is applied or sprayed onto the exposed UV-curable resin layer, or the exposed UV-curable resin layer is immersed in the developer. can do.
  • the method of manufacturing the circuit board may further include forming a transparent electrode layer on the transparent substrate provided with the auxiliary electrode pattern and the UV curable resin pattern after the forming of the UV curable resin pattern.
  • the method of forming the transparent electrode layer is not particularly limited, but a transparent electrode material may be deposited on the transparent substrate provided with the auxiliary electrode pattern and the UV curable resin pattern.
  • the transparent electrode layer may be a transparent metal oxide layer or a thin metal layer having a light transmissive thickness.
  • the transparent electrode layer may be formed of a metal oxide layer such as indium tin oxide (ITO), ZnO, or indium zinc oxide (IZO), or may be formed of a thin metal such as Al or Cu.
  • a metal oxide layer such as indium tin oxide (ITO), ZnO, or indium zinc oxide (IZO)
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • the method of manufacturing the circuit board may further include sequentially forming an organic material layer and an additional electrode layer on the electrode layer.
  • an additional layer suitable for the type of the electronic device may be further formed.
  • an organic material layer and an additional electrode layer suitable for the type of electronic device may be further formed on the electrode layer.
  • the electronic device includes a touch panel, a solar cell, an organic light emitting device, an illumination, a liquid crystal display, and the like.
  • transparent electrodes are increasingly used for transparency, and in order to provide transparency to the electrodes, metal oxides or thin metal layers must be deposited.
  • metal oxides the resistance is high, and even if the conductive metal is thin enough to ensure transparency, the resistance is high.
  • an auxiliary electrode pattern may be provided to lower the resistance of the transparent electrode.
  • auxiliary electrode pattern a method of increasing the thickness of the auxiliary electrode pattern may be considered as a method of lowering the resistance of the auxiliary electrode pattern, in this case, as shown in FIG. 1, cracks are formed in the electrode layer deposited due to the difference between the auxiliary electrode pattern and the substrate. Electrical shorts or short circuits can occur.
  • a planarization layer which can reduce the step difference between the auxiliary electrode pattern and the substrate may be formed.
  • PMEA Propylene Glycol Mnomethyl Ether Acetate
  • a resist ink pattern having a line width of 15 ⁇ m on a polyethylene terephthalate (PET) film in which copper is deposited to a thickness of 2 ⁇ m through a reverse offset printing process
  • a copper auxiliary electrode having a thickness of 2 ⁇ m and a line width of 8 ⁇ m through a copper etching process Formed a pattern.
  • UV curable resin composition prepared in Preparation Example After applying the UV curable resin composition prepared in Preparation Example on the substrate with a copper auxiliary electrode having a thickness of 2 ⁇ m, line width 8 ⁇ m by using a spin coating method and hot-air dried at 80 °C 3 minutes UV curable resin composition Formed a layer.
  • the release film was removed through an adhesive roll.
  • the substrate from which the release film was removed was further hot-air dried at 120 ° C. for 3 minutes.
  • ITO having a thickness of 100 nm was deposited on the exposed copper auxiliary electrode pattern.
  • Example 1 100 nm-thick ITO was deposited directly on the PET film provided with the copper auxiliary electrode pattern of 2 micrometers in thickness, and 8 micrometers in width, without forming a UV curable resin composition layer.
  • a resist ink pattern having a line width of 15 ⁇ m on a polyethylene terephthalate (PET) film in which copper is deposited to a thickness of 2 ⁇ m through a reverse offset printing process
  • a copper auxiliary electrode having a thickness of 2 ⁇ m and a line width of 8 ⁇ m through a copper etching process Formed a pattern.
  • UV curable resin composition prepared in Preparation Example After coating the UV curable resin composition prepared in Preparation Example on the substrate with the copper auxiliary electrode having a thickness of 2 ⁇ m and a line width of 8 ⁇ m by using a spin coating method, it was dried by hot air at 120 ° C. for 3 minutes to form a UV curable resin composition layer. Formed.
  • ITO having a thickness of 100 nm was deposited on the exposed copper auxiliary electrode pattern.
  • a scanning electron microscope (SEM) image of the auxiliary electrode pattern provided on the PET film is shown in FIG. 5.
  • FIG. 6 An SEM image showing the UV curable resin pattern and the exposed auxiliary electrode pattern of Example 1 is shown in FIG. 6.
  • FIGS. 7 to 10 SEM images showing the surfaces on which ITOs of Examples 1 to 3 and Comparative Examples 1 to 4 were deposited are shown in FIGS. 7 to 10, respectively.
  • the sheet resistance of the auxiliary electrode substrate was measured using a Mitsubishi Chemical Corporation MCP-T600 sheet resistance meter.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

The present specification relates to a method of manufacturing a circuit board. In particular, the present specification relates to a method of manufacturing a circuit board and an electronic device including same.

Description

회로기판의 제조방법Manufacturing Method of Circuit Board
본 명세서는 2016년 1월 4일에 한국특허청에 제출된 한국 특허 출원 제 10-2016-0000482 호 및 2017년 1월 3일에 한국특허청에 제출된 한국 특허 출원 제 10-2017-0000724 호의 출원일의 이익을 주장하며, 그 내용 전부는 본 명세서에 포함된다.This specification describes the Korean Patent Application No. 10-2016-0000482 filed with the Korea Intellectual Property Office on January 4, 2016 and the Korean Patent Application No. 10-2017-0000724 filed with the Korea Patent Office on January 3, 2017. Claiming benefit, the entire contents of which are incorporated herein by reference.
본 명세서는 회로기판의 제조방법에 관한 것이다. 구체적으로, 본 명세서는 회로기판 및 이를 포함하는 전자소자의 제조방법에 관한 것이다.The present specification relates to a method of manufacturing a circuit board. Specifically, the present disclosure relates to a circuit board and a method of manufacturing an electronic device including the same.
최근, 디스플레이나 유기발광소자 등의 전자소자에서 유효화면부에 투명전극이 형성될 것이 요구되고 있다. 이를 위하여 전극으로서 ITO, ZnO 등과 같은 재료로 형성된 투명 도전막을 사용하고 있으나, 이들은 전도도가 낮은 문제가 있다. 이를 개선하기 위하여, 전도도 향상을 목적으로 투명 도전막 전극 상에 보조 전극 패턴으로 이루어진 보조 전극을 형성하는 시도가 이루어지고 있다.In recent years, transparent electrodes are required to be formed in effective screen portions in electronic devices such as displays and organic light emitting devices. To this end, a transparent conductive film formed of a material such as ITO, ZnO, or the like is used as an electrode, but these have a problem of low conductivity. In order to improve this, an attempt has been made to form an auxiliary electrode made of an auxiliary electrode pattern on a transparent conductive film electrode for the purpose of improving conductivity.
본 명세서는 회로기판의 제조방법을 제공하고자 한다. 구체적으로, 본 명세서는 회로기판 및 이를 포함하는 전자소자의 제조방법을 제공하고자 한다.The present specification is to provide a method for manufacturing a circuit board. Specifically, the present specification is to provide a circuit board and a method of manufacturing an electronic device including the same.
본 명세서는 투명 기재 상에 두께가 1㎛ 이상인 보조 전극 패턴을 형성하는 단계; 상기 보조 전극 패턴이 구비된 투명 기재 상에 UV 경화형 수지 조성물을 도포하여 UV 경화형 수지층을 형성하는 단계; 상기 UV 경화형 수지층 상에 이형필름을 적층하는 단계; 상기 이형필름의 표면을 압착하는 단계; 상기 투명 기재 중 보조 전극 패턴이 형성된 면의 반대면 측에서 빛을 조사하는 노광단계; 및 노광 후 상기 UV 경화형 수지층 중 빛이 조사되지 않은 부분을 현상하여 UV 경화형 수지 패턴을 형성하는 단계를 포함하며, 상기 노광단계 전 또는 후에, 상기 이형필름을 제거하는 단계를 더 포함하는 것인 회로기판의 제조방법을 제공한다.Herein is a step of forming an auxiliary electrode pattern having a thickness of 1㎛ or more on the transparent substrate; Forming a UV curable resin layer by applying a UV curable resin composition on the transparent substrate provided with the auxiliary electrode pattern; Stacking a release film on the UV curable resin layer; Pressing the surface of the release film; An exposure step of irradiating light from an opposite side of a surface of the transparent substrate on which an auxiliary electrode pattern is formed; And developing an uncured portion of the UV curable resin layer after exposure to form a UV curable resin pattern, and before or after the exposing step, further comprising removing the release film. Provided is a method of manufacturing a circuit board.
본 명세서에 일 실시상태에 따른 방법은 두께가 두꺼운 보조전극 상에 크랙없이 투명 전극을 형성할 수 있는 장점이 있다. The method according to an exemplary embodiment of the present specification has an advantage of forming a transparent electrode without a crack on a thick auxiliary electrode.
본 명세서에 일 실시상태에 따른 방법은 투명하면서 저항이 낮은 전극을 형성할 수 있는 장점이 있다. The method according to an exemplary embodiment of the present specification has an advantage of forming a transparent and low resistance electrode.
도 1은 종래 기술의 문제점을 나타낸 것이다. 1 illustrates a problem of the prior art.
도 2는 본 명세서에 따른 방법으로 제조된 전극 패턴을 나타낸 것이다. 2 shows an electrode pattern manufactured by the method according to the present specification.
도 3은 본 명세서의 제1 실시상태에 따른 방법의 순서를 나타낸 것이다. 3 shows a procedure of a method according to a first exemplary embodiment of the present specification.
도 4는 본 명세서의 제2 실시상태에 따른 방법의 순서를 나타낸 것이다.4 shows a procedure of a method according to a second exemplary embodiment of the present specification.
도 5는 실시예 1의 보조 전극 패턴의 주사전자현미경(SEM) 이미지이다. FIG. 5 is a scanning electron microscope (SEM) image of the auxiliary electrode pattern of Example 1. FIG.
도 6은 실시예 2의 UV 경화형 수지 패턴 및 노출된 보조 전극 패턴을 나타내는 SEM이미지이다. FIG. 6 is an SEM image showing a UV curable resin pattern and an exposed auxiliary electrode pattern of Example 2. FIG.
도 7은 실시예 2의 ITO가 증착된 표면을 나타낸 SEM이미지이다. 7 is an SEM image showing the surface on which ITO of Example 2 is deposited.
도 8은 비교예 1의 ITO가 증착된 표면을 나타낸 SEM이미지이다. 8 is a SEM image showing the surface on which ITO of Comparative Example 1 is deposited.
도 9는 실시예 1 내지 3의 UV 경화형 수지 패턴 및 노출된 보조 전극 패턴을 나타내는 SEM이미지이다.FIG. 9 is an SEM image showing the UV curable resin patterns and the exposed auxiliary electrode patterns of Examples 1 to 3. FIG.
도 10은 비교예 2 내지 4의 UV 경화형 수지 패턴 및 노출된 보조 전극 패턴을 나타내는 SEM이미지이다.10 is a SEM image showing the UV-curable resin pattern and the exposed auxiliary electrode pattern of Comparative Examples 2 to 4.
이하에서 본 명세서에 대하여 상세히 설명한다.Hereinafter, the present specification will be described in detail.
본 명세서는 투명 기재 상에 두께가 1㎛ 이상인 보조 전극 패턴을 형성하는 단계; 상기 보조 전극 패턴이 구비된 투명 기재 상에 UV 경화형 수지 조성물을 도포하여 UV 경화형 수지층을 형성하는 단계; 상기 투명 기재 중 보조 전극 패턴이 형성된 면의 반대면 측에서 빛을 조사하는 노광단계; 및 노광 후 상기 UV 경화형 수지층 중 빛이 조사되지 않은 부분을 현상하여 UV 경화형 수지 패턴을 형성하는 단계를 포함하는 회로기판의 제조방법을 제공한다.Herein is a step of forming an auxiliary electrode pattern having a thickness of 1㎛ or more on the transparent substrate; Forming a UV curable resin layer by applying a UV curable resin composition on the transparent substrate provided with the auxiliary electrode pattern; An exposure step of irradiating light from an opposite side of a surface of the transparent substrate on which an auxiliary electrode pattern is formed; And developing an uncured portion of the UV curable resin layer after exposure to form a UV curable resin pattern.
상기 회로기판의 제조방법은 투명 기재 상에 두께가 1㎛ 이상인 보조 전극 패턴을 형성하는 단계를 포함한다. The method of manufacturing the circuit board includes forming an auxiliary electrode pattern having a thickness of 1 μm or more on a transparent substrate.
상기 투명 기재는 강성 기재이거나 플렉서블 기재일 수 있다. 구체적으로, 상기 투명 기재는 플렉서블 기재인 것이 바람직하며, 상기 플렉서블 기재는 플라스틱 기판 또는 플라스틱 필름일 수 있다. 상기 플라스틱 기판 또는 플라스틱 필름은 특별히 한정하지 않으나, 예를 들면, 폴리아크릴레이트(polyacrylate), 폴리프로필렌(PP, polypropylene), 폴리에틸렌테레프탈레이트(PET, polyethylene Terephthalate), 폴리에틸렌에테르프탈레이트(polyethylene ether phthalate), 폴리에틸렌프탈레이트(polyethylene phthalate), 폴리부틸렌프탈레이트(polybuthylene phthalate), 폴리에틸렌나프탈레이트(PEN; Polyethylene Naphthalate), 폴리카보네이트(PC; polycarbonate), 폴리스티렌(PS, polystyrene), 폴리에테르이미드(polyether imide), 폴리에테르술폰(polyether sulfone), 폴리디메틸실록산(PDMS; polydimethyl siloxane), 폴리에테르에테르케톤(PEEK; Polyetheretherketone) 및 폴리이미드(PI; polyimide) 중 어느 하나 이상을 포함할 수 있다. The transparent substrate may be a rigid substrate or a flexible substrate. Specifically, the transparent substrate is preferably a flexible substrate, the flexible substrate may be a plastic substrate or a plastic film. The plastic substrate or the plastic film is not particularly limited, but for example, polyacrylate, polypropylene (PP, polypropylene), polyethylene terephthalate (PET), polyethylene ether phthalate, Polyethylene phthalate, polybutylene phthalate, polyethylene naphthalate (PEN), polycarbonate (PC), polystyrene (PS, polystyrene), polyether imide, poly It may include any one or more of polyether sulfone (polyether sulfone), polydimethyl siloxane (PDMS; polydimethyl siloxane), polyether ether ketone (PEEK; Polyetheretherketone) and polyimide (PI).
상기 기재는 투명도가 높은 기판을 사용할 수 있으며, 상기 기판의 광투과도는 50 % 이상일 수 있다.The substrate may be a substrate having a high transparency, the light transmittance of the substrate may be 50% or more.
상기 투명 기재 상에 보조 전극 패턴을 형성하는 방법은 특별히 한정 하지 않으나, 예를 들면, 롤프린팅, 잉크젯 인쇄법, 스크린인쇄법 증착법, 포토리소그래피법, 식각법 등일 수 있다.A method of forming an auxiliary electrode pattern on the transparent substrate is not particularly limited, and for example, roll printing, inkjet printing, screen printing, deposition, photolithography, etching, or the like may be used.
상기 보조 전극 패턴은 규칙적인 형태일 수도 있으나, 불규칙적인 형태일 수도 있다. 예컨대, 스트라이프(Stripe), 마름모, 정사각형 격자, 원형, 웨이브(wave) 패턴, 그리드, 2 차원 그리드 등이 될 수 있으며, 특정 형태로 제한되는 것은 아니다. 상기 보조 전극 패턴이 일정 광원에서 나오는 빛이 회절과 간섭에 의해서 광학적 성질을 저해하지 않도록 설계되어야 한다면, 패턴의 규칙성을 최소화한 패턴을 사용할 수도 있으며, 이를 위해 물결무늬, 사인 곡선(Sine wave) 및 격자 구조의 스페이싱과 선의 두께를 불규칙하게 구성한 패턴을 사용할 수도 있다. 필요한 경우, 보조 전극 패턴은 2 이상의 패턴의 조합일 수 있다. 상기 보조 전극 패턴은 보로노이 다이어그램을 이루는 도형들의 경계선이나 델로니 삼각형을 이루는 경계선을 포함할 수도 있다. 상기 보조 전극 패턴을 이루는 선은 직선일 수도 있으나, 곡선, 물결선, 지그재그선 등 다양한 변형이 가능하다.The auxiliary electrode pattern may be regular or irregular. For example, it may be a stripe, a rhombus, a square lattice, a circle, a wave pattern, a grid, a two-dimensional grid, and the like, but is not limited to a specific form. If the auxiliary electrode pattern is to be designed so that light from a certain light source does not impair optical properties by diffraction and interference, a pattern that minimizes the regularity of the pattern may be used. For this purpose, a wavy pattern and a sine wave may be used. And a pattern in which the spacing of the lattice structure and the thickness of the line are irregularly configured. If necessary, the auxiliary electrode pattern may be a combination of two or more patterns. The auxiliary electrode pattern may include a boundary line of the figures forming the Voronoi diagram or a boundary line forming the Delaunay triangle. The line constituting the auxiliary electrode pattern may be a straight line, but various modifications such as curved lines, wavy lines, and zigzag lines are possible.
상기 보조 전극 패턴의 두께는 1㎛ 이상이며, 구체적으로 1㎛ 이상 10㎛ 이하일 수 있고, 더 구체적으로 1㎛ 이상 3㎛ 이하일 수 있다. The auxiliary electrode pattern may have a thickness of 1 μm or more, specifically 1 μm or more and 10 μm or less, and more specifically 1 μm or more and 3 μm or less.
상기 보조 전극 패턴의 선폭은 3㎛ 이상 100㎛ 이하이며, 구체적으로, 5㎛ 이상 50㎛ 이하일 수 있다.The line width of the auxiliary electrode pattern may be 3 μm or more and 100 μm or less, and specifically, 5 μm or more and 50 μm or less.
상기 회로기판의 제조방법은 상기 보조 전극 패턴이 구비된 투명 기재 상에 UV 경화형 수지 조성물을 도포하여 UV 경화형 수지층을 형성하는 단계를 포함한다. The method of manufacturing the circuit board includes forming a UV curable resin layer by applying a UV curable resin composition on a transparent substrate having the auxiliary electrode pattern.
본 명세서에서, UV 경화형 수지는 노광시 노광된 영역에서 레지스트 층 재료의 화학적 변화가 일어나고, 현상 시 빛에 노광되지 않은 재료가 떨어져 나가는 감광재료를 의미한다.In the present specification, the UV curable resin refers to a photosensitive material in which a chemical change of a resist layer material occurs in an exposed area during exposure, and a material not exposed to light falls during development.
상기 UV 경화형 수지 조성물은 자외선에 의해 경화되는 수지를 포함하고 있다면 특별히 한정하지 않으나, 상기 UV 경화형 수지 조성물은 네가티브 포토레지스트 조성물일 수 있다. 구체적으로, 상기 네가티브 포토레지스트 조성물은 빛에 노출됨으로써 현상액에 대한 내성이 변화하는 고분자를 포함하는 조성물을 의미하며, 상기 네가티브 포토레지스트 조성물은 빛에 노광되어 현상액에 대한 내성이 생기는 고분자를 포함할 수 있다.The UV curable resin composition is not particularly limited as long as it includes a resin cured by ultraviolet rays, but the UV curable resin composition may be a negative photoresist composition. Specifically, the negative photoresist composition may mean a composition including a polymer that is resistant to a developer by exposure to light, and the negative photoresist composition may include a polymer that is exposed to light and thus develops resistance to a developer. have.
상기 UV 경화형 수지 조성물은 광개시제, 가교제, 첨가제 및 용매 중 적어도 하나를 더 포함할 수 있다.The UV curable resin composition may further include at least one of a photoinitiator, a crosslinking agent, an additive, and a solvent.
상기 고분자, 광개시제, 가교제, 첨가제 및 용매는 특별히 한정하지 않으며, 당 기술분야에서 일반적으로 사용하는 재질을 채용할 수 있다. The polymer, photoinitiator, crosslinking agent, additives and solvents are not particularly limited, and materials generally used in the art may be employed.
상기 UV 경화형 수지 조성물을 도포하는 방법은 특별히 한정하지 않으며, 예를 들면, 바(bar) 코팅, 슬롯다이(slot die) 코팅, 스핀(spin) 코팅, 콤마(comma) 코팅, 마이크로그라비아(microgravure) 코팅 또는 딥(dip) 코팅일 수 있다.The method for applying the UV curable resin composition is not particularly limited, and for example, bar coating, slot die coating, spin coating, comma coating, and microgravure It may be a coating or a dip coating.
상기 UV 경화형 수지층을 형성하는 단계는 상기 보조 전극 패턴이 구비된 투명 기재 상에 UV 경화형 수지 조성물을 도포하는 단계 및 도포된 UV 경화형 수지 조성물을 건조하는 단계를 포함할 수 있다. The forming of the UV curable resin layer may include applying a UV curable resin composition on a transparent substrate having the auxiliary electrode pattern and drying the applied UV curable resin composition.
상기 건조방법은 특별히 한정하지 않으나, 열풍건조방법 또는 적외선건조방법일 수 있다.The drying method is not particularly limited, but may be a hot air drying method or an infrared drying method.
상기 회로기판의 제조방법은 상기 UV 경화형 수지층을 형성하는 단계 후에, 상기 UV 경화형 수지층 상에 이형필름을 적층하는 단계; 및 상기 이형필름의 표면을 압착하는 단계를 더 포함할 수 있다. The method of manufacturing a circuit board may include: stacking a release film on the UV curable resin layer after forming the UV curable resin layer; And pressing the surface of the release film.
상기 이형필름은 UV 경화형 수지층 상에 적층되었다가 UV 경화형 수지층의 손상없이 제거될 수 있다면 특별히 한정하지 않으며, 예를 들면, 실리콘계 이형필름 및 불소계 이형필름 중 적어도 하나를 포함할 수 있다. The release film is not particularly limited as long as the release film is laminated on the UV curable resin layer and can be removed without damaging the UV curable resin layer. For example, the release film may include at least one of a silicone release film and a fluorine release film.
상기 이형필름의 표면을 압착하는 방법은 특별히 한정하지 않으나, 압착판, 열압착판, 압착롤 또는 열압착롤을 사용하여 이형필름의 표면을 압착할 수 있다. 이때, 압착시간 및 압착하는 힘은 이형필름의 재질과 두께 및 UV 경화형 수지층의 재질에 따라 변경하여 선택할 수 있다. The method of compressing the surface of the release film is not particularly limited, but the surface of the release film may be compressed using a pressing plate, a thermocompression plate, a compression roll, or a thermocompression roll. In this case, the pressing time and the pressing force may be selected by changing the material and the thickness of the release film and the material of the UV curable resin layer.
상기 회로기판의 제조방법은 상기 노광단계 전 또는 후에, 상기 이형필름을 제거하는 단계를 더 포함할 수 있다. 구체적으로, 상기 이형필름은 상기 노광단계 전에 제거하거나, 상기 노광단계 후에 제거할 수 있다. The manufacturing method of the circuit board may further include removing the release film before or after the exposure step. Specifically, the release film may be removed before the exposure step or after the exposure step.
상기 이형필름을 제거하는 방법은 특별히 한정하지 않으나, 접착롤에 의해 이형필름을 제거할 수 있다. The method of removing the release film is not particularly limited, but the release film may be removed by an adhesive roll.
상기 회로기판의 제조방법은 상기 투명 기재 중 보조 전극 패턴이 형성된 면의 반대면 측에서 빛을 조사하는 노광단계를 포함한다. The manufacturing method of the circuit board includes an exposure step of irradiating light from the side of the transparent substrate opposite the surface on which the auxiliary electrode pattern is formed.
상기 노광단계의 노광조건은 도포된 포토레지스트의 성질에 따라 조절될 수 있으며, 특별히 한정하지 않는다. UV 경화형 수지층이 충분하게 노광되지 않을 경우, UV 경화형 수지층이 충분히 경화되지 않아 현상 공정 중 UV 경화형 수지층의 표면이 손상될 수 있으며 보조 전극 패턴과 UV 경화형 수지층 사이에서 틈이 발생될 수 있다. 반면에 UV 경화형 수지층이 과도하게 노광될 경우, 보조 전극 상에 형성되어 있는 UV 경화형 수지층의 전부 또는 일부가 노광되어 현상 후 보조 전극 상부의 전부 또는 일부가 노출되지 않는 문제가 발생할 수 있다.The exposure conditions of the exposure step may be adjusted according to the properties of the applied photoresist, it is not particularly limited. If the UV-curable resin layer is not sufficiently exposed, the UV-curable resin layer may not be sufficiently cured, and the surface of the UV-curable resin layer may be damaged during the development process, and a gap may occur between the auxiliary electrode pattern and the UV-curable resin layer. have. On the other hand, when the UV-curable resin layer is excessively exposed, a problem may occur in which all or part of the UV-curable resin layer formed on the auxiliary electrode is exposed so that all or part of the upper part of the auxiliary electrode is not exposed after development.
상기 회로기판의 제조방법은 노광 후 상기 UV 경화형 수지층 중 빛이 조사되지 않은 부분을 현상하여 UV 경화형 수지 패턴을 형성하는 단계를 포함한다. The manufacturing method of the circuit board may include forming a UV curable resin pattern by developing a portion of the UV curable resin layer not exposed to light after exposure.
상기 노광 후 상기 UV 경화형 수지층 중 빛이 조사되지 않은 부분은 UV 경화형 수지층 중 보조 전극 패턴 상에 위치하는 부분이며, 보조 전극 패턴 상에 위치하는 UV 경화형 수지층의 일부분은 보조 전극 패턴에 의해 빛이 차단되어 조사된 빛을 받지 못한다.After the exposure, the portion of the UV-curable resin layer not irradiated with light is a portion located on the auxiliary electrode pattern among the UV-curable resin layers, and a portion of the UV-curable resin layer positioned on the auxiliary electrode pattern is formed by the auxiliary electrode pattern. The light is blocked and does not receive the emitted light.
상기 노광 후 상기 UV 경화형 수지층 중 빛이 조사되지 않은 부분을 현상함으로써, 보조 전극 패턴 상의 UV 경화형 수지가 현상액에 의해 현상되어 보조 전극 패턴이 노출될 수 있다. By developing the portion of the UV-curable resin layer not irradiated with light after the exposure, the UV-curable resin on the auxiliary electrode pattern may be developed by a developer to expose the auxiliary electrode pattern.
상기 노광 후 상기 UV 경화형 수지층 중 빛이 조사된 부분은 보조 전극 패턴이 형성되지 않아 상기 투명 기재 중 보조 전극 패턴이 형성된 면의 반대면 측에서 조사된 빛을 받은 부분이며, 구체적으로, 상기 노광 후 상기 UV 경화형 수지층 중 빛이 조사된 부분은 보조 전극 패턴 사이에 형성된 UV 경화형 수지층의 일부이다. 상기 노광 후 상기 UV 경화형 수지층 중 빛이 조사되지 않은 부분을 현상함으로써 형성되는 UV 경화형 수지 패턴은 보조 전극 패턴 사이에 형성될 수 있다. After the exposure, the portion of the UV-curable resin layer to which light is irradiated is a portion in which the auxiliary electrode pattern is not formed and receives the light irradiated from the side opposite to the surface on which the auxiliary electrode pattern is formed, and specifically, the exposure After the light irradiated portion of the UV curable resin layer is a part of the UV curable resin layer formed between the auxiliary electrode pattern. The UV curable resin pattern formed by developing a portion of the UV curable resin layer to which light is not irradiated after the exposure may be formed between the auxiliary electrode patterns.
상기 보조 전극 패턴의 두께와 상기 UV 경화형 수지 패턴의 두께의 차이는 200nm 이하일 수 있다. 구체적으로, 상기 보조 전극 패턴의 두께와 상기 UV 경화형 수지 패턴의 두께의 차이는 0nm 이상 200nm 이하일 수 있으며, 50nm 이상 150nm 이하일 수 있다. 이 경우 상기 보조 전극 패턴 및 UV 경화형 수지 패턴이 구비된 투명 기재 상에 형성되는 투명 전극층이 단차에 의한 크랙이 발생하지 않는 장점이 있다. The difference between the thickness of the auxiliary electrode pattern and the thickness of the UV curable resin pattern may be 200 nm or less. Specifically, the difference between the thickness of the auxiliary electrode pattern and the thickness of the UV curable resin pattern may be 0 nm or more and 200 nm or less, and 50 nm or more and 150 nm or less. In this case, there is an advantage in that the transparent electrode layer formed on the transparent substrate provided with the auxiliary electrode pattern and the UV curable resin pattern does not occur due to the step difference.
상기 UV 경화형 수지층 중 빛이 조사되지 않은 부분을 현상하는 방법은 특별히 한정하지 않으나, 예를 들면, 현상액을 노광된 UV 경화형 수지층에 도포 또는 분사하거나, 노광된 UV 경화형 수지층을 현상액에 침지할 수 있다.The method of developing a portion of the UV-curable resin layer that is not irradiated with light is not particularly limited. For example, the developer is applied or sprayed onto the exposed UV-curable resin layer, or the exposed UV-curable resin layer is immersed in the developer. can do.
상기 회로기판의 제조방법은 상기 UV 경화형 수지 패턴을 형성하는 단계 후에, 상기 보조 전극 패턴 및 UV 경화형 수지 패턴이 구비된 투명 기재 상에 투명 전극층을 형성하는 단계를 더 포함할 수 있다. The method of manufacturing the circuit board may further include forming a transparent electrode layer on the transparent substrate provided with the auxiliary electrode pattern and the UV curable resin pattern after the forming of the UV curable resin pattern.
상기 투명 전극층을 형성하는 방법은 특별히 한정하지 않으나, 상기 보조 전극 패턴 및 UV 경화형 수지 패턴이 구비된 투명 기재 상에 투명 전극재료를 증착시킬 수 있다. The method of forming the transparent electrode layer is not particularly limited, but a transparent electrode material may be deposited on the transparent substrate provided with the auxiliary electrode pattern and the UV curable resin pattern.
상기 투명 전극층은 투명한 금속 산화물층이거나, 두께가 얇아 광투과성이 있는 금속층일 수 있다. The transparent electrode layer may be a transparent metal oxide layer or a thin metal layer having a light transmissive thickness.
상기 투명 전극층은 ITO(Indium Tin Oxide), ZnO, IZO(Indium Zinc Oxide) 등의 금속 산화물층으로 형성되거나, Al, Cu 등의 얇은 금속으로 형성될 수 있다. The transparent electrode layer may be formed of a metal oxide layer such as indium tin oxide (ITO), ZnO, or indium zinc oxide (IZO), or may be formed of a thin metal such as Al or Cu.
상기 회로기판의 제조방법은 상기 전극층 상에 유기물층 및 추가의 전극층을 순차적으로 형성하는 단계를 더 포함할 수 있다. The method of manufacturing the circuit board may further include sequentially forming an organic material layer and an additional electrode layer on the electrode layer.
상기 보조전극 및 전극층이 전자 소자의 전극층에 해당하는 경우, 전자 소자의 종류에 맞는 추가층을 더 형성할 수 있다. 예를 들면, 상기 전극층 상에 전자 소자의 종류에 맞는 유기물층 및 추가의 전극층을 더 형성할 수 있다.When the auxiliary electrode and the electrode layer correspond to the electrode layer of the electronic device, an additional layer suitable for the type of the electronic device may be further formed. For example, an organic material layer and an additional electrode layer suitable for the type of electronic device may be further formed on the electrode layer.
상기 전자 소자는 터치패널, 태양 전지, 유기 발광 소자, 조명 및 액정표시장치 등을 포함한다.The electronic device includes a touch panel, a solar cell, an organic light emitting device, an illumination, a liquid crystal display, and the like.
전자 소자에 있어서, 투명성을 위해 투명전극을 구비하는 경우가 증가하고 있으며, 전극에 투명성을 위해서는 금속 산화물을 사용하거나 금속층을 얇게 증착해야 한다. 금속 산화물의 경우 저항이 높으며, 도전성이 좋은 금속이라도 투명성을 확보할만큼 얇게 증착하는 경우 저항이 높아지게 된다. BACKGROUND OF THE INVENTION In electronic devices, transparent electrodes are increasingly used for transparency, and in order to provide transparency to the electrodes, metal oxides or thin metal layers must be deposited. In the case of metal oxides, the resistance is high, and even if the conductive metal is thin enough to ensure transparency, the resistance is high.
이에 따라, 상기 투명전극의 저항을 낮춰주기 위해 보조 전극 패턴을 구비할 수 있다. Accordingly, an auxiliary electrode pattern may be provided to lower the resistance of the transparent electrode.
전자 소자의 크기가 증가시키거나 플렉서빌리티를 부여하는 등 전자 소자의 응용을 넓혀가는 추세에 따라, 상기 보조 전극의 저항을 더 낮춰야 하는 필요성이 높아지고 있다. 상기 보조 전극 패턴의 저항을 낮추는 방법으로 보조 전극 패턴의 두께를 증가시키는 방법을 생각할 수 있으나, 이 경우 도 1에 도시된 바와 같이 보조 전극 패턴과 기재의 단차로 인해 증착되는 전극층에 크랙이 형성되어 전기적 단락 또는 배선간 쇼트가 발생할 수 있다. Increasing the application of electronic devices, such as increasing the size of the electronic device or giving flexibility, the need to lower the resistance of the auxiliary electrode is increasing. Although a method of increasing the thickness of the auxiliary electrode pattern may be considered as a method of lowering the resistance of the auxiliary electrode pattern, in this case, as shown in FIG. 1, cracks are formed in the electrode layer deposited due to the difference between the auxiliary electrode pattern and the substrate. Electrical shorts or short circuits can occur.
이와 같은 문제점을 해결하기 위해 도 2와 같이, 보조 전극 패턴과 기재의 단차를 줄여줄 수 있는 평탄화층을 형성할 수 있다. In order to solve such a problem, as shown in FIG. 2, a planarization layer which can reduce the step difference between the auxiliary electrode pattern and the substrate may be formed.
이하에서, 실시예를 통하여 본 명세서를 더욱 상세하게 설명한다. 그러나, 이하의 실시예는 본 명세서를 예시하기 위한 것일 뿐, 본 명세서를 한정하기 위한 것은 아니다.Hereinafter, the present specification will be described in more detail with reference to Examples. However, the following examples are merely to illustrate the present specification, but not to limit the present specification.
[실시예]EXAMPLE
[제조예][Production example]
UV 경화형 수지 조성물의 제조Preparation of UV Curable Resin Composition
중량 평균 분자량이 10,100g/mol, 산가 77mgKOH/g, 아크릴반응기 비율이 30mol%인 아크릴레이트 수지 16g, 디펜타에리쓰리톨 헥사아크릴레이트 7.5g, 옥심계 광개시제 1g, Glide-410 계면활성제 0.5g을 PGMEA(Propylene Glycol Mnomethyl Ether Acetate) 75g에 용해한 후 0.1㎛ 크기의 필터로 여과하여 UV 경화형 수지 조성물을 제조하였다.A weight average molecular weight of 10,100 g / mol, an acid value of 77 mgKOH / g, an acrylic reactor having a ratio of 30 mol% of acrylic resin 16 g, dipentaerythritol hexaacrylate 7.5 g, oxime photoinitiator 1 g, Glide-410 surfactant 0.5 g After dissolving in 75 g of Propylene Glycol Mnomethyl Ether Acetate (PGMEA), and filtered through a filter of 0.1 ㎛ size to prepare a UV curable resin composition.
[실시예 1]Example 1
구리가 2㎛ 두께로 증착되어 있는 PET(polyethylene terephthalate) 필름 상에 리버스 오프셋 인쇄 공정을 통하여 선폭 15㎛인 레지스트 잉크 패턴을 형성한 후 구리 식각 공정을 통하여 두께 2㎛, 선폭 8㎛인 구리 보조 전극 패턴을 형성했다.After forming a resist ink pattern having a line width of 15 μm on a polyethylene terephthalate (PET) film in which copper is deposited to a thickness of 2 μm through a reverse offset printing process, a copper auxiliary electrode having a thickness of 2 μm and a line width of 8 μm through a copper etching process Formed a pattern.
상기 두께 2㎛, 선폭 8㎛인 구리 보조 전극이 구비된 기재 상에 상기 제조예에서 제조된 UV 경화형 수지 조성물을 스핀 코팅법을 이용하여 도포한 후 80℃에서 3분간 열풍 건조하여 UV 경화형 수지 조성물층을 형성했다.After applying the UV curable resin composition prepared in Preparation Example on the substrate with a copper auxiliary electrode having a thickness of 2㎛, line width 8㎛ by using a spin coating method and hot-air dried at 80 ℃ 3 minutes UV curable resin composition Formed a layer.
상기 UV 경화형 수지 조성물층 상에 불소계 이형필름을 적층한 후 25Kgf/cm2 압력 조건으로 압착롤로 압착했다.After laminating the fluorine-based release film on the UV-curable resin composition layer, it was crimped with a press roll under 25 Kgf / cm 2 pressure conditions.
상기 구리 보조 전극 패턴 및 UV 경화형 수지 조성물층이 구비되어 있는 기재의 배면에서 100mJ/cm2의 노광량을 조사한 후 접착롤을 통해 이형필름을 제거하였다. 120℃에서 3분간 상기 이형필름이 제거된 기재를 추가로 열풍 건조했다.After irradiating the exposure amount of 100mJ / cm 2 from the back surface of the substrate provided with the copper auxiliary electrode pattern and the UV curable resin composition layer, the release film was removed through an adhesive roll. The substrate from which the release film was removed was further hot-air dried at 120 ° C. for 3 minutes.
KOH 0.05wt% 현상액에 2분간 현상하여 구리 보조 전극 패턴 상부의 구비되어 있는 UV 경화형 수지 조성물층을 제거했다.It developed for 2 minutes in KOH 0.05 wt% developing solution, and removed the UV curable resin composition layer with which the copper auxiliary electrode pattern upper part was provided.
상기 노출된 구리 보조 전극 패턴 상에 두께가 100nm인 ITO를 증착했다.ITO having a thickness of 100 nm was deposited on the exposed copper auxiliary electrode pattern.
[실시예 2]Example 2
노광량을 150mJ/cm2으로 변경한 것을 제외하고, 실시예 1과 동일하게 제조했다.It manufactured like Example 1 except having changed the exposure amount into 150mJ / cm <2> .
[실시예 3]Example 3
노광량을 200mJ/cm2으로 변경한 것을 제외하고, 실시예 1과 동일하게 제조했다.It manufactured like Example 1 except having changed exposure amount into 200mJ / cm <2> .
[비교예 1]Comparative Example 1
실시예 1에서 UV 경화형 수지 조성물층을 형성하지 않고, 두께 2㎛ 선폭 8㎛인 구리 보조 전극 패턴이 구비된 PET 필름 상에 바로 두께가 100nm인 ITO를 증착했다.In Example 1, 100 nm-thick ITO was deposited directly on the PET film provided with the copper auxiliary electrode pattern of 2 micrometers in thickness, and 8 micrometers in width, without forming a UV curable resin composition layer.
[비교예 2] Comparative Example 2
구리가 2㎛ 두께로 증착되어 있는 PET(polyethylene terephthalate) 필름 상에 리버스 오프셋 인쇄 공정을 통하여 선폭 15㎛인 레지스트 잉크 패턴을 형성한 후 구리 식각 공정을 통하여 두께 2㎛, 선폭 8㎛인 구리 보조 전극 패턴을 형성했다.After forming a resist ink pattern having a line width of 15 μm on a polyethylene terephthalate (PET) film in which copper is deposited to a thickness of 2 μm through a reverse offset printing process, a copper auxiliary electrode having a thickness of 2 μm and a line width of 8 μm through a copper etching process Formed a pattern.
상기 두께 2㎛, 선폭 8㎛인 구리 보조 전극이 구비된 기재 상에 제조예에서 제조된 UV 경화형 수지 조성물을 스핀 코팅법을 이용하여 도포한 후 120℃에서 3분간 열풍 건조하여 UV 경화형 수지 조성물층을 형성했다.After coating the UV curable resin composition prepared in Preparation Example on the substrate with the copper auxiliary electrode having a thickness of 2 μm and a line width of 8 μm by using a spin coating method, it was dried by hot air at 120 ° C. for 3 minutes to form a UV curable resin composition layer. Formed.
상기 구리 보조 전극 패턴 및 UV 경화형 수지 조성물층이 구비되어 있는 기재의 배면에서 100mJ/cm2의 노광량을 조사한 후 KOH 0.05wt% 현상액에 2분간 현상하여 구리 보조 전극 패턴 상부의 구비되어 있는 UV 경화형 수지 조성물층을 제거했다.After irradiating 100mJ / cm 2 exposure amount from the back surface of the base material provided with the said copper auxiliary electrode pattern and a UV curable resin composition layer, it developed in KOH 0.05wt% developing solution for 2 minutes, and the UV curable resin provided on the upper part of a copper auxiliary electrode pattern. The composition layer was removed.
상기 노출된 구리 보조 전극 패턴 상에 두께가 100nm인 ITO를 증착했다.ITO having a thickness of 100 nm was deposited on the exposed copper auxiliary electrode pattern.
[비교예 3]Comparative Example 3
노광량을 150mJ/cm2으로 변경한 것을 제외하고, 비교예 2와 동일하게 제조했다.It manufactured like the comparative example 2 except having changed the exposure amount into 150mJ / cm <2> .
[비교예 4][Comparative Example 4]
노광량을 200mJ/cm2으로 변경한 것을 제외하고, 비교예 2와 동일하게 제조했다.It manufactured like the comparative example 2 except having changed the exposure amount into 200mJ / cm <2> .
[실험예 1]Experimental Example 1
주사전자현미경(SEM) 측정Scanning electron microscope (SEM) measurement
PET 필름 상에 구비된 보조 전극 패턴의 주사전자현미경(SEM) 이미지를 도 5에 나타냈다.A scanning electron microscope (SEM) image of the auxiliary electrode pattern provided on the PET film is shown in FIG. 5.
실시예 1의 UV 경화형 수지 패턴 및 노출된 보조 전극 패턴을 나타내는 SEM이미지를 도 6에 나타냈다.An SEM image showing the UV curable resin pattern and the exposed auxiliary electrode pattern of Example 1 is shown in FIG. 6.
실시예 1 내지 3과 비교예 1 내지 4의 ITO가 증착된 표면을 나타낸 SEM이미지 각각 도 7 내지 10에 나타냈다.SEM images showing the surfaces on which ITOs of Examples 1 to 3 and Comparative Examples 1 to 4 were deposited are shown in FIGS. 7 to 10, respectively.
도 7(실시예 2)과 도 8(비교예 1)을 비교하면, UV 경화형 수지 조성물층이 구비되어 있을 경우 보조 전극 경계부에서의 ITO 크렉이 발생하지 않는 것을 알 수 있다. Comparing FIG. 7 (Example 2) and FIG. 8 (Comparative Example 1), when the UV curable resin composition layer is provided, it can be seen that ITO cracks do not occur at the boundary of the auxiliary electrode.
도 9(실시예 1 내지 3)과 도 10(비교예 2 내지 4)을 비교하면, 실시예 1 내지 3과 같이 이형필름을 합지한 상태에서 배면 노광을 진행할 경우 보조전극 상부에 수지 조성물층이 잔류하지 않는 것을 알 수 있고, 비교예 2 내지 4는 도 10에 표시한 바와 같이 잔류된 수지 조성물층이 존재하는 것을 알 수 있다.9 (Examples 1 to 3) and FIG. 10 (Comparative Examples 2 to 4), the resin composition layer is formed on the auxiliary electrode when the back exposure is performed in the state of laminating the release film as in Examples 1 to 3. It can be seen that it does not remain, and Comparative Examples 2 to 4 show that a residual resin composition layer exists as shown in FIG. 10.
[실험예 2]Experimental Example 2
저항측정resistance measurement
실시예 1 내지 3과 비교예 1 내지 4의 보조 전극 패턴 상부에 ITO 100nm를 증착한 후 Mitsubishi Chemical Corporation MCP-T600 면저항 측정기를 이용하여 보조 전극 기판의 면저항을 측정하였다.After depositing 100 nm of ITO on the auxiliary electrode patterns of Examples 1 to 3 and Comparative Examples 1 to 4, the sheet resistance of the auxiliary electrode substrate was measured using a Mitsubishi Chemical Corporation MCP-T600 sheet resistance meter.
보조전극 패턴 경계부 ITO 크렉 발생 여부ITO crack occurs at the auxiliary electrode pattern boundary ITO 100nm 증착 후 면저항(Ω/□)Sheet resistance after ITO 100nm deposition (Ω / □)
실시예 1Example 1 미발생Not Occurred 1.21.2
실시예 2Example 2 미발생Not Occurred 1.31.3
실시예 3Example 3 미발생Not Occurred 1.21.2
비교예 1Comparative Example 1 발생Occur 1.41.4
비교예 2Comparative Example 2 미발생Not Occurred 4.64.6
비교예 3Comparative Example 3 미발생Not Occurred 12.312.3
비교예 4Comparative Example 4 미발생Not Occurred 16.816.8
상기 표 1을 통해, 보조전극 상부에 수지 조성물이 잔류된 비교예 2 내지 4는 면저항이 높은 것을 알 수 있다. 이는 잔류된 수지 조성물이 보조전극의 ITO의 면저항을 감소시키는 효과를 방해하는 것을 알 수 있다.Through Table 1, it can be seen that Comparative Examples 2 to 4 in which the resin composition remained on the auxiliary electrode had high sheet resistance. It can be seen that the remaining resin composition interferes with the effect of reducing the sheet resistance of ITO of the auxiliary electrode.

Claims (4)

  1. 투명 기재 상에 두께가 1㎛ 이상인 보조 전극 패턴을 형성하는 단계;Forming an auxiliary electrode pattern having a thickness of 1 μm or more on the transparent substrate;
    상기 보조 전극 패턴이 구비된 투명 기재 상에 UV 경화형 수지 조성물을 도포하여 UV 경화형 수지층을 형성하는 단계;Forming a UV curable resin layer by applying a UV curable resin composition on the transparent substrate provided with the auxiliary electrode pattern;
    상기 UV 경화형 수지층 상에 이형필름을 적층하는 단계; Stacking a release film on the UV curable resin layer;
    상기 이형필름의 표면을 압착하는 단계;Pressing the surface of the release film;
    상기 투명 기재 중 보조 전극 패턴이 형성된 면의 반대면 측에서 빛을 조사하는 노광단계; 및 An exposure step of irradiating light from an opposite side of a surface of the transparent substrate on which an auxiliary electrode pattern is formed; And
    노광 후 상기 UV 경화형 수지층 중 빛이 조사되지 않은 부분을 현상하여 UV 경화형 수지 패턴을 형성하는 단계를 포함하며,And developing a portion of the UV-curable resin layer after exposure that is not irradiated with light to form a UV-curable resin pattern.
    상기 노광단계 전 또는 후에, 상기 이형필름을 제거하는 단계를 더 포함하는 것인 회로기판의 제조방법.Before or after the exposing step, further comprising the step of removing the release film.
  2. 청구항 1에 있어서, 상기 UV 경화형 수지 패턴을 형성하는 단계 후에, 상기 보조 전극 패턴 및 UV 경화형 수지 패턴이 구비된 투명 기재 상에 전극층을 형성하는 단계를 더 포함하는 회로기판의 제조방법.The method of claim 1, further comprising, after the forming of the UV curable resin pattern, forming an electrode layer on the transparent substrate provided with the auxiliary electrode pattern and the UV curable resin pattern.
  3. 청구항 2에 있어서, 상기 전극층 상에 유기물층 및 추가의 전극층을 순차적으로 형성하는 단계를 더 포함하는 회로기판의 제조방법.The method of claim 2, further comprising sequentially forming an organic material layer and an additional electrode layer on the electrode layer.
  4. 청구항 1에 있어서, 상기 보조 전극 패턴의 두께와 상기 UV 경화형 수지 패턴의 두께의 차이는 200nm 이하인 것인 회로기판의 제조방법.The method of claim 1, wherein a difference between the thickness of the auxiliary electrode pattern and the thickness of the UV curable resin pattern is 200 nm or less.
PCT/KR2017/000081 2016-01-04 2017-01-04 Method of manufacturing circuit board WO2017119706A1 (en)

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CN201780002485.XA CN107852819A (en) 2016-01-04 2017-01-04 The manufacture method of circuit board
EP17736079.9A EP3300468A4 (en) 2016-01-04 2017-01-04 Method of manufacturing circuit board
US15/741,993 US10606175B2 (en) 2016-01-04 2017-01-04 Method of manufacturing circuit board
JP2017567369A JP6677379B2 (en) 2016-01-04 2017-01-04 Circuit board manufacturing method

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JPH06148659A (en) * 1992-11-06 1994-05-27 Matsushita Electric Ind Co Ltd Electrode substrate and its manufacture
JPH08271921A (en) * 1995-03-31 1996-10-18 Seiko Epson Corp Liquid crystal device and its production
JP2000010106A (en) * 1998-06-17 2000-01-14 Sharp Corp Production of liquid crystal display device
JP2000187232A (en) * 1998-12-24 2000-07-04 Denso Corp Electrode substrate for display panel and manufacture of the same
JP2009059666A (en) * 2007-09-03 2009-03-19 Sumitomo Metal Mining Co Ltd Film with transparent conductive layer, flexible functional elements, and manufacturing methods therefor
KR20160000482A (en) 2014-06-24 2016-01-05 엘지디스플레이 주식회사 Display device integrated with touch screen panel and method for fabricating the same
KR20170000724A (en) 2015-06-24 2017-01-03 고려대학교 산학협력단 Device for detecting interface pressure

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JPH06148659A (en) * 1992-11-06 1994-05-27 Matsushita Electric Ind Co Ltd Electrode substrate and its manufacture
JPH08271921A (en) * 1995-03-31 1996-10-18 Seiko Epson Corp Liquid crystal device and its production
JP2000010106A (en) * 1998-06-17 2000-01-14 Sharp Corp Production of liquid crystal display device
JP2000187232A (en) * 1998-12-24 2000-07-04 Denso Corp Electrode substrate for display panel and manufacture of the same
JP2009059666A (en) * 2007-09-03 2009-03-19 Sumitomo Metal Mining Co Ltd Film with transparent conductive layer, flexible functional elements, and manufacturing methods therefor
KR20160000482A (en) 2014-06-24 2016-01-05 엘지디스플레이 주식회사 Display device integrated with touch screen panel and method for fabricating the same
KR20170000724A (en) 2015-06-24 2017-01-03 고려대학교 산학협력단 Device for detecting interface pressure

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