WO2017117834A1 - 液晶显示面板、阵列基板及其制造方法 - Google Patents

液晶显示面板、阵列基板及其制造方法 Download PDF

Info

Publication number
WO2017117834A1
WO2017117834A1 PCT/CN2016/072663 CN2016072663W WO2017117834A1 WO 2017117834 A1 WO2017117834 A1 WO 2017117834A1 CN 2016072663 W CN2016072663 W CN 2016072663W WO 2017117834 A1 WO2017117834 A1 WO 2017117834A1
Authority
WO
WIPO (PCT)
Prior art keywords
contact hole
black matrix
drain
region
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2016/072663
Other languages
English (en)
French (fr)
Inventor
郝思坤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to US14/914,253 priority Critical patent/US9933673B2/en
Publication of WO2017117834A1 publication Critical patent/WO2017117834A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0231—Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133345—Insulating layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133357—Planarisation layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136231—Active matrix addressed cells for reducing the number of lithographic steps
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/136295—Materials; Compositions; Manufacture processes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular to an array substrate, a method of manufacturing the same, and a liquid crystal display panel having the array substrate.
  • the manufacturing process of a liquid crystal display is complicated, especially a layer structure of a liquid crystal display panel.
  • the liquid crystal display panel 10 includes a first substrate 11 and a second substrate 12 which are relatively spaced apart.
  • the first substrate 11 includes a TFT (Thin Film Transistor) 111, a data line 112, a first flat passivation layer (Over coat) 113, a color filter layer 114,
  • the second flat passivation layer 115, the pixel electrode 116, and the common electrode 117, the second flat passivation layer 115 is also called a PFA (Polytetrafluoro-Ethylene) layer
  • the second substrate 12 includes a black matrix 121 and a third flat Passivation layer 122.
  • the common electrode 117 and the light-shielding black matrix 121 are disposed on two substrates, the distance between the two is relatively long. Therefore, when viewed from a large viewing angle, light of a certain pixel (indicated by an arrow in the figure) is emitted through adjacent pixels. Therefore, it is easy to leak light when viewed from a large viewing angle.
  • the present invention provides a liquid crystal display panel, an array substrate, and a method of manufacturing the same, which can reduce the type and number of photomasks used for manufacturing, and reduce light leakage at a large viewing angle.
  • the invention provides a method for manufacturing an array substrate, comprising: sequentially forming a gate electrode, an insulating layer and an active semiconductor layer on a substrate; forming a source and a drain on the active semiconductor layer; forming a data line on the insulating layer; Forming a planar passivation layer on the source and drain, the data line and the insulating layer, the flat passivation layer being formed with a first contact hole exposing a surface of the drain; forming a black matrix on the flat passivation layer, the black matrix including a first region and a second region, wherein the black matrix of the first region is located above the source and the drain, and the black matrix of the second region is located above the data line, and the black matrix of the first region is formed with the first contact hole a second contact hole in communication; on the black matrix of the first region and a pixel electrode is formed in a contact hole and a second contact hole, and the pixel electrode is electrically connected to the drain through the first contact hole and the second contact hole; a common
  • the method further comprises: forming a color filter layer on the flat passivation layer, the color filter layer being formed with the first contact hole and a third contact hole through which the second contact hole communicates to electrically connect the pixel electrode to the drain through the first contact hole, the second contact hole, and the third contact hole.
  • the source and the drain are formed by the same mask process as the data line.
  • the step of forming a black matrix on the flat passivation layer comprises: forming a full surface light shielding layer on the flat passivation layer; and patterning the light shielding layer to form a black matrix.
  • the method further comprises: forming a protective layer on the pixel electrode and the common electrode.
  • An array substrate includes: a substrate; a gate electrode, an insulating layer, an active semiconductor layer sequentially formed on the substrate; a source and a drain formed on the active semiconductor layer; and an insulating layer formed on the insulating layer a data line; a flat passivation layer formed on the source and drain, the data line and the insulating layer, the flat passivation layer being formed with a first contact hole exposing a surface of the drain; and a black matrix formed on the flat passivation layer And including a first region and a second region, the black matrix of the first region is corresponding to the source and the drain, and the black matrix of the second region is located above the data line, and the black matrix of the first region is formed with the first a second contact hole through which the contact hole communicates; a pixel electrode formed on the black matrix of the first region and the first contact hole and the second contact hole to pass the pixel electrode through the first contact hole and the second contact hole and the drain Electrical connection; a common electrode formed on the black matrix of the
  • the array substrate further includes: a color filter layer formed between the flat passivation layer and the black matrix, and the color filter layer is formed with a third contact that communicates with the first contact hole and the second contact hole a hole such that the pixel electrode is electrically connected to the drain through the first contact hole, the second contact hole, and the third contact hole.
  • the source and the drain are formed by the same mask process as the data line.
  • the array substrate further includes: a protective layer formed on the pixel electrode and the common electrode.
  • the present invention provides a liquid crystal display panel comprising a first substrate and a second substrate disposed at a relatively spaced interval, and a liquid crystal filled between the first substrate and the second substrate, the first substrate and the second substrate
  • the array substrate includes: a substrate; a gate electrode, an insulating layer, an active semiconductor layer sequentially formed on the substrate; a source and a drain formed on the active semiconductor layer; and an insulating layer a data line on the layer; a flat passivation layer formed on the source and drain, the data line and the insulating layer, the flat passivation layer being formed with a first contact hole exposing a surface of the drain; and a black matrix formed in a flat blunt
  • the first layer and the second region are disposed on the layer, and the black matrix of the first region is located above the source and the drain, and the black matrix of the second region is located above the data line, and the black matrix of the first region is formed with a second contact hole communicating with the first contact hole; a pixel electrode formed on
  • the array substrate further includes: a color filter layer formed between the flat passivation layer and the black matrix, and the color filter layer is formed with a third contact that communicates with the first contact hole and the second contact hole a hole such that the pixel electrode is electrically connected to the drain through the first contact hole, the second contact hole, and the third contact hole.
  • the source and the drain are formed by the same mask process as the data line.
  • the array substrate further includes: a protective layer formed on the pixel electrode and the common electrode.
  • the black matrix is designed to be used for both light shielding and an insulating layer between the pixel electrode and other structures, thereby reducing the type and number of the reticle used. Simplify the process and reduce the production cost, and the distance between the black matrix and the data line above the data line is shortened, so that the light of a certain pixel is not emitted through the adjacent pixels, thereby reducing the large-angle light leakage.
  • FIG. 1 is a cross-sectional view showing the structure of a liquid crystal display panel according to an embodiment of the prior art
  • FIG. 2 is a cross-sectional view showing the structure of a liquid crystal display panel according to an embodiment of the present invention
  • FIG. 3 is a schematic flow chart of a method of manufacturing an array substrate according to an embodiment of the present invention.
  • FIG. 4 is a schematic view showing a process of manufacturing an array substrate by the method shown in FIG. 3;
  • FIG. 5 is a schematic flow chart of a method of fabricating an array substrate according to another embodiment of the present invention.
  • the liquid crystal display panel 20 includes an array substrate (Array Substrate, also known as a Thin Film Transistor Substrate) 21 and a color filter substrate (Color Filter, CF substrate or color).
  • array substrate Array Substrate, also known as a Thin Film Transistor Substrate
  • color filter substrate Color Filter, CF substrate or color
  • the array substrate 21 includes a substrate 211 and a thin film transistor 212, a data line 213, a flat passivation layer 214, a color filter layer 215, a black matrix 216, a pixel electrode 217, and a common electrode 218 formed on the substrate 211.
  • the thin film transistor 212 includes a gate 2111, an insulating layer 2112, an active semiconductor layer (AS) 2113, and a source S and a drain D formed on the active semiconductor layer 2113, which are sequentially formed on the substrate 211.
  • the insulating layer 2112 is a Gate Insulation Layer (GI); the data line 213 is formed on the insulating layer 2112 and spaced apart from the thin film transistor 212; the flat passivation layer 214 is formed on the source S and the drain D. a data line 213 and an insulating layer 2112, and a first contact hole O 1 exposing a surface of the drain D; a color filter layer 215 formed on the flat passivation layer 214 and formed with the first contact hole A third contact hole O 3 in which O 1 is in contact; a black matrix 216 is formed on the flat passivation layer 214 such that the color filter layer 215 is located between the flat passivation layer 214 and the black matrix 216, and the black matrix 216 includes the first region And a second region, the black matrix 216 of the first region is located above the source S and the drain D, and is formed with a second contact hole O 2 communicating with the first contact hole O 1 and the third contact hole O 3 , The black matrix 216 of the second region is correspondingly
  • the color filter layer 215 can be formed on the transparent substrate 221 of the color filter substrate 22 shown in FIG. 2, and the color filter layer 215 does not need to open the third contact hole O. 3 , correspondingly, the black matrix 216 having the above structure is directly formed on the flat passivation layer 214, and the second contact hole O 2 formed by the black matrix 216 of the first region directly communicates with the first contact hole O 1 , and the pixel electrode 217 Formed on the black matrix 216 of the first region and in the first contact hole O 1 and the second contact hole O 2 such that the pixel electrode 217 only needs to pass through the first contact hole O 1 and the second contact hole O 2 and the drain D electrical connection.
  • the array substrate 21 has other structures of the prior art, for example, further includes a protective layer formed on the pixel electrode 217 and the common electrode 218, which will not be described herein.
  • the black matrix 216 is designed to be used for both the light shielding and the insulating layer between the pixel electrode 217 and the color filter layer 215.
  • the black matrix 216 is replaced by the first embodiment.
  • the second flat passivation layer 115 PFA layer
  • the black matrix 216 is not disposed on the color filter substrate 22, the color film substrate 22 may not need to be provided with a third flat blunt covering the black matrix 121 shown in FIG. Layer 122.
  • the liquid crystal display panel 20 of the embodiment of the present invention has fewer layer structures than the prior art, thereby reducing the type and number of masks required for the process, simplifying the process and reducing the production cost.
  • the black matrix 216 and the data line 213 of the embodiment of the present invention are disposed on the same substrate, and the black matrix 216 (ie, the black matrix 216 of the second region) and the data line 213 are disposed. to shorten the distance, it is possible to minimize the light pixels P 1 via two adjacent emitting pixel P, thereby reducing the light leakage in a large viewing angle.
  • FIG. 3 is a flow chart showing a method of fabricating an array substrate according to an embodiment of the present invention for manufacturing the array substrate 21 shown in FIG. As shown in connection with Figures 2 to 4, the method includes:
  • S31 sequentially forming a gate electrode, an insulating layer, and an active semiconductor layer on the substrate;
  • the substrate 211 is used to form the array substrate 21 of the liquid crystal display panel 20, which may be a glass substrate, a plastic substrate or a flexible substrate.
  • a gate electrode 2111 can be formed on the substrate 211 by, for example, chemical vapor deposition (CVD), vacuum evaporation, plasma enhanced chemical vapor deposition (PECVD), sputtering, or the like.
  • the gate 2111 and the active semiconductor layer 2113 having a predetermined pattern may be formed by having two photomasks, respectively.
  • the source S and the drain D and the data line 213 may be formed by using the same mask, that is, the source S and the drain D and the data line 213 are formed by the same mask process. Of course, it can also be used Different reticle processes form source S and drain D and data line 213.
  • a whole flat passivation layer 214 may be etched by using an etchant containing phosphoric acid, nitric acid, acetic acid, and deionized water to obtain a flat passivation layer 214 having a first contact hole O 1 , of course. Dry etching can also be used.
  • the color filter layer two pixels P 1, P 2 adjacent 215 allows through light of different colors, and both the color filter layer 215 is formed by the same process.
  • the black matrix includes a first region and a second region, the black matrix of the first region is corresponding to the source and the drain, and the black matrix of the second region is corresponding to the data line.
  • the black matrix of the first region is formed with a second contact hole communicating with the first contact hole and the third contact hole;
  • the step of forming the black matrix 216 may specifically be: forming a full surface light shielding layer on the flat passivation layer 214, and then patterning the light shielding layer to form a black matrix 216, and the patterning process may be etching.
  • a black matrix 216 having the structure shown in FIG. 2 can be directly formed on the flat passivation layer 214 by using a photomask.
  • the array substrate 21 also has other existing structures, for example, a protective layer for isolating the liquid crystal 23, and therefore, after forming the pixel electrode 217 and the common electrode 218, the method further includes: at the pixel electrode 217 and the common Electrode 218 forms a protective layer.
  • the color filter layer 215 does not need to open the third contact hole O 3 , and the array substrate of the embodiment of the present invention
  • the manufacturing method is shown in Figure 5, including:
  • S51 sequentially forming a gate electrode, an insulating layer, and an active semiconductor layer on the substrate;
  • S53 forming a planar passivation layer on the source and drain, the data line and the insulating layer, the flat passivation layer being formed with a first contact hole exposing the surface of the drain;
  • the black matrix includes a first region and a second region, the black matrix of the first region is corresponding to the source and the drain, and the black matrix of the second region is corresponding to the data line.
  • the black matrix of the first region is formed with a second contact hole communicating with the first contact hole;
  • S55 forming a pixel electrode on the black matrix of the first region and the first contact hole and the second contact hole, and the pixel electrode is electrically connected to the drain through the first contact hole and the second contact hole;
  • the drain D is electrically connected.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Liquid Crystal (AREA)

Abstract

一种液晶显示面板、阵列基板及其制造方法，设计黑矩阵（216）既用于遮光，又可以作为像素电极（217）与其他结构之间的绝缘层，从而减少所使用的光罩的类型及数量，简化制程并降低生产成本，并且，位于数据线（213）上方的黑矩阵（216）与数据线（213）之间的距离缩短，可以避免某一像素的光线不会经由相邻像素出射，从而减少大视角漏光。

Description

液晶显示面板、阵列基板及其制造方法 【技术领域】
本发明涉及液晶显示技术领域，具体而言涉及一种阵列基板及其制造方法和具有该阵列基板的液晶显示面板。
【背景技术】
当前，液晶显示器(Liquid Crystal Display，LCD)的制造工艺复杂，尤其是液晶显示面板的层结构较多，例如图1所示，液晶显示面板10包括相对间隔的第一基板11和第二基板12以及填充于两者之间的液晶13，第一基板11包括TFT(Thin Film Transistor，薄膜晶体管)111、数据线112、第一平坦钝化层(Over coat)113、彩色滤光片层114、第二平坦钝化层115、像素电极116以及公共电极117，第二平坦钝化层115又称PFA(Polytetrafluoro-Ethylene，聚四氟乙烯)层，第二基板12包括黑矩阵121和第三平坦钝化层122。可见，制造上述层结构所需的光罩(Mask)的类型及数量较多，制造工艺繁杂，生产成本较高。
另外，由于公共电极117和遮光的黑矩阵121分设于两个基板上，两者距离较远，因此在大视角观看时，某一像素的光线(图中箭头所示)会经由相邻像素出射，从而导致大视角观看时容易漏光。
【发明内容】
鉴于此，本发明提供一种液晶显示面板、阵列基板及其制造方法，能够减少制造所使用的光罩的类型及数量，并减少大视角漏光。
本发明提供的一种阵列基板的制造方法，包括：在基板上依次形成栅极、绝缘层、有源半导体层；在有源半导体层上形成源极和漏极；在绝缘层上形成数据线；在源极和漏极、数据线和绝缘层上形成平坦钝化层，平坦钝化层形成有暴露漏极的表面的第一接触孔；在平坦钝化层上形成黑矩阵，黑矩阵包括第一区域和第二区域，第一区域的黑矩阵对应位于源极和漏极的上方，第二区域的黑矩阵对应位于数据线的上方，第一区域的黑矩阵形成有与第一接触孔相通的第二接触孔；在第一区域的黑矩阵上以及第 一接触孔和第二接触孔内形成像素电极，像素电极可通过第一接触孔和第二接触孔与漏极电连接；在第二区域的黑矩阵上形成公共电极，公共电极和像素电极在阵列基板上交替排布。
其中，形成平坦钝化层的步骤和形成黑矩阵的步骤之间，所述方法还包括：在平坦钝化层上形成彩色滤光片层，彩色滤光片层形成有与第一接触孔和第二接触孔相通的第三接触孔，以使像素电极通过第一接触孔、第二接触孔以及第三接触孔与漏极电连接。
其中，源极和漏极与数据线经同一光罩制程形成。
其中，在平坦钝化层上形成黑矩阵的步骤包括：在平坦钝化层上形成一整面的遮光层；对遮光层进行图案化制程以形成黑矩阵。
其中，在形成像素电极和公共电极的步骤之后，所述方法还包括：在像素电极和公共电极上形成保护层。
本发明提供的一种阵列基板，包括：基板；依次形成于基板上的栅极、绝缘层、有源半导体层；形成于有源半导体层上的源极和漏极；形成于绝缘层上的数据线；平坦钝化层，形成于源极和漏极、数据线和绝缘层上，平坦钝化层形成有暴露漏极的表面的第一接触孔；黑矩阵，形成于平坦钝化层上且包括第一区域和第二区域，第一区域的黑矩阵对应位于源极和漏极的上方，第二区域的黑矩阵对应位于数据线的上方，第一区域的黑矩阵形成有与第一接触孔相通的第二接触孔；像素电极，形成于第一区域的黑矩阵上以及第一接触孔和第二接触孔内，以使像素电极通过第一接触孔和第二接触孔与漏极电连接；公共电极，形成于第二区域的黑矩阵上，公共电极和像素电极在阵列基板上交替排布。
其中，所述阵列基板还包括：彩色滤光片层，形成于平坦钝化层和黑矩阵之间，且彩色滤光片层形成有与第一接触孔和第二接触孔相通的第三接触孔，以使像素电极通过所述第一接触孔、所述第二接触孔以及所述第三接触孔与所述漏极电连接。
其中，源极和漏极与数据线经同一光罩制程形成。
其中，阵列基板还包括：保护层，形成于像素电极和公共电极上。
本发明提供的一种液晶显示面板，包括相对间隔设置的第一基板和第二基板，以及填充于第一基板和第二基板之间的液晶，第一基板和第二基 板中的一者为阵列基板，该阵列基板包括：基板；依次形成于基板上的栅极、绝缘层、有源半导体层；形成于有源半导体层上的源极和漏极；形成于绝缘层上的数据线；平坦钝化层，形成于源极和漏极、数据线和绝缘层上，平坦钝化层形成有暴露漏极的表面的第一接触孔；黑矩阵，形成于平坦钝化层上且包括第一区域和第二区域，第一区域的黑矩阵对应位于源极和漏极的上方，第二区域的黑矩阵对应位于数据线的上方，第一区域的黑矩阵形成有与第一接触孔相通的第二接触孔；像素电极，形成于第一区域的黑矩阵上以及第一接触孔和第二接触孔内，以使像素电极通过第一接触孔和第二接触孔与漏极电连接；公共电极，形成于第二区域的黑矩阵上，公共电极和像素电极在阵列基板上交替排布。
其中，所述阵列基板还包括：彩色滤光片层，形成于平坦钝化层和黑矩阵之间，且彩色滤光片层形成有与第一接触孔和第二接触孔相通的第三接触孔，以使像素电极通过所述第一接触孔、所述第二接触孔以及所述第三接触孔与所述漏极电连接。
其中，源极和漏极与数据线经同一光罩制程形成。
其中，阵列基板还包括：保护层，形成于像素电极和公共电极上。
本发明实施例的液晶显示面板、阵列基板及其制造方法，设计黑矩阵既用于遮光，又可以作为像素电极与其他结构之间的绝缘层，从而减少所使用的光罩的类型及数量，简化制程并降低生产成本，并且，位于数据线上方的黑矩阵与数据线之间的距离缩短，可以避免某一像素的光线不会经由相邻像素出射，从而减少大视角漏光。
【附图说明】
图1是现有技术一实施例的液晶显示面板的结构剖视图；
图2是本发明一实施例的液晶显示面板的结构剖视图；
图3是本发明一实施例的阵列基板的制造方法的流程示意图；
图4是采用图3所示方法制造阵列基板的场景示意图；
图5是本发明另一实施例的阵列基板的制造方法的流程示意图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明所提供的示例性的实施例的技术方案进行清楚、完整地描述。
图2是本发明一实施例的液晶显示面板的结构剖视图。如图2所示，所述液晶显示面板20包括相对间隔设置的阵列基板(Array Substrate，又称Thin Film Transistor Substrate，TFT基板或薄膜晶体管基板)21和彩膜基板(Color Filter，CF基板或彩色滤光片基板)22，以及夹持于阵列基板21和彩膜基板22之间的液晶(液晶分子)23，其中，液晶23位于阵列基板21和彩膜基板22叠加组合成的液晶盒内。
阵列基板21包括基板211以及形成于基板211上的薄膜晶体管212、数据线213、平坦钝化层214、彩色滤光片层215、黑矩阵216、像素电极217以及公共电极218。其中，薄膜晶体管212包括依次形成于基板211上的栅极2111、绝缘层2112、有源半导体层(Active Semiconductor Layer，AS)2113以及形成于有源半导体层2113上的源极S和漏极D，绝缘层2112即为栅极绝缘层(Gate Insulation Layer，GI)；数据线213形成于绝缘层2112上，且与薄膜晶体管212间隔设置；平坦钝化层214形成于源极S和漏极D、数据线213和绝缘层2112上，且形成有暴露漏极D的表面的第一接触孔O1；彩色滤光片层215形成于平坦钝化层214上，且形成有与第一接触孔O1相通的第三接触孔O3；黑矩阵216形成于平坦钝化层214上，使得彩色滤光片层215位于平坦钝化层214和黑矩阵216之间，黑矩阵216包括第一区域和第二区域，第一区域的黑矩阵216对应位于源极S和漏极D的上方，且形成有与第一接触孔O1和第三接触孔O3相通的第二接触孔O2，第二区域的黑矩阵216对应位于数据线213的上方；像素电极217形成于第一区域的黑矩阵216上以及第一接触孔O1和第二接触孔O2内，以使像素电极217通过第一接触孔O1、第二接触孔O2和第三接触孔O3与漏极D电连接；公共电极218形成于第二区域的黑矩阵216上，且公共电极218与像素电极217在阵列基板21上交替排布，此时所述液晶显示面板20可视为IPS(In-Plane Switching，横向电场效应显示)模式。
应该理解，本发明其他实施例可将彩色滤光片层215形成于图2所示的彩膜基板22的透明基板221上，此时彩色滤光片层215无需开设所述第三接触孔O3，对应地，具有上述结构的黑矩阵216直接形成于平坦钝化层 214上，第一区域的黑矩阵216形成的第二接触孔O2直接与第一接触孔O1相通，像素电极217形成于第一区域的黑矩阵216上以及第一接触孔O1和第二接触孔O2内，以使像素电极217只需通过第一接触孔O1和第二接触孔O2与漏极D电连接。
当然，阵列基板21还具有现有技术的其他结构，例如还包括形成于像素电极217和公共电极218上的保护层，此处不予赘述。
本发明实施例设计黑矩阵216既用于遮光，又可以作为像素电极217与彩色滤光片层215之间的绝缘层，与图1所示现有技术相比，黑矩阵216替换图1所示的第二平坦钝化层115(PFA层)，并且，由于黑矩阵216没有设置于彩膜基板22上，因此彩膜基板22可以无需设置覆盖图1所示黑矩阵121的第三平坦钝化层122。可见，与现有技术相比，本发明实施例的液晶显示面板20的层结构较少，从而能够减少制程所需的光罩的类型及数量，简化制程并降低生产成本。
另外，与图1所示现有技术相比，本发明实施例的黑矩阵216和数据线213设置于同一基板上，黑矩阵216(即第二区域的黑矩阵216)与数据线213之间的距离缩短，因此能够尽可能减少像素P1的光线经由相邻像素P2出射，从而减少大视角观看时的漏光。
图3是本发明一实施例的阵列基板的制造方法的流程示意图，用于制造图2所示阵列基板21。结合图2-图4所示，所述方法包括：
S31：在基板上依次形成栅极、绝缘层、有源半导体层；
如图4所示，基板211用于形成液晶显示面板20的阵列基板21，所述基板211可为玻璃基体、塑料基体或可挠式基体。
本发明实施例可采用例如化学气相沉积(Chemical vapor deposition，CVD)、真空蒸镀、等离子化学气相沉积(Plasma Enhanced Chemical vapor deposition，PECVD)、溅射等方法在基板211上形成栅极2111、绝缘层2112、有源半导体层2113。在其他实施例中，可采用具有两个光罩分别形成具有预定图案的栅极2111和有源半导体层2113。
S32：在有源半导体层上形成源极和漏极、在绝缘层上形成数据线；
参阅图4所示，可采用同一光罩形成源极S和漏极D以及数据线213，即源极S和漏极D与数据线213经同一光罩制程形成。当然，也可以采用 不同光罩制程形成源极S和漏极D以及数据线213。
S33：在源极和漏极、数据线和绝缘层上形成平坦钝化层，平坦钝化层形成有暴露漏极的表面的第一接触孔；
本发明实施例可以利用包含有磷酸、硝酸、醋酸以及去离子水的蚀刻液对一整片的平坦钝化层214进行蚀刻，从而得到具有第一接触孔O1的平坦钝化层214，当然也可以采用干法蚀刻。
S34：在平坦钝化层上形成彩色滤光片层，彩色滤光片层形成有与第一接触孔相通的第三接触孔；
结合图2所示，相邻两个像素P1、P2的彩色滤光片层215允许不同颜色的光透过，且两者的彩色滤光片层215可由同一制程形成。
S35：在平坦钝化层上形成黑矩阵，黑矩阵包括第一区域和第二区域，第一区域的黑矩阵对应位于源极和漏极的上方，第二区域的黑矩阵对应位于数据线的上方，第一区域的黑矩阵形成有与第一接触孔和第三接触孔相通的第二接触孔；
其中，形成黑矩阵216的步骤具体可以为：在平坦钝化层214上形成一整面的遮光层，而后对遮光层进行图案化制程以形成黑矩阵216，该图案化制程可以为刻蚀。本发明实施例还可以采用光罩在平坦钝化层214上直接形成具有图2所示结构的黑矩阵216。
S36：在第一区域的黑矩阵上以及第一接触孔、第二接触孔和第三接触孔内形成像素电极，像素电极可通过第一接触孔、第二接触孔和第三接触孔与漏极电连接；
S37：在第二区域的黑矩阵上形成公共电极，公共电极和像素电极在阵列基板上交替排布。
当然，阵列基板21还具有现有的其他结构，例如还包括用于隔绝液晶23的保护层，因此，在形成像素电极217和公共电极218之后，所述方法还包括：在像素电极217和公共电极218形成保护层。
对于彩色滤光片层215形成于图2所示的彩膜基板22的透明基板221上的设计，彩色滤光片层215无需开设所述第三接触孔O3，本发明实施例的阵列基板的制造方法如图5所示，包括：
S51：在基板上依次形成栅极、绝缘层、有源半导体层；
S52：在有源半导体层上形成源极和漏极、在绝缘层上形成数据线；
S53：在源极和漏极、数据线和绝缘层上形成平坦钝化层，平坦钝化层形成有暴露漏极的表面的第一接触孔；
S54：在平坦钝化层上形成黑矩阵，黑矩阵包括第一区域和第二区域，第一区域的黑矩阵对应位于源极和漏极的上方，第二区域的黑矩阵对应位于数据线的上方，第一区域的黑矩阵形成有与第一接触孔相通的第二接触孔；
S55：在第一区域的黑矩阵上以及第一接触孔和第二接触孔内形成像素电极，像素电极可通过第一接触孔和第二接触孔与漏极电连接；
S56：在第二区域的黑矩阵上形成公共电极，公共电极和像素电极在阵列基板上交替排布。
也就是说，具有图2所示结构的黑矩阵216直接形成于平坦钝化层214上，第一区域的黑矩阵216形成的第二接触孔O2直接与第一接触孔O1相通，像素电极217形成于第一区域的黑矩阵216上以及第一接触孔O1和第二接触孔O2内，以使像素电极217只需通过第一接触孔O1和第二接触孔O2与漏极D电连接。
在此基础上，以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，例如各实施例之间技术特征的相互结合，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (13)

  1. 一种阵列基板的制造方法，其中，所述方法包括：
    在基板上依次形成栅极、绝缘层、有源半导体层；
    在所述有源半导体层上形成源极和漏极；
    在所述绝缘层上形成数据线；
    在所述源极和漏极、所述数据线和所述绝缘层上形成平坦钝化层，所述平坦钝化层形成有暴露漏极的表面的第一接触孔；
    在所述平坦钝化层上形成黑矩阵，所述黑矩阵包括第一区域和第二区域，所述第一区域的黑矩阵对应位于所述源极和所述漏极的上方，所述第二区域的黑矩阵对应位于所述数据线的上方，所述第一区域的黑矩阵形成有与所述第一接触孔相通的第二接触孔；
    在所述第一区域的黑矩阵上以及所述第一接触孔和所述第二接触孔内形成像素电极，所述像素电极可通过所述第一接触孔和所述第二接触孔与所述漏极电连接；以及
    在所述第二区域的黑矩阵上形成公共电极，所述公共电极和所述像素电极在所述阵列基板上交替排布。
  2. 根据权利要求1所述的方法，其中，形成所述平坦钝化层的步骤和形成所述黑矩阵的步骤之间，所述方法还包括：
    在所述平坦钝化层上形成彩色滤光片层，所述彩色滤光片层形成有与所述第一接触孔和所述第二接触孔相通的第三接触孔，以使所述像素电极通过所述第一接触孔、所述第二接触孔以及所述第三接触孔与所述漏极电连接。
  3. 根据权利要求1所述的方法，其中，所述源极和漏极与所述数据线经同一光罩制程形成。
  4. 根据权利要求1所述的方法，其中，
    在所述平坦钝化层上形成黑矩阵的步骤包括：
    在所述平坦钝化层上形成一整面的遮光层；
    对所述遮光层进行图案化制程以形成所述黑矩阵。
  5. 根据权利要求1所述的方法，其中，在形成所述像素电极和所述公 共电极的步骤之后，所述方法还包括：
    在所述像素电极和所述公共电极上形成保护层。
  6. 一种阵列基板，其中，所述阵列基板包括：
    基板；
    依次形成于所述基板上的栅极、绝缘层、有源半导体层；
    形成于所述有源半导体层上的源极和漏极；
    形成于所述绝缘层上的数据线；
    平坦钝化层，形成于所述源极和漏极、所述数据线和所述绝缘层上，所述平坦钝化层形成有暴露漏极的表面的第一接触孔；
    黑矩阵，形成于所述平坦钝化层上且包括第一区域和第二区域，所述第一区域的黑矩阵对应位于所述源极和所述漏极的上方，所述第二区域的黑矩阵对应位于所述数据线的上方，所述第一区域的黑矩阵形成有与所述第一接触孔相通的第二接触孔；
    像素电极，形成于所述第一区域的黑矩阵上以及所述第一接触孔和所述第二接触孔内，以使所述像素电极通过所述第一接触孔和所述第二接触孔与所述漏极电连接；以及
    公共电极，形成于所述第二区域的黑矩阵上，所述公共电极和所述像素电极在所述阵列基板上交替排布。
  7. 根据权利要求6所述的阵列基板，其中，
    所述阵列基板还包括：
    彩色滤光片层，形成于所述平坦钝化层和所述黑矩阵之间，且所述彩色滤光片层形成有与所述第一接触孔和所述第二接触孔相通的第三接触孔，以使所述像素电极通过所述第一接触孔、所述第二接触孔以及所述第三接触孔与所述漏极电连接。
  8. 根据权利要求6所述的阵列基板，其中，所述源极和漏极与所述数据线经同一光罩制程形成。
  9. 根据权利要求6所述的阵列基板，其中，
    所述阵列基板进一步包括：
    保护层，形成于所述像素电极和所述公共电极上。
  10. 一种液晶显示面板，其中，所述液晶显示面板包括相对间隔设置的 第一基板和第二基板，以及填充于所述第一基板和所述第二基板之间的液晶，其中，所述第一基板和所述第二基板中的一者为上述阵列基板，所述阵列基板包括：
    基板；
    依次形成于所述基板上的栅极、绝缘层、有源半导体层；
    形成于所述有源半导体层上的源极和漏极；
    形成于所述绝缘层上的数据线；
    平坦钝化层，形成于所述源极和漏极、所述数据线和所述绝缘层上，所述平坦钝化层形成有暴露漏极的表面的第一接触孔；
    黑矩阵，形成于所述平坦钝化层上且包括第一区域和第二区域，所述第一区域的黑矩阵对应位于所述源极和所述漏极的上方，所述第二区域的黑矩阵对应位于所述数据线的上方，所述第一区域的黑矩阵形成有与所述第一接触孔相通的第二接触孔；
    像素电极，形成于所述第一区域的黑矩阵上以及所述第一接触孔和所述第二接触孔内，以使所述像素电极通过所述第一接触孔和所述第二接触孔与所述漏极电连接；以及
    公共电极，形成于所述第二区域的黑矩阵上，所述公共电极和所述像素电极在所述阵列基板上交替排布。
  11. 根据权利要求10所述的液晶显示面板，其中，
    所述阵列基板还包括：
    彩色滤光片层，形成于所述平坦钝化层和所述黑矩阵之间，且所述彩色滤光片层形成有与所述第一接触孔和所述第二接触孔相通的第三接触孔，以使所述像素电极通过所述第一接触孔、所述第二接触孔以及所述第三接触孔与所述漏极电连接。
  12. 根据权利要求10所述的液晶显示面板，其中，所述源极和漏极与所述数据线经同一光罩制程形成。
  13. 根据权利要求10所述的液晶显示面板，其中，
    所述阵列基板进一步包括：
    保护层，形成于所述像素电极和所述公共电极上。
PCT/CN2016/072663 2016-01-05 2016-01-29 液晶显示面板、阵列基板及其制造方法 Ceased WO2017117834A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/914,253 US9933673B2 (en) 2016-01-05 2016-01-29 Liquid crystal display panel, array substrate and manufacturing for the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201610009748.7A CN105655292B (zh) 2016-01-05 2016-01-05 液晶显示面板、阵列基板及其制造方法
CN201610009748.7 2016-01-05

Publications (1)

Publication Number Publication Date
WO2017117834A1 true WO2017117834A1 (zh) 2017-07-13

Family

ID=56491801

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/072663 Ceased WO2017117834A1 (zh) 2016-01-05 2016-01-29 液晶显示面板、阵列基板及其制造方法

Country Status (3)

Country Link
US (1) US9933673B2 (zh)
CN (1) CN105655292B (zh)
WO (1) WO2017117834A1 (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105633096B (zh) * 2016-01-05 2018-09-18 深圳市华星光电技术有限公司 液晶显示面板、tft基板及其制造方法
KR102460642B1 (ko) * 2016-02-03 2022-10-31 삼성디스플레이 주식회사 액정 표시 장치
KR102549444B1 (ko) * 2016-06-16 2023-06-29 삼성디스플레이 주식회사 표시 장치 및 이의 제조 방법
JP2018180451A (ja) * 2017-04-20 2018-11-15 株式会社ジャパンディスプレイ 液晶表示装置
CN107797352B (zh) * 2017-11-17 2020-06-05 深圳市华星光电半导体显示技术有限公司 阵列基板、显示面板、显示设备及阵列基板的制作方法
CN107861295A (zh) * 2017-11-24 2018-03-30 深圳市华星光电技术有限公司 一种阵列基板及其制备方法、显示面板
GB2581466A (en) * 2018-07-04 2020-08-26 Flexenable Ltd Control component for optoelectronic device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060290829A1 (en) * 2003-03-28 2006-12-28 Dong-Gyu Kim Liquid crystal display and thin film transistor array panel therefor
CN102236229A (zh) * 2010-05-04 2011-11-09 乐金显示有限公司 用于面内切换模式液晶显示装置的阵列基板
CN102629608A (zh) * 2012-03-31 2012-08-08 京东方科技集团股份有限公司 一种阵列基板及其制造方法和显示装置
CN103676376A (zh) * 2013-12-10 2014-03-26 深圳市华星光电技术有限公司 阵列基板及其制作方法及应用该阵列基板的液晶显示面板

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10319371A (ja) * 1997-05-22 1998-12-04 Hitachi Ltd アクティブマトリクス型液晶表示装置とその配向膜形成方法および配向膜の配向検証方法
KR100820104B1 (ko) * 2001-07-25 2008-04-07 엘지.필립스 엘시디 주식회사 액정 표시 장치 및 그의 제조 방법
KR100870700B1 (ko) * 2002-12-09 2008-11-27 엘지디스플레이 주식회사 액정표시장치용 어레이기판과 그 제조방법
GB2421833B (en) * 2004-12-31 2007-04-04 Lg Philips Lcd Co Ltd Liquid crystal display device and method for fabricating the same
KR100955382B1 (ko) * 2004-12-31 2010-04-29 엘지디스플레이 주식회사 액정표시장치 및 그 제조방법
US7808595B2 (en) * 2007-04-02 2010-10-05 Lg Display Co., Ltd. Array substrate for liquid crystal display device and manufacturing method of the same
US7898628B2 (en) * 2007-08-29 2011-03-01 Mitsubishi Electric Corporation Liquid crystal display device
KR101345171B1 (ko) * 2007-11-14 2013-12-27 엘지디스플레이 주식회사 액정표시장치 및 그 제조방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060290829A1 (en) * 2003-03-28 2006-12-28 Dong-Gyu Kim Liquid crystal display and thin film transistor array panel therefor
CN102236229A (zh) * 2010-05-04 2011-11-09 乐金显示有限公司 用于面内切换模式液晶显示装置的阵列基板
CN102629608A (zh) * 2012-03-31 2012-08-08 京东方科技集团股份有限公司 一种阵列基板及其制造方法和显示装置
CN103676376A (zh) * 2013-12-10 2014-03-26 深圳市华星光电技术有限公司 阵列基板及其制作方法及应用该阵列基板的液晶显示面板

Also Published As

Publication number Publication date
CN105655292B (zh) 2019-03-15
CN105655292A (zh) 2016-06-08
US9933673B2 (en) 2018-04-03
US20170255070A1 (en) 2017-09-07

Similar Documents

Publication Publication Date Title
WO2017117834A1 (zh) 液晶显示面板、阵列基板及其制造方法
US8692258B2 (en) Array substrate of TFT-LCD including a black matrix and method for manufacturing the same
CN102156369B (zh) 薄膜晶体管液晶显示阵列基板及其制造方法
JP5847061B2 (ja) アレイ基板及びその製造方法
JP4759089B2 (ja) 液晶表示装置の製造方法
US9971221B2 (en) Liquid crystal display panel, array substrate and manufacturing method for the same
CN105116655B (zh) 液晶显示面板、阵列基板及其制造方法
CN101819362B (zh) Tft-lcd阵列基板制造方法
WO2017008370A1 (zh) 阵列彩膜集成式液晶显示面板的制作方法及其结构
US20160195751A1 (en) Array substrate and manufacturing method thereof, and display device
US20160013210A1 (en) Array substrate, method for manufacturing the same, and display device
WO2018120691A1 (zh) 阵列基板及其制造方法、显示装置
WO2013139192A1 (zh) 触摸液晶显示装置、液晶显示面板及上部基板
WO2018170971A1 (zh) 阵列基板及其制作方法
US6982769B2 (en) Substrate for liquid-crystal display device and fabrication method thereof
WO2018170949A1 (zh) 液晶显示面板及其制造方法、阵列基板
WO2020228425A1 (zh) 阵列基板及其制造方法、显示面板、显示装置
US20100214518A1 (en) Tft-lcd array substrate and method for manufacturing the same
WO2014015617A1 (zh) 阵列基板及显示装置
WO2016106876A1 (zh) 薄膜晶体管阵列基板及其制造方法、显示装置
CN103681765B (zh) 显示面板及其制作方法、显示装置
WO2017031779A1 (zh) 阵列基板的制作方法及阵列基板
US7696027B2 (en) Method of fabricating display substrate and method of fabricating display panel using the same
CN107134432A (zh) 一种阵列基板制程
TWI526739B (zh) 液晶顯示設備及製造其之方法

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 14914253

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16882979

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16882979

Country of ref document: EP

Kind code of ref document: A1