WO2017077809A1 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device Download PDF

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Publication number
WO2017077809A1
WO2017077809A1 PCT/JP2016/079729 JP2016079729W WO2017077809A1 WO 2017077809 A1 WO2017077809 A1 WO 2017077809A1 JP 2016079729 W JP2016079729 W JP 2016079729W WO 2017077809 A1 WO2017077809 A1 WO 2017077809A1
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WO
WIPO (PCT)
Prior art keywords
protective film
layer
semiconductor device
support sheet
manufacturing
Prior art date
Application number
PCT/JP2016/079729
Other languages
French (fr)
Japanese (ja)
Inventor
正憲 山岸
明徳 佐藤
Original Assignee
リンテック株式会社
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Filing date
Publication date
Application filed by リンテック株式会社 filed Critical リンテック株式会社
Priority to JP2017548681A priority Critical patent/JP6876614B2/en
Publication of WO2017077809A1 publication Critical patent/WO2017077809A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68377—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating

Definitions

  • the present invention relates to a method for manufacturing a semiconductor device.
  • a bumped chip having electrodes such as bumps on the circuit surface of the chip is used.
  • the bumps of the bumped chip are bonded to the electrodes of the substrate. After bonding, the surface opposite to the bump formation surface (chip back surface) of the bumped chip may be exposed.
  • Patent Document 1 describes an energy ray curable chip protection film that is affixed to the back surface of a circuit forming surface of a wafer.
  • the film for chip protection described in Patent Document 1 has a release film and an energy ray curable protective film forming layer formed on the release film.
  • the energy is It is configured to satisfy the relationship of A ⁇ B before curing with a line and A> B after curing.
  • a protective film can be formed on the back surface of the chip.
  • the bump forming surface of the bumped chip is not exposed to the outside, no protective film or the like is provided.
  • the mounting substrate obtained by bonding the chip with bumps to the substrate is made of various materials having different linear expansion coefficients. For this reason, when the mounting substrate is heated or cooled, stress is applied to the bumps of the chip with bumps, which may cause cracks in the bumps. Thus, it may be required to protect the bump forming surface of the bumped chip.
  • an object of the present invention is to provide a method of manufacturing a semiconductor device in which a bump forming surface of a bumped chip is protected.
  • a plurality of bumps are formed on the energy ray curable resin layer of the first protective film forming sheet including the first support sheet and the energy ray curable resin layer.
  • the energy ray curable resin layer can be formed on the bump forming surface of the bumped wafer.
  • a 1st protective film can be formed in the bump formation surface of a wafer with a bump by hardening this energy beam curable resin layer. Since this energy ray-curable resin layer can be cured in a short time with energy rays, the first protective film can be efficiently formed. And the chip
  • a step of forming a second protective film forming layer on a surface opposite to the bump forming surface of the bumped wafer, and a second support sheet it is preferable that the method further includes a step of bonding to the second protective film forming layer.
  • the second protective film formation layer can be formed on the surface opposite to the bump formation surface of the bumped wafer. Further, the bumped wafer can be diced while the bumped wafer is supported by the bonded second support sheet.
  • the second protective film forming layer of the second protective film forming sheet including the second support sheet and the second protective film forming layer is formed on the bumped wafer. It is preferable to further include a step of bonding to the surface opposite to the bump forming surface.
  • the second protective film forming layer can be formed on the surface (back surface) opposite to the bump forming surface of the bumped wafer, and the second support sheet can also be formed.
  • a semiconductor device in which the back surface of the bumped chip is protected can be manufactured by curing the second protective film forming layer and forming the second protective film.
  • a semiconductor device in which the bump forming surface of the bumped chip is protected can be manufactured by bonding the bumped chip having the first protective film.
  • the first support sheet includes a first base material and a first pressure-sensitive adhesive layer, and the first pressure-sensitive adhesive layer is the energy beam curable resin layer. It is preferable that it touches. According to this configuration, the first support sheet and the energy ray curable resin layer can be firmly fixed while the bumped wafer is processed. On the other hand, after processing the wafer with bumps, the first support sheet can be easily peeled from the energy ray curable resin layer or the first protective film.
  • the first protective film is preferably a bump protective film that covers at least a part of the bump.
  • the first protective film covers at least a part of the bump, it is possible to prevent the occurrence of a crack at the base portion of the bump generated in the bumped chip after mounting.
  • the first protective film forming sheet is a sheet for forming the first protective film on the bump forming surface of the bumped wafer.
  • the first protective film forming sheet 1 used in the present embodiment includes a first support sheet 11 including a first base material 111 and a first pressure-sensitive adhesive layer 112, and an energy ray curable resin layer 12. And. The surface of the energy ray curable resin layer 12 may be protected by a release film or the like until it is attached to the wafer.
  • the first support sheet includes the first base material and the first pressure-sensitive adhesive layer, but the first pressure-sensitive adhesive layer may not be provided.
  • a first support sheet 11 supports the adherend while the adherend is being processed.
  • the 1st support sheet 11 can be suitably selected according to the intended purpose. For example, when the first support sheet 11 is intended to be supported when back grinding, a known back grinding tape can be used.
  • a known support can be used, and for example, a plastic film or the like can be used.
  • plastic films polyethylene film, polypropylene film, polybutene film, polybutadiene film, polymethylpentene film, polyvinyl chloride film, vinyl chloride copolymer film, polyethylene terephthalate film, polyethylene naphthalate film, polybutylene terephthalate film, polyurethane film , Ethylene vinyl acetate copolymer film, ionomer resin film, ethylene / (meth) acrylic acid copolymer film, ethylene / (meth) acrylic acid ester copolymer film, polystyrene film, polycarbonate film, polyimide film, and fluororesin A film etc.
  • the thickness of the 1st base material 111 is 5 micrometers or more and 1000 micrometers or less normally, Preferably, they are 10 micrometers or more and 500 micrometers or less.
  • the 1st adhesive layer 112 can be formed using a well-known adhesive.
  • the pressure-sensitive adhesive include acrylic pressure-sensitive adhesives, rubber-based pressure-sensitive adhesives, silicone-based pressure-sensitive adhesives, and urethane-based pressure-sensitive adhesives.
  • the pressure-sensitive adhesive may be an energy ray curable type or a non-energy ray curable type.
  • the first pressure-sensitive adhesive layer 112 firmly fixes the first support sheet 11 and the energy ray curable resin layer 12 while the adherend is processed, and then the energy ray curable resin layer. It becomes easy to make 12 adhere to the adherend and peel from the first support sheet 11.
  • the 1st adhesive layer 112 is an energy ray hardening type, when it hardens
  • the thickness of the 1st adhesive layer 112 is 1 micrometer or more and 500 micrometers or less normally, Preferably, they are 3 micrometers or more and 100 micrometers or less.
  • the energy ray curable resin layer 12 can be formed using an energy ray curable resin composition containing a known energy ray curable compound. Since such an energy ray curable resin layer 12 contains an energy ray curable compound, when it is irradiated with energy rays, it is cured and becomes the first protective film 12a (see FIG. 3). And the bump formation surface of the chip
  • the energy ray-curable compound contains an energy ray-polymerizable group and is polymerized and cured when irradiated with energy rays. Examples of such energy beam curable compounds include energy beam polymerizable low molecular weight compounds and energy beam curable polymers. Examples of energy rays include ultraviolet rays (UV) and electron beams (EB). Among these, ultraviolet rays are preferable.
  • Examples of the energy ray polymerizable low molecular weight compounds include trimethylolpropane triacrylate, pentaerythritol triacrylate, pentaerythritol tetraacrylate, dipentaerythritol monohydroxypentaacrylate, dipentaerythritol hexaacrylate, 1,4-butylene glycol diacrylate, Examples thereof include acrylate compounds such as 1,6-hexanediol diacrylate, polyethylene glycol diacrylate, oligoester acrylate, urethane acrylate oligomer, epoxy-modified acrylate, polyether acrylate, and itaconic acid oligomer.
  • the energy ray curable polymer a known energy ray curable polymer can be used.
  • an energy ray curable polymer in which an energy ray polymerizable group is bonded to the main chain or side chain of the binder polymer can be mentioned.
  • the energy ray curable resin composition may contain various additive components such as a chain transfer agent, a colorant, a filler, a binder polymer component, and a thermosetting component.
  • the thickness of the energy ray curable resin layer 12 is usually 1 ⁇ m or more and 500 ⁇ m or less, and preferably 3 ⁇ m or more and 100 ⁇ m or less.
  • the bumped wafer 2 used in the present embodiment includes a semiconductor wafer 21 and bumps 22 as shown in FIG.
  • the bumps 22 are formed on the circuit side of the semiconductor wafer 21. Further, in some cases, the surface of the bumped wafer 2 where the bumps 22 are formed is referred to as a bump forming surface 2A, and the surface of the bumped wafer 2 where the bumps 22 are not formed is referred to as a back surface 2B.
  • the semiconductor wafer 21 a known semiconductor wafer can be used.
  • a silicon wafer or the like can be used.
  • the thickness of the semiconductor wafer 21 is usually 10 ⁇ m or more and 1000 ⁇ m or less, and preferably 50 ⁇ m or more and 750 ⁇ m or less.
  • a known conductive material can be used, for example, solder or the like can be used.
  • solder a known solder material can be used.
  • lead-free solder containing tin, silver and copper can be used.
  • the height of the bump 22 is usually 5 ⁇ m or more and 1000 ⁇ m or less, and preferably 50 ⁇ m or more and 500 ⁇ m or less.
  • the cross-sectional shape viewed from the side of the bump 22 is not particularly limited, but may be a semicircular shape, a semielliptical shape, a circular shape, a triangular shape, a rectangular shape, a trapezoidal shape, or the like.
  • a ball bump, a mushroom bump, a stud bump, a cone bump, a cylinder bump, a dot bump, a cube bump, etc. are mentioned.
  • 3A to 3E are explanatory views showing the method of manufacturing the semiconductor device according to the first embodiment.
  • the resin layer 12 is cured with energy rays on the bump forming surface 2A of the bumped wafer 2 by a method including a step of bonding the resin layer 12 to the bump forming surface 2A of the bumped wafer 2 (first protective film forming sheet adhering step).
  • the resin layer 12 is formed.
  • the process (2nd support sheet sticking process) of bonding the 2nd adhesive layer 32 of the 2nd support sheet 3 to the back surface 2B of the wafer 2 with bumps is performed.
  • the energy ray curable resin layer 12 is irradiated with energy rays and cured to form a first protective film 12a (first protective film forming step), and a first support sheet 11 is peeled off (first support sheet peeling step).
  • the 1st support sheet 11 is peeled from the 1st protective film 12a after hardening by the method provided with these processes.
  • a step of dicing the bumped wafer 2 having the first protective film 12a (dicing step), and a bump having the first protective film 12a diced into individual pieces
  • a process (bonding process) of picking up the attached chip 2a and bonding it to the substrate 4 as an adherend is performed.
  • the semiconductor device 100 in which the bump forming surface 2A of the bumped chip 2a is protected is manufactured.
  • the first protective film forming sheet sticking step, the second support sheet sticking step, the first protective film forming step, the first support sheet peeling step, the dicing step, and the bonding step will be described in more detail.
  • the energy ray curable resin layer 12 of the first protective film forming sheet 1 is formed on the surface on which the bumps 22 of the bumped wafer 2 are formed. Affixed to (bump forming surface 2A).
  • bump forming surface 2A it is preferable that the bumps 22 of the wafer 2 with bumps protrude from the energy beam curable resin layer 12 as shown in FIG. 3A.
  • a sticking method a known method can be adopted and is not particularly limited, but a method by pressure bonding is preferable.
  • the crimping is usually performed while pressing with a crimping roll or the like.
  • the conditions for pressure bonding are not particularly limited, but the pressure bonding temperature is preferably 40 ° C. or higher and 120 ° C. or lower.
  • the roll pressure is preferably from 0.1 MPa to 20 MPa.
  • the crimping speed is preferably 1 mm / sec or more and 20 mm / sec or less.
  • the second pressure-sensitive adhesive layer 32 of the second support sheet 3 is attached to the surface (back surface 2B) opposite to the bump forming surface of the bumped wafer.
  • Match As a sticking method, a known method can be adopted and is not particularly limited, but a method by pressure bonding is preferable. The crimping is usually performed while pressing with a crimping roll or the like. The conditions for pressure bonding are not particularly limited and can be set as appropriate.
  • the second support sheet 3 a known support sheet can be used, and a support sheet similar to the first support sheet 11 can be used.
  • the 2nd support sheet 3 can be suitably selected according to the use purpose.
  • the second support sheet 3 when the second support sheet 3 is intended for support during dicing, a known dicing tape can be used.
  • the 2nd support sheet 3 is provided with the 2nd base material 31 and the 2nd adhesive layer 32, the 2nd adhesive layer 32 does not need to be.
  • the second base material 31 and the second pressure-sensitive adhesive layer 32 are the same as the first base material 111 and the first pressure-sensitive adhesive layer 112 in the first protective film forming sheet 1.
  • the energy ray curable resin layer 12 is irradiated with energy rays and cured to form the first protective film 12a.
  • the energy beam to be irradiated varies depending on the type of the energy beam curable resin layer 12 and is not particularly limited.
  • ultraviolet rays may be irradiated as energy rays.
  • the ultraviolet irradiation device is not particularly limited, and a known ultraviolet irradiation device can be used.
  • the light source include a high-pressure mercury lamp, a metal halide lamp, a xenon lamp, a deep UV lamp, and an ultraviolet LED.
  • the peak wavelength is preferably 180 nm or more and 420 nm or less.
  • the thickness of the first protective film 12 a is preferably smaller than the height of the bump 22, more preferably 0.001 to 0.99 times the height of the bump 22, It is particularly preferable that it is not less than 0.01 times and not more than 0.9 times the thickness dimension. If the thickness of the first protective film 12a is within the above range, the bump forming surface of the bumped chip 2a can be protected, and in particular, the occurrence of cracks in the bump 22 occurring on the bumped chip 2a after mounting is prevented. it can.
  • the first support sheet 11 is peeled from the first protective film 12a.
  • this 1st support sheet peeling process may be performed before the said 1st protective film formation process, it is more preferable to carry out before the said 1st protective film formation process.
  • the first pressure-sensitive adhesive layer 112 has ultraviolet curable properties
  • the first pressure-sensitive adhesive layer 112 is cured by irradiating ultraviolet light from the first support sheet 11 side in the first protective film forming step. Thereby, the adhesive force of the interface of the 1st adhesive layer 112 and the 1st protective film 12a falls, and it becomes easy to peel the 1st adhesive layer 112 from the 1st protective film 12a.
  • the bumped wafer 2 having the first protective film 12a is diced by a dicing blade.
  • the bumped wafer 2 having the first protective film 12a can be separated into the bumped chips 2a having the first protective film 12a.
  • the dicing apparatus is not particularly limited, and a known dicing apparatus can be used.
  • the dicing conditions are not particularly limited. In place of the dicing blade, a laser dicing method, a stealth dicing method, or the like may be used.
  • the second pressure-sensitive adhesive layer 32 is an ultraviolet curable type
  • the second pressure-sensitive adhesive layer 32 of the second support sheet 3 may be irradiated with ultraviolet light from the second support sheet 3 side after the dicing process.
  • the 2nd adhesive layer 32 hardens
  • tip 2a with bumps falls, and it becomes easy to pick up the chip
  • the bumped chip 2 a having the first protective film 12 a which is diced into individual pieces, is picked up, and the substrate 4 including the chip mounting substrate 41 and the electrode 42 is picked up. Adhere and fix.
  • the bumps 22 of the bumped chip 2 a are electrically connected to the electrodes 42 of the substrate 4.
  • the first protective film 12a is in contact with the bump forming surface 2A of the bumped chip 2a, but is not in contact with the chip mounting substrate 41 of the substrate 4.
  • FIG. 3E for convenience of explanation, the bonding surface between the bump 22 and the electrode 42 is clearly shown, but the present invention is not limited to this.
  • solder joint portion between the bump 22 and the electrode 42 since the solder of the bump 22 and the metal of the electrode 42 are melted together, there is no clear joint surface.
  • substrate 4 A lead frame, a wiring board, a silicon wafer with a circuit formed on the surface, a silicon chip, etc. can be used.
  • the material of the chip mounting substrate 41 is not particularly limited, and examples thereof include ceramic and plastic. Examples of the plastic include epoxy, bismaleimide triazine, and polyimide. As described above, the semiconductor device 100 in which the bump forming surface 2A of the bumped chip 2a is protected by the first protective film 12a can be manufactured.
  • the following operational effects can be achieved.
  • (1) By dicing the bumped wafer 2 having the first protective film 12a, the bumped chip 2a having the first protective film 12a is obtained.
  • the semiconductor device 100 in which the bump forming surface 2A of the bumped chip 2a is protected by the first protective film 12a (bump forming surface protective film) can be manufactured.
  • the 1st adhesive layer 112 is provided between the 1st base material 111 and the energy-beam curable resin layer 12, in a 2nd support sheet sticking process and a 1st protective film formation process, it is a 1st support sheet. 11 and the energy ray curable resin layer 12 can be firmly fixed. On the other hand, in the first support sheet peeling step, the first support sheet 11 can be easily peeled from the first protective film 12a. (4) Since the first protective film 12a covers at least a part of the bump 22, it is possible to prevent the bump 22 from being cracked in the bumped chip 2a after mounting. (5) The wafer 2 with bumps can be diced while being supported by the second support sheet 3.
  • the first protective film forming sheet 1 and the substrate 4 of the present embodiment are substantially the same as the first protective film forming sheet 1 and the substrate 4 of the first embodiment, respectively. Is omitted or simplified.
  • a step of bonding the second support sheet to the second protective film forming layer By curing the second protective film forming layer and forming the second protective film, the surface (back surface 2B) opposite to the bump forming surface of the bumped chip can be protected.
  • FIG. 4A to 4G are explanatory views showing a method for manufacturing a semiconductor device according to the second embodiment.
  • the resin layer 12 is cured with energy rays on the bump forming surface 2A of the bumped wafer 2 by a method including a step of bonding the resin layer 12 to the bump forming surface 2A of the bumped wafer 2 (first protective film forming sheet adhering step).
  • the resin layer 12 is formed.
  • FIG. 4A the energy ray curable property of the first protective film forming sheet 1 including the first support sheet 11 and the energy ray curable resin layer 12.
  • the resin layer 12 is cured with energy rays on the bump forming surface 2A of the bumped wafer 2 by a method including a step of bonding the resin layer 12 to the bump forming surface 2A of the bumped wafer 2 (first protective film forming sheet adhering step).
  • FIG. 4B a process of grinding the back surface 2B of the bumped wafer 2 (back grinding process) is performed.
  • FIG. 4C a step of forming the second protective film forming layer 5 on the back surface 2B of the bumped wafer 2 after grinding (second protective film forming step) is performed.
  • FIG. 4D a step of bonding the second adhesive layer 32 of the second support sheet 3 to the second protective film forming layer 5 on the back surface 2B side of the bumped wafer 2 (second support sheet pasting) Wearing process).
  • FIG. 4D a step of bonding the second adhesive layer 32 of the second support sheet 3 to the second protective film forming layer 5 on the back surface 2B side of the bumped wafer 2 (second support sheet pasting) Wearing process.
  • the energy ray-curable resin layer 12 is irradiated with energy rays and cured to form a first protective film 12a (first protective film forming step), and a first support sheet
  • the 1st support sheet 11 is peeled from the 1st protective film 12a after hardening by the method provided with these processes which perform the process (1st support sheet peeling process) which peels 11.
  • a step of dicing the wafer 2 with bumps having the first protective film 12a (dicing step), and a bump having the first protective film 12a diced into individual pieces
  • a process (bonding process) of picking up the attached chip 2a and bonding it to the substrate 4 as an adherend is performed.
  • the semiconductor device 100 in which the bump forming surface 2A and the back surface 2B of the bumped chip 2a are protected is manufactured.
  • the 1st protective film formation process about the 1st protective film formation sheet sticking process in this embodiment, the 1st protective film formation process, the 1st support sheet exfoliation process, the dicing process, and the bonding process, the 1st protective film formation sheet in the 1st embodiment
  • a method similar to the sticking step, the first protective film forming step, the first support sheet peeling step, the dicing step, and the bonding step can be employed.
  • the back surface 2B of the bumped wafer 2 is ground. In this way, the thickness of the bumped wafer 2 can be reduced.
  • the first support sheet 11 of the first protective film forming sheet 1 protects the bump forming surface 2A of the bumped wafer 2 and supports the bumped wafer 2.
  • the grinding apparatus used for back grinding is not particularly limited, and a known grinding apparatus can be used. Also, the backgrinding conditions are not particularly limited.
  • a second protective film forming layer 5 is formed on the back surface 2B of the bumped wafer 2 after grinding. Specifically, the sheet provided with the second protective film forming layer 5 is bonded to the back surface 2B of the bumped wafer 2 after grinding. And this 2nd protective film formation layer 5 can be hardened, and the 2nd protective film 5a can be formed. The back surface 2B of the bumped chip 2a can be protected by the second protective film 5a.
  • the second protective film forming layer 5 is formed using a thermosetting resin composition containing a known thermosetting resin or an energy ray curable resin composition containing a known energy ray curable compound. Can do.
  • the formation method of the 2nd protective film formation layer 5 is not specifically limited, For example, you may form using a well-known back surface protective film. Conditions for curing the second protective film forming layer 5 differ depending on the type of the second protective film forming layer 5 and are not particularly limited. For example, when the second protective film forming layer 5 is cured with ultraviolet rays, the ultraviolet rays may be irradiated. Moreover, what is necessary is just to heat-process, when the 2nd protective film formation layer 5 hardens
  • the step of forming the second protective film 5a may be performed, for example, before the first support sheet peeling step.
  • the process of forming the 2nd protective film 5a may be before a 2nd support sheet sticking process, may be before a dicing process, or may be before a bonding process.
  • the second pressure-sensitive adhesive layer 32 of the second support sheet 3 is attached to the second protective film forming layer 5 on the back surface 2B side of the bumped wafer 2.
  • a sticking method the same method as the sticking method in the 2nd support sheet sticking process in the said 1st Embodiment is employable.
  • the second protective film forming layer 5 can be formed on the surface (back surface 2B) opposite to the bump forming surface 2A of the bumped wafer 2. Then, by curing the second protective film forming layer 5 to form the second protective film 5a, the back surface 2B of the bumped chip 2a can be protected by the second protective film 5a (back surface protective film). (7) The back surface 2B of the bumped wafer 2 can be ground while the bumped wafer 2 is supported by the first support sheet 11. Further, the thickness of the bumped wafer 2 can be reduced.
  • the first protective film forming sheet 1 and the substrate 4 of the present embodiment are substantially the same as the first protective film forming sheet 1 and the substrate 4 of the first embodiment, respectively. Is omitted or simplified.
  • the second support film and the second protective film forming layer including the second protective film forming layer are used to provide the second support. The difference is that the sheet and the second protective film forming layer are formed in one step. First, the 2nd protective film formation sheet used for this embodiment is demonstrated.
  • the second protective film forming sheet 6 used in the present embodiment includes the second support sheet 3 including the second base material 31 and the second pressure-sensitive adhesive layer 32, and the second protective film forming layer 5. And.
  • the surface of the 2nd protective film formation layer 5 may be protected by the peeling film etc. until it adheres to a wafer.
  • the 2nd support sheet 3 and the 2nd protective film formation layer 5 may be the same size, However, It is not limited to this.
  • the size of the second protective film forming layer 5 may be the same size as the bumped wafer 2 or larger than the bumped wafer 2. In this case, the size of the second support sheet 3 may be larger than that of the second protective film forming layer 5.
  • the second base material 31 and the second pressure-sensitive adhesive layer 32 in the second support sheet 3 are the same as the second base material 31 and the second pressure-sensitive adhesive layer 32 in the first embodiment.
  • the second protective film forming layer 5 is the same as the second protective film forming layer 5 in the second embodiment.
  • FIGS. 6A to 6F are explanatory views showing a method for manufacturing a semiconductor device according to the third embodiment.
  • the resin layer 12 is cured with energy rays on the bump forming surface 2A of the bumped wafer 2 by a method including a step of bonding the resin layer 12 to the bump forming surface 2A of the bumped wafer 2 (first protective film forming sheet adhering step).
  • the resin layer 12 is formed.
  • a process of grinding the back surface 2B of the bumped wafer 2 (back grinding process) is performed.
  • the second protective film forming layer 5 of the second protective film forming sheet 6 including the second support sheet 3 and the second protective film forming layer 5 is formed on the bumped wafer 2 after grinding.
  • the second protective film forming layer 5 is formed on the back surface 2B of the bumped wafer 2 by a method including a step of bonding to the back surface 2B (second protective film forming sheet adhering step).
  • the energy ray curable resin layer 12 is irradiated with energy rays and cured to form a first protective film 12a (first protective film forming step), and a first support A step of peeling the sheet 11 (first support sheet peeling step) is performed.
  • the 1st support sheet 11 is peeled from the 1st protective film 12a after hardening by the method provided with these processes.
  • a step of dicing the bumped wafer 2 having the first protective film 12a (dicing step), and a bump having the first protective film 12a diced into individual pieces
  • a process (bonding process) of picking up the attached chip 2a and bonding it to the substrate 4 as an adherend is performed.
  • the semiconductor device 100 in which the bump forming surface 2A and the back surface 2B of the bumped chip 2a are protected is manufactured.
  • the 1st protective film formation process in this embodiment, the 1st protective film formation process, the 1st support sheet exfoliation process, the dicing process, and the bonding process, the 1st protective film formation sheet in the 1st embodiment
  • a method similar to the sticking step, the first protective film forming step, the first support sheet peeling step, the dicing step, and the bonding step can be employed.
  • the method similar to the back grinding process in the said 2nd Embodiment is employable.
  • the second protective film forming layer 5 of the second protective film forming sheet 6 is attached to the back surface 2B of the bumped wafer 2 after grinding. Match. In this way, the second protective film forming layer 5 and the second support sheet 3 can be formed on the back surface 2B of the bumped wafer 2 after grinding.
  • a sticking method a known method can be adopted and is not particularly limited, but a method by pressure bonding is preferable.
  • the crimping is usually performed while pressing with a crimping roll or the like.
  • the conditions for pressure bonding are not particularly limited, but the pressure bonding temperature is preferably 40 ° C. or higher and 120 ° C. or lower.
  • the roll pressure is preferably from 0.1 MPa to 20 MPa.
  • the crimping speed is preferably 1 mm / sec or more and 20 mm / sec or less.
  • the present invention is not limited to the above-described embodiments, and modifications, improvements and the like within the scope that can achieve the object of the present invention are included in the present invention.
  • the first protective film forming sheet 1 including the first support sheet 11 (the first base material 111 and the first pressure-sensitive adhesive layer 112) and the energy ray curable resin layer 12 is used.
  • the first protective film forming sheet 1 include laminated sheets as shown in the following (i) to (viii). Note that the slash indicates a layer separation.
  • first substrate / energy ray curable resin layer (ii) First substrate / first pressure-sensitive adhesive layer / energy ray curable resin layer (iii) First substrate / intermediate layer / energy ray curable resin Layer (iv) 1st base material / intermediate layer / first pressure-sensitive adhesive layer / energy ray curable resin layer (v) outermost layer / first base material / energy ray curable resin layer (vi) outermost layer / first base Material / first adhesive layer / energy ray curable resin layer (vii) outermost layer / first substrate / intermediate layer / energy ray curable resin layer (viii) outermost layer / first substrate / intermediate layer / energy ray curable resin layer (viii) outermost layer / first substrate / intermediate layer / first Adhesive layer / energy ray curable resin layer
  • the intermediate layer include a buffer layer, an easy-adhesion coat layer, and an antistatic layer.
  • the material for the intermediate layer is not particularly limited, and for example, various pressure-sensitive adhesive compositions such as acrylic, rubber-based, and silicone-based materials, ultraviolet curable resins, and thermoplastic elastomers are used.
  • the outermost layer include a slippery coat layer, a buffer layer, and an antistatic layer.
  • surface treatment may be given to the lamination surface (surface on which the energy ray curable resin layer, the first pressure-sensitive adhesive layer, or the intermediate layer is laminated) of the first base material.
  • the second support sheet 3 including the second base material 31 and the second pressure-sensitive adhesive layer 32 is used, but the present invention is not limited to this.
  • examples of the second support sheet 3 include single layer sheets and laminated sheets as shown in the following (i) to (viii).
  • the adherend second protective film forming layer 5 or semiconductor wafer 21 is shown.
  • Second substrate / adherent (ii) Second substrate / second pressure-sensitive adhesive layer / adherent (iii) Second substrate / intermediate layer / adherent (iv) Second substrate / intermediate layer / Second pressure-sensitive adhesive layer / adherend (v) Outermost layer / second base material / adherend (vi) Outermost layer / second base material / second pressure-sensitive adhesive layer / adherend (vii) Outermost layer / second base material / Intermediate layer / Adherent (viii) Outermost layer / Second substrate / Intermediate layer / Second pressure-sensitive adhesive layer / Adherent
  • the intermediate layer include an easy-adhesion coat layer, a buffer layer and an antistatic layer. It is done.
  • the material of the intermediate layer is the same as that of the intermediate layer in the first support sheet 11.
  • the outermost layer include a slippery coat layer, a buffer layer, and an antistatic layer.
  • surface treatment may be given to the lamination surface (the surface on which the adherend, the second pressure-sensitive adhesive layer, or the intermediate layer is laminated) of the second base material.
  • the first support sheet 11 and the second support sheet 3 are not particularly required to have heat resistance, but are not limited thereto.
  • a sheet having heat resistance may be used as the first support sheet 11 and the second support sheet 3. If a sheet having such heat resistance is used, it can be applied to a method for manufacturing a semiconductor device including a heating step.
  • the back grinding process is not performed, but the present invention is not limited to this.
  • a back grinding process may be performed after the first protective film forming sheet attaching process. In this case, the back surface 2 ⁇ / b> B of the bumped wafer 2 can be ground while the bumped wafer 2 is supported by the first support sheet 11.
  • the thickness of the bumped wafer 2 can be reduced.
  • the sheet made of the second protective film forming layer 5 is bonded to the back surface 2B of the bumped wafer 2 after grinding, but the present invention is not limited to this.
  • the second protective film forming layer 5 may be formed by applying and curing the resin composition on the back surface 2B of the bumped wafer 2 after grinding.
  • the present invention can be used in a method for manufacturing a semiconductor device.
  • SYMBOLS 1 Sheet for 1st protective film formation, 11 ... 1st support sheet, 12 ... Energy beam curable resin layer, 12a ... 1st protective film, 2 ... Wafer with bump, 22 ... Bump, 2A ... Bump formation surface, 2a DESCRIPTION OF SYMBOLS ... Chip with bump, 3 ... 2nd support sheet, 5 ... 2nd protective film formation layer, 5a ... 2nd protective film, 6 ... Sheet for 2nd protective film formation, 100 ... Semiconductor device.

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Abstract

This method for manufacturing a semiconductor device is characterized by including: a step in which an energy ray-curable resin layer (12) of a first protective film forming sheet (1), which comprises a first support sheet (11) and the energy ray-curable resin layer (12), is bonded to the bump-forming surface (2A) of a bump-equipped wafer (2), on which a plurality of bumps (22) are formed; a step in which the energy ray-curable resin layer (12) is exposed to an energy ray and is cured such that a first protective film (12a) is formed; a step in which the first support sheet (11) is detached; and a step in which the bump-equipped wafer (2) having the first protective film (12a) is diced.

Description

半導体装置の製造方法Manufacturing method of semiconductor device
　本発明は、半導体装置の製造方法に関する。 The present invention relates to a method for manufacturing a semiconductor device.
　近年、いわゆるフェースダウン（ｆａｃｅ　ｄｏｗｎ）方式と呼ばれる実装法を用いた半導体装置の製造が行われている。フェースダウン方式においては、チップの回路面の上にバンプなどの電極を有するバンプ付チップが用いられる。フェースダウン方式で実装する場合には、バンプ付チップのバンプが基板の電極と接合される。接合後には、バンプ付チップのバンプ形成面とは反対側の面（チップ裏面）は剥き出しの状態となることがある。 In recent years, semiconductor devices have been manufactured using a mounting method called a so-called face down method. In the face-down method, a bumped chip having electrodes such as bumps on the circuit surface of the chip is used. When mounting by the face-down method, the bumps of the bumped chip are bonded to the electrodes of the substrate. After bonding, the surface opposite to the bump formation surface (chip back surface) of the bumped chip may be exposed.
　例えば、特許文献１には、ウエハの回路形成面の裏面に貼り付けられるエネルギー線硬化型チップ保護用フィルムが記載されている。特許文献１に記載のチップ保護用フィルムは、剥離フィルムと、該剥離フィルム上に形成されたエネルギー線硬化型保護膜形成層とを有する。また、エネルギー線硬化型保護膜形成層をウエハに貼合した際のウエハからの剥離力をＡ、エネルギー線硬化型保護膜形成層の離型フィルムからの剥離力をＢとしたときに、エネルギー線による硬化前はＡ＜Ｂ、硬化後はＡ＞Ｂの関係を満たすように構成されている。 For example, Patent Document 1 describes an energy ray curable chip protection film that is affixed to the back surface of a circuit forming surface of a wafer. The film for chip protection described in Patent Document 1 has a release film and an energy ray curable protective film forming layer formed on the release film. Further, when the peeling force from the wafer when the energy ray curable protective film forming layer is bonded to the wafer is A and the peeling force from the release film of the energy ray curable protective film forming layer is B, the energy is It is configured to satisfy the relationship of A <B before curing with a line and A> B after curing.
特開２０１０－５６３２８号公報JP 2010-56328 A
　特許文献１に記載のような保護膜形成層付ダイシングシートを用いれば、チップ裏面に保護膜を形成できる。一方で、バンプ付チップのバンプ形成面は、外部に露出した状態とならないので、保護膜などは設けられていない。しかしながら、バンプ付チップを基板に接合した実装基板は、線膨張係数の異なる様々な材料からなる。そのため、この実装基板が加熱され、または冷却された際に、バンプ付チップのバンプに応力がかかり、バンプにクラックが生ずる場合がある。このように、バンプ付チップのバンプ形成面を保護することが求められる場合がある。 If a dicing sheet with a protective film forming layer as described in Patent Document 1 is used, a protective film can be formed on the back surface of the chip. On the other hand, since the bump forming surface of the bumped chip is not exposed to the outside, no protective film or the like is provided. However, the mounting substrate obtained by bonding the chip with bumps to the substrate is made of various materials having different linear expansion coefficients. For this reason, when the mounting substrate is heated or cooled, stress is applied to the bumps of the chip with bumps, which may cause cracks in the bumps. Thus, it may be required to protect the bump forming surface of the bumped chip.
　そこで、本発明の目的は、バンプ付チップのバンプ形成面が保護された半導体装置の製造方法を提供することである。 Therefore, an object of the present invention is to provide a method of manufacturing a semiconductor device in which a bump forming surface of a bumped chip is protected.
　本発明の一態様に係る半導体装置の製造方法は、第１支持シートおよびエネルギー線硬化性樹脂層を備える第１保護膜形成用シートの前記エネルギー線硬化性樹脂層を、複数のバンプが形成されているバンプ付ウエハのバンプ形成面に、貼り合わせる工程と、前記エネルギー線硬化性樹脂層にエネルギー線を照射して硬化させて、第１保護膜を形成する工程と、前記第１支持シートを剥離する工程と、前記第１保護膜を有する前記バンプ付ウエハをダイシングする工程と、を備えることを特徴とする方法である。
　この構成によれば、バンプ付ウエハのバンプ形成面に、エネルギー線硬化性樹脂層を形成できる。また、このエネルギー線硬化性樹脂層を硬化させることで、バンプ付ウエハのバンプ形成面に第１保護膜を形成できる。このエネルギー線硬化性樹脂層は、エネルギー線により短時間で硬化させることができるので、効率よく第１保護膜を形成できる。そして、第１保護膜を有するバンプ付ウエハをダイシングすることで、第１保護膜を有するバンプ付チップが得られる。このようにして、バンプ付チップのバンプ形成面が保護された半導体装置を製造できる。 In the method for manufacturing a semiconductor device according to one aspect of the present invention, a plurality of bumps are formed on the energy ray curable resin layer of the first protective film forming sheet including the first support sheet and the energy ray curable resin layer. A step of bonding to a bump forming surface of the bumped wafer, a step of irradiating the energy ray curable resin layer with an energy ray to cure, and forming a first protective film; and the first support sheet. A step of peeling, and a step of dicing the bumped wafer having the first protective film.
According to this configuration, the energy ray curable resin layer can be formed on the bump forming surface of the bumped wafer. Moreover, a 1st protective film can be formed in the bump formation surface of a wafer with a bump by hardening this energy beam curable resin layer. Since this energy ray-curable resin layer can be cured in a short time with energy rays, the first protective film can be efficiently formed. And the chip | tip with a bump which has a 1st protective film is obtained by dicing the wafer with a bump which has a 1st protective film. In this way, a semiconductor device in which the bump forming surface of the bumped chip is protected can be manufactured.
　本発明の一態様に係る半導体装置の製造方法においては、第２保護膜形成層を、前記バンプ付ウエハのバンプ形成面とは反対側の面に、形成する工程と、第２支持シートを、前記第２保護膜形成層に、貼り合わせる工程と、をさらに備えることが好ましい。
　この構成によれば、バンプ付ウエハのバンプ形成面とは反対側の面に、第２保護膜形成層を形成できる。また、貼り合わせた第２支持シートによりバンプ付ウエハを支持しながら、バンプ付ウエハをダイシングできる。 In the method for manufacturing a semiconductor device according to one aspect of the present invention, a step of forming a second protective film forming layer on a surface opposite to the bump forming surface of the bumped wafer, and a second support sheet, It is preferable that the method further includes a step of bonding to the second protective film forming layer.
According to this configuration, the second protective film formation layer can be formed on the surface opposite to the bump formation surface of the bumped wafer. Further, the bumped wafer can be diced while the bumped wafer is supported by the bonded second support sheet.
　本発明の一態様に係る半導体装置の製造方法においては、第２支持シートおよび第２保護膜形成層を備える第２保護膜形成用シートの前記第２保護膜形成層を、前記バンプ付ウエハのバンプ形成面とは反対側の面に、貼り合わせる工程を、さらに備えることが好ましい。
　この構成によれば、バンプ付ウエハのバンプ形成面とは反対側の面（裏面）に、第２保護膜形成層を形成すると共に、第２支持シートも形成できる。このように、第２保護膜形成層と第２支持シートとを一つの工程で形成できるので、製造効率を向上できる。また、この第２支持シートによりバンプ付ウエハを支持しながら、バンプ付ウエハをダイシングできる。 In the method for manufacturing a semiconductor device according to one aspect of the present invention, the second protective film forming layer of the second protective film forming sheet including the second support sheet and the second protective film forming layer is formed on the bumped wafer. It is preferable to further include a step of bonding to the surface opposite to the bump forming surface.
According to this configuration, the second protective film forming layer can be formed on the surface (back surface) opposite to the bump forming surface of the bumped wafer, and the second support sheet can also be formed. Thus, since a 2nd protective film formation layer and a 2nd support sheet can be formed by one process, manufacturing efficiency can be improved. Further, the wafer with bumps can be diced while being supported by the second support sheet.
　本発明の一態様に係る半導体装置の製造方法においては、前記第２保護膜形成層を硬化させて第２保護膜を形成する工程を、さらに備えることが好ましい。
　この構成によれば、第２保護膜形成層を硬化させて、第２保護膜を形成することで、バンプ付チップの裏面が保護された半導体装置を製造できる。 In the manufacturing method of the semiconductor device which concerns on 1 aspect of this invention, it is preferable to further provide the process of hardening the said 2nd protective film formation layer and forming a 2nd protective film.
According to this configuration, a semiconductor device in which the back surface of the bumped chip is protected can be manufactured by curing the second protective film forming layer and forming the second protective film.
　本発明の一態様に係る半導体装置の製造方法においては、ダイシングして個片化された、前記第１保護膜を有するバンプ付チップを、ボンディングする工程を、さらに備えることが好ましい。
　この構成によれば、第１保護膜を有するバンプ付チップをボンディングすることで、バンプ付チップのバンプ形成面が保護された半導体装置を製造できる。 In the method for manufacturing a semiconductor device according to one embodiment of the present invention, it is preferable to further include a step of bonding the bumped chip having the first protective film, which is diced into individual pieces.
According to this configuration, a semiconductor device in which the bump forming surface of the bumped chip is protected can be manufactured by bonding the bumped chip having the first protective film.
　本発明の一態様に係る半導体装置の製造方法においては、前記第１支持シートが、第１基材および第１粘着剤層を備え、前記第１粘着剤層が、前記エネルギー線硬化性樹脂層と接していることが好ましい。
　この構成によれば、バンプ付ウエハを加工している間は、第１支持シートとエネルギー線硬化性樹脂層との間を強固に固定できる。一方で、バンプ付ウエハの加工後には、第１支持シートを、エネルギー線硬化性樹脂層または第１保護膜から容易に剥離できる。 In the method for manufacturing a semiconductor device according to one aspect of the present invention, the first support sheet includes a first base material and a first pressure-sensitive adhesive layer, and the first pressure-sensitive adhesive layer is the energy beam curable resin layer. It is preferable that it touches.
According to this configuration, the first support sheet and the energy ray curable resin layer can be firmly fixed while the bumped wafer is processed. On the other hand, after processing the wafer with bumps, the first support sheet can be easily peeled from the energy ray curable resin layer or the first protective film.
　本発明の一態様に係る半導体装置の製造方法においては、前記第１保護膜は、前記バンプの一部分を少なくとも覆うバンプ保護膜であることが好ましい。
　このように、第１保護膜はバンプの一部分を少なくとも覆うので、実装後のバンプ付チップに発生するバンプの付根部のクラックの発生を防止できる。 In the method for manufacturing a semiconductor device according to one aspect of the present invention, the first protective film is preferably a bump protective film that covers at least a part of the bump.
Thus, since the first protective film covers at least a part of the bump, it is possible to prevent the occurrence of a crack at the base portion of the bump generated in the bumped chip after mounting.
本発明の第１実施形態に係る第１保護膜を形成するための第１保護膜形成用シートを示す概略断面図である。It is a schematic sectional drawing which shows the 1st protective film formation sheet for forming the 1st protective film which concerns on 1st Embodiment of this invention. 本発明の第１実施形態に係るバンプ付ウエハを示す概略断面図である。It is a schematic sectional drawing which shows the wafer with a bump which concerns on 1st Embodiment of this invention. 本発明の第１実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 1st Embodiment of this invention. 本発明の第１実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 1st Embodiment of this invention. 本発明の第１実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 1st Embodiment of this invention. 本発明の第１実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 1st Embodiment of this invention. 本発明の第１実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 1st Embodiment of this invention. 本発明の第２実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. 本発明の第２実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. 本発明の第２実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. 本発明の第２実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. 本発明の第２実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. 本発明の第２実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. 本発明の第２実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. 本発明の第３実施形態に係る第２保護膜を形成するための第２保護膜形成用シートを示す概略断面図である。It is a schematic sectional drawing which shows the 2nd protective film formation sheet for forming the 2nd protective film which concerns on 3rd Embodiment of this invention. 本発明の第３実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 3rd Embodiment of this invention. 本発明の第３実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 3rd Embodiment of this invention. 本発明の第３実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 3rd Embodiment of this invention. 本発明の第３実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 3rd Embodiment of this invention. 本発明の第３実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 3rd Embodiment of this invention. 本発明の第３実施形態に係る半導体装置の製造方法を説明するための説明図である。It is explanatory drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 3rd Embodiment of this invention.
　［第１実施形態］
　以下、本発明について実施形態を例に挙げて、図面に基づいて説明する。本発明は実施形態の内容に限定されない。なお、図面においては、説明を容易にするために拡大または縮小をして図示した部分がある。
　まず、本実施形態に用いる第１保護膜形成用シートおよびバンプ付ウエハについて説明する。この第１保護膜形成用シートは、バンプ付ウエハのバンプ形成面に、第１保護膜を形成するためのシートである。 [First Embodiment]
Hereinafter, the present invention will be described with reference to the drawings, taking an embodiment as an example. The present invention is not limited to the contents of the embodiment. In the drawings, there are portions enlarged or reduced for easy explanation.
First, the first protective film forming sheet and the bumped wafer used in the present embodiment will be described. The first protective film forming sheet is a sheet for forming the first protective film on the bump forming surface of the bumped wafer.
　（第１保護膜形成用シート）
　本実施形態に用いる第１保護膜形成用シート１は、図１に示すように、第１基材１１１および第１粘着剤層１１２を備える第１支持シート１１と、エネルギー線硬化性樹脂層１２と、を備えている。なお、エネルギー線硬化性樹脂層１２の表面は、ウエハに貼着されるまでの間、剥離フィルムなどにより保護されていてもよい。 (First protective film forming sheet)
As shown in FIG. 1, the first protective film forming sheet 1 used in the present embodiment includes a first support sheet 11 including a first base material 111 and a first pressure-sensitive adhesive layer 112, and an energy ray curable resin layer 12. And. The surface of the energy ray curable resin layer 12 may be protected by a release film or the like until it is attached to the wafer.
　第１支持シートは、第１基材と、第１粘着剤層とを備えているが、第１粘着剤層がなくてもよい。このような第１支持シート１１は、被着体を加工している間に、被着体を支持する。
　また、第１支持シート１１は、その使用目的に応じて適宜選択できる。例えば、第１支持シート１１がバックグラインドの際の支持を目的とする場合には、公知のバックグラインドテープを用いることができる。 The first support sheet includes the first base material and the first pressure-sensitive adhesive layer, but the first pressure-sensitive adhesive layer may not be provided. Such a first support sheet 11 supports the adherend while the adherend is being processed.
Moreover, the 1st support sheet 11 can be suitably selected according to the intended purpose. For example, when the first support sheet 11 is intended to be supported when back grinding, a known back grinding tape can be used.
　第１基材１１１としては、公知の支持体を用いることができ、例えば、プラスチックフィルムなどを用いることができる。
　プラスチックフィルムとしては、ポリエチレンフィルム、ポリプロピレンフィルム、ポリブテンフィルム、ポリブタジエンフィルム、ポリメチルペンテンフィルム、ポリ塩化ビニルフィルム、塩化ビニル共重合体フィルム、ポリエチレンテレフタレートフィルム、ポリエチレンナフタレートフィルム、ポリブチレンテレフタレートフィルム、ポリウレタンフィルム、エチレン酢酸ビニル共重合体フィルム、アイオノマー樹脂フィルム、エチレン・（メタ）アクリル酸共重合体フィルム、エチレン・（メタ）アクリル酸エステル共重合体フィルム、ポリスチレンフィルム、ポリカーボネートフィルム、ポリイミドフィルム、およびフッ素樹脂フィルムなどが挙げられる。これらのフィルムは、単層フィルムであってもよく、積層フィルムであってもよい。また、積層フィルムの場合には、１種のフィルムを積層してもよく、２種以上のフィルムを積層してもよい。
　第１基材１１１の厚みは、通常、５μｍ以上１０００μｍ以下であり、好ましくは、１０μｍ以上５００μｍ以下である。 As the first substrate 111, a known support can be used, and for example, a plastic film or the like can be used.
As plastic films, polyethylene film, polypropylene film, polybutene film, polybutadiene film, polymethylpentene film, polyvinyl chloride film, vinyl chloride copolymer film, polyethylene terephthalate film, polyethylene naphthalate film, polybutylene terephthalate film, polyurethane film , Ethylene vinyl acetate copolymer film, ionomer resin film, ethylene / (meth) acrylic acid copolymer film, ethylene / (meth) acrylic acid ester copolymer film, polystyrene film, polycarbonate film, polyimide film, and fluororesin A film etc. are mentioned. These films may be single-layer films or laminated films. In the case of a laminated film, one kind of film may be laminated, or two or more kinds of films may be laminated.
The thickness of the 1st base material 111 is 5 micrometers or more and 1000 micrometers or less normally, Preferably, they are 10 micrometers or more and 500 micrometers or less.
　第１粘着剤層１１２は、公知の粘着剤を用いて形成することができる。粘着剤としては、アクリル系粘着剤、ゴム系粘着剤、シリコーン系粘着剤およびウレタン系粘着剤などが挙げられる。また、粘着剤は、エネルギー線硬化型であってもよく、非エネルギー線硬化型でもあってもよい。
　このような第１粘着剤層１１２により、被着体を加工している間は第１支持シート１１とエネルギー線硬化性樹脂層１２の間を強固に固定し、その後、エネルギー線硬化性樹脂層１２を被着体に固着残存させて第１支持シート１１から剥離することが容易となる。なお、第１粘着剤層１１２がエネルギー線硬化型の場合、第１粘着剤層１１２に、紫外線などのエネルギー線を照射することで硬化させると、第１粘着剤層１１２の凝集力が高まり、第１粘着剤層１１２とエネルギー線硬化性樹脂層１２との間の粘着力を低下または消失させることができる。
　第１粘着剤層１１２の厚みは、通常、１μｍ以上５００μｍ以下であり、好ましくは、３μｍ以上１００μｍ以下である。 The 1st adhesive layer 112 can be formed using a well-known adhesive. Examples of the pressure-sensitive adhesive include acrylic pressure-sensitive adhesives, rubber-based pressure-sensitive adhesives, silicone-based pressure-sensitive adhesives, and urethane-based pressure-sensitive adhesives. Further, the pressure-sensitive adhesive may be an energy ray curable type or a non-energy ray curable type.
The first pressure-sensitive adhesive layer 112 firmly fixes the first support sheet 11 and the energy ray curable resin layer 12 while the adherend is processed, and then the energy ray curable resin layer. It becomes easy to make 12 adhere to the adherend and peel from the first support sheet 11. In addition, when the 1st adhesive layer 112 is an energy ray hardening type, when it hardens | cures by irradiating energy rays, such as an ultraviolet-ray, to the 1st adhesive layer 112, the cohesion force of the 1st adhesive layer 112 will increase, The adhesive force between the 1st adhesive layer 112 and the energy-beam curable resin layer 12 can be reduced or eliminated.
The thickness of the 1st adhesive layer 112 is 1 micrometer or more and 500 micrometers or less normally, Preferably, they are 3 micrometers or more and 100 micrometers or less.
　エネルギー線硬化性樹脂層１２は、公知のエネルギー線硬化性化合物を含有するエネルギー線硬化性樹脂組成物を用いて形成することができる。このようなエネルギー線硬化性樹脂層１２は、エネルギー線硬化性化合物を含有するために、エネルギー線が照射されると、硬化して第１保護膜１２ａとなる（図３参照）。そして、この第１保護膜１２ａにより、後述するバンプ付チップ２ａのバンプ形成面を保護できる。
　エネルギー線硬化性化合物は、エネルギー線重合性基を含み、エネルギー線の照射を受けると重合硬化する。このようなエネルギー線硬化性化合物としては、エネルギー線重合性低分子化合物およびエネルギー線硬化型重合体が挙げられる。なお、エネルギー線としては、紫外線（ＵＶ）および電子線（ＥＢ）などが挙げられる。これらの中でも、紫外線が好ましい。 The energy ray curable resin layer 12 can be formed using an energy ray curable resin composition containing a known energy ray curable compound. Since such an energy ray curable resin layer 12 contains an energy ray curable compound, when it is irradiated with energy rays, it is cured and becomes the first protective film 12a (see FIG. 3). And the bump formation surface of the chip | tip 2a with a bump mentioned later can be protected by this 1st protective film 12a.
The energy ray-curable compound contains an energy ray-polymerizable group and is polymerized and cured when irradiated with energy rays. Examples of such energy beam curable compounds include energy beam polymerizable low molecular weight compounds and energy beam curable polymers. Examples of energy rays include ultraviolet rays (UV) and electron beams (EB). Among these, ultraviolet rays are preferable.
　エネルギー線重合性低分子化合物としては、トリメチロールプロパントリアクリレート、ペンタエリスリトールトリアクリレート、ペンタエリスリトールテトラアクリレート、ジぺンタエリスリトールモノヒドロキシペンタアクリレート、ジペンタエリスリトールヘキサアクリレート、１，４－ブチレングリコールジアクリレート、１，６－ヘキサンジオールジアクリレート、ポリエチレングリコールジアクリレート、オリゴエステルアクリレート、ウレタンアクリレート系オリゴマー、エポキシ変性アクリレート、ポリエーテルアクリレートおよびイタコン酸オリゴマーなどのアクリレート系化合物が挙げられる。これらは、１種を単独で用いてもよく、２種以上を併用してもよい。
　エネルギー線硬化型重合体としては、公知のエネルギー線硬化型重合体を用いることができる。例えば、バインダーポリマーの主鎖または側鎖に、エネルギー線重合性基が結合されてなるエネルギー線硬化型重合体が挙げられる。
　また、エネルギー線硬化性樹脂組成物は、連鎖移動剤、着色剤、フィラー、バインダーポリマー成分、および熱硬化性成分などの各種添加成分を含有していてもよい。
　エネルギー線硬化性樹脂層１２の厚みは、通常、１μｍ以上５００μｍ以下であり、好ましくは、３μｍ以上１００μｍ以下である。 Examples of the energy ray polymerizable low molecular weight compounds include trimethylolpropane triacrylate, pentaerythritol triacrylate, pentaerythritol tetraacrylate, dipentaerythritol monohydroxypentaacrylate, dipentaerythritol hexaacrylate, 1,4-butylene glycol diacrylate, Examples thereof include acrylate compounds such as 1,6-hexanediol diacrylate, polyethylene glycol diacrylate, oligoester acrylate, urethane acrylate oligomer, epoxy-modified acrylate, polyether acrylate, and itaconic acid oligomer. These may be used alone or in combination of two or more.
As the energy ray curable polymer, a known energy ray curable polymer can be used. For example, an energy ray curable polymer in which an energy ray polymerizable group is bonded to the main chain or side chain of the binder polymer can be mentioned.
The energy ray curable resin composition may contain various additive components such as a chain transfer agent, a colorant, a filler, a binder polymer component, and a thermosetting component.
The thickness of the energy ray curable resin layer 12 is usually 1 μm or more and 500 μm or less, and preferably 3 μm or more and 100 μm or less.
　（バンプ付ウエハ）
　本実施形態に用いるバンプ付ウエハ２は、図２に示すように、半導体ウエハ２１と、バンプ２２と、を備えている。なお、バンプ２２は、半導体ウエハ２１の回路のある側に形成される。また、以下場合により、バンプ付ウエハ２のバンプ２２の形成されている面を、バンプ形成面２Ａをいい、バンプ付ウエハ２のバンプ２２の形成されていない面を、裏面２Ｂという。 (Wafer with bump)
The bumped wafer 2 used in the present embodiment includes a semiconductor wafer 21 and bumps 22 as shown in FIG. The bumps 22 are formed on the circuit side of the semiconductor wafer 21. Further, in some cases, the surface of the bumped wafer 2 where the bumps 22 are formed is referred to as a bump forming surface 2A, and the surface of the bumped wafer 2 where the bumps 22 are not formed is referred to as a back surface 2B.
　半導体ウエハ２１としては、公知の半導体ウエハを用いることができ、例えば、シリコンウエハなどを用いることができる。
　半導体ウエハ２１の厚みは、通常、１０μｍ以上１０００μｍ以下であり、好ましくは、５０μｍ以上７５０μｍ以下である。 As the semiconductor wafer 21, a known semiconductor wafer can be used. For example, a silicon wafer or the like can be used.
The thickness of the semiconductor wafer 21 is usually 10 μm or more and 1000 μm or less, and preferably 50 μm or more and 750 μm or less.
　バンプ２２の材料としては、公知の導電性材料を用いることができ、例えば、ハンダなどを用いることができる。ハンダとしては、公知のハンダ材料を用いることができ、例えば、スズ、銀および銅を含有する鉛フリーハンダを用いることができる。
　バンプ２２の高さは、通常、５μｍ以上１０００μｍ以下であり、好ましくは、５０μｍ以上５００μｍ以下である。
　バンプ２２の側方から見た断面形状は、特に限定されないが、半円形、半楕円形、円形、三角形、長方形または台形などであってもよい。
　バンプ２２の種類としては、特に限定されないが、ボールバンプ、マッシュルームバンプ、スタッドバンプ、コーンバンプ、シリンダーバンプ、ドットバンプ、およびキューブバンプなどが挙げられる。 As a material of the bump 22, a known conductive material can be used, for example, solder or the like can be used. As the solder, a known solder material can be used. For example, lead-free solder containing tin, silver and copper can be used.
The height of the bump 22 is usually 5 μm or more and 1000 μm or less, and preferably 50 μm or more and 500 μm or less.
The cross-sectional shape viewed from the side of the bump 22 is not particularly limited, but may be a semicircular shape, a semielliptical shape, a circular shape, a triangular shape, a rectangular shape, a trapezoidal shape, or the like.
Although it does not specifically limit as a kind of bump 22, A ball bump, a mushroom bump, a stud bump, a cone bump, a cylinder bump, a dot bump, a cube bump, etc. are mentioned.
　（半導体装置の製造方法）
　次に、本実施形態に係る半導体装置の製造方法について説明する。
　図３Ａ～図３Ｅは、第１実施形態に係る半導体装置の製造方法を示す説明図である。
　本実施形態に係る半導体装置の製造方法においては、先ず、図３Ａに示すように、第１支持シート１１およびエネルギー線硬化性樹脂層１２を備える第１保護膜形成用シート１のエネルギー線硬化性樹脂層１２を、バンプ付ウエハ２のバンプ形成面２Ａに、貼り合わせる工程（第１保護膜形成用シート貼着工程）を備える方法により、バンプ付ウエハ２のバンプ形成面２Ａにエネルギー線硬化性樹脂層１２を形成する。
　次に、図３Ｂに示すように、バンプ付ウエハ２の裏面２Ｂに第２支持シート３の第２粘着剤層３２を貼り合わせる工程（第２支持シート貼着工程）を行う。その後、図３Ｃに示すように、エネルギー線硬化性樹脂層１２にエネルギー線を照射して硬化させて、第１保護膜１２ａを形成する工程（第１保護膜形成工程）と、第１支持シート１１を剥離する工程（第１支持シート剥離工程）とを行う。これらの工程を備える方法により、第１支持シート１１を、硬化後の第１保護膜１２ａから剥離する。
　次いで、図３Ｄおよび図３Ｅに示すように、第１保護膜１２ａを有するバンプ付ウエハ２をダイシングする工程（ダイシング工程）と、ダイシングして個片化された、第１保護膜１２ａを有するバンプ付チップ２ａをピックアップし、被着体である基板４にボンディングする工程（ボンディング工程）とを行う。これらの工程を備える方法により、バンプ付チップ２ａのバンプ形成面２Ａが保護された半導体装置１００を製造する。
　以下、第１保護膜形成用シート貼着工程、第２支持シート貼着工程、第１保護膜形成工程、第１支持シート剥離工程、ダイシング工程およびボンディング工程について、より詳細に説明する。 (Method for manufacturing semiconductor device)
Next, a method for manufacturing the semiconductor device according to the present embodiment will be described.
3A to 3E are explanatory views showing the method of manufacturing the semiconductor device according to the first embodiment.
In the method for manufacturing a semiconductor device according to the present embodiment, first, as shown in FIG. 3A, the energy ray curable property of the first protective film forming sheet 1 including the first support sheet 11 and the energy ray curable resin layer 12. The resin layer 12 is cured with energy rays on the bump forming surface 2A of the bumped wafer 2 by a method including a step of bonding the resin layer 12 to the bump forming surface 2A of the bumped wafer 2 (first protective film forming sheet adhering step). The resin layer 12 is formed.
Next, as shown to FIG. 3B, the process (2nd support sheet sticking process) of bonding the 2nd adhesive layer 32 of the 2nd support sheet 3 to the back surface 2B of the wafer 2 with bumps is performed. Thereafter, as shown in FIG. 3C, the energy ray curable resin layer 12 is irradiated with energy rays and cured to form a first protective film 12a (first protective film forming step), and a first support sheet 11 is peeled off (first support sheet peeling step). The 1st support sheet 11 is peeled from the 1st protective film 12a after hardening by the method provided with these processes.
Next, as shown in FIG. 3D and FIG. 3E, a step of dicing the bumped wafer 2 having the first protective film 12a (dicing step), and a bump having the first protective film 12a diced into individual pieces A process (bonding process) of picking up the attached chip 2a and bonding it to the substrate 4 as an adherend is performed. By the method including these steps, the semiconductor device 100 in which the bump forming surface 2A of the bumped chip 2a is protected is manufactured.
Hereinafter, the first protective film forming sheet sticking step, the second support sheet sticking step, the first protective film forming step, the first support sheet peeling step, the dicing step, and the bonding step will be described in more detail.
　第１保護膜形成用シート貼着工程においては、図３Ａに示すように、第１保護膜形成用シート１のエネルギー線硬化性樹脂層１２をバンプ付ウエハ２のバンプ２２の形成されている面（バンプ形成面２Ａ）に貼り合わせる。ここで、バンプ付ウエハ２のバンプ２２は、図３Ａに示すように、エネルギー線硬化性樹脂層１２から突出していることが好ましい。
　ここで、貼着方法としては公知の方法を採用でき、特に限定されないが、圧着による方法が好ましい。圧着は、通常、圧着ロールなどにより押圧しながら行われる。圧着の条件は特に限定されないが、圧着温度は、４０℃以上１２０℃以下が好ましい。ロール圧力は、０．１ＭＰａ以上２０ＭＰａ以下が好ましい。圧着速度は、１ｍｍ／ｓｅｃ以上２０ｍｍ／ｓｅｃ以下が好ましい。 In the first protective film forming sheet adhering step, as shown in FIG. 3A, the energy ray curable resin layer 12 of the first protective film forming sheet 1 is formed on the surface on which the bumps 22 of the bumped wafer 2 are formed. Affixed to (bump forming surface 2A). Here, it is preferable that the bumps 22 of the wafer 2 with bumps protrude from the energy beam curable resin layer 12 as shown in FIG. 3A.
Here, as a sticking method, a known method can be adopted and is not particularly limited, but a method by pressure bonding is preferable. The crimping is usually performed while pressing with a crimping roll or the like. The conditions for pressure bonding are not particularly limited, but the pressure bonding temperature is preferably 40 ° C. or higher and 120 ° C. or lower. The roll pressure is preferably from 0.1 MPa to 20 MPa. The crimping speed is preferably 1 mm / sec or more and 20 mm / sec or less.
　第２支持シート貼着工程においては、図３Ａに示すように、バンプ付ウエハのバンプ形成面とは反対側の面（裏面２Ｂ）に、第２支持シート３の第２粘着剤層３２を貼り合わせる。
　ここで、貼着方法としては公知の方法を採用でき、特に限定されないが、圧着による方法が好ましい。圧着は、通常、圧着ロールなどにより押圧しながら行われる。圧着の条件は、特に限定されず、適宜設定できる。
　第２支持シート３は、公知の支持シートを用いることができ、第１支持シート１１と同様の支持シートを用いることができる。また、第２支持シート３は、その使用目的に応じて適宜選択できる。例えば、第２支持シート３がダイシングの際の支持を目的とする場合には、公知のダイシングテープを用いることができる。
　ここでは、第２支持シート３は、第２基材３１と、第２粘着剤層３２とを備えているが、第２粘着剤層３２がなくてもよい。第２基材３１および第２粘着剤層３２は、第１保護膜形成用シート１における第１基材１１１および第１粘着剤層１１２と同様である。 In the second support sheet attaching step, as shown in FIG. 3A, the second pressure-sensitive adhesive layer 32 of the second support sheet 3 is attached to the surface (back surface 2B) opposite to the bump forming surface of the bumped wafer. Match.
Here, as a sticking method, a known method can be adopted and is not particularly limited, but a method by pressure bonding is preferable. The crimping is usually performed while pressing with a crimping roll or the like. The conditions for pressure bonding are not particularly limited and can be set as appropriate.
As the second support sheet 3, a known support sheet can be used, and a support sheet similar to the first support sheet 11 can be used. Moreover, the 2nd support sheet 3 can be suitably selected according to the use purpose. For example, when the second support sheet 3 is intended for support during dicing, a known dicing tape can be used.
Here, although the 2nd support sheet 3 is provided with the 2nd base material 31 and the 2nd adhesive layer 32, the 2nd adhesive layer 32 does not need to be. The second base material 31 and the second pressure-sensitive adhesive layer 32 are the same as the first base material 111 and the first pressure-sensitive adhesive layer 112 in the first protective film forming sheet 1.
　第１保護膜形成工程においては、図３Ｃに示すように、エネルギー線硬化性樹脂層１２にエネルギー線を照射して硬化させて、第１保護膜１２ａを形成する。
　照射するエネルギー線は、エネルギー線硬化性樹脂層１２の種類に応じて異なり、特に限定されない。例えば、エネルギー線硬化性樹脂層１２が紫外線で硬化する場合には、エネルギー線として、紫外線を照射すればよい。
　このような場合、紫外線照射装置は、特に限定されず、公知の紫外線照射装置を用いることができる。
　第１保護膜形成用シート１に対する紫外線の照射条件については、光量が、５０ｍＪ／ｃｍ２以上２０００ｍＪ／ｃｍ２以下であることが好ましく、１００ｍＪ／ｃｍ２以上１０００ｍＪ／ｃｍ２以下であることがより好ましい。また、照度は、５０ｍＷ／ｃｍ２以上５００ｍＪ／ｃｍ２以下であることが好ましい。光源としては、高圧水銀ランプ、メタルハライドランプ、キセノンランプ、ＤｅｅｐＵＶランプ、および紫外線ＬＥＤなどが挙げられる。ピーク波長は、１８０ｎｍ以上４２０ｎｍ以下であることが好ましい。 In the first protective film forming step, as shown in FIG. 3C, the energy ray curable resin layer 12 is irradiated with energy rays and cured to form the first protective film 12a.
The energy beam to be irradiated varies depending on the type of the energy beam curable resin layer 12 and is not particularly limited. For example, when the energy ray curable resin layer 12 is cured with ultraviolet rays, ultraviolet rays may be irradiated as energy rays.
In such a case, the ultraviolet irradiation device is not particularly limited, and a known ultraviolet irradiation device can be used.
The irradiation conditions of the ultraviolet ray on the first protective layer forming sheet 1, the amount of light, 50 mJ / cm 2 or more preferably 2000 mJ / cm 2 or less, more not less 100 mJ / cm 2 or more 1000 mJ / cm 2 or less preferable. Further, the illuminance is preferably 50 mW / cm 2 or more 500 mJ / cm 2 or less. Examples of the light source include a high-pressure mercury lamp, a metal halide lamp, a xenon lamp, a deep UV lamp, and an ultraviolet LED. The peak wavelength is preferably 180 nm or more and 420 nm or less.
　第１保護膜１２ａの厚みは、バンプ２２の高さ寸法より小さくすることが好ましく、バンプ２２の高さ寸法の０．００１倍以上０．９９倍以下であることがより好ましく、バンプ２２の高さ寸法の０．０１倍以上０．９倍以下であることが特に好ましい。第１保護膜１２ａの厚みが前記範囲内であれば、バンプ付チップ２ａのバンプ形成面を保護することができ、特に、実装後のバンプ付チップ２ａに発生するバンプ２２のクラックの発生を防止できる。 The thickness of the first protective film 12 a is preferably smaller than the height of the bump 22, more preferably 0.001 to 0.99 times the height of the bump 22, It is particularly preferable that it is not less than 0.01 times and not more than 0.9 times the thickness dimension. If the thickness of the first protective film 12a is within the above range, the bump forming surface of the bumped chip 2a can be protected, and in particular, the occurrence of cracks in the bump 22 occurring on the bumped chip 2a after mounting is prevented. it can.
　第１支持シート剥離工程においては、図３Ｃに示すように、第１支持シート１１を、第１保護膜１２ａから剥離する。
　なお、この第１支持シート剥離工程は、前記第１保護膜形成工程の前に行ってもよいが、前記第１保護膜形成工程の前に行うことがより好ましい。第１粘着剤層１１２が紫外線硬化性を有する場合には、前記第１保護膜形成工程で、第１支持シート１１側から紫外線を照射することで、第１粘着剤層１１２が硬化する。これにより、第１粘着剤層１１２と第１保護膜１２ａとの界面の接着力が低下して、第１粘着剤層１１２を第１保護膜１２ａから剥離しやすくなる。 In the first support sheet peeling step, as shown in FIG. 3C, the first support sheet 11 is peeled from the first protective film 12a.
In addition, although this 1st support sheet peeling process may be performed before the said 1st protective film formation process, it is more preferable to carry out before the said 1st protective film formation process. In the case where the first pressure-sensitive adhesive layer 112 has ultraviolet curable properties, the first pressure-sensitive adhesive layer 112 is cured by irradiating ultraviolet light from the first support sheet 11 side in the first protective film forming step. Thereby, the adhesive force of the interface of the 1st adhesive layer 112 and the 1st protective film 12a falls, and it becomes easy to peel the 1st adhesive layer 112 from the 1st protective film 12a.
　ダイシング工程においては、図３Ｄに示すように、ダイシングブレードにより第１保護膜１２ａを有するバンプ付ウエハ２をダイシングする。このようにして、第１保護膜１２ａを有するバンプ付ウエハ２を、第１保護膜１２ａを有するバンプ付チップ２ａに個片化できる。
　ダイシング装置は、特に限定されず、公知のダイシング装置を用いることができる。また、ダイシングの条件についても、特に限定されない。なお、ダイシングブレードの代わりに、レーザーダイシング法およびステルスダイシング法などを用いてもよい。
　第２粘着剤層３２が紫外線硬化型の場合、ダイシング工程の後には、第２支持シート３の第２粘着剤層３２に、第２支持シート３側から紫外線を照射してもよい。これにより、第２粘着剤層３２が硬化し、第２粘着剤層３２とバンプ付チップ２ａとの界面の接着力が低下して、バンプ付チップ２ａをピックアップしやすくなる。 In the dicing process, as shown in FIG. 3D, the bumped wafer 2 having the first protective film 12a is diced by a dicing blade. In this manner, the bumped wafer 2 having the first protective film 12a can be separated into the bumped chips 2a having the first protective film 12a.
The dicing apparatus is not particularly limited, and a known dicing apparatus can be used. Also, the dicing conditions are not particularly limited. In place of the dicing blade, a laser dicing method, a stealth dicing method, or the like may be used.
When the second pressure-sensitive adhesive layer 32 is an ultraviolet curable type, the second pressure-sensitive adhesive layer 32 of the second support sheet 3 may be irradiated with ultraviolet light from the second support sheet 3 side after the dicing process. Thereby, the 2nd adhesive layer 32 hardens | cures, the adhesive force of the interface of the 2nd adhesive layer 32 and the chip | tip 2a with bumps falls, and it becomes easy to pick up the chip | tip 2a with bumps.
　ボンディング工程においては、図３Ｅに示すように、ダイシングして個片化された、第１保護膜１２ａを有するバンプ付チップ２ａをピックアップし、チップ搭載用基板４１と電極４２とを備える基板４に接着固定する。このとき、バンプ付チップ２ａのバンプ２２は、基板４の電極４２と電気的に接続する。なお、第１保護膜１２ａは、バンプ付チップ２ａのバンプ形成面２Ａには接しているが、基板４のチップ搭載用基板４１には接していない。また、図３Ｅでは、説明の便宜上、バンプ２２と電極４２との接合面を明確に示しているが、これに限定されない。実際のバンプ２２と電極４２とのはんだ接合部では、バンプ２２のはんだと電極４２の金属とが溶け合っているので、明確な接合面はない。
　基板４としては、特に限定されないが、リードフレーム、配線基板、並びに、表面に回路が形成されたシリコンウエハおよびシリコンチップなどを用いることができる。チップ搭載用基板４１の材質としては、特に限定されないが、セラミックおよびプラスチックなどが挙げられる。また、プラスチックとしては、エポキシ、ビスマレイミドトリアジン、およびポリイミドなどが挙げられる。
　以上のようにして、バンプ付チップ２ａのバンプ形成面２Ａが第１保護膜１２ａにより保護された半導体装置１００を製造することができる。 In the bonding step, as shown in FIG. 3E, the bumped chip 2 a having the first protective film 12 a, which is diced into individual pieces, is picked up, and the substrate 4 including the chip mounting substrate 41 and the electrode 42 is picked up. Adhere and fix. At this time, the bumps 22 of the bumped chip 2 a are electrically connected to the electrodes 42 of the substrate 4. The first protective film 12a is in contact with the bump forming surface 2A of the bumped chip 2a, but is not in contact with the chip mounting substrate 41 of the substrate 4. Further, in FIG. 3E, for convenience of explanation, the bonding surface between the bump 22 and the electrode 42 is clearly shown, but the present invention is not limited to this. In the actual solder joint portion between the bump 22 and the electrode 42, since the solder of the bump 22 and the metal of the electrode 42 are melted together, there is no clear joint surface.
Although it does not specifically limit as the board | substrate 4, A lead frame, a wiring board, a silicon wafer with a circuit formed on the surface, a silicon chip, etc. can be used. The material of the chip mounting substrate 41 is not particularly limited, and examples thereof include ceramic and plastic. Examples of the plastic include epoxy, bismaleimide triazine, and polyimide.
As described above, the semiconductor device 100 in which the bump forming surface 2A of the bumped chip 2a is protected by the first protective film 12a can be manufactured.
　（第１実施形態の作用効果）
　本実施形態によれば、次のような作用効果を奏することができる。
（１）第１保護膜１２ａを有するバンプ付ウエハ２をダイシングすることで、第１保護膜１２ａを有するバンプ付チップ２ａが得られる。第１保護膜１２ａを有するバンプ付チップ２ａをボンディングすることで、バンプ付チップ２ａのバンプ形成面２Ａが第１保護膜１２ａ（バンプ形成面保護膜）により保護された半導体装置１００を製造できる。
（２）エネルギー線硬化性樹脂層１２は、エネルギー線により短時間で硬化させることができるので、効率よく第１保護膜１２ａを形成できる。
（３）第１基材１１１とエネルギー線硬化性樹脂層１２との間に第１粘着剤層１１２を備えるので、第２支持シート貼着工程および第１保護膜形成工程では、第１支持シート１１とエネルギー線硬化性樹脂層１２との間を強固に固定できる。一方で、第１支持シート剥離工程では、第１支持シート１１を、第１保護膜１２ａから容易に剥離できる。
（４）第１保護膜１２ａはバンプ２２の一部分を少なくとも覆うので、実装後のバンプ付チップ２ａに発生するバンプ２２のクラックの発生を防止できる。
（５）第２支持シート３によりバンプ付ウエハ２を支持しながら、バンプ付ウエハ２をダイシングできる。 (Operational effects of the first embodiment)
According to this embodiment, the following operational effects can be achieved.
(1) By dicing the bumped wafer 2 having the first protective film 12a, the bumped chip 2a having the first protective film 12a is obtained. By bonding the bumped chip 2a having the first protective film 12a, the semiconductor device 100 in which the bump forming surface 2A of the bumped chip 2a is protected by the first protective film 12a (bump forming surface protective film) can be manufactured.
(2) Since the energy ray curable resin layer 12 can be cured with energy rays in a short time, the first protective film 12a can be efficiently formed.
(3) Since the 1st adhesive layer 112 is provided between the 1st base material 111 and the energy-beam curable resin layer 12, in a 2nd support sheet sticking process and a 1st protective film formation process, it is a 1st support sheet. 11 and the energy ray curable resin layer 12 can be firmly fixed. On the other hand, in the first support sheet peeling step, the first support sheet 11 can be easily peeled from the first protective film 12a.
(4) Since the first protective film 12a covers at least a part of the bump 22, it is possible to prevent the bump 22 from being cracked in the bumped chip 2a after mounting.
(5) The wafer 2 with bumps can be diced while being supported by the second support sheet 3.
　［第２実施形態］
　次に、本発明の第２実施形態を図面に基づいて説明する。
　なお、本実施形態の第１保護膜形成用シート１および基板４は、前記第１実施形態における第１保護膜形成用シート１および基板４とそれぞれ実質的に同様であるから、その詳細な説明は省略または簡略化する。
　第２実施形態に係る半導体装置の製造方法では、前記第１実施形態と比較して、第２保護膜形成層を、前記バンプ付ウエハのバンプ形成面とは反対側の面に、形成する工程と、第２支持シートを、前記第２保護膜形成層に、貼り合わせる工程と、をさらに備えている。この第２保護膜形成層を硬化させて、第２保護膜を形成することで、バンプ付チップのバンプ形成面とは反対側の面（裏面２Ｂ）を保護できる。 [Second Embodiment]
Next, 2nd Embodiment of this invention is described based on drawing.
The first protective film forming sheet 1 and the substrate 4 of the present embodiment are substantially the same as the first protective film forming sheet 1 and the substrate 4 of the first embodiment, respectively. Is omitted or simplified.
In the method of manufacturing a semiconductor device according to the second embodiment, the step of forming the second protective film forming layer on the surface opposite to the bump forming surface of the bumped wafer as compared with the first embodiment. And a step of bonding the second support sheet to the second protective film forming layer. By curing the second protective film forming layer and forming the second protective film, the surface (back surface 2B) opposite to the bump forming surface of the bumped chip can be protected.
　図４Ａ～図４Ｇは、第２実施形態に係る半導体装置の製造方法を示す説明図である。
　本実施形態に係る半導体装置の製造方法においては、先ず、図４Ａに示すように、第１支持シート１１およびエネルギー線硬化性樹脂層１２を備える第１保護膜形成用シート１のエネルギー線硬化性樹脂層１２を、バンプ付ウエハ２のバンプ形成面２Ａに、貼り合わせる工程（第１保護膜形成用シート貼着工程）を備える方法により、バンプ付ウエハ２のバンプ形成面２Ａにエネルギー線硬化性樹脂層１２を形成する。
　次に、図４Ｂに示すように、バンプ付ウエハ２の裏面２Ｂを研削する工程（バックグラインド工程）を行う。そして、図４Ｃに示すように、研削後のバンプ付ウエハ２の裏面２Ｂに第２保護膜形成層５を形成する工程（第２保護膜形成工程）を行う。
　次に、図４Ｄに示すように、バンプ付ウエハ２の裏面２Ｂ側にある第２保護膜形成層５に第２支持シート３の第２粘着剤層３２を貼り合わせる工程（第２支持シート貼着工程）を行う。その後、図４Ｅに示すように、エネルギー線硬化性樹脂層１２にエネルギー線を照射して硬化させて、第１保護膜１２ａを形成する工程（第１保護膜形成工程）と、第１支持シート１１を剥離する工程（第１支持シート剥離工程）とを行う、これら工程を備える方法により、第１支持シート１１を、硬化後の第１保護膜１２ａから剥離する。
　次いで、図４Ｆおよび図４Ｇに示すように、第１保護膜１２ａを有するバンプ付ウエハ２をダイシングする工程（ダイシング工程）と、ダイシングして個片化された、第１保護膜１２ａを有するバンプ付チップ２ａをピックアップし、被着体である基板４にボンディングする工程（ボンディング工程）とを行う。これらの工程を備える方法により、バンプ付チップ２ａのバンプ形成面２Ａおよび裏面２Ｂが保護された半導体装置１００を製造する。 4A to 4G are explanatory views showing a method for manufacturing a semiconductor device according to the second embodiment.
In the method for manufacturing a semiconductor device according to the present embodiment, first, as shown in FIG. 4A, the energy ray curable property of the first protective film forming sheet 1 including the first support sheet 11 and the energy ray curable resin layer 12. The resin layer 12 is cured with energy rays on the bump forming surface 2A of the bumped wafer 2 by a method including a step of bonding the resin layer 12 to the bump forming surface 2A of the bumped wafer 2 (first protective film forming sheet adhering step). The resin layer 12 is formed.
Next, as shown in FIG. 4B, a process of grinding the back surface 2B of the bumped wafer 2 (back grinding process) is performed. Then, as shown in FIG. 4C, a step of forming the second protective film forming layer 5 on the back surface 2B of the bumped wafer 2 after grinding (second protective film forming step) is performed.
Next, as shown in FIG. 4D, a step of bonding the second adhesive layer 32 of the second support sheet 3 to the second protective film forming layer 5 on the back surface 2B side of the bumped wafer 2 (second support sheet pasting) Wearing process). Thereafter, as shown in FIG. 4E, the energy ray-curable resin layer 12 is irradiated with energy rays and cured to form a first protective film 12a (first protective film forming step), and a first support sheet The 1st support sheet 11 is peeled from the 1st protective film 12a after hardening by the method provided with these processes which perform the process (1st support sheet peeling process) which peels 11.
Next, as shown in FIGS. 4F and 4G, a step of dicing the wafer 2 with bumps having the first protective film 12a (dicing step), and a bump having the first protective film 12a diced into individual pieces A process (bonding process) of picking up the attached chip 2a and bonding it to the substrate 4 as an adherend is performed. By the method including these steps, the semiconductor device 100 in which the bump forming surface 2A and the back surface 2B of the bumped chip 2a are protected is manufactured.
　本実施形態における第１保護膜形成用シート貼着工程、第１保護膜形成工程、第１支持シート剥離工程、ダイシング工程およびボンディング工程については、前記第１実施形態における第１保護膜形成用シート貼着工程、第１保護膜形成工程、第１支持シート剥離工程、ダイシング工程およびボンディング工程と同様の方法を採用できる。 About the 1st protective film formation sheet sticking process in this embodiment, the 1st protective film formation process, the 1st support sheet exfoliation process, the dicing process, and the bonding process, the 1st protective film formation sheet in the 1st embodiment A method similar to the sticking step, the first protective film forming step, the first support sheet peeling step, the dicing step, and the bonding step can be employed.
　バックグラインド工程においては、図４Ｂに示すように、バンプ付ウエハ２の裏面２Ｂを研削する。このようにして、バンプ付ウエハ２の厚みを薄くすることができる。このバックグラインド工程においては、第１保護膜形成用シート１の第１支持シート１１が、バンプ付ウエハ２のバンプ形成面２Ａを保護すると共に、バンプ付ウエハ２を支持している。
　バックグラインドに用いる研削装置は、特に限定されず、公知の研削装置を用いることができる。また、バックグラインドの条件についても、特に限定されない。 In the back grinding process, as shown in FIG. 4B, the back surface 2B of the bumped wafer 2 is ground. In this way, the thickness of the bumped wafer 2 can be reduced. In this back grinding process, the first support sheet 11 of the first protective film forming sheet 1 protects the bump forming surface 2A of the bumped wafer 2 and supports the bumped wafer 2.
The grinding apparatus used for back grinding is not particularly limited, and a known grinding apparatus can be used. Also, the backgrinding conditions are not particularly limited.
　第２保護膜形成工程においては、図４Ｃに示すように、研削後のバンプ付ウエハ２の裏面２Ｂに第２保護膜形成層５を形成する。具体的には、第２保護膜形成層５を備えるシートを研削後のバンプ付ウエハ２の裏面２Ｂに貼り合わせる。そして、この第２保護膜形成層５を硬化させて、第２保護膜５ａを形成できる。この第２保護膜５ａにより、バンプ付チップ２ａの裏面２Ｂを保護できる。
　第２保護膜形成層５は、公知の熱硬化性樹脂を含有する熱硬化性樹脂組成物、または、公知のエネルギー線硬化性化合物を含有するエネルギー線硬化性樹脂組成物を用いて形成することができる。
　第２保護膜形成層５の形成方法は、特に限定されず、例えば、公知の裏面保護フィルムを用いて形成してもよい。
　第２保護膜形成層５を硬化させる条件は、第２保護膜形成層５の種類に応じて異なり、特に限定されない。例えば、第２保護膜形成層５が紫外線で硬化する場合には、紫外線を照射すればよい。また、第２保護膜形成層５が加熱により硬化する場合には、加熱処理を施せばよい。
　また、第２保護膜形成層５を硬化させて、第２保護膜５ａを形成する工程は、第２保護膜形成層５の形成後であれば、いつでもよい。第２保護膜５ａを形成する工程は、例えば、第１支持シート剥離工程の前に行えばよい。第１保護膜形成工程で第１支持シート１１側から紫外線を照射する場合には、第２支持シート３側からも同時に紫外線を照射すれば、一つの工程とすることができ、製造効率の点で好ましい。なお、第２保護膜５ａを形成する工程は、第２支持シート貼着工程の前でもよいし、ダイシング工程の前でもよいし、或いは、ボンディング工程の前でもよい。 In the second protective film forming step, as shown in FIG. 4C, a second protective film forming layer 5 is formed on the back surface 2B of the bumped wafer 2 after grinding. Specifically, the sheet provided with the second protective film forming layer 5 is bonded to the back surface 2B of the bumped wafer 2 after grinding. And this 2nd protective film formation layer 5 can be hardened, and the 2nd protective film 5a can be formed. The back surface 2B of the bumped chip 2a can be protected by the second protective film 5a.
The second protective film forming layer 5 is formed using a thermosetting resin composition containing a known thermosetting resin or an energy ray curable resin composition containing a known energy ray curable compound. Can do.
The formation method of the 2nd protective film formation layer 5 is not specifically limited, For example, you may form using a well-known back surface protective film.
Conditions for curing the second protective film forming layer 5 differ depending on the type of the second protective film forming layer 5 and are not particularly limited. For example, when the second protective film forming layer 5 is cured with ultraviolet rays, the ultraviolet rays may be irradiated. Moreover, what is necessary is just to heat-process, when the 2nd protective film formation layer 5 hardens | cures by heating.
Moreover, the process of hardening the 2nd protective film formation layer 5 and forming the 2nd protective film 5a may be any time after the formation of the 2nd protective film formation layer 5. The step of forming the second protective film 5a may be performed, for example, before the first support sheet peeling step. In the case of irradiating ultraviolet rays from the first support sheet 11 side in the first protective film forming step, if the ultraviolet rays are simultaneously irradiated also from the second support sheet 3 side, it can be made one step, and the point of manufacturing efficiency Is preferable. In addition, the process of forming the 2nd protective film 5a may be before a 2nd support sheet sticking process, may be before a dicing process, or may be before a bonding process.
　第２支持シート貼着工程においては、バンプ付ウエハ２の裏面２Ｂ側にある第２保護膜形成層５に、第２支持シート３の第２粘着剤層３２を貼り合わせる。
　貼着方法としては、前記第１実施形態における第２支持シート貼着工程での貼着方法と同様の方法を採用できる。 In the second support sheet attaching step, the second pressure-sensitive adhesive layer 32 of the second support sheet 3 is attached to the second protective film forming layer 5 on the back surface 2B side of the bumped wafer 2.
As a sticking method, the same method as the sticking method in the 2nd support sheet sticking process in the said 1st Embodiment is employable.
　（第２実施形態の作用効果）
　本実施形態によれば、前記第１実施形態の作用効果（１）～（５）の他に、次のような作用効果を奏することができる。
（６）バンプ付ウエハ２のバンプ形成面２Ａとは反対側の面（裏面２Ｂ）に、第２保護膜形成層５を形成できる。そして、第２保護膜形成層５を硬化させて、第２保護膜５ａとすることで、バンプ付チップ２ａの裏面２Ｂを第２保護膜５ａ（裏面保護膜）により保護できる。
（７）第１支持シート１１によりバンプ付ウエハ２を支持しながら、バンプ付ウエハ２の裏面２Ｂを研削できる。そして、バンプ付ウエハ２の厚みを薄くすることができる。 (Operational effect of the second embodiment)
According to the present embodiment, in addition to the operational effects (1) to (5) of the first embodiment, the following operational effects can be achieved.
(6) The second protective film forming layer 5 can be formed on the surface (back surface 2B) opposite to the bump forming surface 2A of the bumped wafer 2. Then, by curing the second protective film forming layer 5 to form the second protective film 5a, the back surface 2B of the bumped chip 2a can be protected by the second protective film 5a (back surface protective film).
(7) The back surface 2B of the bumped wafer 2 can be ground while the bumped wafer 2 is supported by the first support sheet 11. Further, the thickness of the bumped wafer 2 can be reduced.
　［第３実施形態］
　次に、本発明の第３実施形態を図面に基づいて説明する。
　なお、本実施形態の第１保護膜形成用シート１および基板４は、前記第１実施形態における第１保護膜形成用シート１および基板４とそれぞれ実質的に同様であるから、その詳細な説明は省略または簡略化する。
　第３実施形態に係る半導体装置の製造方法では、前記第２実施形態と比較して、第２支持シートおよび第２保護膜形成層を備える第２保護膜形成用シートを用いて、第２支持シートおよび第２保護膜形成層を一つの工程で形成する点で相違する。
　まず、本実施形態に用いる第２保護膜形成用シートについて説明する。 [Third Embodiment]
Next, 3rd Embodiment of this invention is described based on drawing.
The first protective film forming sheet 1 and the substrate 4 of the present embodiment are substantially the same as the first protective film forming sheet 1 and the substrate 4 of the first embodiment, respectively. Is omitted or simplified.
In the method for manufacturing a semiconductor device according to the third embodiment, compared to the second embodiment, the second support film and the second protective film forming layer including the second protective film forming layer are used to provide the second support. The difference is that the sheet and the second protective film forming layer are formed in one step.
First, the 2nd protective film formation sheet used for this embodiment is demonstrated.
　（第２保護膜形成用シート）
　本実施形態に用いる第２保護膜形成用シート６は、図５に示すように、第２基材３１および第２粘着剤層３２を備える第２支持シート３と、第２保護膜形成層５と、を備えている。なお、第２保護膜形成層５の表面は、ウエハに貼着されるまでの間、剥離フィルムなどにより保護されていてもよい。
　なお、第２支持シート３と、第２保護膜形成層５とは、図５に示すように、同じサイズであってもよいが、これに限定されない。例えば、第２保護膜形成層５のサイズは、バンプ付ウエハ２と同じサイズか、或いは、バンプ付ウエハ２より大きいサイズであってもよい。この場合、第２支持シート３のサイズは、第２保護膜形成層５より大きいサイズであればよい。 (Second protective film forming sheet)
As shown in FIG. 5, the second protective film forming sheet 6 used in the present embodiment includes the second support sheet 3 including the second base material 31 and the second pressure-sensitive adhesive layer 32, and the second protective film forming layer 5. And. In addition, the surface of the 2nd protective film formation layer 5 may be protected by the peeling film etc. until it adheres to a wafer.
In addition, as shown in FIG. 5, the 2nd support sheet 3 and the 2nd protective film formation layer 5 may be the same size, However, It is not limited to this. For example, the size of the second protective film forming layer 5 may be the same size as the bumped wafer 2 or larger than the bumped wafer 2. In this case, the size of the second support sheet 3 may be larger than that of the second protective film forming layer 5.
　第２支持シート３における第２基材３１および第２粘着剤層３２は、前記第１実施形態における第２基材３１および第２粘着剤層３２と同様である。
　第２保護膜形成層５は、前記第２実施形態における第２保護膜形成層５と同様である。 The second base material 31 and the second pressure-sensitive adhesive layer 32 in the second support sheet 3 are the same as the second base material 31 and the second pressure-sensitive adhesive layer 32 in the first embodiment.
The second protective film forming layer 5 is the same as the second protective film forming layer 5 in the second embodiment.
　（半導体装置の製造方法）
　次に、本実施形態に係る半導体装置の製造方法について説明する。
　図６Ａ～図６Ｆは、第３実施形態に係る半導体装置の製造方法を示す説明図である。 (Method for manufacturing semiconductor device)
Next, a method for manufacturing the semiconductor device according to the present embodiment will be described.
6A to 6F are explanatory views showing a method for manufacturing a semiconductor device according to the third embodiment.
　本実施形態に係る半導体装置の製造方法においては、先ず、図６Ａに示すように、第１支持シート１１およびエネルギー線硬化性樹脂層１２を備える第１保護膜形成用シート１のエネルギー線硬化性樹脂層１２を、バンプ付ウエハ２のバンプ形成面２Ａに、貼り合わせる工程（第１保護膜形成用シート貼着工程）を備える方法により、バンプ付ウエハ２のバンプ形成面２Ａにエネルギー線硬化性樹脂層１２を形成する。
　次に、図６Ｂに示すように、バンプ付ウエハ２の裏面２Ｂを研削する工程（バックグラインド工程）を行う。そして、図６Ｃに示すように、第２支持シート３および第２保護膜形成層５を備える第２保護膜形成用シート６の第２保護膜形成層５を、研削後のバンプ付ウエハ２の裏面２Ｂに、貼り合わせる工程（第２保護膜形成用シート貼着工程）を備える方法により、バンプ付ウエハ２の裏面２Ｂに第２保護膜形成層５を形成する。
　次に、図６Ｄに示すように、エネルギー線硬化性樹脂層１２にエネルギー線を照射して硬化させて、第１保護膜１２ａを形成する工程（第１保護膜形成工程）と、第１支持シート１１を剥離する工程（第１支持シート剥離工程）とを行う。これらの工程を備える方法により、第１支持シート１１を、硬化後の第１保護膜１２ａから剥離する。
　次いで、図６Ｅおよび図６Ｆに示すように、第１保護膜１２ａを有するバンプ付ウエハ２をダイシングする工程（ダイシング工程）と、ダイシングして個片化された、第１保護膜１２ａを有するバンプ付チップ２ａをピックアップし、被着体である基板４にボンディングする工程（ボンディング工程）とを行う。これらの工程を備える方法により、バンプ付チップ２ａのバンプ形成面２Ａおよび裏面２Ｂが保護された半導体装置１００を製造する。 In the method for manufacturing a semiconductor device according to the present embodiment, first, as shown in FIG. 6A, the energy ray curable property of the first protective film forming sheet 1 including the first support sheet 11 and the energy ray curable resin layer 12. The resin layer 12 is cured with energy rays on the bump forming surface 2A of the bumped wafer 2 by a method including a step of bonding the resin layer 12 to the bump forming surface 2A of the bumped wafer 2 (first protective film forming sheet adhering step). The resin layer 12 is formed.
Next, as shown in FIG. 6B, a process of grinding the back surface 2B of the bumped wafer 2 (back grinding process) is performed. 6C, the second protective film forming layer 5 of the second protective film forming sheet 6 including the second support sheet 3 and the second protective film forming layer 5 is formed on the bumped wafer 2 after grinding. The second protective film forming layer 5 is formed on the back surface 2B of the bumped wafer 2 by a method including a step of bonding to the back surface 2B (second protective film forming sheet adhering step).
Next, as shown in FIG. 6D, the energy ray curable resin layer 12 is irradiated with energy rays and cured to form a first protective film 12a (first protective film forming step), and a first support A step of peeling the sheet 11 (first support sheet peeling step) is performed. The 1st support sheet 11 is peeled from the 1st protective film 12a after hardening by the method provided with these processes.
Next, as shown in FIGS. 6E and 6F, a step of dicing the bumped wafer 2 having the first protective film 12a (dicing step), and a bump having the first protective film 12a diced into individual pieces A process (bonding process) of picking up the attached chip 2a and bonding it to the substrate 4 as an adherend is performed. By the method including these steps, the semiconductor device 100 in which the bump forming surface 2A and the back surface 2B of the bumped chip 2a are protected is manufactured.
　本実施形態における第１保護膜形成用シート貼着工程、第１保護膜形成工程、第１支持シート剥離工程、ダイシング工程およびボンディング工程については、前記第１実施形態における第１保護膜形成用シート貼着工程、第１保護膜形成工程、第１支持シート剥離工程、ダイシング工程およびボンディング工程と同様の方法を採用できる。
　本実施形態におけるバックグラインド工程については、前記第２実施形態におけるバックグラインド工程と同様の方法を採用できる。 About the 1st protective film formation sheet sticking process in this embodiment, the 1st protective film formation process, the 1st support sheet exfoliation process, the dicing process, and the bonding process, the 1st protective film formation sheet in the 1st embodiment A method similar to the sticking step, the first protective film forming step, the first support sheet peeling step, the dicing step, and the bonding step can be employed.
About the back grinding process in this embodiment, the method similar to the back grinding process in the said 2nd Embodiment is employable.
　第２保護膜形成用シート貼着工程においては、図６Ｃに示すように、第２保護膜形成用シート６の第２保護膜形成層５を、研削後のバンプ付ウエハ２の裏面２Ｂに貼り合わせる。このようにして、研削後のバンプ付ウエハ２の裏面２Ｂに、第２保護膜形成層５を形成すると共に、第２支持シート３も形成できる。
　ここで、貼着方法としては公知の方法を採用でき、特に限定されないが、圧着による方法が好ましい。圧着は、通常、圧着ロールなどにより押圧しながら行われる。圧着の条件は特に限定されないが、圧着温度は、４０℃以上１２０℃以下が好ましい。ロール圧力は、０．１ＭＰａ以上２０ＭＰａ以下が好ましい。圧着速度は、１ｍｍ／ｓｅｃ以上２０ｍｍ／ｓｅｃ以下が好ましい。 In the second protective film forming sheet attaching step, as shown in FIG. 6C, the second protective film forming layer 5 of the second protective film forming sheet 6 is attached to the back surface 2B of the bumped wafer 2 after grinding. Match. In this way, the second protective film forming layer 5 and the second support sheet 3 can be formed on the back surface 2B of the bumped wafer 2 after grinding.
Here, as a sticking method, a known method can be adopted and is not particularly limited, but a method by pressure bonding is preferable. The crimping is usually performed while pressing with a crimping roll or the like. The conditions for pressure bonding are not particularly limited, but the pressure bonding temperature is preferably 40 ° C. or higher and 120 ° C. or lower. The roll pressure is preferably from 0.1 MPa to 20 MPa. The crimping speed is preferably 1 mm / sec or more and 20 mm / sec or less.
　（第３実施形態の作用効果）
　本実施形態によれば、前記第１実施形態の作用効果（１）～（５）、並びに、前記第２実施形態の作用効果（６）および（７）の他に、次のような作用効果を奏することができる。
（８）第２保護膜形成層５と第２支持シート３とを一つの工程で形成できるので、製造効率を向上できる。 (Operational effect of the third embodiment)
According to the present embodiment, in addition to the operational effects (1) to (5) of the first embodiment and the operational effects (6) and (7) of the second embodiment, the following operational effects are provided. Can be played.
(8) Since the 2nd protective film formation layer 5 and the 2nd support sheet 3 can be formed by one process, manufacturing efficiency can be improved.
　［実施形態の変形］
　本発明は前述の実施形態に限定されず、本発明の目的を達成できる範囲での変形、改良などは本発明に含まれる。
　例えば、前述の実施形態では、第１支持シート１１（第１基材１１１および第１粘着剤層１１２）と、エネルギー線硬化性樹脂層１２とを備える第１保護膜形成用シート１を用いているが、これに限定されない。例えば、第１保護膜形成用シート１としては、下記（i）～（viii）に示すような積層シートが挙げられる。なお、スラッシュは層の区切りを示している。
（i）　第１基材／エネルギー線硬化性樹脂層
（ii）　第１基材／第１粘着剤層／エネルギー線硬化性樹脂層
（iii）　第１基材／中間層／エネルギー線硬化性樹脂層
（iv）　第１基材／中間層／第１粘着剤層／エネルギー線硬化性樹脂層
（v）　最外層／第１基材／エネルギー線硬化性樹脂層
（vi）　最外層／第１基材／第１粘着剤層／エネルギー線硬化性樹脂層
（vii）　最外層／第１基材／中間層／エネルギー線硬化性樹脂層
（viii）　最外層／第１基材／中間層／第１粘着剤層／エネルギー線硬化性樹脂層
　ここで、中間層としては、緩衝層、易接着コート層および帯電防止層などが挙げられる。中間層の材質としては、特に限定はされず、たとえばアクリル系、ゴム系、シリコーン系などの各種の粘着剤組成物、および紫外線硬化型樹脂、並びに、熱可塑性エラストマーなどが用いられる。最外層としては、易滑性コート層、緩衝層および帯電防止層などが挙げられる。また、第１基材の積層面（エネルギー線硬化性樹脂層、第１粘着剤層または中間層が積層される面）には、表面処理が施されていてもよい。 [Modification of Embodiment]
The present invention is not limited to the above-described embodiments, and modifications, improvements and the like within the scope that can achieve the object of the present invention are included in the present invention.
For example, in the above-described embodiment, the first protective film forming sheet 1 including the first support sheet 11 (the first base material 111 and the first pressure-sensitive adhesive layer 112) and the energy ray curable resin layer 12 is used. However, it is not limited to this. For example, examples of the first protective film forming sheet 1 include laminated sheets as shown in the following (i) to (viii). Note that the slash indicates a layer separation.
(I) First substrate / energy ray curable resin layer (ii) First substrate / first pressure-sensitive adhesive layer / energy ray curable resin layer (iii) First substrate / intermediate layer / energy ray curable resin Layer (iv) 1st base material / intermediate layer / first pressure-sensitive adhesive layer / energy ray curable resin layer (v) outermost layer / first base material / energy ray curable resin layer (vi) outermost layer / first base Material / first adhesive layer / energy ray curable resin layer (vii) outermost layer / first substrate / intermediate layer / energy ray curable resin layer (viii) outermost layer / first substrate / intermediate layer / first Adhesive layer / energy ray curable resin layer Here, examples of the intermediate layer include a buffer layer, an easy-adhesion coat layer, and an antistatic layer. The material for the intermediate layer is not particularly limited, and for example, various pressure-sensitive adhesive compositions such as acrylic, rubber-based, and silicone-based materials, ultraviolet curable resins, and thermoplastic elastomers are used. Examples of the outermost layer include a slippery coat layer, a buffer layer, and an antistatic layer. Moreover, surface treatment may be given to the lamination surface (surface on which the energy ray curable resin layer, the first pressure-sensitive adhesive layer, or the intermediate layer is laminated) of the first base material.
　前述の実施形態では、第２基材３１と、第２粘着剤層３２とを備える第２支持シート３を用いているが、これに限定されない。例えば、第２支持シート３としては、下記（i）～（viii）に示すような単層シートまたは積層シートが挙げられる。なお、説明の便宜上、被着物（第２保護膜形成層５または半導体ウエハ２１）を示している。
（i）　第２基材／被着物
（ii）　第２基材／第２粘着剤層／被着物
（iii）　第２基材／中間層／被着物
（iv）　第２基材／中間層／第２粘着剤層／被着物
（v）　最外層／第２基材／被着物
（vi）　最外層／第２基材／第２粘着剤層／被着物
（vii）　最外層／第２基材／中間層／被着物
（viii）　最外層／第２基材／中間層／第２粘着剤層／被着物
　ここで、中間層としては、易接着コート層、緩衝層および帯電防止層などが挙げられる。また、中間層の材質としては、第１支持シート１１での中間層と同様である。最外層としては、易滑性コート層、緩衝層および帯電防止層などが挙げられる。また、第２基材の積層面（被着物、第２粘着剤層または中間層が積層される面）には、表面処理が施されていてもよい。 In the above-described embodiment, the second support sheet 3 including the second base material 31 and the second pressure-sensitive adhesive layer 32 is used, but the present invention is not limited to this. For example, examples of the second support sheet 3 include single layer sheets and laminated sheets as shown in the following (i) to (viii). For convenience of explanation, the adherend (second protective film forming layer 5 or semiconductor wafer 21) is shown.
(I) Second substrate / adherent (ii) Second substrate / second pressure-sensitive adhesive layer / adherent (iii) Second substrate / intermediate layer / adherent (iv) Second substrate / intermediate layer / Second pressure-sensitive adhesive layer / adherend (v) Outermost layer / second base material / adherend (vi) Outermost layer / second base material / second pressure-sensitive adhesive layer / adherend (vii) Outermost layer / second base material / Intermediate layer / Adherent (viii) Outermost layer / Second substrate / Intermediate layer / Second pressure-sensitive adhesive layer / Adherent Here, examples of the intermediate layer include an easy-adhesion coat layer, a buffer layer and an antistatic layer. It is done. Further, the material of the intermediate layer is the same as that of the intermediate layer in the first support sheet 11. Examples of the outermost layer include a slippery coat layer, a buffer layer, and an antistatic layer. Moreover, surface treatment may be given to the lamination surface (the surface on which the adherend, the second pressure-sensitive adhesive layer, or the intermediate layer is laminated) of the second base material.
　前述の実施形態では、第１支持シート１１および第２支持シート３には、特に耐熱性は求められないが、これに限定されない。例えば、第１支持シート１１および第２支持シート３として、耐熱性を有するシートを用いてもよい。このような耐熱性を有するシートを用いれば、加熱工程が含まれる半導体装置の製造方法にも適用できる。
　前述の第１実施形態では、バックグラインド工程を行っていないが、これに限定されない。例えば、第１保護膜形成用シート貼着工程の後に、バックグラインド工程を行ってもよい。この場合、第１支持シート１１によりバンプ付ウエハ２を支持しながら、バンプ付ウエハ２の裏面２Ｂを研削できる。そして、バンプ付ウエハ２の厚みを薄くすることができる。
　前述の第２実施形態では、第２保護膜形成層５からなるシートを研削後のバンプ付ウエハ２の裏面２Ｂに貼り合わせているが、これに限定されない。例えば、樹脂組成物を研削後のバンプ付ウエハ２の裏面２Ｂに塗布し、硬化させることにより、第２保護膜形成層５を形成してもよい。 In the above-described embodiment, the first support sheet 11 and the second support sheet 3 are not particularly required to have heat resistance, but are not limited thereto. For example, a sheet having heat resistance may be used as the first support sheet 11 and the second support sheet 3. If a sheet having such heat resistance is used, it can be applied to a method for manufacturing a semiconductor device including a heating step.
In the first embodiment described above, the back grinding process is not performed, but the present invention is not limited to this. For example, a back grinding process may be performed after the first protective film forming sheet attaching process. In this case, the back surface 2 </ b> B of the bumped wafer 2 can be ground while the bumped wafer 2 is supported by the first support sheet 11. Further, the thickness of the bumped wafer 2 can be reduced.
In the second embodiment described above, the sheet made of the second protective film forming layer 5 is bonded to the back surface 2B of the bumped wafer 2 after grinding, but the present invention is not limited to this. For example, the second protective film forming layer 5 may be formed by applying and curing the resin composition on the back surface 2B of the bumped wafer 2 after grinding.
　本発明は、半導体装置の製造方法に利用できる。 The present invention can be used in a method for manufacturing a semiconductor device.
　１…第１保護膜形成用シート、１１…第１支持シート、１２…エネルギー線硬化性樹脂層、１２ａ…第１保護膜、２…バンプ付ウエハ、２２…バンプ、２Ａ…バンプ形成面、２ａ…バンプ付チップ、３…第２支持シート、５…第２保護膜形成層、５ａ…第２保護膜、６…第２保護膜形成用シート、１００…半導体装置。 DESCRIPTION OF SYMBOLS 1 ... Sheet for 1st protective film formation, 11 ... 1st support sheet, 12 ... Energy beam curable resin layer, 12a ... 1st protective film, 2 ... Wafer with bump, 22 ... Bump, 2A ... Bump formation surface, 2a DESCRIPTION OF SYMBOLS ... Chip with bump, 3 ... 2nd support sheet, 5 ... 2nd protective film formation layer, 5a ... 2nd protective film, 6 ... Sheet for 2nd protective film formation, 100 ... Semiconductor device.

Claims (6)

  1. 　第１支持シートおよびエネルギー線硬化性樹脂層を備える第１保護膜形成用シートの前記エネルギー線硬化性樹脂層を、複数のバンプが形成されているバンプ付ウエハのバンプ形成面に、貼り合わせる工程と、
    　前記エネルギー線硬化性樹脂層にエネルギー線を照射して硬化させて、第１保護膜を形成する工程と、
    　前記第１支持シートを剥離する工程と、
    　前記第１保護膜を有する前記バンプ付ウエハをダイシングする工程と、を備える
    　ことを特徴とする半導体装置の製造方法。     A process of bonding the energy ray curable resin layer of the first protective film forming sheet including the first support sheet and the energy ray curable resin layer to a bump forming surface of a bumped wafer on which a plurality of bumps are formed. When,
    Irradiating the energy ray curable resin layer with an energy ray to cure, and forming a first protective film;
    Peeling the first support sheet;
    Dicing the bumped wafer having the first protective film. A method of manufacturing a semiconductor device, comprising:
  2. 　請求項１に記載の半導体装置の製造方法において、
    　第２保護膜形成層を、前記バンプ付ウエハのバンプ形成面とは反対側の面に、形成する工程と、
    　第２支持シートを、前記第２保護膜形成層に、貼り合わせる工程と、をさらに備える
    　ことを特徴とする半導体装置の製造方法。     In the manufacturing method of the semiconductor device according to claim 1,
    Forming a second protective film forming layer on the surface opposite to the bump forming surface of the bumped wafer;
    And a step of bonding the second support sheet to the second protective film forming layer. A method for manufacturing a semiconductor device, comprising:
  3. 　請求項１に記載の半導体装置の製造方法において、
    　第２支持シートおよび第２保護膜形成層を備える第２保護膜形成用シートの前記第２保護膜形成層を、前記バンプ付ウエハのバンプ形成面とは反対側の面に、貼り合わせる工程を、さらに備える
    　ことを特徴とする半導体装置の製造方法。     In the manufacturing method of the semiconductor device according to claim 1,
    Bonding the second protective film forming layer of the second protective film forming sheet comprising the second support sheet and the second protective film forming layer to a surface opposite to the bump forming surface of the bumped wafer; A method for manufacturing a semiconductor device, further comprising:
  4. 　請求項２または請求項３に記載の半導体装置の製造方法において、
    　前記第２保護膜形成層を硬化させて第２保護膜を形成する工程を、さらに備える
    　ことを特徴とする半導体装置の製造方法。     In the manufacturing method of the semiconductor device according to claim 2 or 3,
    A method for manufacturing a semiconductor device, further comprising the step of curing the second protective film forming layer to form a second protective film.
  5. 　請求項１から請求項４のいずれか１項に記載の半導体装置の製造方法において、
    　ダイシングして個片化された、前記第１保護膜を有するバンプ付チップを、ボンディングする工程を、さらに備える
    　ことを特徴とする半導体装置の製造方法。     In the manufacturing method of the semiconductor device of any one of Claims 1-4,
    A method of manufacturing a semiconductor device, further comprising a step of bonding the bumped chip having the first protective film, which is diced into individual pieces.
  6. 　請求項１から請求項５のいずれか１項に記載の半導体装置の製造方法において、
    　前記第１支持シートが、第１基材および第１粘着剤層を備え、
    　前記第１粘着剤層が、前記エネルギー線硬化性樹脂層と接している
    　ことを特徴とする半導体装置の製造方法。     In the manufacturing method of the semiconductor device of any one of Claims 1-5,
    The first support sheet includes a first base material and a first pressure-sensitive adhesive layer,
    The method for manufacturing a semiconductor device, wherein the first pressure-sensitive adhesive layer is in contact with the energy ray curable resin layer.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020085220A1 (en) * 2018-10-22 2020-04-30 リンテック株式会社 Semiconductor device manufacturing method
JP2021082768A (en) * 2019-11-21 2021-05-27 リンテック株式会社 Kit, and method for manufacturing third laminate by use thereof
JP2021082767A (en) * 2019-11-21 2021-05-27 リンテック株式会社 Kit, and method for manufacturing third laminate by use thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102018200656A1 (en) 2018-01-16 2019-07-18 Disco Corporation Method for processing a wafer

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010056328A (en) * 2008-08-28 2010-03-11 Furukawa Electric Co Ltd:The Film for chip protection
JP2012028404A (en) * 2010-07-20 2012-02-09 Nitto Denko Corp Film for backside of flip-chip semiconductor, and film for backside of dicing tape integrated semiconductor
JP2012169482A (en) * 2011-02-15 2012-09-06 Nitto Denko Corp Protection layer formation film
JP2012244115A (en) * 2011-05-24 2012-12-10 Sekisui Chem Co Ltd Backgrind-underfill integrated tape, and mounting method of semiconductor chip
WO2014142154A1 (en) * 2013-03-13 2014-09-18 日東電工株式会社 Reinforcing sheet and process for producing semiconductor device through secondary mounting
WO2015162807A1 (en) * 2014-04-22 2015-10-29 デクセリアルズ株式会社 Semiconductor device manufacturing method
WO2015162808A1 (en) * 2014-04-22 2015-10-29 デクセリアルズ株式会社 Protective tape and semiconductor device manufacturing method using same

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI280618B (en) * 2005-06-08 2007-05-01 Advanced Semiconductor Eng Method for machining a wafer

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010056328A (en) * 2008-08-28 2010-03-11 Furukawa Electric Co Ltd:The Film for chip protection
JP2012028404A (en) * 2010-07-20 2012-02-09 Nitto Denko Corp Film for backside of flip-chip semiconductor, and film for backside of dicing tape integrated semiconductor
JP2012169482A (en) * 2011-02-15 2012-09-06 Nitto Denko Corp Protection layer formation film
JP2012244115A (en) * 2011-05-24 2012-12-10 Sekisui Chem Co Ltd Backgrind-underfill integrated tape, and mounting method of semiconductor chip
WO2014142154A1 (en) * 2013-03-13 2014-09-18 日東電工株式会社 Reinforcing sheet and process for producing semiconductor device through secondary mounting
WO2015162807A1 (en) * 2014-04-22 2015-10-29 デクセリアルズ株式会社 Semiconductor device manufacturing method
WO2015162808A1 (en) * 2014-04-22 2015-10-29 デクセリアルズ株式会社 Protective tape and semiconductor device manufacturing method using same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020085220A1 (en) * 2018-10-22 2020-04-30 リンテック株式会社 Semiconductor device manufacturing method
JPWO2020085220A1 (en) * 2018-10-22 2021-09-30 リンテック株式会社 Manufacturing method of semiconductor devices
JP7461298B2 (en) 2018-10-22 2024-04-03 リンテック株式会社 Manufacturing method of semiconductor device
JP2021082768A (en) * 2019-11-21 2021-05-27 リンテック株式会社 Kit, and method for manufacturing third laminate by use thereof
JP2021082767A (en) * 2019-11-21 2021-05-27 リンテック株式会社 Kit, and method for manufacturing third laminate by use thereof
JP7540885B2 (en) 2019-11-21 2024-08-27 リンテック株式会社 Kit and method for producing third laminate using said kit
JP7540884B2 (en) 2019-11-21 2024-08-27 リンテック株式会社 Kit and method for producing third laminate using said kit

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