WO2017059769A1 - 一种Doherty功率放大电路 - Google Patents

一种Doherty功率放大电路 Download PDF

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WO2017059769A1
WO2017059769A1 PCT/CN2016/099605 CN2016099605W WO2017059769A1 WO 2017059769 A1 WO2017059769 A1 WO 2017059769A1 CN 2016099605 W CN2016099605 W CN 2016099605W WO 2017059769 A1 WO2017059769 A1 WO 2017059769A1
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doherty power
impedance
line
circuit
power amplifying
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PCT/CN2016/099605
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English (en)
French (fr)
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艾宝强
方杨
杨世民
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大唐移动通信设备有限公司
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Priority to EP16853074.9A priority Critical patent/EP3361633B1/en
Priority to JP2018517726A priority patent/JP6616499B2/ja
Priority to US15/767,135 priority patent/US10511265B2/en
Publication of WO2017059769A1 publication Critical patent/WO2017059769A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/42—Modifications of amplifiers to extend the bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H03F1/565—Modifications of input or output impedances, not otherwise provided for using inductive elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/111—Indexing scheme relating to amplifiers the amplifier being a dual or triple band amplifier, e.g. 900 and 1800 MHz, e.g. switched or not switched, simultaneously or not
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/222—A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/309—Indexing scheme relating to amplifiers the loading circuit of an amplifying stage being a series resonance circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/387—A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier

Definitions

  • the present invention relates to circuit technology, and more particularly to a Doherty power amplifying circuit.
  • the embodiment of the invention provides a Doherty power amplifying circuit for overcoming the narrowband characteristic of the traditional Doherty radio frequency power amplifier, and effectively improving the broadband performance while ensuring high efficiency.
  • a Doherty power amplifying circuit comprising a power splitter 1, a carrier amplifier branch 2, a Peaking amplifier branch 4 and a combiner 3, and a series resonance is arranged between the carrier amplifier branch 2 and the combiner 3
  • the circuit 5, the series resonant circuit 5 is used to be inductive when the operating frequency of the Doherty power amplification is higher than the center frequency, and is capacitive when the operating frequency of the Doherty power amplifier circuit is lower than the center frequency And the impedance is 0 when the operating frequency of the Doherty power amplifying circuit is the center frequency.
  • the Carrirer amplifier branch 2 includes a first input matching circuit 20, a carrier amplifier tube 21, and a series An output matching circuit 22 and a first compensation line 23; wherein one end of the first input matching circuit 20 is connected to the power splitter 1, and one end of the first compensation line 23 is connected to the series resonant circuit 5.
  • the carrier amplifier tube 11 uses an LDMOS device or a GaN device, and the first compensation line 23 has a characteristic impedance of 50 ohms.
  • the combiner 3 includes a first ⁇ /4 impedance transform line 30, a second ⁇ /4 impedance transform line 31, and a first load 32 connected in series; wherein both ends of the first ⁇ /4 impedance transform line 30 Connected to the series resonant circuit 5 and the Peaking amplifier branch 4, respectively, the wavelength of the impedance conversion line represented by ⁇ .
  • the characteristic impedance of the first ⁇ /4 impedance conversion line 30 is 50 ohms
  • the characteristic impedance of the second ⁇ /4 impedance conversion line 31 is Ohm
  • the resistance of the first load 32 is 50 ohms
  • the Peaking amplifier branch 4 includes a second compensation line 40 connected in series, a second input matching circuit 41, a Peaking amplification tube 42, a second output matching circuit 43, a third ⁇ /4 impedance conversion line 44, and a third The compensation line 45; wherein one end of the second compensation line 40 is connected to the power splitter 1, and one end of the third compensation line 45 is connected to the combiner 3, and the wavelength of the impedance conversion line indicated by ⁇ .
  • the Peaking amplification tube 42 uses an LDMOS device or a GaN device, and the characteristic impedance of the third ⁇ /4 impedance conversion line 44 is Ohm, the second compensation line 40 and the characteristic impedance are 50 ohms, and the characteristic impedance of the third compensation line 45 is Ohm, among them,
  • the reactance introduced by the combiner in the traditional Doherty power amplifying circuit is neutralized, and the high efficiency of the Doherty power amplifying circuit is ensured.
  • the load traction effect of the Doherty power amplifier circuit is improved, and the load traction effect is more widened, so that the communication equipment supporting multiple frequency bands and multi-system work can be realized, and the production and operation costs are effectively reduced.
  • FIG. 1 is a schematic diagram of a principle of a radio frequency power amplifying circuit according to an embodiment of the present invention
  • FIG. 2 is a schematic diagram of an example of a radio frequency power amplifying circuit according to an embodiment of the present invention
  • FIG. 3 is a schematic diagram of implementation of a combiner in an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a load pulling effect of a 1.2 GHz-1.8 GHz conventional Doherty power amplifier circuit in the prior art
  • FIG. 5 is a schematic diagram of a load pulling effect of a 1.2 GHz-1.8 GHz Doherty power amplifier circuit according to an embodiment of the present invention.
  • the present invention redesigns the Doherty circuit structure, effectively improving the broadband performance of the Doherty power amplifying circuit, and realizing the function of multi-band signal simultaneous high-efficiency amplification.
  • the redesigned Doherty power amplifying circuit sequentially includes a power splitter 1, a carrier amplifier branch 2, a (peak) Peaking amplifier branch 4, and a combiner 3, specifically
  • the connection relationship is that the two ends of the power splitter 1 are respectively connected to the carrier amplifier branch 2 and the Peaking amplifier branch 4, and the other end of the carrier amplifier branch 2 and the other end of the Peaking amplifier branch 4 are respectively The combiner 3 is connected.
  • a series resonant circuit 5 is disposed between the carrier amplifier branch 2 and the combiner 3, and the series resonant circuit 5 is used to sense when the operating frequency of the Doherty circuit is higher than the center frequency, in the above Doherty circuit.
  • the operating frequency is more capacitive than the center frequency, and the impedance is zero when the operating frequency of the Doherty circuit is the center frequency.
  • the carrier amplifier branch 2 includes a first input matching circuit 20, a carrier amplifier tube 21, a first output matching circuit 22, and a first compensation line 23 connected in series; wherein, the first input matching circuit One end of 20 is connected to the power splitter 1, and one end of the first compensation line 23 is connected to the series resonant circuit 5.
  • the carrier amplifying tube 11 is a laterally diffused metal oxide (LDMOS) device or a gallium nitride (GaN) device, and the first compensation line 23 has a characteristic impedance of 50 ohms.
  • LDMOS laterally diffused metal oxide
  • GaN gallium nitride
  • the combiner 3 includes a first ⁇ /4 impedance transform line 30, a second ⁇ /4 impedance transform line 31, and a first load 32 connected in series; wherein, the first ⁇ /4 impedance transform line 30 Both ends are connected to the series resonant circuit 5 and the Peaking amplifier branch 4, respectively.
  • the Peaking amplifier branch 4 includes a second compensation line 40 connected in series, a second input matching circuit 41, a Peaking amplification tube 42, a second output matching circuit 43, a third ⁇ /4 impedance conversion line 44, and The third compensation line 45; wherein one end of the second compensation line 40 is connected to the power splitter 1, and one end of the third compensation line 45 is connected to the combiner 3.
  • the carrier amplifier tube 11 uses an LDMOS device or a GaN device
  • the first compensation line 23 has a characteristic impedance of 50 ohms; preferably, the first ⁇ /4 impedance
  • the characteristic impedance of the conversion line 30 is 50 ohms
  • the characteristic impedance of the second ⁇ /4 impedance conversion line 31 is Oh
  • the resistance of the first load 32 is 50 ohms
  • the Peaking amplifier tube 42 uses an LDMOS device or a GaN device
  • the characteristic impedance of the third ⁇ /4 impedance conversion line 44 is Ohmic
  • the characteristic impedance of the third compensation line 45 is
  • the wavelengths of the impedance transformation lines represented by ohms and ⁇ are the same as explained later, and will not be described again.
  • the second compensation line 40 is provided for phase alignment of the carrier amplifier branch 2 and the Peaking amplifier branch 4.
  • the characteristic impedance of the second compensation line 40 is 50 ohms.
  • the proportional relationship between the maximum output capability of the Peaking amplification tube 42 and the maximum output capability of the Carrier amplification tube 21 is to satisfy the predicted value a, that is,
  • the first input matching circuit 20 and the first output matching circuit 22 can match the impedance of the carrier amplifying tube 21 to 50 ohms, and the second input matching circuit 41 and the second output matching circuit 43 can push the amplification tube 42.
  • the impedance is matched to 50 ohms to achieve the corresponding performance.
  • the first compensation line 23 having a characteristic impedance of 50 ohms in the carrier amplifier branch 2 and the first ⁇ /4 impedance conversion line 30 having a characteristic impedance of 50 ohms in the combiner 3 are at -20 log (1+a).
  • the load of the carrier amplifier tube 21 is modulated from 50 ohms to 50 ⁇ a ohms to achieve high efficiency;
  • the characteristic impedance in the Peaking amplifier branch 4 is The function of the third ⁇ /4 impedance conversion line 44 of ohms is to transform the 50 ohm load impedance of the Peaking amplification tube 42 to Ohm, to meet the power proportional relationship a of the Peaking amplification tube 42 and the Carrier amplification tube 21; and the characteristic impedance is The function of the ohmic third compensation line 45 is to realize the open circuit effect of the Peaking amplification tube branch under the -20 log (1+a) dB back-off power, and reduce the power leakage to ensure high efficiency, due to the first ⁇ /4 impedance transformation.
  • the narrow band characteristics of the line 30, the third ⁇ /4 impedance conversion line 44, the first compensation line 23, and the third compensation line 45 in the conventional design mode, the problem of narrow banding of the Doherty power
  • the series resonant circuit 5 is added to increase the bandwidth of the circuit. This is because the series resonant circuit 5 has the following characteristics: the impedance is 0 when the operating frequency of the Doherty power amplifying circuit is the center frequency, and is inductive when the operating frequency of the Doherty power amplifying circuit is higher than the center frequency.
  • the Doherty power amplifier circuit exhibits a capacitive frequency below the operating frequency; where the center frequency is the entire band
  • the center of the width for example, at a fixed bandwidth, the highest working frequency is F1, and the lowest operating frequency is F2, then the center frequency is (F1+F2)/2.
  • the combiner in the traditional Doherty power amplifier circuit has the following characteristics, the working frequency is more capacitive than the center frequency, and the working frequency is lower than the center frequency. It is obvious that the characteristic and the series resonant circuit 5 are just right. On the contrary, therefore, the series resonant circuit 5 can cancel out the reactance part of the Doherty power amplifying circuit during the working process, so that the input impedance of the combiner exhibits an approximately pure resistance state within a certain bandwidth, which can effectively broaden the load of the conventional Doherty power amplifying circuit. Traction bandwidth.
  • the load pulling effect is "0"/4 impedance of the 50 ohm of the combiner 3 in the case of -20 log (1+a) dB back-off power.
  • Transform line 30 is implemented, but due to its narrow banding characteristics, only the center frequency point can achieve the desired load pull, and the farther away from the center frequency, the worse the load traction effect.
  • the load traction effect) Figure 4 fully illustrates the narrowband characteristics of the traditional Doherty power amplifier circuit.
  • the 50 ohm first ⁇ /4 impedance conversion line 30 has narrowband characteristics and cannot be effectively
  • the center frequency point except for the center frequency point, other frequency points are distributed on both sides of the real axis of the Smith chart (as shown by the curve m1m2), which are capacitive and inductive respectively, and ideal.
  • Load traction is achieved by pulling the entire axis into the real axis, that is, exhibiting pure resistance characteristics.
  • Load traction effect specifically, as shown in FIG. 5, after increasing the series resonant circuit 5, the load traction effect in the frequency range of 1.2 GHz to 1.8 GHz changes from curve X to curve Y, and it can be seen that the series resonant circuit is increased. After 5, the load traction effect is more broadband, which is closer to the ideal load traction.
  • the series resonant circuit 5 is used in series with the 50 ohm first ⁇ /4 impedance conversion line 30 to neutralize the reactance part introduced thereby, effectively improving the traditional Doherty power.
  • the bandwidth of the amplifier circuit is used in series with the 50 ohm first ⁇ /4 impedance conversion line 30 to neutralize the reactance part introduced thereby, effectively improving the traditional Doherty power.
  • the newly designed Doherty power amplifying circuit can also be applied to GaN devices, or improved, and can be applied to other adaptive circuit devices, and will not be described herein.
  • the reactance introduced in the working process of the combiner in the conventional Doherty power amplifying circuit is neutralized, and Doherty is guaranteed.
  • the high efficiency of the power amplifier circuit improves the load traction effect of the Doherty power amplifier circuit, and makes the load traction effect more broadband, so as to realize the communication equipment supporting multi-band and multi-system work at the same time, effectively reducing the production and operation costs.
  • embodiments of the present invention can be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or a combination of software and hardware. Moreover, the invention can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) including computer usable program code.
  • computer-usable storage media including but not limited to disk storage, CD-ROM, optical storage, etc.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

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  • Power Engineering (AREA)
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Abstract

一种Doherty功率放大电路，该电路为：包括功率分配器(1)、Carrier放大器支路(2)、合路器(3)和Peaking放大器支路(4)，其中，在Carrier放大器支路(2)和合路器(3)之间设置有串联谐振电路(5)，这样，可以中和传统Doherty功率放大电路在工作过程中所引入的电抗，在保证了Doherty功率放大电路高效率的同时，提升了Doherty功率放大电路的负载牵引效果，令负载牵引效果更为宽带化，以便于实现同时支持多频段、多制式工作的通信设备，有效降低生产和运营成本。

Description

一种Doherty功率放大电路
本申请要求在2015年10月08日提交中国专利局、申请号为201510645404.0、发明名称为“一种Doherty功率放大电路”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及电路技术，特别涉及一种Doherty功率放大电路。
背景技术
随着通信技术的不断发展，目前呈现2G、3G和4G通信制式共存的现状，无论从设备供应商还是网络运营商都期望实现能够同时支持多频段、多制式工作的通信设备，以便降低设备生产和网络运营维护成本。此外，从节能减排和绿色通信的角度出发，在支持多频段、多制式工作的同时，还要求通信设备要高效率。功率放大器作为通信设备中受带宽限制最严重的高耗能部件，不可避免的面临宽带、高效率的设计挑战。
现有高效率功率放大器多采用传统多赫蒂(Doherty)电路结构来实现高效率，但由于其电路结构中存在λ/4阻抗变换线这样的窄带器件，致使传统Doherty结构可用带宽有限。反型Doherty是一有效拓宽功放带宽的有效手段，但该技术的采用需功放管内匹配的配合，并非每个器件都适用于该技术。而目前氮化镓(GaN)器件多数都不具备采用反型Doherty的技术条件，尤其是大功率器件，为此对于GaN器件仍需采用传统Doherty电路结构，并在其基础上进行技术改进，因此，需要重新设计Donherty电路结构，以提高其带宽。
发明内容
本发明实施例提供一种Doherty功率放大电路，用以克服传统Doherty射频功率放大器的窄带特性，在保证高效率同时有效提升其宽带性能。
本发明实施例提供的具体技术方案如下：
一种Doherty功率放大电路，包括功率分配器1、Carrier放大器支路2、Peaking放大器支路4和合路器3，在所述Carrier放大器支路2和所述合路器3之间设置有串联谐振电路5，所述串联谐振电路5用于在所述Doherty功率放大的工作频点高于中心频点时呈感性，在所述Doherty功率放大电路的工作频点低于中心频点时呈容性，以及在所述Doherty功率放大电路的工作频点为中心频点时阻抗为0。
较佳的，Carrirer放大器支路2包括串联的第一输入匹配电路20、Carrier放大管21、第 一输出匹配电路22和第一补偿线23；其中，第一输入匹配电路20的一端与功率分配器1相连接，第一补偿线23的一端与串联谐振电路5相连接。
较佳的，Carrier放大管11采用LDMOS器件或者采用GaN器件，第一补偿线23的特性阻抗为50欧姆。
较佳的，合路器3包括串联的第一λ/4阻抗变换线30、第二λ/4阻抗变换线31和第一负载32；其中，第一λ/4阻抗变换线30的两端分别与串联谐振电路5和Peaking放大器支路4相连接，λ表示的阻抗变换线的波长。
较佳的，第一λ/4阻抗变换线30的特性阻抗为50欧姆，第二λ/4阻抗变换线31的特性阻抗为
Figure PCTCN2016099605-appb-000001
欧姆，第一负载32的阻值为50欧姆，，其中，
Figure PCTCN2016099605-appb-000002
较佳的，Peaking放大器支路4中包括串联的第二补偿线40、第二输入匹配电路41、Peaking放大管42、第二输出匹配电路43、第三λ/4阻抗变换线44和第三补偿线45；其中，第二补偿线40的一端与功率分配器1相连接，第三补偿线45的一端与合路器3相连接，λ表示的阻抗变换线的波长。
较佳的，Peaking放大管42采用LDMOS器件或者采用GaN器件，第三λ/4阻抗变换线44的特性阻抗为
Figure PCTCN2016099605-appb-000003
欧姆，第二补偿线40和特性阻抗为50欧姆，第三补偿线45的特性阻抗为
Figure PCTCN2016099605-appb-000004
欧姆，其中，
Figure PCTCN2016099605-appb-000005
本发明实施例中，通过在传统Doherty功率放大电路中加入串联谐振电路，中和了传统Doherty功率放大电路中合路器在工作过程中所引入的电抗，在保证了Doherty功率放大电路高效率的同时，提升了Doherty功率放大电路的负载牵引效果，令负载牵引效果更为宽带化，以便于实现同时支持多频段、多制式工作的通信设备，有效降低生产和运营成本。
附图说明
图1为本发明实施例中射频功率放大电路原理示意图；
图2为本发明实施例中射频功率放大电路实例示意图；
图3为本发明实施例中合路器实施示意图；
图4为现有技术下1.2GHz-1.8GHz传统Doherty功率放大电路负载牵引效果示意图；
图5为本发明实施例中1.2GHz-1.8GHz Doherty功率放大电路负载牵引效果示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
为了克服传统射频Doherty功率放大电路的窄带特性，本发明重新设计了Doherty电路结构，在有效提升了Doherty功率放大电路的宽带性能，以实现多频段信号同时高效率放大的功能。
下面结合附图对本发明优选的实施方式进行详细说明。
参阅图1所示，本发明实施例中，重新设计的Doherty功率放大电路中依次包括功率分配器1、载波(Carrier)放大器支路2、(峰值)Peaking放大器支路4和合路器3，具体的，其连接关系为，功率分配器1的两端分别与Carrier放大器支路2和Peaking放大器支路4相连接，以及Carrier放大器支路2的另一端和Peaking放大器支路4的另一端分别与合路器3相连接。其中，在Carrier放大器支路2和合路器3之间设置有串联谐振电路5，该串联谐振电路5，用于在上述Doherty电路的工作频点高于中心频点时呈感性，在上述Doherty电路的工作频点低于中心频点时呈容性，以及在上述Doherty电路的工作频点为中心频点时阻抗为0。
如图1所示，可选的，Carrier放大器支路2包括串联的第一输入匹配电路20、Carrier放大管21、第一输出匹配电路22和第一补偿线23；其中，第一输入匹配电路20的一端与功率分配器1相连接，第一补偿线23的一端与串联谐振电路5相连接。较佳的，Carrier放大管11采用横向扩散金属氧化物(LDMOS)器件或者采用氮化镓(GaN)器件，第一补偿线23的特性阻抗为50欧姆。
如图1所示，合路器3包括串联的第一λ/4阻抗变换线30、第二λ/4阻抗变换线31和第一负载32；其中，第一λ/4阻抗变换线30的两端分别与串联谐振电路5和Peaking放大器支路4相连接。
如图1所示，Peaking放大器支路4中包括串联的第二补偿线40、第二输入匹配电路41、Peaking放大管42、第二输出匹配电路43、第三λ/4阻抗变换线44和第三补偿线45；其中，第二补偿线40的一端与功率分配器1相连接，第三补偿线45的一端与合路器3相连接。
参阅图2所示，在一个实施例中，较佳的，Carrier放大管11采用LDMOS器件或者 采用GaN器件，第一补偿线23的特性阻抗为50欧姆；较佳的，第一λ/4阻抗变换线30的特性阻抗为50欧姆，第二λ/4阻抗变换线31的特性阻抗为
Figure PCTCN2016099605-appb-000006
欧姆，第一负载32的阻值为50欧姆；较佳的，Peaking放大管42采用LDMOS器件或者采用GaN器件，第三λ/4阻抗变换线44的特性阻抗为
Figure PCTCN2016099605-appb-000007
欧姆，第三补偿线45的特性阻抗为
Figure PCTCN2016099605-appb-000008
欧姆，λ表示的阻抗变换线的波长，后续解释相同，将不再一一赘述。
参阅图1和图2所示，之所以设置第二补偿线40，是为了实现Carrier放大器支路2和Peaking放大器支路4的相位对准，较佳的，第二补偿线40的特性阻抗为50欧姆。
参阅图1和图2所示，本发明实施例中，结合传统Doherty功率放大电路的设计方案，Peaking放大管42最大输出能力与Carrier放大管21最大输出能力的比例关系要满足预计值a，即
Figure PCTCN2016099605-appb-000009
传统Doherty电路中，第一输入匹配电路20和第一输出匹配电路22能够将Carrier放大管21的阻抗匹配到50欧姆，第二输入匹配电路41和第二输出匹配电路43能够将Peaking放大管42的阻抗匹配到50欧姆，以实现相应性能。而Carrier放大器支路2中特性阻抗为50欧姆的第一补偿线23和合路器3中的特性阻抗为50欧姆的第一λ/4阻抗变换线30的作用在于在-20log(1+a)dB回退功率下，将Carrier放大管21的负载由50欧姆调制到50×a欧姆，以实现高效率；Peaking放大器支路4中的特性阻抗为
Figure PCTCN2016099605-appb-000010
欧姆的第三λ/4阻抗变换线44的作用在于将Peaking放大管42的50欧姆负载阻抗变换至
Figure PCTCN2016099605-appb-000011
欧姆，以满足Peaking放大管42和Carrier放大管21功率比例关系a；而特性阻抗为
Figure PCTCN2016099605-appb-000012
欧姆的第三补偿线45的作用在于在-20log(1+a)dB回退功率下，实现Peaking放大管支路的开路效果，减小功率泄露保证高效率，由于第一λ/4阻抗变换线30、第三λ/4阻抗变换线44、第一补偿线23和第三补偿线45的窄带特性，传统设计模式下，Doherty功率放大电路窄带化问题明显。
而本发明实施例中，在Carrier放大器支路2中，添加了串联谐振电路5以提高电路的带宽。这是由于，串联谐振电路5具备以下特质：在Doherty功率放大电路的工作频点为中心频点时阻抗为0，在Doherty功率放大电路的工作频点高于中心频点时呈现感性，而在Doherty功率放大电路的工作频点低于工作频点时呈现容性；其中，中心频点为整个带 宽的中心，如，在固定带宽下，最高工作频点为F1，最低工作频点为F2，那么，中心频点便为(F1+F2)/2。
由于传统Doherty功率放大电路中的合路器具有以下特质，工作频点高于中心频点时呈现容性，工作频点低于中心频点时呈现感性，可见，其特质与串联谐振电路5正好相反，因此，串联谐振电路5可以在工作过程中抵消掉Doherty功率放大电路的电抗部分，令合路器输入阻抗在一定带宽内呈现近似纯电阻状态，，可有效拓宽传统Doherty功率放大电路的负载牵引带宽。
参阅图3所示，对于传统Doherty功率放大电路而言，在-20log(1+a)dB回退功率情况下，其负载牵引效果是由合路器3的50欧姆的第一λ/4阻抗变换线30来实现，但由于其窄带化特性，只有中心频点才能够实现所期望的负载牵引，离中心频率越远负载牵引效果越差。
参阅图4所示，以将Carrier放大管21和Peaking放大管42匹配到50欧姆的传统Doherty功率放大电路为例(假设采用对称结构，即a＝1，仿真了1.2GHz-1.8GHz频率范围内的负载牵引效果)，图4充分说明了传统Doherty功率放大电路的窄带特性，具体的，传统Doherty功率放大电路中，50欧姆的第一λ/4阻抗变换线30具备窄带特性，并不能有效地实现宽带内的负载牵引，从图4中可以看到除中心频点外，其他频点分布于Smith圆图实轴两侧(如曲线m1m2所示)，分别呈现容性和感性，而理想的负载牵引是实现整个带宽内均牵引到实轴，即呈现纯电阻特性。
参阅图5所示，以将Carrier放大管21和Peaking放大管42匹配到50欧姆的Doherty功率放大电路为例(假设采用对称结构，即a＝1，仿真了1.2GHz-1.8GHz频率范围内的负载牵引效果)，具体的，如图5所示，在增加串联谐振电路5后，1.2GHz-1.8GHz频率范围内的负载牵引效果由曲线X变为曲线Y，明显可以看到增加串联谐振电路5后负载牵引效果更加宽带化，更加接近理想的负载牵引，这是由于串联谐振电路5的工作频点高于中心频点时呈现感性，而工作频点低于中心频点时呈现容性，并且工作频点为中心频点时阻抗为0，该串联谐振电路5与50欧姆的第一λ/4阻抗变换线30串联使用，以中和其所引入的电抗部分，有效了提升传统Doherty功率放大电路的带宽。
上述新设计的Doherty功率放大电路也可以应用于GaN器件，或者，经过改进，也可以应用于其他适应的电路器件，在此不再赘述。
综上所述，本发明实施例中，通过在传统Doherty功率放大电路中加入串联谐振电路，中和了传统Doherty功率放大电路中合路器在工作过程中所引入的电抗，在保证了Doherty 功率放大电路高效率的同时，提升了Doherty功率放大电路的负载牵引效果，令负载牵引效果更为宽带化，以便于实现同时支持多频段、多制式工作的通信设备，有效降低生产和运营成本。
本领域内的技术人员应明白，本发明的实施例可提供为方法、系统、或计算机程序产品。因此，本发明可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且，本发明可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本发明是参照根据本发明实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
尽管已描述了本发明的优选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例作出另外的变更和修改。所以，所附权利要求意欲解释为包括优选实施例以及落入本发明范围的所有变更和修改。
显然，本领域的技术人员可以对本发明实施例进行各种改动和变型而不脱离本发明实施例的精神和范围。这样，倘若本发明实施例的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (7)

  1. 一种多赫蒂Doherty功率放大电路，包括功率分配器(1)、载波Carrier放大器支路(2)、峰值Peaking放大器支路(4)和合路器(3)，其特征在于，
    在所述Carrier放大器支路(2)和所述合路器(3)之间设置有串联谐振电路(5)，所述串联谐振电路(5)用于在所述Doherty功率放大电路的工作频点高于中心频点时呈感性，在所述Doherty功率放大电路的工作频点低于中心频点时呈容性，以及在所述Doherty功率放大电路的工作频点为中心频点时阻抗为0。
  2. 如权利要求1所述的Doherty功率放大电路，其特征在于，Carrirer放大器支路(2)包括串联的第一输入匹配电路(20)、Carrier放大管(21)、第一输出匹配电路(22)和第一补偿线(23)；其中，第一输入匹配电路(20)的一端与功率分配器(1)相连接，第一补偿线(23)的一端与串联谐振电路(5)相连接。
  3. 如权利要求2所述的Doherty功率放大电路，其特征在于，Carrier放大管(11)采用横向扩散金属氧化物LDMOS器件或者采用氮化镓GaN器件，第一补偿线(23)的特性阻抗为50欧姆。
  4. 如权利要求1所述的Doherty功率放大电路，其特征在于，合路器(3)包括串联的第一λ/4阻抗变换线(30)、第二λ/4阻抗变换线(31)和第一负载(32)；其中，第一λ/4阻抗变换线(30)的两端分别与串联谐振电路(5)和Peaking放大器支路(4)相连接，λ表示的阻抗变换线的波长。
  5. 如权利要求4所述的Doherty功率放大电路，其特征在于，第一λ/4阻抗变换线(30)的特性阻抗为50欧姆，第二λ/4阻抗变换线(31)的特性阻抗为
    Figure PCTCN2016099605-appb-100001
    欧姆，第一负载(32)的阻值为50欧姆，其中，
    Figure PCTCN2016099605-appb-100002
  6. 如权利要求1所述的Doherty功率放大电路，其特征在于，Peaking放大器支路(4)中包括串联的第二补偿线(40)、第二输入匹配电路(41)、Peaking放大管(42)、第二输出匹配电路(43)、第三λ/4阻抗变换线(44)和第三补偿线(45)；其中，第二补偿线(40)的一端与功率分配器(1)相连接，第三补偿线(45)的一端与合路器(3)相连接，λ表示的阻抗变换线的波长。
  7. 如权利要求6所述的Doherty功率放大电路，其特征在于，Peaking放大管(42)采 用LDMOS器件或者采用GaN器件，第三λ/4阻抗变换线(44)的特性阻抗为
    Figure PCTCN2016099605-appb-100003
    欧姆，第二补偿线(40)和特性阻抗为50欧姆，第三补偿线(45)的特性阻抗为
    Figure PCTCN2016099605-appb-100004
    欧姆，其中，
    Figure PCTCN2016099605-appb-100005
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EP3361633A1 (en) 2018-08-15
US10511265B2 (en) 2019-12-17
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JP6616499B2 (ja) 2019-12-04
US20190074799A1 (en) 2019-03-07
CN106571781B (zh) 2020-09-25
EP3361633B1 (en) 2021-05-05
CN106571781A (zh) 2017-04-19
EP3361633A4 (en) 2018-10-10

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