WO2017041318A1 - 驱动装置及液晶显示装置 - Google Patents

驱动装置及液晶显示装置 Download PDF

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Publication number
WO2017041318A1
WO2017041318A1 PCT/CN2015/089833 CN2015089833W WO2017041318A1 WO 2017041318 A1 WO2017041318 A1 WO 2017041318A1 CN 2015089833 W CN2015089833 W CN 2015089833W WO 2017041318 A1 WO2017041318 A1 WO 2017041318A1
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Prior art keywords
time
gate
gate driving
liquid crystal
crystal display
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PCT/CN2015/089833
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English (en)
French (fr)
Inventor
左清成
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Wuhan China Star Optoelectronics Technology Co Ltd
TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to US14/897,812 priority Critical patent/US10643557B2/en
Publication of WO2017041318A1 publication Critical patent/WO2017041318A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/067—Special waveforms for scanning, where no circuit details of the gate driver are given
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0219—Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an apparatus for driving a liquid crystal display panel, and to a liquid crystal display device having a liquid crystal display panel and a driving device thereof.
  • a gate driving signal is generally supplied to a gate of each thin film transistor of a pixel region by a gate driving device to control opening and closing of the gate.
  • a gate driving device In order to prevent polarization of liquid crystal molecules, it is necessary to drive the liquid crystal display device by means of an alternating current drive.
  • the above-described AC driving method is mainly realized by supplying positive and negative alternate source driving voltages to the source of the thin film transistor.
  • the positive and negative alternate source drive voltages include a positive polarity voltage and a negative polarity voltage.
  • the positive polarity voltage is defined as a voltage greater than a reference voltage (typically a common voltage) and the negative polarity voltage is defined as a voltage less than a reference voltage.
  • FIG. 1 is a schematic view showing a driving device of a liquid crystal display panel in the prior art.
  • FIG. 2 shows a driving timing chart for the driving device of FIG. 1.
  • FIG. 3 shows a schematic diagram of the polarity of the pixel voltage in the row inversion driving mode. In the row inversion driving mode, corresponding pixels on adjacent gate lines are inverted in positive and negative polarity in units of rows.
  • the polarity of the pixel voltage corresponding to the gate line of the nth row is unified to be positive polarity
  • the polarity of the pixel voltage corresponding to the gate line of the n+1th row is unified to be negative polarity.
  • transistors T1, T2, . . . located in the same row are turned on, and positive polarity voltages are written to all pixels corresponding to the nth row of gate lines.
  • the write time is t.
  • the gate driving voltage is supplied to the n+1th gate line.
  • the transistors T3, T4, ... in the row are turned on, and the negative polarity voltage is written to all the pixels corresponding to the gate line of the n+1th row, and the writing time is also t.
  • the voltage difference between the positive polarity voltage written to the pixel corresponding to the nth row gate line and the gate drive voltage of the nth row gate line is referred to as a first voltage difference.
  • the voltage difference between the negative polarity voltage written to the pixel corresponding to the n+1th row gate line and the gate driving voltage of the n+1th row gate line is denoted as the second voltage difference. Since the first voltage difference and the second voltage difference are different when the gate is turned on, the effect of charging the source line to the pixel under the same write time condition may not be performed. with. Further, the liquid crystal display panel has a technical defect that the display screen is bright and dark, and the display effect is uneven.
  • the technical problem to be solved by the present invention is to overcome the technical defects in the prior art that the display screen of the liquid crystal display panel has different brightness and darkness and uneven display effect.
  • the present invention provides a driving device for a liquid crystal display panel and a liquid crystal display device having the same.
  • a driving device for a liquid crystal display panel comprising:
  • each of the source driving circuits being configured to supply a positive polarity voltage or a negative polarity voltage to a source line of the liquid crystal display panel according to a row inversion driving mode;
  • a plurality of gate driving circuits each configured to provide a gate driving signal to one gate line of the liquid crystal display panel
  • the control circuit is configured to, when displaying the same frame image, control a first time for supplying a positive polarity voltage to the source line to be less than a second time for supplying a negative polarity voltage to the source line, and control the gate drive circuit to provide a gate The duration of the drive signal is greater than or equal to the second time.
  • the sum of the first time and the second time is constant.
  • the difference between the second time minus the first time is greater than a preset time threshold.
  • the preset time threshold is greater than a difference between the second charging time minus the first charging time, and the first charging time is a time required to fully charge the pixel when the positive polarity voltage is used as the charging voltage.
  • the second charging time is a time required to fully charge the pixel when the negative polarity voltage is used as a charging voltage.
  • control circuit comprises:
  • the gate driving circuit providing a gate driving signal to a corresponding gate line through a corresponding switching element
  • a control unit that controls an open/close state of the switching element.
  • the switching elements corresponding to the two adjacent gate driving circuits are respectively an NMOS transistor and a PMOS transistor.
  • a liquid crystal display device including a liquid crystal display panel and a driving device thereof, the driving device includes:
  • each of the source driving circuits being configured to supply a positive polarity voltage or a negative polarity voltage to a source line of the liquid crystal display panel according to a row inversion driving mode;
  • each of the gate driving circuits being disposed to a gate line of the liquid crystal display panel Providing a gate drive signal
  • the control circuit is configured to, when displaying the same frame image, control a first time for supplying a positive polarity voltage to the source line to be less than a second time for supplying a negative polarity voltage to the source line, and control the gate drive circuit to provide a gate The duration of the drive signal is greater than or equal to the second time.
  • the sum of the first time and the second time is constant; the difference between the second time minus the first time is greater than a preset time threshold.
  • the preset time threshold is greater than a difference between the second charging time minus the first charging time, and the first charging time is a time required to fully charge the pixel when the positive polarity voltage is used as the charging voltage.
  • the second charging time is a time required to fully charge the pixel when the negative polarity voltage is used as a charging voltage.
  • control circuit comprises:
  • the switching elements corresponding to the circuit are respectively an NMOS transistor and a PMOS transistor;
  • a control unit that controls an open/close state of the switching element.
  • the driving device provided by the embodiment of the present invention compensates the cause by increasing the duration of the gate driving signal while shortening the time for supplying the positive polarity voltage to the source line and prolonging the time for supplying the negative polarity voltage to the source line.
  • the difference between the positive and negative polarity voltages on the pixel charging efficiency. Therefore, the driving device of the present invention can improve the phenomenon that the display screen of the liquid crystal display panel in the prior art is different in brightness and display, and the display effect is uneven.
  • FIG. 1 is a schematic view showing a driving device of a liquid crystal display panel in the prior art
  • FIG. 2 shows a driving timing diagram for the driving device of FIG. 1;
  • FIG. 3 is a schematic diagram showing the polarity of a pixel voltage in a row inversion driving mode
  • FIG. 4 is a schematic view showing a driving device of a liquid crystal display panel according to an embodiment of the present invention.
  • FIG. 5 shows a driving timing chart for the driving device of FIG.
  • the display device of the present invention provides a driving device for the liquid crystal display panel.
  • FIG. 4 it is a schematic diagram of a driving device of a liquid crystal display panel according to an embodiment of the present invention.
  • the driving device of this embodiment mainly includes a plurality of source driving circuits, a plurality of gate driving circuits, and a control circuit.
  • each of the source driving circuits is configured to supply a positive polarity voltage or a negative polarity voltage to one source line of the liquid crystal display panel in a row inversion driving mode.
  • the polarity of the pixel voltage in the row inversion driving mode is as shown in FIG. Taking two adjacent gate lines as an example, when displaying the mth frame image, the positive polarity voltage is written to all the pixels corresponding to the nth row gate line, and after writing, the n+1th row gate is written. All pixels corresponding to the line are written with a negative voltage.
  • the negative polarity voltage is written to all the pixels corresponding to the nth row gate line, and the positive polarity voltage is written to all the pixels corresponding to the n+1th row gate line after the writing is completed.
  • Each gate driving circuit is configured to provide a gate driving signal to one gate line of the liquid crystal display panel.
  • the gate drive signal is used to turn on the corresponding gate line.
  • the control circuit is configured to control a first time when the positive polarity voltage is supplied to the source line and a second time to supply the negative polarity voltage to the source line when displaying the same frame image.
  • the first time that the positive polarity voltage is supplied to the source line is equal to the second time of providing the negative polarity voltage to the source line
  • the control circuit of the embodiment shortens the supply of the positive electrode to the source line.
  • the first time of the voltage while extending the second time to provide a negative voltage to the source line. Since the first voltage difference between the positive polarity voltage and the gate driving voltage is large, the second voltage difference between the negative polarity voltage and the gate driving voltage is small.
  • the present embodiment shortens the charging time of the pixel by shortening the positive polarity voltage and extends the time.
  • the charging time of the negative polarity voltage to the pixel compensates for the difference in charging of the pixel between the positive and negative polarity voltages.
  • the display screen of the liquid crystal display panel in the prior art can be improved in brightness and unevenness, and the display effect is uneven.
  • the gate drive circuit provides a duration of the gate drive signal that is greater than or equal to a second time that provides a negative polarity voltage to the source line. That is, there is an overlap in the duration of providing the gate drive signals to the adjacent two gate lines. It is derived that the time of overlap should be greater than or equal to the difference between the second time minus the first time.
  • the sum of the first time and the second time is constant.
  • the sum of the first time when the adjacent two frames apply the positive polarity voltage to the same pixel and the second time when the negative polarity voltage is applied does not change.
  • the only change is the ratio of the total time in the first time or the second time.
  • the difference between the second time minus the first time is greater than a preset time threshold.
  • the preset time threshold is greater than the difference between the second charging time minus the first charging time.
  • the first charging time is a time required to fully charge a pixel when the positive polarity voltage is used as a charging voltage
  • the second charging time is to fill the pixel when the negative polarity voltage is used as a charging voltage. The time required for electricity.
  • the pixel When the difference between the second time and the first time satisfies the above condition, the pixel can reach a fully charged saturation state regardless of the positive polarity voltage or the negative polarity voltage.
  • the charging difference between the positive and negative polarity voltages on the pixels can be completely eliminated, so that the display screen of the liquid crystal display panel in the prior art does not have a phenomenon of uneven brightness and uneven display effect.
  • the control circuit includes a control unit and a plurality of switching elements.
  • Each switching element corresponds to one gate driving circuit.
  • the control unit is used to control the open or closed state of each switching element.
  • Each of the gate driving circuits is electrically connected to a corresponding gate line through a switching element corresponding thereto to provide a corresponding gate driving signal to the gate line.
  • the switching element is preferably a transistor, and the switching elements corresponding to two adjacent gate driving circuits are respectively an NMOS transistor and a PMOS transistor.
  • the operation of the driving apparatus of the embodiment of the present invention will be described in detail below by taking an adjacent pair of gate lines (the nth row gate line and the n+1th row gate line) as an example.
  • the working process of the example driving device mainly includes the following steps 1 to 7.
  • step 1 when the display screen is inverted to the mth frame, the clock signal CK(m) supplied from the control unit is at a high level, the NMOS transistor T5 is turned on, and the PMOS transistor T6 is turned off.
  • the nth row of gate lines G(n) is at a high level, at which time transistors T1 and T2 begin to conduct for a duration of t2.
  • t2 t+t1.
  • t1 is the overlap time of G(n) and G(n+1).
  • the source S(n) and S(n+1) are uniformly input with a negative polarity voltage. Since the other row gate lines are off, only the nth row of pixels can be charged.
  • the length of charge time for the nth row of pixels is controlled by the CK(m) high time. In this example, the charging time length for the nth row of pixels is t3, that is, the first time described above.
  • step 2 when the charging of the nth row of pixels is completed, the control CK(m) is switched to a low level. At this time, the NMOS transistor T5 is turned off, and the PMOS transistor T6 is turned on. The n+1th gate line G(n+1) is at a high level, at which time the transistors T3 and T4 start to conduct. At this time, the source S(n) and S(n+1) are uniformly input with a positive polarity voltage, and the effective charging time length is t4, that is, the above second time.
  • step 3 steps 1 and 2 are repeated until the m-th frame display is completed.
  • step 4 when the display screen is flipped to the m+1th frame, the clock signal CK(m+1) provided by the control unit is at a high level, at which time the transistors T1, T2, and T5 start to be turned on. At this time, the source S(n) and S(n+1) are uniformly input to the positive polarity.
  • the pressure, the effective charging time length is the second time t4.
  • step 5 when the charging of the nth row of pixels is completed, the control CK(m+1) is switched to a low level. At this time, the NMOS transistor T5 is turned off, and the PMOS transistor T6 is turned on. The n+1th gate line G(n+1) is at a high level, at which time the transistors T3 and T4 start to conduct. At this time, the source S(n) and S(n+1) are uniformly input with a negative polarity voltage, and the effective charging time length is the first time t3.
  • step 6 steps 4 and 5 are repeated until the m+1th frame display is completed.
  • step 7 each frame is alternately changed to complete the screen display.
  • an embodiment of the present invention further provides a liquid crystal display device.
  • the liquid crystal display device of this embodiment includes a liquid crystal display panel and the above-described driving device. Since the structure of the driving device has been described in detail above, it will not be described again here.
  • the driving device provided by the embodiment of the present invention compensates the cause by increasing the duration of the gate driving signal while shortening the time for supplying the positive polarity voltage to the source line and prolonging the time for supplying the negative polarity voltage to the source line.
  • the difference between the positive and negative polarity voltages on the pixel charging efficiency. Therefore, the driving device of the embodiment of the present invention can improve the phenomenon that the display screen of the liquid crystal display panel in the prior art is different in brightness and brightness, and the display effect is uneven.

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  • Crystallography & Structural Chemistry (AREA)
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  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

一种驱动装置及液晶显示装置。所述驱动装置，通过增加栅极驱动信号的持续时间，同时通过缩短向源极线提供正极性电压的时间，并延长向源极线提供负极性电压的时间，来补偿因正负极性电压对像素充电效率的差异，能够改善现有技术中液晶显示面板显示画面亮暗不一、显示效果不均匀的现象。

Description

驱动装置及液晶显示装置
本申请要求享有2015年9月9日提交的名称为“驱动装置及液晶显示装置”的中国专利申请CN201510572226.3的优先权，其全部内容通过引用并入本文中。
技术领域
本发明涉及显示技术领域，尤其涉及一种用于驱动液晶显示面板的装置，还涉及一种具有液晶显示面板及其驱动装置的液晶显示装置。
背景技术
在薄膜晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display,TFT-LCD)中，通常通过栅极驱动装置向像素区域的各个薄膜晶体管的栅极提供栅极驱动信号，以控制栅极的开启与关闭。为了防止液晶分子发生极化，需要通过交流驱动的方式驱动液晶显示器装置。目前主要通过向薄膜晶体管的源极提供正负交替的源极驱动电压来实现上述交流驱动方式。正负交替的源极驱动电压包括正极性电压和负极性电压。正极性电压定义为大于参考电压(通常为公共电压)的电压，负极性电压定义为小于参考电压的电压。
图1示出了现有技术中液晶显示面板的驱动装置的示意图。图2示出了针对图1的驱动装置的驱动时序图。图3示出了在行反转驱动模式下像素电压的极性示意图。在行反转驱动模式下，相邻栅极线上对应的像素以行为单位正负极性反转。
当显示画面翻转为第m帧时，第n行栅极线对应的像素电压的极性统一为正极性，第n+1行栅极线对应的像素电压的极性统一为负极性。参照图1和图2，当向第n行栅极线提供栅极驱动电压时，位于同一行的晶体管T1、T2…开启，向该第n行栅极线对应的所有像素写入正极性电压，写入时间为t。正极性电压写入完毕后，向第n+1行栅极线提供栅极驱动电压。此时，位于该行的晶体管T3、T4…开启，向该第n+1行栅极线对应的所有像素写入负极性电压，写入时间同样为t。
将向第n行栅极线对应的像素写入的正极性电压与第n行栅极线的栅极驱动电压的电压差，记为第一电压差。将向第n+1行栅极线对应的像素写入的负极性电压与第n+1行栅极线的栅极驱动电压的电压差，记为第二电压差。由于在栅极开启时，第一电压差和第二电压差是不同的，因此在相同写入时间条件下，源极线对像素充电的效果会表现得不 同。进而，会使得液晶显示面板具有显示画面亮暗不一、显示效果不均匀的技术缺陷。
发明内容
本发明所要解决的技术问题是克服现有技术中液晶显示面板显示画面亮暗不一、显示效果不均匀的技术缺陷。
为了解决上述技术问题，本发明提供了一种液晶显示面板的驱动装置以及具有该驱动装置的液晶显示装置。
根据本发明的一个方面，提供了一种液晶显示面板的驱动装置，其包括：
多个源极驱动电路，每个所述源极驱动电路设置为按照行反转的驱动模式向所述液晶显示面板的一条源极线提供正极性电压或者负极性电压；
多个栅极驱动电路，每个所述栅极驱动电路设置为向所述液晶显示面板的一条栅极线提供栅极驱动信号；以及
控制电路，设置为在显示同一帧图像时，控制向源极线提供正极性电压的第一时间小于向源极线提供负极性电压的第二时间，并控制所述栅极驱动电路提供栅极驱动信号的持续时间大于或者等于所述第二时间。
优选的是，所述第一时间与所述第二时间的和恒定。
优选的是，所述第二时间减去所述第一时间的差大于预设的时间阈值。
优选的是，所述预设的时间阈值大于第二充电时间减去第一充电时间的差，所述第一充电时间为将所述正极性电压作为充电电压时使像素充满电所需的时间，所述第二充电时间为将所述负极性电压作为充电电压时使所述像素充满电所需的时间。
优选的是，所述控制电路包括：
与所述多个栅极驱动电路一一对应的多个开关元件，所述栅极驱动电路通过对应的开关元件向对应的栅极线提供栅极驱动信号；以及
控制所述开关元件的开闭状态的控制单元。
优选的是，相邻两个所述栅极驱动电路对应的开关元件分别为NMOS晶体管和PMOS晶体管。
根据本发明的另一个方面，提供了一种液晶显示装置，其包括液晶显示面板及其驱动装置，所述驱动装置包括：
多个源极驱动电路，每个所述源极驱动电路设置为按照行反转的驱动模式向所述液晶显示面板的一条源极线提供正极性电压或者负极性电压；
多个栅极驱动电路，每个所述栅极驱动电路设置为向所述液晶显示面板的一条栅极线 提供栅极驱动信号；以及
控制电路，设置为在显示同一帧图像时，控制向源极线提供正极性电压的第一时间小于向源极线提供负极性电压的第二时间，并控制所述栅极驱动电路提供栅极驱动信号的持续时间大于或者等于所述第二时间。
优选的是，所述第一时间与所述第二时间的和恒定；所述第二时间减去所述第一时间的差大于预设的时间阈值。
优选的是，所述预设的时间阈值大于第二充电时间减去第一充电时间的差，所述第一充电时间为将所述正极性电压作为充电电压时使像素充满电所需的时间，所述第二充电时间为将所述负极性电压作为充电电压时使所述像素充满电所需的时间。
优选的是，所述控制电路包括：
与所述多个栅极驱动电路一一对应的多个开关元件，所述栅极驱动电路通过对应的开关元件向对应的栅极线提供栅极驱动信号，相邻两个所述栅极驱动电路对应的开关元件分别为NMOS晶体管和PMOS晶体管；以及
控制所述开关元件的开闭状态的控制单元。
与现有技术相比，上述方案中的一个或多个实施例可以具有如下优点或有益效果：
应用本发明实施例提供的驱动装置，通过增加栅极驱动信号的持续时间，同时通过缩短向源极线提供正极性电压的时间，并延长向源极线提供负极性电压的时间，来补偿因正负极性电压对像素充电效率的差异。因此，本发明的驱动装置能够改善现有技术中液晶显示面板显示画面亮暗不一、显示效果不均匀的现象。
本发明的其它特征和优点将在随后的说明书中阐述，并且部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例共同用于解释本发明，并不构成对本发明的限制。在附图中：
图1示出了现有技术中液晶显示面板的驱动装置的示意图；
图2示出了针对图1的驱动装置的驱动时序图；
图3示出了在行反转驱动模式下像素电压的极性示意图；
图4示出了本发明实施例液晶显示面板的驱动装置的示意图；以及
图5示出了针对图4的驱动装置的驱动时序图。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术手段来解决技术问题，并达成技术效果的实现过程能充分理解并据以实施。需要说明的是，只要不构成冲突，本发明中的各个实施例以及各实施例中的各个特征可以相互结合，所形成的技术方案均在本发明的保护范围之内。
为克服现有技术中液晶显示面板显示画面亮暗不一、显示效果不均匀的技术缺陷，本发明实施例提供了一种液晶显示面板的驱动装置。
如图4所示，是本发明实施例液晶显示面板的驱动装置的示意图。本实施例的驱动装置主要包括多个源极驱动电路、多个栅极驱动电路和控制电路。
具体地，每个源极驱动电路用于按照行反转的驱动模式向所述液晶显示面板的一条源极线提供正极性电压或者负极性电压。行反转驱动模式下像素电压的极性如图3所示。以相邻的两条栅极线为例，在显示第m帧图像时，向该第n行栅极线对应的所有像素写入正极性电压，写入完毕后向第n+1行栅极线对应的所有像素写入负极性电压。在显示第m+1帧图像时，向该第n行栅极线对应的所有像素写入负极性电压，写入完毕后向第n+1行栅极线对应的所有像素写入正极性电压。
每个栅极驱动电路用于向所述液晶显示面板的一条栅极线提供栅极驱动信号。栅极驱动信号用于开启对应的栅极线。
控制电路用于在显示同一帧图像时，控制向源极线提供正极性电压的第一时间小于向源极线提供负极性电压的第二时间。相比于现有技术中向源极线提供正极性电压的第一时间等于向源极线提供负极性电压的第二时间的技术方案，本实施例的控制电路缩短了向源极线提供正极性电压的第一时间，同时延长了向源极线提供负极性电压的第二时间。由于正极性电压与栅极驱动电压的第一电压差较大，负极性电压与栅极驱动电压的第二电压差较小，因此本实施例通过缩短正极性电压对像素的充电时间，同时延长负极性电压对像素的充电时间，来补偿正负极性电压对像素的充电差异。正负极性电压对像素的充电差异通过充电时间得到补偿后，能够改善现有技术中液晶显示面板显示画面亮暗不一、显示效果不均匀的现象。
另外，为保证在向源极线提供负极性电压时对应的栅极线仍保持开启状态，需要增加提供栅极驱动信号的持续时间。即需要加宽栅极驱动信号的输出宽度。在本实施例中，栅极驱动电路提供栅极驱动信号的持续时间应大于或者等于向源极线提供负极性电压的第二时间。即向相邻两条栅极线提供栅极驱动信号的持续时间存在重叠。经推导，重叠的时间应大于或者等于第二时间减去第一时间的差。
在本发明一优选的实施例中，所述第一时间与所述第二时间的和恒定。这样，相邻两帧向同一像素施加正极性电压的第一时间与施加负极性电压的第二时间之和不变。变化的只有第一时间或第二时间所占总时间的比例。
在本发明一优选的实施例中，第二时间减去所述第一时间的差大于预设的时间阈值。特别地，所述预设的时间阈值大于第二充电时间减去第一充电时间的差。这里，所述第一充电时间为将所述正极性电压作为充电电压时使像素充满电所需的时间，所述第二充电时间为将所述负极性电压作为充电电压时使所述像素充满电所需的时间。
当第二时间与第一时间的差满足上述条件时，无论是正极性电压还是负极性电压，都能使像素达到充满电的饱和状态。本实施例能够彻底消除正负极性电压对像素的充电差异，使现有技术中液晶显示面板显示画面不会出现亮暗不一、显示效果不均匀的现象。
参照图4，在本发明一优选的实施例中，上述控制电路包括控制单元和多个开关元件。每个开关元件对应一个栅极驱动电路。控制单元用于控制各个开关元件的打开或者闭合的状态。各个栅极驱动电路通过与其相对应的开关元件与对应的栅极线电连接，以向该栅极线提供相应的栅极驱动信号。特别地，开关元件优选为晶体管，相邻两个所述栅极驱动电路对应的开关元件分别为NMOS晶体管和PMOS晶体管。
下面以相邻的一对栅极线(第n行栅极线和第n+1行栅极线)为例详细描述本发明实施例驱动装置的工作过程。参照图4和图5，本示例驱动装置的工作过程主要包括下述步骤1至步骤7。
在步骤1中，当显示画面翻转为第m帧时，控制单元提供的时钟信号CK(m)为高电平，NMOS晶体管T5导通，PMOS晶体管T6截止。第n行栅极线G(n)为高电平，此时晶体管T1和T2开始导通，持续时间长度为t2。这里，t2＝t+t1。其中，t1为G(n)与G(n+1)的重叠时间。这时，源极S(n)和S(n+1)统一输入负极性电压。由于其它行栅极线处于关闭状态，所以只能对第n行像素进行充电。对第n行像素的充电时间长度受CK(m)高电平时间控制。在本示例中，对第n行像素的充电时间长度为t3，即上述第一时间。
在步骤2中，当对第n行像素充电完成后，控制CK(m)切换为低电平。此时NMOS晶体管T5截止，PMOS晶体管T6导通。第n+1行栅极线G(n+1)为高电平，此时晶体管T3和T4开始导通。这时，源极S(n)和S(n+1)统一输入正极性电压，其有效充电时间长度为t4，即上述第二时间。
在步骤3中，重复步骤1和步骤2，至到第m帧画面显示完成。
在步骤4中，当显示画面翻转为第m+1帧，控制单元提供的时钟信号CK(m+1)为高电平，此时晶体管T1、T2和T5开始导通。这时，源极S(n)和S(n+1)统一输入正极性电 压，其有效充电时间长度为第二时间t4。
在步骤5中，当对第n行像素充电完成后，控制CK(m+1)切换为低电平。此时NMOS晶体管T5截止，PMOS晶体管T6导通。第n+1行栅极线G(n+1)为高电平，此时晶体管T3和T4开始导通。这时，源极S(n)和S(n+1)统一输入负极性电压，其有效充电时间长度为第一时间t3。
在步骤6中，重复步骤4和步骤5，至到第m+1帧画面显示完成。
在步骤7中，各帧交替变化完成画面显示。
相应地，本发明实施例还提供了一种液晶显示装置。本实施例的液晶显示装置包括液晶显示面板和上述驱动装置。由于上面已对驱动装置的结构进行了详细的阐述，故在此处不再进行赘述。
应用本发明实施例提供的驱动装置，通过增加栅极驱动信号的持续时间，同时通过缩短向源极线提供正极性电压的时间，并延长向源极线提供负极性电压的时间，来补偿因正负极性电压对像素充电效率的差异。因此，本发明实施例的驱动装置能够改善现有技术中液晶显示面板显示画面亮暗不一、显示效果不均匀的现象。
虽然本发明所公开的实施方式如上，但所述的内容只是为了便于理解本发明而采用的实施方式，并非用以限定本发明。任何本发明所属技术领域内的技术人员，在不脱离本发明所公开的精神和范围的前提下，可以在实施的形式上及细节上作任何的修改与变化，但本发明的保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (18)

  1. 一种液晶显示面板的驱动装置，包括：
    多个源极驱动电路，每个所述源极驱动电路设置为按照行反转的驱动模式向所述液晶显示面板的一条源极线提供正极性电压或者负极性电压；
    多个栅极驱动电路，每个所述栅极驱动电路设置为向所述液晶显示面板的一条栅极线提供栅极驱动信号；以及
    控制电路，设置为在显示同一帧图像时，控制向源极线提供正极性电压的第一时间小于向源极线提供负极性电压的第二时间，并控制所述栅极驱动电路提供栅极驱动信号的持续时间大于或者等于所述第二时间。
  2. 根据权利要求1所述的驱动装置，其中，所述控制电路包括：
    与所述多个栅极驱动电路一一对应的多个开关元件，所述栅极驱动电路通过对应的开关元件向对应的栅极线提供栅极驱动信号；以及
    控制所述开关元件的开闭状态的控制单元。
  3. 根据权利要求2所述的驱动装置，其中，相邻两个所述栅极驱动电路对应的开关元件分别为NMOS晶体管和PMOS晶体管。
  4. 根据权利要求1所述的驱动装置，其中，所述第一时间与所述第二时间的和恒定。
  5. 根据权利要求4所述的驱动装置，其中，所述控制电路包括：
    与所述多个栅极驱动电路一一对应的多个开关元件，所述栅极驱动电路通过对应的开关元件向对应的栅极线提供栅极驱动信号；以及
    控制所述开关元件的开闭状态的控制单元。
  6. 根据权利要求5所述的驱动装置，其中，相邻两个所述栅极驱动电路对应的开关元件分别为NMOS晶体管和PMOS晶体管。
  7. 根据权利要求4所述的驱动装置，其中，所述第二时间减去所述第一时间的差大于预设的时间阈值。
  8. 根据权利要求7所述的驱动装置，其中，所述控制电路包括：
    与所述多个栅极驱动电路一一对应的多个开关元件，所述栅极驱动电路通过对应的开关元件向对应的栅极线提供栅极驱动信号；以及
    控制所述开关元件的开闭状态的控制单元。
  9. 根据权利要求8所述的驱动装置，其中，相邻两个所述栅极驱动电路对应的开关元件分别为NMOS晶体管和PMOS晶体管。
  10. 根据权利要求7所述的驱动装置，其中，所述预设的时间阈值大于第二充电时间 减去第一充电时间的差，所述第一充电时间为将所述正极性电压作为充电电压时使像素充满电所需的时间，所述第二充电时间为将所述负极性电压作为充电电压时使所述像素充满电所需的时间。
  11. 根据权利要求10所述的驱动装置，其中，所述控制电路包括：
    与所述多个栅极驱动电路一一对应的多个开关元件，所述栅极驱动电路通过对应的开关元件向对应的栅极线提供栅极驱动信号；以及
    控制所述开关元件的开闭状态的控制单元。
  12. 根据权利要求11所述的驱动装置，其中，相邻两个所述栅极驱动电路对应的开关元件分别为NMOS晶体管和PMOS晶体管。
  13. 一种液晶显示装置，包括液晶显示面板及其驱动装置，所述驱动装置包括：
    多个源极驱动电路，每个所述源极驱动电路设置为按照行反转的驱动模式向所述液晶显示面板的一条源极线提供正极性电压或者负极性电压；
    多个栅极驱动电路，每个所述栅极驱动电路设置为向所述液晶显示面板的一条栅极线提供栅极驱动信号；以及
    控制电路，设置为在显示同一帧图像时，控制向源极线提供正极性电压的第一时间小于向源极线提供负极性电压的第二时间，并控制所述栅极驱动电路提供栅极驱动信号的持续时间大于或者等于所述第二时间。
  14. 根据权利要求13所述的液晶显示装置，其中，所述控制电路包括：
    与所述多个栅极驱动电路一一对应的多个开关元件，所述栅极驱动电路通过对应的开关元件向对应的栅极线提供栅极驱动信号，相邻两个所述栅极驱动电路对应的开关元件分别为NMOS晶体管和PMOS晶体管；以及
    控制所述开关元件的开闭状态的控制单元。
  15. 根据权利要求13所述的液晶显示装置，其中，所述第一时间与所述第二时间的和恒定；所述第二时间减去所述第一时间的差大于预设的时间阈值。
  16. 根据权利要求15所述的液晶显示装置，其中，所述控制电路包括：
    与所述多个栅极驱动电路一一对应的多个开关元件，所述栅极驱动电路通过对应的开关元件向对应的栅极线提供栅极驱动信号，相邻两个所述栅极驱动电路对应的开关元件分别为NMOS晶体管和PMOS晶体管；以及
    控制所述开关元件的开闭状态的控制单元。
  17. 根据权利要求15所述的液晶显示装置，其中，所述预设的时间阈值大于第二充电时间减去第一充电时间的差，所述第一充电时间为将所述正极性电压作为充电电压时使 像素充满电所需的时间，所述第二充电时间为将所述负极性电压作为充电电压时使所述像素充满电所需的时间。
  18. 根据权利要求17所述的液晶显示装置，其中，所述控制电路包括：
    与所述多个栅极驱动电路一一对应的多个开关元件，所述栅极驱动电路通过对应的开关元件向对应的栅极线提供栅极驱动信号，相邻两个所述栅极驱动电路对应的开关元件分别为NMOS晶体管和PMOS晶体管；以及
    控制所述开关元件的开闭状态的控制单元。
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