WO2020168600A1 - 改善背光频率变化引起亮暗带的液晶显示器 - Google Patents

改善背光频率变化引起亮暗带的液晶显示器 Download PDF

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Publication number
WO2020168600A1
WO2020168600A1 PCT/CN2019/077951 CN2019077951W WO2020168600A1 WO 2020168600 A1 WO2020168600 A1 WO 2020168600A1 CN 2019077951 W CN2019077951 W CN 2019077951W WO 2020168600 A1 WO2020168600 A1 WO 2020168600A1
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signal
pulse width
width modulation
voltage
liquid crystal
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PCT/CN2019/077951
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English (en)
French (fr)
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李文芳
张先明
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深圳市华星光电半导体显示技术有限公司
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Publication of WO2020168600A1 publication Critical patent/WO2020168600A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Definitions

  • the invention relates to the field of display technology, in particular to a liquid crystal display that improves the bright and dark bands caused by the frequency change of the backlight.
  • a liquid crystal display includes a plurality of pixels (pixels) arranged in a matrix arrangement. The pixels themselves do not emit light.
  • the thin film field effect transistors (ThinFilm Transistor, TFT) formed in the pixels need to be turned on or off. Provide suitable data voltage to the liquid crystal in the pixel, and cooperate with the uniform backlight to make the liquid crystal display display the picture.
  • the conductivity of the amorphous silicon layer increases.
  • the conductivity of the amorphous silicon layer of the thin film transistor will be close to the conductor, causing the feed through voltage to increase. Therefore, the pixels corresponding to the thin film transistors that are turned on during the backlight turn-on period will be darker.
  • the kickback voltage becomes smaller, so the pixels will all be brighter. Therefore, the defect of bright and dark bands appears in the liquid crystal display during the display process.
  • the object of the present invention is to provide a liquid crystal display to solve the problem of bright and dark bands in the display process of the liquid crystal display in the prior art.
  • the technical solution of the present invention provides a liquid crystal display, which includes a gate driver, a power controller, a pulse width modulation generator, a backlight module, and a control module.
  • the gate driver is used to output the level of the scanning signal according to the level control signal.
  • the power controller is used to output power signals.
  • the pulse width modulation generator is used to output pulse width modulation signals.
  • the backlight module is electrically connected to the pulse width modulation generator for generating light according to the pulse width modulation signal.
  • the control module is electrically connected to the pulse width modulation generator and the gate driver, and is used to adjust the power signal according to the pulse width modulation signal to output the level control signal.
  • the control module includes a switch component and a voltage regulating circuit.
  • the switch component is used to output a voltage adjustment signal according to the pulse width modulation signal.
  • the voltage regulation circuit is electrically connected to the power controller and the switch component, and is used to convert the power signal into the level control signal according to the voltage regulation signal.
  • the voltage regulating circuit includes a first resistor, a second resistor, and a third resistor.
  • the first resistor is electrically connected to the power controller.
  • the second resistor is electrically connected between the power controller and the switch assembly.
  • the third resistor is electrically connected between the first resistor and the gate driver.
  • the voltage regulation circuit further includes a diode and an inductor.
  • the anode of the diode is connected to the power controller, and the cathode is connected to the third resistor.
  • the inductor is electrically connected to the anode of the diode.
  • the voltage regulation circuit is used to convert the power signal into the level control signal having a first voltage level when the switch component transmits the voltage regulation signal, and the The voltage regulation circuit is used to convert the power signal into the level control signal having a second voltage level when the switch component does not transmit the voltage regulation signal, and the first voltage level is different from the first voltage level.
  • the second voltage level is used to convert the power signal into the level control signal having a first voltage level when the switch component transmits the voltage regulation signal
  • the voltage regulation circuit is used to convert the power signal into the level control signal having a second voltage level when the switch component does not transmit the voltage regulation signal, and the first voltage level is different from the first voltage level. The second voltage level.
  • the first voltage level is greater than the second voltage level.
  • the first voltage level is the resistance value of the first resistor and the second resistor in parallel and the third The resistance value of the resistor is determined.
  • the second voltage level is determined by the resistance value of the first resistor and the resistance value of the third resistor.
  • the switch element is a transistor whose gate is electrically connected to the pulse width modulation signal, its source is electrically connected to the ground voltage, and its drain is electrically connected to the second resistance.
  • the switch component when the switch component receives the pulse width modulation signal, the switch component conducts the ground voltage.
  • the liquid crystal display of the present invention uses a control module to adjust the level control signal output to the gate driver.
  • the backlight module receives the pulse width modulation signal and emits light
  • the first voltage level of the scan signal output by the scan driver will be greater than the second voltage level. Therefore, the thin film transistor of each pixel unit will receive a higher level of the first voltage level scanning signal to compensate for the kickback voltage. Therefore, the brightness of the pixel unit corresponding to the thin film transistor that is turned on during the period when the backlight module emits light is increased. . Therefore, the liquid crystal display of the present invention has the beneficial effect that no bright and dark bands appear during the display process.
  • FIG. 1 is a functional block diagram of the liquid crystal display of the present invention.
  • FIG. 2 is a schematic diagram of the power supply controller, pulse width modulation generator and control module circuit of the present invention.
  • FIG. 1 is a functional block diagram of the liquid crystal display 10 of the present invention.
  • the liquid crystal display 10 includes a control module 11, a liquid crystal display panel 12, a gate driver 14, a pulse width modulation generator 15, a source driver 16, a power controller 17, a backlight module 18, and a timing controller 19.
  • the liquid crystal display panel 12 includes an upper glass substrate and a lower glass substrate, and liquid crystals located between the two.
  • the liquid crystal display panel 12 includes a number of pixels, and each pixel includes three pixel units 20 representing the three primary colors of red, green and blue (RGB). For a liquid crystal display panel 12 with a resolution of 1024 ⁇ 768, a total of 1024 ⁇ 768 ⁇ 3 pixel units 20 are combined.
  • the liquid crystal display panel 12 includes an upper glass substrate and a lower glass substrate, and liquid crystal Clc filled between the two.
  • the liquid crystal display panel 12 includes data lines D1 to Dn, scan lines G1 to Gm crossing the data lines D1 to Dn, and a plurality of pixels arranged in a matrix at the intersections of the data lines D1 to Dn and the scan lines G1 to Gm , Where m and n are both positive integers.
  • Each pixel unit 20 is formed on the lower glass substrate of the liquid crystal display panel 12.
  • Each pixel unit 20 includes a thin film field effect transistor (Thin Film Transistor, TFT) and a liquid crystal Clc.
  • a black matrix and a color filter (Color Filter, CF) are formed on the upper glass substrate of the liquid crystal display panel 12.
  • the common electrode can be formed on the upper glass substrate in a vertical electric field driving method such as twisted nematic (TN) mode and vertical alignment (VA) mode, or horizontally such as in-plane switching (IPS) mode and fringe field switching (FFS) mode.
  • the electric field driving method is formed on the lower glass substrate together with the pixel electrode.
  • the gate driver 14 outputs scan signals to turn on the transistors 22 in each row in sequence, and the source driver 16 outputs corresponding data signals to the pixel units 20 to charge them to the required voltages to display different gray levels.
  • the gate driver 14 turns off the scan signal of that row, and then the gate driver 14 outputs the scan signal to turn on the transistor 22 of the next row, and then the source driver 16 controls the pixel unit 20 of the next row. Perform charge and discharge. This sequence continues until all the pixel units 20 of the liquid crystal display panel 12 are fully charged, and then the charging starts from the first row.
  • the purpose of the gate driver 14 is to output scan signals to the LCD panel 12 at regular intervals.
  • the source driver 16 charges and discharges the pixel unit 20 to the required voltage within the time of 21.7 ⁇ s to display the corresponding gray scale.
  • the timing controller 19 rearranges the digital video data RGB contained in the input screen received by the liquid crystal display panel 12 from the system board (not shown), and supplies the rearranged data video data RGB to the data driver 13.
  • the timing controller 19 receives timing signals from the system board, such as a vertical synchronization signal Vsycn, a horizontal synchronization signal Hsync, a data enable signal DE, and a clock CLK, and uses the timing signals to generate operation timings for controlling the data driver 13 and the gate driver 14 Control signal.
  • the data driver 13 latches the digital video data and converts the latched digital video data under the control of the timing controller 19, thereby generating a positive data voltage and a negative data voltage, and then the data driver 13 provides the data lines D1 to Dn Positive data voltage and negative data voltage.
  • the gate driver 14 sequentially supplies scan pulses having a width of about one horizontal period (about one frame time) to the scan lines G1 to Gm under the control of the timing controller 19. For example, when a sufficiently large positive voltage is applied to a certain scan line, the gates of all the transistors 22 connected to this scan line will be opened, and the pixel electrode on the scan line will be connected to the data line.
  • D1 to Dn are connected, and the data voltage (positive data voltage or negative data voltage) on the data lines D1 to Dn is further charged to an appropriate voltage. Then apply a sufficiently large negative voltage on the scan line, turn off the gates of all the transistors 22 connected to the scan line, until the next time they turn on again, during which the charge is stored on the liquid crystal Clc; at this time, restart The next scan line charges the pixel electrode on the next scan line. In this way, the video data of the entire screen is written in sequence, and then restarted from the first scan line (the frequency of this repetition is the inverse of one frame time).
  • FIG. 2 is a circuit diagram of the power controller 17, the pulse width modulation generator 15 and the control module 11 of the present invention.
  • the gate driver 14 is used to control the level of the scan signal SCAN output to the scan lines G1-Gn according to the level control signal VGH.
  • the power controller 17 is used to output a power signal VP.
  • the pulse width modulation generator 15 is used to output a pulse width modulation signal PWM.
  • the backlight module 18 is electrically connected to the pulse width modulation generator 15 for generating light according to the pulse width modulation signal PWM.
  • the control module 11 is electrically connected to the pulse width modulation generator 15 and the gate driver 14 for adjusting the power signal VP according to the pulse width modulation signal PWM to output the level control signal VGH.
  • the pulse width of the pulse width modulation signal PWM is equal to the time of each frame.
  • the control module 11 includes a diode D, an inductor L, a switch component Q1, and a voltage regulating circuit 114.
  • the voltage regulating circuit 114 includes a first resistor R1, a second resistor R2, and a third resistor R3.
  • the first resistor R1 is electrically connected to the power controller 17.
  • the second resistor R2 is electrically connected between the power controller 17 and the switch component Q1.
  • the third resistor R3 is electrically connected between the first resistor R1 and the gate driver 14.
  • the anode of the diode D is connected to the power controller 17, and the cathode of the diode D is connected to the third resistor R3.
  • the switch component Q1 is used to output a voltage regulation signal according to the pulse width modulation signal PWM.
  • the voltage regulating circuit 114 is electrically connected to the power controller 17 and the switch component Q1, and is used for converting the power signal VP into the level control signal VGH according to the voltage regulating signal VA.
  • the switch component Q1 may be a thin film transistor, the gate of which is connected to the pulse width modulation signal PWM, the drain of which is connected to the second resistor R2, and the source of which is connected to the ground terminal. When the switch component Q1 receives the pulse width modulation signal PWM, the switch component Q1 conducts the ground voltage.
  • the pulse width modulation generator 15 when the pulse width modulation generator 15 outputs a high level pulse width modulation signal PWM, the backlight module 18 will generate light according to the high level pulse width modulation signal PWM.
  • the switch component Q1 also receives the high-level pulse width modulation signal PWM, and conducts the ground voltage (ie, the voltage regulation signal VA) to the second resistor R2.
  • the first voltage level VGH1 is greater than the second voltage level VGH2.
  • the kickback voltage VFT2 of the thin film transistor 22 of each pixel unit 20 compares the kickback voltage VFT2 of the thin film transistor 22 of each pixel unit 20 when the backlight module 18 does not emit light.
  • the backlight module 18 receives the pulse width modulation signal PWM and emits light
  • the kickback voltage VFT1 of the thin film transistor 22 of each pixel unit 20 becomes larger, it is because the first voltage level VGH1 of the scan signal SCAN output by the scan driver 14 Therefore, the thin film transistor 22 will receive the scanning signal SCAN of the first voltage level VGH1 of a higher level to compensate the kickback voltage VFT1.
  • the liquid crystal display 10 of the present invention does not have the defect of bright and dark bands during the display process.
  • the liquid crystal display of the present invention adjusts the level control signal output to the gate driver through the control module.
  • the backlight module receives the pulse width modulation signal and emits light
  • the first voltage level of the scan signal output by the scan driver will be greater than the second voltage level. Therefore, the thin film transistor of each pixel unit will receive a higher level of the first voltage level scanning signal to compensate for the kickback voltage. Therefore, the brightness of the pixel unit corresponding to the thin film transistor that is turned on during the period when the backlight module emits light is increased. . Therefore, the liquid crystal display of the present invention has the beneficial effect that no bright and dark bands appear during the display process.
  • the main body of this application can be manufactured and used in industry and has industrial applicability.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)

Abstract

一种液晶显示器（10），其包含栅极驱动器（14）、电源控制器（17）、脉宽调制产生器（15）、背光模块（18）和控制模块（11）。栅极驱动器（14）用来依据位准控制信号，输出扫描信号的电平。电源控制器（17）用来输出电源信号。脉宽调制产生器（15）用来输出脉宽调制信号。背光模块（18）电性连接脉宽调制产生器（15），用来依据脉宽调制信号产生光线。控制模块（11）电性连接脉宽调制产生器（15）和栅极驱动器（14），用来依据脉宽调制信号调节电源信号以输出位准控制信号。

Description

改善背光频率变化引起亮暗带的液晶显示器 技术领域
本发明涉及显示技术领域，尤指一种改善背光频率变化引起亮暗带的液晶显示器。
 背景技术
液晶显示器（Liquid Crystal Display，LCD）包含多个像素（pixel）以矩阵排列的方式排布，像素本身不发光，需要利用形成于像素中的薄膜场效应晶体管（ThinFilmTransistor，TFT）导通或截止而提供给像素中的液晶合适的数据电压，并配合均匀的背光源，而使液晶显示器显示出画面。
然而由于制程原因,当受背光照射时，会使得非晶硅层(Amorphous silicon, a-Si)的导通性增加。也就是说，背光打开的瞬间，薄膜晶体管的非晶硅层的导电性会接近导体，导致踢回电压(feed through Voltage)变大。因此，在背光开启时段而开启的薄膜晶体管所对应的像素会偏暗，相对地，背光关闭时，踢回电压变小，因此像素会全部偏亮。所以液晶显示器在显示过程中会出现亮暗带的缺陷。
 技术问题
有鉴于此，本发明的目的是提供一种液晶显示器，以解决现有技术的液晶显示器在显示过程中会出现亮暗带的问题。
 技术解决方案
本发明的技术方案提供一种液晶显示器，其包含栅极驱动器、电源控制器、脉宽调制产生器、背光模块和控制模块。该栅极驱动器用来依据位准控制信号，输出扫描信号的电平。该电源控制器用来输出电源信号。该脉宽调制产生器用来输出脉宽调制信号。该背光模块电性连接所述脉宽调制产生器，用来依据所述脉宽调制信号产生光线。该控制模块电性连接所述脉宽调制产生器和所述栅极驱动器，用来依据所述脉宽调制信号调节所述电源信号以输出所述位准控制信号。
依据本发明的实施例，所述控制模块包含开关组件和电压调节电路。该开关组件用来依据所述脉宽调制信号，输出电压调节信号。该电压调节电路电性连接所述电源控制器和所述开关组件，用来依据所述电压调节信号，将所述电源信号转换成所述位准控制信号。
依据本发明的实施例，所述电压调节电路包含第一电阻、第二电阻和第三电阻。该第一电阻电性连接所述电源控制器。该第二电阻电性连接所述电源控制器和所述开关组件之间。该第三电阻电性连接所述第一电阻和所述栅极驱动器之间。
依据本发明的实施例，所述电压调节电路另包含二极管及电感。该二极管的正极连接于所述电源控制器，其负极连接于所述第三电阻。该电感电性连接于所述二极管的正极。
依据本发明的实施例，所述电压调节电路用来于所述开关组件传输所述电压调节信号时，将所述电源信号转换成具有第一电压位准的所述位准控制信号，所述电压调节电路用来于所述开关组件未传输所述电压调节信号时，将所述电源信号转换成具有第二电压位准的所述位准控制信号，所述第一电压位准不同于所述第二电压位准。
依据本发明的实施例，所述第一电压位准大于所述第二电压位准。
依据本发明的实施例，所述开关组件于接收所述脉宽调制信号时，所述第一电压位准是由所述第一电阻和所述第二电阻并联的电阻值以及所述第三电阻的电阻值决定。
依据本发明的实施例，所述开关组件未接收所述脉宽调制信号时，所述第二电压位准是由所述第一电阻的电阻值以及所述第三电阻的电阻值决定。
依据本发明的实施例，所述开关组件是一晶体管，其栅极电性连接于所述脉宽调制信号，其源极电性连接于接地电压，其漏极电性连接于所述第二电阻。
依据本发明的实施例，所述开关组件于接收所述脉宽调制信号时，所述开关组件导通所述接地电压。
 有益效果
相较于现有技术，本发明液晶显示器通过控制模块来调节输出至栅极驱动器的位准控制信号。当背光模块收到脉宽调制信号而发出光线时，扫描驱动器输出的扫描信号的第一电压位准会大于第二电压位准。因此，各像素单元的薄膜晶体管会接收较高电平的第一电压位准的扫描信号而补偿踢回电压，所以在背光模块发出光线的时段而开启的薄膜晶体管所对应的像素单元的亮度提高。因此本发明的液晶显示器具有在显示过程中不会出现亮暗带的有益效果。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
 附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明的液晶显示器的功能方块图。
图2是本发明电源控制器、脉宽调制产生器和控制模块电路示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施之特定实施例。本发明所提到的方向用语，例如“上”、“下”、“前”、“后”、“左”、“右”、“顶”、“底”、“水平”、“垂直”等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
请参阅图1，图1为本发明的液晶显示器10的功能方块图。液晶显示器10包含控制模块11、液晶显示面板12、栅极驱动器(gate driver)14、脉宽调制产生器15、源极驱动器(source driver)16、电源控制器17、背光模块18和时序控制器19。液晶显示面板12包括上玻璃基板和下玻璃基板、以及位于二者之间的液晶。液晶显示面板12包含数个像素(pixel)，而每一个像素包含三个分别代表红绿蓝(RGB)三原色的像素单元20构成。以一个1024 × 768分辨率的液晶显示面板12来说，共需要1024 × 768 × 3个像素单元20组合而成。液晶显示面板12包括上玻璃基板和下玻璃基板、以及灌装入二者之间的液晶Clc。液晶显示面板12包括数据线D1至Dn、与数据线D1至Dn交叉的扫描线G1至Gm、以及以矩阵的形式排列在数据线D1至Dn和扫描线G1至Gm的交叉处的多个像素，其中，m和n均为正整数。
每个像素单元20形成在液晶显示面板12的下玻璃基板上。每个像素单元20包括薄膜场效应晶体管（Thin Film Transistor，TFT）以及液晶Clc。在液晶显示面板12的上玻璃基板上形成有黑色矩阵、彩色滤光片（ColorFilter， CF）。公共电极可以诸如扭曲向列（TN）模式和垂直配向（VA）模式的垂直电场驱动方式形成在上玻璃基板上，也可以诸如平面内切换（IPS）模式和边缘场切换（FFS）模式的水平电场驱动方式与像素电极一起形成在下玻璃基板上。
栅极驱动器14输出扫描信号使得每一行的晶体管22依序开启，同时源极驱动器16则输出对应的数据信号至像素单元20使其充电到各自所需的电压，以显示不同的灰阶。当同一行充电完毕后，栅极驱动器14便将该行的扫描信号关闭，然后栅极驱动器14再输出扫描信号将下一行的晶体管22打开，再由源极驱动器16对下一行的像素单元20进行充放电。如此依序下去，直到液晶显示面板12的所有像素单元20都充电完成，再从第一行开始充电。
在目前的液晶显示面板设计中，栅极驱动器14的目的即每隔一固定间隔输出扫描信号至液晶显示面板12。以一个1024 × 768分辨率的液晶显示面板12以及60Hz的更新频率为例，每一个画面的显示时间约为1/60=16.67ms。所以每一个扫描信号的脉波约为16.67ms/768=21.7μs。而源极驱动器16则在这21.7μs的时间内，将像素单元20充放电到所需的电压，以显示出相对应的灰阶。
时序控制器19对液晶显示面板12从系统板（未示出）接收到的包含在输入画面中的数字视频数据RGB重新布置，并且将重新布置的数据视频数据RGB提供给数据驱动器13。时序控制器19从系统板接收时序信号，例如垂直同步信号Vsycn、水平同步信号Hsync、数据使能信号DE和时钟CLK，并利用时序信号生成用于控制数据驱动器13和栅极驱动器14的操作时序的控制信号。
数据驱动器13在时序控制器19的控制下锁存数字视频数据并将锁存的数字视频数据进行转换，由此，生成正数据电压和负数据电压，然后数据驱动器13向数据线D1至Dn提供正数据电压和负数据电压。栅极驱动器14在时序控制器19的控制下顺序地向扫描线G1至Gm提供具有约一个水平周期（约一帧时间）的宽度扫描脉冲。例如，当在某一条扫描线上施加足够大的正电压时，则连接在这一条扫描线上所有的晶体管22的栅极皆会被打开，此时该条扫描上的像素电极会与数据线D1至Dn连接，进而经由数据线D1至Dn上的数据电压（正数据电压或负数据电压）对其进行充电至适当的电压。接着在该条扫描线上施加足够大的负电压，关闭连接在该条扫描线上所有的晶体管22的栅极，直到下次再重新打开，期间使得电荷保存在液晶Clc上；此时再启动下一条扫描线，对下一条扫描线上的像素电极进行充电。如此依序将整个画面的视频数据写入，再重新自第一条扫描线重新开始（此重复的频率为一帧时间的倒数）。
请参阅图1和图2，图2是本发明电源控制器17、脉宽调制产生器15和控制模块11电路示意图。栅极驱动器14用来依据位准控制信号VGH，控制输出至扫描线G1-Gn的扫描信号SCAN的电平。电源控制器17用来输出电源信号VP。脉宽调制产生器15用来输出脉宽调制信号PWM。背光模块18电性连接所述脉宽调制产生器15，用来依据脉宽调制信号PWM产生光线。控制模块11电性连接脉宽调制产生器15和栅极驱动器14，用来依据脉宽调制信号PWM调节电源信号VP以输出位准控制信号VGH。脉宽调制信号PWM的脉宽等于每一帧的时间。
控制模块11包含二极管D、电感L、开关组件Q1以及电压调节电路114。电压调节电路114包括第一电阻R1、第二电阻R2和第三电阻R3。第一电阻R1电性连接电源控制器17。第二电阻R2电性连接电源控制器17和开关组件Q1之间。第三电阻R3电性连接第一电阻R1和栅极驱动器14之间。二极管D的正极连接于电源控制器17，二极管D的负极连接于第三电阻R3。开关组件Q1用来依据脉宽调制信号PWM，输出电压调节信号。电压调节电路114电性连接电源控制器17和开关组件Q1，用来依据电压调节信号VA，将电源信号VP转换成位准控制信号VGH。开关组件Q1可以是薄膜晶体管，其栅极连接于脉宽调制信号PWM，其漏极连接于第二电阻R2，其源极连接于接地端。开关组件Q1于接收脉宽调制信号PWM时，开关组件Q1导通接地电压。
依据本实施例的运作原理，当脉宽调制产生器15输出高电平的脉宽调制信号PWM时，背光模块18会依据高电平的脉宽调制信号PWM而产生光线。同时开关组件Q1也会接收到高电平的脉宽调制信号PWM，并导通接地电压(亦即电压调节信号VA)至第二电阻R2。此时，位准控制信号VGH的第一电压位准VGH1会由第一电阻R1和第二电阻R2并联的电阻值RP以及第三电阻R3的电阻值决定，也就是VGH1=(1+R3/RP)*VP。
当脉宽调制产生器15输出低电平的脉宽调制信号PWM时，背光模块18不会产生光线。同时开关组件Q1也会接收到低电平的脉宽调制信号PWM而关闭。此时开关组件Q1不会导通接地电压至第二电阻R2。因此第二电阻R2处于浮动(floating)状态。这时位准控制信号VGH的第二电压位准VGH2会由第一电阻R1以及第三电阻R3的电阻值决定，也就是VGH2=(1+R3/R1)*VP。
因为第一电阻R1和第二电阻R2并联的电阻值RP会小于第一电阻R1的电阻值，因此第一电压位准VGH1大于第二电压位准VGH2。在实际应用时，比较背光模块18没有发出光线时，各像素单元20的薄膜晶体管22的踢回电压VFT2。当背光模块18收到脉宽调制信号PWM而发出光线时，虽然各像素单元20的薄膜晶体管22的踢回电压VFT1变大，但是因为扫描驱动器14输出的扫描信号SCAN的第一电压位准VGH1较大，因此，薄膜晶体管22会接收较高电平的第一电压位准VGH1的扫描信号SCAN而补偿踢回电压VFT1，所以背光模块18发出光线的时段而开启的薄膜晶体管22所对应的像素单元20亮度提高。如此一来，本发明的液晶显示器10在显示过程中不会出现亮暗带的缺陷。
综合以上，本发明液晶显示器通过控制模块来调节输出至栅极驱动器的位准控制信号。当背光模块收到脉宽调制信号而发出光线时，扫描驱动器输出的扫描信号的第一电压位准会大于第二电压位准。因此，各像素单元的薄膜晶体管会接收较高电平的第一电压位准的扫描信号而补偿踢回电压，所以在背光模块发出光线的时段而开启的薄膜晶体管所对应的像素单元的亮度提高。因此本发明的液晶显示器具有在显示过程中不会出现亮暗带的有益效果。
综上所述，虽然本发明已以较佳实施例揭露如上，但该较佳实施例并非用以限制本发明，该领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。
 工业实用性
本申请的主体可以在工业中制造和使用，具备工业实用性。

Claims (10)

  1. 一种液晶显示器，其包含：
    栅极驱动器，用来依据位准控制信号，输出扫描信号的电平；
    电源控制器，用来输出电源信号；
    脉宽调制产生器，用来输出脉宽调制信号；
    背光模块，电性连接所述脉宽调制产生器，用来依据所述脉宽调制信号产生光线；以及
    控制模块，电性连接所述脉宽调制产生器和所述栅极驱动器，用来依据所述脉宽调制信号调节所述电源信号以输出所述位准控制信号。
  2. 根据权利要求1所述的液晶显示器，其中所述控制模块包含：
    开关组件，用来依据所述脉宽调制信号，输出电压调节信号；及
    电压调节电路，电性连接所述电源控制器和所述开关组件，用来依据所述电压调节信号，将所述电源信号转换成所述位准控制信号。
  3. 根据权利要求2所述的液晶显示器，其中所述电压调节电路包含：
    第一电阻，电性连接所述电源控制器；
    第二电阻，电性连接所述电源控制器和所述开关组件之间；及
    第三电阻，电性连接所述第一电阻和所述栅极驱动器之间。
  4. 根据权利要求3所述的液晶显示器，其中所述电压调节电路另包含：
    二极管，其正极连接于所述电源控制器，其负极连接于所述第三电阻；及
    电感，电性连接于所述二极管的正极。
  5. 根据权利要求3所述的液晶显示器，其中所述电压调节电路用来于所述开关组件传输所述电压调节信号时，将所述电源信号转换成具有第一电压位准的所述位准控制信号，所述电压调节电路用来于所述开关组件未传输所述电压调节信号时，将所述电源信号转换成具有第二电压位准的所述位准控制信号，所述第一电压位准不同于所述第二电压位准。
  6. 根据权利要求5所述的液晶显示器，其中所述第一电压位准大于所述第二电压位准。
  7. 根据权利要求5所述的液晶显示器，其中所述开关组件于接收所述脉宽调制信号时，所述第一电压位准是由所述第一电阻和所述第二电阻并联的电阻值以及所述第三电阻的电阻值决定。
  8. 根据权利要求5所述的液晶显示器，其中所述开关组件未接收所述脉宽调制信号时，所述第二电压位准是由所述第一电阻的电阻值以及所述第三电阻的电阻值决定。
  9. 根据权利要求5所述的液晶显示器，其中所述开关组件是一晶体管，其栅极电性连接于所述脉宽调制信号，其源极电性连接于接地电压，其漏极电性连接于所述第二电阻。
  10. 根据权利要求9所述的液晶显示器，其中所述开关组件于接收所述脉宽调制信号时，所述开关组件导通所述接地电压。
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