WO2017028479A1 - 栅极驱动方法和装置 - Google Patents

栅极驱动方法和装置 Download PDF

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Publication number
WO2017028479A1
WO2017028479A1 PCT/CN2016/070092 CN2016070092W WO2017028479A1 WO 2017028479 A1 WO2017028479 A1 WO 2017028479A1 CN 2016070092 W CN2016070092 W CN 2016070092W WO 2017028479 A1 WO2017028479 A1 WO 2017028479A1
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gate driving
bias current
output
gate
driving unit
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PCT/CN2016/070092
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English (en)
French (fr)
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郑亮亮
何剑
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京东方科技集团股份有限公司
合肥京东方光电科技有限公司
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Priority to US15/516,207 priority Critical patent/US20170301306A1/en
Publication of WO2017028479A1 publication Critical patent/WO2017028479A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0291—Details of output amplifiers or buffers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G09G2330/023—Power management, e.g. power saving using energy recovery or conservation

Definitions

  • the present invention relates to the field of liquid crystal displays, and in particular to a gate driving method and apparatus.
  • TFT Thin film transistor
  • a TFT liquid crystal display generally includes a pixel matrix arranged in two directions of horizontal and vertical.
  • a gate input signal is generated through a shift register, and each row of pixels is sequentially scanned from a first row to a last row, thereby forming TFTs of each row.
  • the cells are sequentially turned on, and the pixel voltages output from the source driver chip are sequentially written into the corresponding pixel storage capacitors.
  • Fig. 1 is a view showing a driving structure of a conventional split TFT LCD (Thin Film Transistor Liquid Crystal Display).
  • the system sends the picture information to the timing controller (TCON) 103.
  • the TCON 103 outputs the DATA/LOAD/POL/CLK signal to the source driver chip (Source IC) 101, and outputs the STV/CPV/OE signal to the gate driver chip (gate driver IC) 102.
  • FIG. 2 shows a schematic diagram of a fan-out area of a gate drive IC.
  • the gate output channel (center channel) of the central portion of the panel region where the gate driving IC is located has a small fan-out resistance, and the gate output channel (edge channel) of the edge portion of the panel region.
  • the fan-out resistance is large, that is, the fan-out resistance of the gate channel increases as the distance of the gate output channel from the gate drive IC increases.
  • FIG. 3 shows a schematic diagram of the output delay of the gate signal due to the panel load, that is, there is a problem that the output signal of the gate drive IC has a phase delay due to the presence of the panel load.
  • the number of output channels of the gate drive IC is also rapidly increasing, such as from the previous 384 output channels (384CH) to 960CH, or even 1600CH.
  • the existing fabrication process that is, the line width and the line spacing of the gate output channel of the fan-out region of the gate driving IC are maintained, the fan-out area of the gate driving IC is inevitably enlarged, thereby causing the panel frame to become changed. Wide, this is in contrast to the narrow border of market demand. Therefore, in order to meet the market demand, panel designers must reduce the line width and line spacing of the gate output channel, which inevitably leads to an increase in the line resistance of the gate output channel, and the center channel and the edge channel in the gate output channel. The resistance values differ greatly.
  • the fan-out resistance of the center channel is only 100 ohms, while the fan-out resistance of the edge channel is 7000 ohms.
  • the prior art adopts a scheme of uniformly setting the output bias current of the gate driving IC according to the panel load of the edge channel, but the scheme cannot output according to different output channels of the gate driving IC. Local adjustment of the bias current. Since the panel load of the edge channel is large and the panel load of the center channel is small, in the case of ensuring that the gate of the edge channel can be normally driven, although the gate channel of the edge channel is normally driven, the gate channel of the center channel There is an overdrive phenomenon, which in turn leads to a significant increase in power consumption of the panel.
  • a gate driving method for a liquid crystal display panel including a gate driving device for driving a plurality of output channels, the gate driving method including: The plurality of output channels are relative to the plurality Positions of the central output channels in the output channels, dividing the gate driving device into a plurality of gate driving units; and respectively setting bias currents output by the plurality of gate driving units, such that the gate driving The smaller the average distance of the output channel driven by the unit from the center output channel, the smaller the bias current output by the gate drive unit is set.
  • a gate driving apparatus for a liquid crystal display panel comprising: a gate driving unit dividing portion configured to Dividing the gate driving device into a plurality of gate driving units according to positions of the plurality of output channels with respect to a central output channel of the plurality of output channels; and bias current setting portions configured to respectively Setting a bias current output by the plurality of gate driving units such that an average distance of an output channel driven by the gate driving unit from a central output channel is smaller, and a bias current output by the gate driving unit is set to The smaller.
  • a correspondence between an output channel of the gate driving device and the bias current may be stored in a lookup table.
  • the lookup table can be utilized by the timing controller to set the corresponding bias current.
  • the corresponding bias current can be set by hardware pins.
  • the bias current can be classified into a maximum bias current, a medium bias current, and a minimum bias current.
  • the bias current can be classified into a maximum bias current, a second maximum bias current, a large bias current, a second large bias current, a medium bias current, a secondary medium bias current, a small bias current, and Minimum bias current.
  • the gate driving device may be divided into 15 gate driving units, wherein a bias current output by the (8-i)th gate driving unit is set equal to an output of the (8+i)th gate driving unit Bias current, and the bias current output by the (7+i)th gate driving unit is set to be smaller than the bias current of the (8+i)th gate driving unit output, where 0 ⁇ i ⁇ 8, and i Is an integer.
  • the gate driving device may be divided into (2n-1) gate driving units, wherein a bias current output by the (ni)th gate driving unit is set to be the (n+i)th gate driving unit
  • the output bias currents are equal, and the bias current of the (n+i-1)th gate drive unit output is set to be smaller than the bias voltage of the (n+i)th gate drive unit output Stream, where 0 ⁇ i ⁇ n, and i and n are integers.
  • the bias current is classified into n different bias currents.
  • the average distance of the output channels driven by the (n+i-1)th gate driving unit from the center output channel is smaller than the average of the output channels driven by the (n+i)th gate driving unit from the center output channel. distance.
  • the present invention proposes that the signal phase delay caused by the panel load difference caused by the channel resistance of the fan-out region is considered in consideration of different output channels of the gate driving IC.
  • a low-power gate driving device and a gate driving method are provided in a central output channel region close to the gate driving IC (in this region, panel fan-out resistance is small, and gate driver IC output channel signal delay is small)
  • the bias current of the output OP of the gate drive IC can be set to be relatively small; in the center output channel region away from the gate drive IC (in this region, the panel fan-out resistance is large, and the output of the gate drive IC
  • the channel signal has a large delay, and the bias current of the output OP of the gate drive IC can be set to be relatively large.
  • FIG. 1 is a schematic view showing a driving structure of a conventional split type thin film transistor liquid crystal display
  • FIG. 2 is a schematic view showing a fan-out area of a conventional gate driving chip
  • Figure 3 shows a schematic diagram of the output delay of the gate signal due to panel loading
  • FIG. 4 shows a lookup table of bias currents of an operational amplifier output of a gate drive chip in accordance with an embodiment of the present invention
  • FIG. 5 is a hardware configuration diagram when a gate driving chip outputs a bias current through an operational amplifier according to an embodiment of the present invention
  • FIG. 6 shows a flow chart of a gate driving method according to an embodiment of the present invention
  • FIG. 7 shows a block diagram of a gate driving device according to an embodiment of the present invention.
  • FIG. 8 illustrates a lookup for setting a gate bias current in accordance with an embodiment of the present invention. table
  • FIG. 9 illustrates a particular lookup table for setting a gate bias current, in accordance with an embodiment of the present invention.
  • FIG. 10 illustrates another specific lookup table for setting a gate bias current in accordance with an embodiment of the present invention.
  • the structure of the low-power gate driving chip (gate driving IC) to be protected by the present invention can be applied to an existing liquid crystal display panel, wherein the fan-out resistance of the gate driving IC at the edge of the panel is large, and the center position of the panel is
  • the gate drive IC has a small fan-out resistance. In view of the feature of the fan-out resistance of the gate drive IC, it is sufficient to drive the gate operation near the center position by providing a lower output bias current near the center of the panel.
  • the gate drive bias current can be set by software programming. Specifically, a corresponding bias current is set on the turned-on gate according to different TCON codes.
  • FIG. 5 is a hardware configuration diagram when a gate drive IC outputs a bias current through an OP according to an embodiment of the present invention, wherein a hardware pin (PIN) 301 is connected to the gate output unit 302, and the gate output unit 302 includes a bias.
  • a control circuit 3021 and an output operational amplifier (OP) 3022 are provided.
  • the resistors of the gate drive IC are used to set the bias current, and the resistors are configured to implement the modification of the Bias bias current of the gate drive IC.
  • An embodiment of the present invention provides a gate driving method for a liquid crystal display panel, the liquid crystal display panel including a gate driving device for driving a plurality of output channels, the gate driving method including: Decoding the gate driving device into a plurality of gate driving units with respect to positions of the plurality of output channels with respect to a central output channel of the plurality of output channels; and respectively setting the outputs of the plurality of gate driving units Biasing current such that the output channels driven by the gate drive unit are spaced apart from the central output channel The smaller the average distance, the smaller the bias current output by the gate driving unit is set.
  • FIG. 6 illustrates a gate driving method for gate driving of a liquid crystal display panel according to an embodiment of the present invention.
  • the gate driving method includes: dividing a gate driving device of the liquid crystal display panel into an edge position gate driving unit according to positions of the plurality of output channels of the gate driving device with respect to the central output channel, a middle position (ie, a position between the edge position and the center position) a gate driving unit and a center position gate driving unit (S601); and an edge position gate driving unit, an intermediate position gate driving unit, a center position gate
  • the order of the driving units is set to be sequentially decremented by the bias currents of the output of the output operational amplifiers thereof (S602).
  • the correspondence between the position of the output channel of the gate driving device and the bias current can be stored in the lookup table.
  • the look-up table can be utilized by the timing controller to set the corresponding bias current, that is, the bias current can be set by the software mode shown in FIG.
  • the corresponding bias current can be set by a hardware pin (PIN), that is, the bias current can be set by the hardware method shown in FIG.
  • the bias current can be classified into a maximum bias current, a medium bias current, and a minimum bias current. Further, the bias current can also be classified into a maximum bias current, a sub-maximum bias current, a large bias current, a second large bias current, a medium bias current, a secondary medium bias current, and a small bias. Current and minimum bias current.
  • a gate driving device for a liquid crystal display panel for driving a plurality of output channels, and comprising: a gate driving unit dividing portion configured to follow The plurality of output channels divide the gate driving device into a plurality of gate driving units with respect to a position of a central output channel of the plurality of output channels; and a bias current setting portion configured to be separately set
  • the bias currents output by the plurality of gate driving units are such that the smaller the average distance of the output channels driven by the gate driving unit from the central output channel, the bias current output by the gate driving unit is set to be small.
  • FIG. 7 illustrates a gate drive device 700 for gate drive of a liquid crystal display in accordance with an embodiment of the present invention.
  • the gate driving device 700 includes a gate driving unit dividing portion 701 configured to divide the gate driving device into edge position gate driving according to positions of the plurality of output channels of the gate driving device with respect to the central output channel Unit, a middle position (ie, a position between the edge position and the center position) a gate driving unit and a center position gate driving unit; and a bias current setting portion 702 configured to follow the edge position gate driving unit, the intermediate position gate
  • the order of the driving unit and the central position gate driving unit is set to be sequentially decremented by the bias current of the output of the corresponding output operational amplifier. Further, the bias current is applied to each of the pixel units 703 for driving.
  • the edge position gate driving unit and the intermediate position gate driving unit can be further divided separately based on similar division criteria.
  • the gate driving method and the gate driving device according to an embodiment of the present invention are described in detail below in conjunction with specific division criteria.
  • the static bias current corresponding to the output OP of CH and [m-2f(m/15)]CH to [mf(m/15)-1]CH is set to the minimum (Middle Maximum); 2f(m/15)CH to [3f(m/15)-1]CH and [m-3f(m/15)]CH to [m-2f(m/15)-1]CH in the output channel
  • the corresponding quiescent bias current of the output OP is set to Large; it will be used with 3f(m/15)CH to [4f(m/15)-1]CH and [m-4f) in the output channel.
  • the output OP corresponds to the static bias current set to the next larger (Middle Large); will be used with the 4f in the output channel (m/15) CH to [5f(m/15)-1]CH and [m-5f(m/15)]CH to [m-4f(m/15)-1]CH corresponding to the output OP
  • the static bias current is set to Medium; will be used for 5f(m/15)CH to [6f(m/15)-1]CH and [m-6f(m/15)]CH in the output channel Output OP phase to [m-5f(m/15)-1]CH
  • the corresponding static bias current is set to Middle Medium; it will be used with 6f(m/15)CH to [7f(m/15)-1]CH and [m-7f(m/) in the output channel.
  • the static bias current corresponding to the output OP of 1CH to 49CH and 750CH to 800CH in the output channel for the gate driving IC is set to be set by debugging to Maximum; sets the static bias current corresponding to the output OP for 50CH to 99CH and 700CH to 749CH in the output channel to Middle Maximum; will be used for 100CH to 149CH in the output channel
  • the static bias current corresponding to the output OP of 650CH to 699CH is set to Large; the static bias current corresponding to the output OP for 150CH to 199CH and 600CH to 649CH in the output channel is set to Middle Large; set the static bias current corresponding to the output OP for 200CH to 249CH and 550CH to 599CH in the output channel to Medium; will be used with 250CH to 299CH in the
  • the static bias current corresponding to the output OP of 1CH to 99CH and 1500CH to 1600CH in the output channel for the gate driving IC is set to be Maximum; set the static bias current corresponding to the output OP for 100CH to 199CH and 1400CH to 1499CH in the output channel to Middle Maximum; will be used for 200CH to 299CH in the output channel
  • the static bias current corresponding to the output OP of 1300CH to 1399CH is set to Large; the static bias current corresponding to the output OP for 300CH to 399CH and 1200CH to 1299CH in the output channel is set to Large (large); will be used with the 400CH to 499CH in the output channel and
  • the static bias current corresponding to the output OP of 1100CH to 1199CH is set to Medium; the static bias current
  • the output OP Orthogonal Amplifier
  • the bias current corresponding to the output OP of the gate drive IC may also be dynamically adjusted according to the difference in the output channel of the gate drive IC.
  • the gate driving device may be divided into (2n-1) gate driving units, and the bias current may be divided into n different magnitudes of bias currents.
  • the bias current output by the (ni)th gate driving unit is set to be equal to the bias current output by the (n+i)th gate driving unit, and the (n+i-1)th
  • the bias current output from the gate driving unit is set to be smaller than the bias current output by the (n+i)th gate driving unit, where 0 ⁇ i ⁇ n, and i and n are integers.
  • the average distance of the output channels driven by the (n+i-1)th gate driving unit from the center output channel is smaller than the average of the output channels driven by the (n+i)th gate driving unit from the center output channel. distance.
  • the invention also discloses a display device comprising a plurality of pixel units and the above-mentioned gate driving device.
  • the display device can be applied to any product or component having a display function such as a liquid crystal panel, an electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.

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  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
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Abstract

用于液晶显示面板的栅极驱动方法和栅极驱动装置。所述驱动方法包括：按照栅极驱动装置的多个输出通道相对于中心输出通道的位置，将栅极驱动装置划分为多个栅极驱动单元；以及分别设置所述多个栅极驱动单元输出的偏置电流，使得所述栅极驱动单元所驱动的输出通道相距中心输出通道的平均距离越小，该栅极驱动单元输出的偏置电流被设置为越小。能够降低栅极驱动装置(700)的功耗，进一步降低液晶面板的功耗。

Description

栅极驱动方法和装置 技术领域
本发明涉及液晶显示器领域，具体地，涉及栅极驱动方法和装置。
背景技术
近年来，随着半导体技术的发展，便携式电子产品及平面显示器产品也随之兴起。薄膜晶体管(TFT，Thin Film Transistor)液晶显示器由于具有操作电压低、无辐射线散射、重量轻和体积小等优点，已逐渐成为各种数字产品的标准输出设备。随着各种显示设备，如手机、PAD等系统集成度越来越高、厚度越来越小，系统CPU已经从先前的单核陆续发展为双核、四核、八核乃至更多核，系统的耗电也越来越高。市场对手机和PAD等显示设备的续航时间的要求也越来越高，持续降低显示设备的功耗成为系统厂商和面板厂商持续追求的目标。
TFT液晶显示器一般包括水平和垂直两个方向排列的像素矩阵，TFT液晶显示器进行显示时，通过移位寄存器产生栅极输入信号，从第一行到最后一行依次扫描各行像素，从而每一行的TFT单元依次打开，并且源极驱动芯片输出的像素电压依次写入相应的像素存储电容器中。
图1示出了传统分离式TFT LCD(薄膜晶体管液晶显示器)的驱动结构的示意图。系统将图片信息发送给时序控制器(TCON)103。TCON 103将DATA/LOAD/POL/CLK信号输出至源极驱动芯片(Source IC)101，并且将STV/CPV/OE信号输出至栅极驱动芯片(栅极驱动IC)102。
图2示出了栅极驱动IC的扇出区域的示意图。如图2所示，栅极驱动IC所在的面板区域的中心部分的栅极输出通道(中心通道)的扇出电阻较小，面板区域的边缘部分的栅极输出通道(边缘通道) 的扇出电阻较大，即，栅极通道的扇出电阻随着栅极输出通道相距栅极驱动IC的距离的增大而增大。
图3示出了由于面板负载引起的栅极信号的输出延迟示意图，即，由于面板负载的存在导致栅极驱动IC的输出信号存在相位延迟的问题。
随着面板的解析度的逐步提高，栅极驱动IC的输出通道的数量也在飞速提高，如从先前的384个输出通道(384CH)提高到960CH，甚至是1600CH。如果保持现有的制作工艺，即，保持栅极驱动IC的扇出区域的栅极输出通道的线宽和线距，必然会导致栅极驱动IC的扇出区域变大，从而引起面板边框变宽，这一点又与市场需求的窄边框相悖。因此，面板设计人员为了迎合市场需求，必须减小栅极输出通道的线宽和线距，这样必然导致栅极输出通道的线路电阻增大，并且栅极输出通道中的中心通道与边缘通道的电阻阻值相差更大。例如，中心通道的扇出电阻只有100欧姆，而边缘通道的扇出电阻却有7000欧姆。如图3所示，面板负载(R*C)越大，栅极驱动IC输出信号相位延迟越大。
为了保证面板能够正常显示，现有技术中采用了依据边缘通道的面板负载来统一地设置栅极驱动IC的输出偏置电流的方案，然而该方案无法根据栅极驱动IC的不同输出通道进行输出偏置电流的局部调整。由于边缘通道的面板负载较大，并且中心通道的面板负载较小，在保证能够正常驱动边缘通道的栅极的情况下，虽然边缘通道的栅极通道被正常驱动，然而中心通道的栅极通道存在过驱动现象，进而导致面板的功耗显著上升。
发明内容
本发明的目的至少在于提供一种低功耗的栅极驱动装置和栅极驱动方法。
根据本发明的一个方面，提出了一种用于液晶显示面板的栅极驱动方法，所述液晶显示面板包括用于驱动多个输出通道的栅极驱动装置，所述栅极驱动方法包括：按照所述多个输出通道相对于所述多 个输出通道中的中心输出通道的位置，将所述栅极驱动装置划分为多个栅极驱动单元；以及分别设置所述多个栅极驱动单元输出的偏置电流，使得所述栅极驱动单元所驱动的输出通道相距中心输出通道的平均距离越小，该栅极驱动单元输出的偏置电流被设置为越小。
根据本发明的另一个方面，提出了一种用于液晶显示面板的栅极驱动装置，所述栅极驱动装置用于驱动多个输出通道，并且包括：栅极驱动单元划分部，其配置为按照所述多个输出通道相对于所述多个输出通道中的中心输出通道的位置，将所述栅极驱动装置划分为多个栅极驱动单元；以及偏置电流设置部，其配置为分别设置所述多个栅极驱动单元输出的偏置电流，使得所述栅极驱动单元所驱动的输出通道相距中心输出通道的平均距离越小，该栅极驱动单元输出的偏置电流被设置为越小。
可以将所述栅极驱动装置的输出通道与所述偏置电流的对应关系存储在查找表中。
可以通过时序控制器利用所述查找表来设置相应的偏置电流。
可以通过硬件管脚来设置相应的偏置电流。
可以将所述偏置电流分类为最大偏置电流、中等偏置电流和最小偏置电流。
可以将所述偏置电流分类为最大偏置电流、次最大偏置电流、较大偏置电流、次较大偏置电流、中等偏置电流、次中等偏置电流、较小偏置电流和最小偏置电流。
所述栅极驱动装置可以被划分为15个栅极驱动单元，其中第(8-i)个栅极驱动单元输出的偏置电流设置为等于第(8+i)个栅极驱动单元输出的偏置电流，并且第(7+i)个栅极驱动单元输出的偏置电流设置为小于第(8+i)个栅极驱动单元输出的偏置电流，其中0＜i＜8，并且i为整数。
所述栅极驱动装置可以被划分为(2n-1)个栅极驱动单元，其中第(n-i)个栅极驱动单元输出的偏置电流设置为与第(n+i)个栅极驱动单元输出的偏置电流相等，并且第(n+i-1)个栅极驱动单元输出的偏置电流设置为小于第(n+i)个栅极驱动单元输出的偏置电 流，其中0＜i＜n，并且i和n为整数。所述偏置电流分类为n种不同的偏置电流。此外，第(n+i-1)个栅极驱动单元所驱动的输出通道相距中心输出通道的平均距离小于第(n+i)个栅极驱动单元所驱动的输出通道相距中心输出通道的平均距离。
在本发明实施例中，为了更进一步降低液晶显示面板的功耗，考虑到栅极驱动IC的不同输出通道因为扇出区域的通道电阻引起的面板负载差异所导致的信号相位延迟，本发明提出了一种低功耗栅极驱动装置和栅极驱动方法，在靠近栅极驱动IC的中心输出通道区域(该区域中，面板扇出电阻较小，栅极驱动IC的输出通道信号延迟较小)，可以将栅极驱动IC的输出OP的偏置电流设置为相对较小；在远离栅极驱动IC的中心输出通道区域(该区域中，面板扇出电阻较大，栅极驱动IC的输出通道信号延迟较大)，可以将栅极驱动IC的输出OP的偏置电流设置为相对较大。通过本发明实施例的栅极驱动IC的设计，在实现面板正常驱动显示的同时最大程度地降低栅极驱动IC的功耗，进一步降低液晶显示面板的功耗。
附图说明
为了更好的理解多种示例实施例，将参考附图描述本发明的具体实施例，其中：
图1示出了传统分离式薄膜晶体管液晶显示器的驱动结构的示意图；
图2示出了现有的栅极驱动芯片的扇出区域的示意图；
图3示出了由于面板负载引起的栅极信号的输出延迟示意图；
图4示出了根据本发明实施例的栅极驱动芯片的运算放大器输出的偏置电流的查找表；
图5示出了根据本发明实施例的栅极驱动芯片通过运算放大器输出偏置电流时的硬件配置图；
图6示出了根据本发明实施例的栅极驱动方法的流程图；
图7示出了根据本发明实施例的栅极驱动装置的框图；
图8示出了根据本发明实施例的用于设置栅极偏置电流的查找 表；
图9示出了根据本发明实施例的一种具体的用于设置栅极偏置电流的查找表；以及
图10示出了根据本发明实施例的另一种具体的用于设置栅极偏置电流的查找表。
具体实施方式
现在将参考附图对本发明的实施例进行详细描述。
本发明所要保护的低功耗栅极驱动芯片(栅极驱动IC)的结构可应用于现有的液晶显示面板，其中面板边缘位置的栅极驱动IC的扇出电阻较大，面板中心位置的栅极驱动IC的扇出电阻较小。鉴于栅极驱动IC的扇出电阻存在的这种特点，可以通过在面板的中心位置附近提供较低的输出偏置电流就足以驱动中心位置附近的栅极工作。
图4示出了根据本发明实施例的栅极驱动芯片的OP(运算放大器)输出的偏置电流的查找表，其中栅极驱动IC的OP输出可调。如图4所示，可以通过软件编程的方式来设置栅极驱动偏置电流。具体地，根据不同的TCON代码，在所接通的栅极上设置相应的偏置电流。
图5示出了根据本发明实施例的栅极驱动IC通过OP输出偏置电流时的硬件配置图，其中硬件管脚(PIN)301与栅极输出单元302连接，栅极输出单元302包括偏置控制电路3021和输出运算放大器(OP)3022。通过栅极驱动IC的用于设置偏置电流的硬件，配置电阻来实现栅极驱动IC的Bias偏置电流的修改。
本发明的一个实施例提供了一种用于液晶显示面板的栅极驱动方法，所述液晶显示面板包括用于驱动多个输出通道的栅极驱动装置，所述栅极驱动方法包括：按照所述多个输出通道相对于所述多个输出通道中的中心输出通道的位置，将所述栅极驱动装置划分为多个栅极驱动单元；以及分别设置所述多个栅极驱动单元输出的偏置电流，使得所述栅极驱动单元所驱动的输出通道相距所述中心输出通道 的平均距离越小，该栅极驱动单元输出的偏置电流被设置为越小。
例如，图6示出了根据本发明实施例的栅极驱动方法，其用于液晶显示面板的栅极驱动。如图6所示，所述栅极驱动方法包括：按照栅极驱动装置的多个输出通道相对于中心输出通道的位置，将液晶显示面板的栅极驱动装置划分为边缘位置栅极驱动单元、中间位置(即，边缘位置与中心位置之间的位置)栅极驱动单元和中心位置栅极驱动单元(S601)；以及按照边缘位置栅极驱动单元、中间位置栅极驱动单元、中心位置栅极驱动单元的顺序将与其对应的输出运算放大器输出的偏置电流设置为依次递减(S602)。
具体地，可以将栅极驱动装置的输出通道的位置与偏置电流的对应关系存储在查找表中。可以通过时序控制器利用所述查找表来设置相应的偏置电流，也就是说，可以通过图4所示的软件方式来设置偏置电流。此外，可以通过硬件管脚(PIN)来设置相应的偏置电流，也就是说，可以通过图5所示的硬件方式来设置偏置电流。可以将偏置电流分类为最大偏置电流、中等偏置电流和最小偏置电流。进一步地，还可以将偏置电流分类为最大偏置电流、次最大偏置电流、较大偏置电流、次较大偏置电流、中等偏置电流、次中等偏置电流、较小偏置电流和最小偏置电流。
本发明的另一个实施例提供了一种用于液晶显示面板的栅极驱动装置，所述栅极驱动装置用于驱动多个输出通道，并且包括：栅极驱动单元划分部，其配置为按照所述多个输出通道相对于所述多个输出通道中的中心输出通道的位置，将所述栅极驱动装置划分为多个栅极驱动单元；以及偏置电流设置部，其配置为分别设置所述多个栅极驱动单元输出的偏置电流，使得所述栅极驱动单元所驱动的输出通道相距中心输出通道的平均距离越小，该栅极驱动单元输出的偏置电流被设置为越小。
例如，图7示出了根据本发明实施例的栅极驱动装置700，其用于液晶显示器的栅极驱动。所述栅极驱动装置700包括：栅极驱动单元划分部701，其配置为按照栅极驱动装置的多个输出通道相对于中心输出通道的位置而将栅极驱动装置划分为边缘位置栅极驱动单元、 中间位置(即，边缘位置与中心位置之间的位置)栅极驱动单元和中心位置栅极驱动单元；以及偏置电流设置部702，其配置为按照边缘位置栅极驱动单元、中间位置栅极驱动单元、中心位置栅极驱动单元的顺序将与其对应的输出运算放大器输出的偏置电流设置为依次递减。此外，将所述偏置电流施加至各像素单元703进行驱动。
在上述实施例中，基于相似的划分标准，可以分别对边缘位置栅极驱动单元和中间位置栅极驱动单元进行进一步划分。
下面结合具体划分标准来详细地描述根据本发明实施例的栅极驱动方法和栅极驱动装置。
下文中为了描述方便，定义函数f(x/y)表示x除以y后取到十位数整数，个位数直接抛掉取零，不进行相应的四舍五入操作，如f(x/y)＝f(3200/15)＝210。
如图8所示，假定栅极驱动IC的总输出通道数为m，通过调试将与用于栅极驱动IC的输出通道中的1CH至[f(m/15)-1]CH和[m-f(m/15)]CH至m CH的输出OP相对应的静态偏置电流设置为最大(Maximum)；将与用于输出通道中的f(m/15)CH至[2f(m/15)-1]CH和[m-2f(m/15)]CH至[m-f(m/15)-1]CH的输出OP相对应的静态偏置电流设置为次最大(Middle Maximum)；将与用于输出通道中的2f(m/15)CH至[3f(m/15)-1]CH和[m-3f(m/15)]CH至[m-2f(m/15)-1]CH的输出OP相对应的静态偏置电流设置为较大(Large)；将与用于输出通道中的3f(m/15)CH至[4f(m/15)-1]CH和[m-4f(m/15)]CH至[m-3f(m/15)-1]CH的输出OP相对应的静态偏置电流设置为次较大(Middle Large)；将与用于输出通道中的4f(m/15)CH至[5f(m/15)-1]CH和[m-5f(m/15)]CH至[m-4f(m/15)-1]CH的输出OP相对应的静态偏置电流设置为中等(Medium)；将与用于输出通道中的5f(m/15)CH至[6f(m/15)-1]CH和[m-6f(m/15)]CH至[m-5f(m/15)-1]CH的输出OP相对应的静态偏置电流设置为次中等(Middle Medium)；将与用于输出通道中的6f(m/15)CH至[7f(m/15)-1]CH和[m-7f(m/15)]CH至[m-6f(m/15)-1]CH的输出OP相对应的静态偏置电流设置为较小(Small)；将与用于输出通道中的 7f(m/15)CH至[m-7f(m/15)-1]CH的输出OP相对应的静态偏置电流设置为最小(Minimum)。
图9示出了图8所示查找表的一种具体示例。具体地，图9是针对图8所示示例中m＝800时的具体示例。如图9所示，对于WXGA(1280×800)分辨率，通过调试将与用于栅极驱动IC的输出通道中的1CH至49CH和750CH至800CH的输出OP相对应的静态偏置电流设置为最大(Maximum)；将与用于输出通道中的50CH至99CH和700CH至749CH的输出OP相对应的静态偏置电流设置为次最大(Middle Maximum)；将与用于输出通道中的100CH至149CH和650CH至699CH的输出OP相对应的静态偏置电流设置为较大(Large)；将与用于输出通道中的150CH至199CH和600CH至649CH的输出OP相对应的静态偏置电流设置为次较大(Middle Large)；将与用于输出通道中的200CH至249CH和550CH至599CH的输出OP相对应的静态偏置电流设置为中等(Medium)；将与用于输出通道中的250CH至299CH和500CH至549CH的输出OP相对应的静态偏置电流设置为次中等(Middle Medium)；将与用于输出通道中的300CH至349CH和450CH至499CH的输出OP相对应的静态偏置电流设置为较小(Small)；将与用于输出通道中的350CH至449CH的输出OP相对应的静态偏置电流设置为最小(Minimum)。
图10示出了图8所示查找表的另一个具体示例。具体地，图10是针对图8所示示例中m＝1600时的具体示例。如图10所示，对于WQXGA(2560×1600)分辨率，通过调试将与用于栅极驱动IC的输出通道中的1CH至99CH和1500CH至1600CH的输出OP相对应的静态偏置电流设置为最大(Maximum)；将与用于输出通道中的100CH至199CH和1400CH至1499CH的输出OP相对应的静态偏置电流设置为次最大(Middle Maximum)；将与用于输出通道中的200CH至299CH和1300CH至1399CH的输出OP相对应的静态偏置电流设置为较大(Large)；将与用于输出通道中的300CH至399CH和1200CH至1299CH的输出OP相对应的静态偏置电流设置为次较大(Middle Large)；将与用于输出通道中的400CH至499CH和 1100CH至1199CH的输出OP相对应的静态偏置电流设置为中等(Medium)；将与用于输出通道中的500CH至599CH和1000CH至1099CH的输出OP相对应的静态偏置电流设置为次中等(Middle Medium)；将与用于输出通道中的600CH至699CH和900CH至999CH的输出OP相对应的静态偏置电流设置为较小(Small)；将与用于输出通道中的700CH至899CH的输出OP相对应的静态偏置电流设置为最小(Minimum)。
图8至图10只是示出了栅极驱动IC的输出OP(运算放大器)输出偏置电流的方式的示例。应当理解的是，也可以根据栅极驱动IC的输出通道的不同来动态地调整与该栅极驱动IC的输出OP相对应的偏置电流。
所述栅极驱动装置可以被划分为(2n-1)个栅极驱动单元，并且偏置电流可以被划分为n种不同大小的偏置电流。在此情况下，第(n-i)个栅极驱动单元输出的偏置电流设置为与第(n+i)个栅极驱动单元输出的偏置电流相等，并且第(n+i-1)个栅极驱动单元输出的偏置电流设置为小于第(n+i)个栅极驱动单元输出的偏置电流，其中0＜i＜n，并且i和n为整数。此外，第(n+i-1)个栅极驱动单元所驱动的输出通道相距中心输出通道的平均距离小于第(n+i)个栅极驱动单元所驱动的输出通道相距中心输出通道的平均距离。
本发明还公开了一种显示装置，包括多个像素单元和上述栅极驱动装置。所述显示装置可以应用于液晶面板、电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
尽管已经参考本发明的典型实施例，具体示出和描述了本发明，但本领域普通技术人员应当理解，在不脱离所附权利要求所限定的本发明的精神和范围的情况下，可以对这些实施例进行形式和细节上的多种改变。

Claims (20)

  1. 一种用于液晶显示面板的栅极驱动方法，所述液晶显示面板包括用于驱动多个输出通道的栅极驱动装置，所述栅极驱动方法包括：
    按照所述多个输出通道相对于所述多个输出通道中的中心输出通道的位置，将所述栅极驱动装置划分为多个栅极驱动单元；以及
    分别设置所述多个栅极驱动单元输出的偏置电流，使得所述栅极驱动单元所驱动的输出通道相距所述中心输出通道的平均距离越小，该栅极驱动单元输出的偏置电流被设置为越小。
  2. 根据权利要求1所述的栅极驱动方法，其中将所述栅极驱动装置的输出通道与所述偏置电流的对应关系存储在查找表中。
  3. 根据权利要求2所述的栅极驱动方法，其中通过时序控制器利用所述查找表来设置相应的偏置电流。
  4. 根据权利要求1所述的栅极驱动方法，其中通过硬件管脚来设置相应的偏置电流。
  5. 根据权利要求1所述的栅极驱动方法，其中将所述偏置电流分类为最大偏置电流、中等偏置电流和最小偏置电流。
  6. 根据权利要求1所述的栅极驱动方法，其中将所述偏置电流分类为最大偏置电流、次最大偏置电流、较大偏置电流、次较大偏置电流、中等偏置电流、次中等偏置电流、较小偏置电流和最小偏置电流。
  7. 根据权利要求6所述的栅极驱动方法，其中所述栅极驱动装置被划分为15个栅极驱动单元，其中
    第(8-i)个栅极驱动单元输出的偏置电流设置为等于第(8+i)个栅极驱动单元输出的偏置电流，并且
    第(7+i)个栅极驱动单元输出的偏置电流设置为小于第(8+i)个栅极驱动单元输出的偏置电流，其中0＜i＜8，并且i为整数。
  8. 根据权利要求1所述的栅极驱动方法，其中所述偏置电流分类为n种不同的偏置电流。
  9. 根据权利要求8所述的栅极驱动方法，其中所述栅极驱动装置被划分为(2n-1)个栅极驱动单元，其中
    第(n-i)个栅极驱动单元输出的偏置电流设置为与第(n+i)个栅极驱动单元输出的偏置电流相等，并且
    第(n+i-1)个栅极驱动单元输出的偏置电流设置为小于第(n+i)个栅极驱动单元输出的偏置电流，其中0＜i＜n，并且i和n为整数。
  10. 根据权利要求9所述的栅极驱动方法，其中第(n+i-1)个栅极驱动单元所驱动的输出通道相距所述中心输出通道的平均距离小于第(n+i)个栅极驱动单元所驱动的输出通道相距中心输出通道的平均距离。
  11. 一种用于液晶显示面板的栅极驱动装置，所述栅极驱动装置用于驱动多个输出通道，并且包括：
    栅极驱动单元划分部，其配置为按照所述多个输出通道相对于所述多个输出通道中的中心输出通道的位置，将所述栅极驱动装置划分为多个栅极驱动单元；以及
    偏置电流设置部，其配置为分别设置所述多个栅极驱动单元输出的偏置电流，使得所述栅极驱动单元所驱动的输出通道相距所述中心输出通道的平均距离越小，该栅极驱动单元输出的偏置电流被设置为越小。
  12. 根据权利要求11所述的栅极驱动装置，其中将所述栅极驱动装置的输出通道与所述偏置电流的对应关系存储在查找表中。
  13. 根据权利要求12所述的栅极驱动装置，其中所述偏置电流设置部利用所述查找表来设置相应的偏置电流。
  14. 根据权利要求11所述的栅极驱动装置，其中所述偏置电流设置部通过硬件管脚来设置相应的偏置电流。
  15. 根据权利要求11所述的栅极驱动装置，其中将所述偏置电流分类为最大偏置电流、中等偏置电流和最小偏置电流。
  16. 根据权利要求11所述的栅极驱动装置，其中将所述偏置电流分类为最大偏置电流、次最大偏置电流、较大偏置电流、次较大偏置电流、中等偏置电流、次中等偏置电流、较小偏置电流和最小偏置电流。
  17. 根据权利要求16所述的栅极驱动装置，其中所述栅极驱动单元划分部将所述栅极驱动装置划分为15个栅极驱动单元，其中
    第(8-i)个栅极驱动单元输出的偏置电流设置为等于第(8+i)个栅极驱动单元输出的偏置电流，并且
    第(7+i)个栅极驱动单元输出的偏置电流设置为小于第(8+i)个栅极驱动单元输出的偏置电流，其中0＜i＜8，并且i为整数。
  18. 根据权利要求11所述的栅极驱动装置，其中所述偏置电流分类为n种不同的偏置电流，所述栅极驱动单元划分部将所述栅极驱动装置划分为(2n-1)个栅极驱动单元，其中
    第(n-i)个栅极驱动单元输出的偏置电流设置为与第(n+i)个栅极驱动单元输出的偏置电流相等，并且
    第(n+i-1)个栅极驱动单元输出的偏置电流设置为小于第(n+i) 个栅极驱动单元输出的偏置电流，其中0＜i＜n，并且i和n为整数。
  19. 根据权利要求18所述的栅极驱动装置，其中第(n+i-1)个栅极驱动单元所驱动的输出通道相距所述中心输出通道的平均距离小于第(n+i)个栅极驱动单元所驱动的输出通道相距中心输出通道的平均距离。
  20. 一种显示装置，包括像素单元和根据权利要求11所述的栅极驱动装置。
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