WO2017000684A1 - 一种数据读取方法、对端设备、控制器及存储介质 - Google Patents

一种数据读取方法、对端设备、控制器及存储介质 Download PDF

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Publication number
WO2017000684A1
WO2017000684A1 PCT/CN2016/082182 CN2016082182W WO2017000684A1 WO 2017000684 A1 WO2017000684 A1 WO 2017000684A1 CN 2016082182 W CN2016082182 W CN 2016082182W WO 2017000684 A1 WO2017000684 A1 WO 2017000684A1
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Prior art keywords
message
data
packet
indication information
sending
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PCT/CN2016/082182
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English (en)
French (fr)
Inventor
王平
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深圳市中兴微电子技术有限公司
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Publication of WO2017000684A1 publication Critical patent/WO2017000684A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Definitions

  • the present invention relates to the field of data transmission, and in particular, to a data reading method, a peer device, a controller, and a storage medium.
  • PCIe Peripheral Component Interconnect Express
  • PCIe Peripheral Component Interconnect Express
  • the target device Based on the application of the PCIe protocol bus in the communication field, the target device often needs to read a large amount of data from the peer device. Generally, the target device opens an effective control bit for acquiring data upward, and the controller sends a non-forward to the peer device (NP). , Non-posted Packet) memory read command, the peer device returns read data to the target device through the controller according to the NP memory read command.
  • NP peer device
  • the data carried between the peer device and the controller is transmitted.
  • the payload does not exceed 256B. Therefore, in the NP memory read command sent by the controller to the peer device, the data length of the packet to be read is between 0 and 256 bytes.
  • the peer device After the peer device receives the NP memory read command and returns a corresponding programmable logic device (Cpld, Complex Programmable Logic Device) to return the message, if the length of the data to be read from the peer device is relatively long, the controller It is necessary to send the NP memory read command to the peer device multiple times, and the current practice of the NP memory read command is to wait for the current NP memory read command. After the Cpld return message returns, the next NP memory read command is issued, so that a long message read back requires many such communication interactions, which takes a lot of time and wastes bandwidth on the transmission line. PCIe, a high-speed peripheral that does not match, does not meet the requirements for high-speed data transmission in the communications field.
  • PCIe a high-speed peripheral that does not match, does not meet the requirements for high-speed data transmission in the communications field.
  • the embodiment of the present invention is to provide a data reading method, a peer device, a controller, and a storage medium, which can reduce the number of NP memory read commands, save time, and improve data transmission efficiency.
  • a data reading method comprising:
  • the NP memory read command carrying a data read initial address and a data read length
  • the read data corresponding to the data read initial address and the data read length is split into a plurality of return messages whose data length is within the payload length;
  • the return message is a Cpld return message
  • the returning the plurality of return messages in sequence includes:
  • the method before receiving the NP memory read command, the method further includes:
  • Sending packet sending indication information to the controller where the packet sending indication information carries the packet sending effective indication information, the packet size, and the initial buffering address of the packet; the packet sending indication information is used to enable The controller, when the message sending valid indication information indicates that the message is valid, And sending the NP memory read command to the peer device according to the packet size and the initial cached first address of the packet.
  • the method further includes:
  • a data reading method comprising:
  • NP memory read command carries a data read initial address and a data read length; wherein the data read length meets a maximum cached value of read data in the controller, and The address where the data is read does not cross the 4K address boundary;
  • the return message is a Cpld return message, and the Cpld return message carries the number of bytes of the remaining data to be returned in the read data corresponding to the NP memory read command;
  • the method further includes:
  • the method before sending the NP memory read command, the method further includes:
  • the packet sending indication information carries the packet sending effective indication information, the packet size, and the initial address of the packet initial cache;
  • the sending the NP memory read command comprises:
  • the NP memory read command is sent to the peer device according to the message size and the message initial cache first address.
  • the method further include:
  • a peer device including:
  • a first receiving unit configured to receive a non-forwarding NP memory read command, where the NP memory read command carries a data read initial address and a data read length;
  • a splitting unit configured to split the read data corresponding to the data read initial address and the data read length into data when the data read length received by the first receiving unit is greater than a payload payload length a number of return messages whose length is within the length of the payload;
  • the first sending unit is configured to sequentially return a plurality of return messages split into the splitting unit.
  • the return message is a Cpld return message
  • the first sending unit is further configured to: the Cpld return packets split into the splitting unit are returned to the controller in sequence according to the address of each Cpld return message, where the Cpld return message carries The number of bytes of the message that need to be returned in the read data corresponding to the NP memory read command.
  • the first sending unit is further configured to send a packet sending indication information to the controller, where the packet sending indication information carries a packet sending effective indication information, a packet size, and a packet initial Cache the first address; the message sending indication information is used to enable the controller to send the first packet to the peer device according to the packet size and the initial cached address of the packet when the packet sending valid indication information indicates that the packet is valid.
  • the NP memory read command is used to send a packet sending indication information to the controller, where the packet sending indication information carries a packet sending effective indication information, a packet size, and a packet initial Cache the first address; the message sending indication information is used to enable the controller to send the first packet to the peer device according to the packet size and the initial cached address of the packet when the packet sending valid indication information indicates that the packet is valid.
  • the first receiving unit is further configured to receive a message sending indication information change command sent by the controller, and send the indication information change command according to the message, and send the message to the message in the indication information.
  • the text sending valid indication information is changed to invalid.
  • a controller comprising:
  • a second sending unit configured to send a non-forwarding NP memory read command, where the NP memory read command carries a data read initial address and a data read length; wherein the data read length satisfies not exceeding a read in the controller The maximum buffer value of the data and the address where the data is read do not cross the 4K address boundary;
  • the second receiving unit is configured to receive a plurality of return messages.
  • the return message is a Cpld return message, and the Cpld return message carries the number of bytes of the remaining data to be returned in the read data corresponding to the NP memory read command;
  • the second sending unit is further configured to: determine, according to the number of bytes of the packet that needs to be returned in the read data corresponding to the NP memory read command carried in the Cpld return message, When the Cpld returns a message and the Cpld return message is all the read data corresponding to the NP memory read command, the data in the Cpld return message is sent to the target device.
  • the second receiving unit is further configured to receive the packet sending indication information sent by the peer device, where the packet sending indication information carries the packet sending effective indication information, the packet size, and the initial packet. Cache the first address;
  • the second sending unit is further configured to: when the packet sending valid indication information received by the second receiving unit indicates that the indication is valid, according to the packet size received by the second receiving unit and the initial cached address of the packet
  • the NP memory read command is sent to the peer device.
  • the second sending unit is further configured to send a message sending indication information change command to the peer device, where the message sending indication information change command is used to instruct the peer device to report the report The message transmission valid indication information in the text transmission indication information is changed to invalid.
  • the data reading method, the peer device, the controller, and the storage medium provided by the embodiment of the present invention, the NP memory read command sent by the controller to the peer device, and the data read length carried in the NP memory read command may be sufficiently large, as long as Satisfy not exceeding the maximum cache value of the read data in the controller And the address where the data is read does not exceed the 4K address boundary, the data read length may exceed the payload length, and the data read length in the NP memory read command described in the prior art must be different within the payload length. In this way, when the target device reads data of the same length, the method of the embodiment of the present invention is applied, and the number of NP memory read commands sent during the process of reading data is greatly reduced, which can save time and indirectly for other messages. Sending increases bandwidth and improves data transfer efficiency.
  • FIG. 1 is a structural block diagram of a PCIe link system according to an embodiment of the present invention.
  • FIG. 2 is a schematic flowchart of a method for reading data on a peer device side according to Embodiment 1 of the present invention
  • FIG. 3 is a schematic flowchart of a method for reading data on a controller side according to Embodiment 1 of the present invention
  • FIG. 4 is a schematic flowchart of a data acquisition method according to Embodiment 2 of the present invention.
  • FIG. 5 is a structural block diagram of a peer device according to Embodiment 3 of the present invention.
  • FIG. 6 is a structural block diagram of a controller according to Embodiment 3 of the present invention.
  • the technical solution in the embodiment of the present invention is implemented based on the PCIe link system architecture shown in FIG. 1.
  • the PCIe link system includes a peer device 101, a protocol layer device 102, and a controller. 103. Target device 104; wherein
  • the peer device 101 can perform high-speed, multi-bandwidth point-to-point communication of information with a PCIe link formed by the protocol layer device 102 through a high-speed serial interface (ie, a high-speed serial bus SerDes). Illustrated with standard PCIe protocol (including PCIe 3.0 and lower versions) All the features.
  • the protocol layer device 102 has all the functions described in the PCIe 3.0 version and lower versions, and can implement the physical layer (PHY), the data link layer (DLL) and the transaction specified by the protocol version. All functions of a layer (TL), and a high-speed serial (SerDes) interface including a PCIe link function in the PHY layer, and a transaction layer packet (TLP) is included in the TL layer.
  • the package interface of structure, form, and feature herein referred to as the TLP interface).
  • other types of interfaces may be included between the protocol layer device 102 and other modules, devices (such as the controller 103) or the system, such as: control, status, high performance bus (AHB). , clock, reset and other interfaces.
  • the controller 103 is provided with a TLP interface, and the peer device 101 and the protocol layer device 102 perform data interaction through a high-speed serial interface; the protocol layer device 102 and the controller 103 perform data interaction through respective TLP interfaces; The controller 103 communicates with the peer device 101 through the protocol layer device 102. That is, when the controller 103 sends the information to the peer device 101, the information is first assembled into a TLP packet and sent to the protocol layer device 102 through the TLP interface of the controller 103.
  • the TLP interface of the protocol layer device 102 receives the TLP packet, and then the protocol The layer device 102 converts the TLP packet into a PCIe protocol packet and transmits it to the peer device 101 through a high speed serial interface, and the peer device 101 receives the PCIe protocol packet through the high speed serial interface.
  • the data acquisition signal sent to the controller is valid.
  • the controller 103 detects that the data signal is valid, the controller 103 transmits the NP memory to the opposite device 101 through the protocol layer device 102.
  • the peer device 101 returns the required data to the controller 103 via the protocol layer device 102 according to the NP memory read command; the controller 103 returns the received data to the target device 104, so that the target device 104 is correct.
  • the end device 101 has read the data.
  • the method of the embodiment of the present invention is implemented based on the PCIe link system architecture described above.
  • the embodiment of the present invention provides a data reading method, which is applied to the peer device side.
  • the processing procedure of the method in this embodiment includes the following steps:
  • Step 201 Receive an NP memory read command, where the NP memory read command carries a data read initial address and a data read length.
  • the data acquisition signal sent to the controller is valid.
  • the controller detects that the data signal is valid, the controller interacts with the peer device through the protocol layer device, and the peer device sends the data to the peer device.
  • the message sending indication information carries the message sending effective indication information, the message size, and the initial buffer first address of the message; the message sending indication information is used to enable the controller to When the message sending valid indication information indicates that the message is valid, the NP memory read command is sent to the peer device according to the message size and the initial address of the message.
  • the controller needs to start reading the packet of the packet size from the initial address of the packet initial cache of the peer device, and when the packet of the packet size is read, the controller needs to report the packet to the
  • the peer device sends an NP memory read command, so that the peer device reads the message according to the NP memory read command.
  • Step 202 When the data read length exceeds the payload length, the read data corresponding to the data read initial address and the data read length is split into a plurality of return messages whose data length is within the payload length.
  • the return message may be a Cpld return message.
  • the NP memory read command carries the data read initial address and the data read length.
  • the data read length may exceed the payload length.
  • the payload length is 0-256B.
  • the peer device splits the read data required to be read by the NP memory read command into a number of Cpld return messages whose data length is within the payload length.
  • the size of the Cpld return message split when splitting should be as close as possible. The length of the payload.
  • Step 203 Return the plurality of return messages in sequence.
  • the peer device Since the length of the data sent by the peer device to the controller must be within the payload length, after the peer device splits the read data requested by the NP memory read command by step 202, the plurality of the data will be sequentially The Cpld return message is returned to the controller.
  • the Cpld return message carries the remaining packets that need to be returned in the read data corresponding to the NP memory read command.
  • the number of bytes, and the peer device returns the number of Cpld return messages to the controller in the order of the address of the Cpld return message.
  • the controller may determine, according to the number of remaining bytes of the read data in the read data corresponding to the NP memory read command carried in the Cpld return message, whether the controller sequentially receives the Cpld returns in sequence.
  • the message and the number of Cpld return messages are all read data corresponding to the NP memory read command. It should be noted that the number of bytes of the remaining data to be returned in the read data corresponding to the NP memory read command in the Cpld return message includes the number of bytes of data read in the current Cpld return message.
  • the target device obtains read data from the peer device.
  • multiple NP memory read commands may be sent multiple times to obtain read data from the peer device, which are the same as in the prior art, except that the data is relatively long.
  • the data read length carried in the NP memory read command sent in each embodiment may exceed the payload length, so that when the target device reads the same length of data, the method of the embodiment is applied.
  • the number of NP memory read commands sent during data reading is greatly reduced, saving time, and indirectly increasing bandwidth for other message transmissions, improving data transmission efficiency.
  • the embodiment of the invention further provides a first computer readable storage medium, the storage medium comprising a set of instructions for performing a data reading method as shown in FIG. 2.
  • the embodiment of the present invention further provides a data reading method, which is applied to the controller side.
  • the processing flow of the method in this embodiment includes the following steps:
  • Step 301 Send an NP memory read command, where the NP memory read command carries a data read initial address and a data read length.
  • the data acquisition signal sent to the controller is valid.
  • the controller detects that the data signal is valid, the controller interacts with the peer device through the protocol layer device, and the peer device sends the data to the peer device.
  • the message sending indication information carries the message sending effective indication information, the message size, and the initial buffer first address of the message; the message sending indication information is used to enable the controller to When the message sending valid indication information indicates that the message is valid, the NP memory read command is sent to the peer device according to the message size and the initial address of the message.
  • the controller needs to start reading the packet of the packet size from the initial address of the packet initial cache of the peer device, and when the packet of the packet size is read, the controller needs to report the packet to the
  • the peer device sends an NP memory read command, so that the peer device reads the message according to the NP memory read command.
  • the data read length in the NP memory read command in the method of this embodiment should be sufficiently large, and satisfy the maximum cache value of the read data in the controller and the address where the read data is located does not cross the 4K address boundary. Rather than the data read length in the NP memory read command in the prior art must be within the payload length.
  • the data read initial address and the data read length define the address at which the read data is located. This address cannot be crossed over the 4K address boundary, which is a rule well known to those skilled in the art.
  • Step 302 Receive a return message.
  • the return message is returned to the controller in turn, and the controller receives the return message returned by the peer device.
  • the return message may be a Cpld return message.
  • the Cpld return message carries the number of bytes of the message that need to be returned in the read data corresponding to the NP memory read command; thus, the controller can read according to the NP memory carried in the Cpld return message.
  • the number of bytes of the message to be returned in the read data corresponding to the command is determined, and it is determined whether the controller sequentially receives the plurality of Cpld return messages in sequence and whether the plurality of Cpld return messages are corresponding to the NP memory read command. All read data. It should be noted that the number of bytes of the remaining data to be returned in the read data corresponding to the NP memory read command in the Cpld return message includes the number of bytes of data read in the current Cpld return message.
  • the specific judgment principle is: if the number of packets to be returned in the current Cpld return message needs to be smaller than the number of bytes B to be returned in the last Cpld return message, and the BA For the number of bytes of the read data carried in the last Cpld return message, it indicates that the controller is the Cpld return message received in order, if the number of bytes returned by the Cpld return message needs to be returned.
  • A is equal to the number of bytes of the read data carried in the current Cpld return message, indicating that the plurality of Cpld return messages sequentially received by the controller are all read data corresponding to the NP memory read command.
  • the target device obtains read data from the peer device.
  • multiple NP memory read orders may be sent in steps 301-302 multiple times.
  • the data read length carried in the NP memory read command sent in each embodiment may exceed the payload length, which is in the NP memory read command in the prior art.
  • the data read length must be different within the payload length. In this way, when the target device reads the same length of data, the method of the embodiment is applied, the number of NP memory read commands sent during the process of reading data is greatly reduced, saving time, and indirectly increasing the transmission of other messages. Bandwidth, which improves data transmission efficiency.
  • the embodiment of the present invention further provides a second computer readable storage medium, the storage medium comprising a set of instructions for executing the data reading method as shown in FIG.
  • the embodiment of the present invention provides a data reading method. As shown in FIG. 4, the processing flow of the method in this embodiment includes the following steps:
  • Step 401 After receiving the valid data acquisition signal sent by the target device, the controller sends a first read command carrying the message sending indication information address request message to the peer device.
  • the target device When the target device needs to read data from the peer device, the target device sends a valid data acquisition signal to the controller. After detecting that the data acquisition signal sent by the target device is valid, the controller sends a report to the peer device. The message sending the indication information address request message, requesting the peer device to return the cache address of the packet sending indication information corresponding to the data packet required by the target device.
  • the communication interaction between the controller and the peer device is performed by the protocol layer device, and the controller constructs the information sent to the peer device into a package read by the memory.
  • the TLP packet is sent to the protocol layer device through the controller's TLP interface.
  • the protocol layer device receives the TLP packet through the TLP interface, and converts the TLP packet into a PCIe link packet, and forwards the PCIe link through the high-speed serial interface. Give the peer device.
  • the first read command in this step can be sent by the controller to the peer device by referring to the above process.
  • Step 402 The peer device returns, to the controller, first address information of the packet sending indication information.
  • the peer device caches the packets that need to be sent to the target device, and the packets are paired.
  • the packet sending indication information is stored in a corresponding buffer, where the packet sending indication information includes a packet sending effective indication information, a packet size, and a packet initial buffer first address, where the packet sending valid indication is used to indicate Whether the packet size and the packet storage address range defined by the initial address of the packet are sent to the target device.
  • the packet sending valid indication information is sent by the packet sending indication information. Invalid setting is valid.
  • the peer device After receiving the message sending indication information request message sent by the controller, the peer device returns the first address information of the packet sending indication information corresponding to the sending message that needs to be sent to the target device to the controller.
  • the peer device when the peer device sends information to the controller, the peer device assembles the information into a PCIe link packet and forwards it to the protocol layer device through the PCIe link provided by the high-speed serial interface.
  • the device receives the PCIe link packet through the high-speed serial interface, and converts the PCIe link packet into a TLP packet, and sends the TLP packet to the controller through the TLP interface.
  • the controller receives the TLP packet through the TLP interface, and obtains the TLP packet after parsing the TLP packet. Information sent by the end device.
  • the first address information in this step may be sent by the peer device to the controller by referring to the foregoing process.
  • Step 403 The controller receives the first address information, and sends a second read command carrying the first address information to the peer device.
  • the controller receives the first address information, and sends a second read command carrying the first address information to the peer device by using the protocol layer device.
  • the specific process refers to the sending process of the first read command.
  • Step 404 The peer device receives the second read command that carries the first address information, and returns, to the controller, packet sending indication information corresponding to the first address information.
  • the packet sending indication information includes a packet sending effective indication information, a packet size, and a packet.
  • the sending process refers to the sending process of the first address information in step 402.
  • Step 405 The controller receives the packet sending indication information, and when the received packet sending effective indication information indication is valid, according to the packet size and the initial buffering address of the packet, the pair is sent to the pair.
  • the end device sends an NP memory read command.
  • the controller receives the packet sending indication information and first checks whether the packet sending valid indication information indication in the packet sending indication information is valid, and if yes, indicating that the packet size and the packet initial buffering the first address are limited. A packet is sent to the target device in the range of the storage address. If it is invalid, the packet size and the packet storage address range defined by the initial address of the packet are not sent to the target device. If it is not stored in the address, at this time, steps 403 and 404 need to be continuously performed until the controller receives the message transmission effective indication information in the message transmission indication information as valid.
  • the controller needs to start reading the packet of the packet size from the initial address of the packet initial cache of the peer device, and when the packet of the packet size is read, the controller needs to report the packet to the The peer device sends an NP memory read command, so that the peer device reads the message according to the NP memory read command.
  • the NP memory read command carries a data read initial address and a data read length, wherein the data read length may be sufficiently large as long as the value of MAX_READ_REQUEST_SIZE that does not exceed the maximum cache value of the read data in the controller is satisfied. (MAX_READ_REQUEST_SIZE can be set as large as 1KB or 2KB as much as possible) and the address where the data is read does not cross the 4K address boundary.
  • the data read initial address and the data read length define the address at which the read data is located, and this address cannot be over the 4K address boundary.
  • the read length limit is less than the payload, but the data read length can be as large as possible.
  • the data read length in the generated NP memory read command needs to be as large as possible, as long as the maximum cache value of the read data in the controller and the data to be read are not exceeded. If the address does not exceed the 4K address boundary, if the NP memory read command is generated according to this rule, the NP memory read command issued for a message whose message size exceeds 2 KB will be much less (relative to the prior art).
  • the second largest 256B saves time, and during the process of reading data, the NP memory read command also reduces the bandwidth occupation, which is equivalent to indirectly increasing the bandwidth for the transmission of other messages.
  • Step 406 The peer device receives the NP memory read command, and when the data read length carried in the NP memory read command exceeds the payload length, the read data corresponding to the data read initial address and the data read length is removed. It is divided into several Cpld return messages whose data length is within the payload length.
  • the peer device Since the length of the data sent by the peer device to the controller must be within the payload length, the peer device needs to split the read data required to be read by the NP memory read command into a number of data lengths within the payload length. Cpld returns a message before it can be sent to the controller.
  • the size of the Cpld return message split at the time of splitting should be as close as possible to the length of the payload, and it is also required to comply with the requirements of not crossing the 4K address boundary and the RCB constraint.
  • the RCB parameter setting can be set to 64B or 128B.
  • the RCB constraint means that the data length carried in the returned Cpld return message should be an integer multiple of RCB, which is a default rule in the PCIe bus protocol.
  • Step 407 The controller receives a number of Cpld return messages sent by the peer device, and sends the read to the target device after the Cpld return message corresponding to the read data split corresponding to the NP memory command is received. data.
  • the Cpld return message carries the remaining packets that need to be returned in the read data corresponding to the NP memory read command.
  • the number of bytes, and the peer device will return the several Cpld
  • the report text is returned to the controller in the order of the address of the Cpld return message.
  • the controller may determine, according to the number of remaining bytes of the read data in the read data corresponding to the NP memory read command carried in the Cpld return message, whether the controller sequentially receives the Cpld returns in sequence.
  • the message and the number of Cpld return messages are all read data corresponding to the NP memory read command. It should be noted that the number of bytes of the remaining data to be returned in the read data corresponding to the NP memory read command in the Cpld return message includes the number of bytes of data read in the current Cpld return message.
  • the specific judgment principle is: if the number of packets to be returned in the current Cpld return message needs to be smaller than the number of bytes B to be returned in the last Cpld return message, and the BA For the number of bytes of the read data carried in the last Cpld return message, it indicates that the controller is the Cpld return message received in order, if the number of bytes returned by the Cpld return message needs to be returned.
  • A is equal to the number of bytes of the read data carried in the current Cpld return message, indicating that the plurality of Cpld return messages sequentially received by the controller are all read data corresponding to the NP memory read command.
  • the data read initial address in the NP memory read command sent to the peer device for the first time is the initial address of the packet, and the data is read.
  • the length should be less than or equal to the message size. If the data read length is equal to the packet size, it indicates that the packet of the packet size can be read by sending an NP memory read command; if the data read length is smaller than the packet size, It indicates that the NP memory read command cannot be used to read the message of the packet size, and the NP memory needs to be sent one or more times.
  • the read command can completely read the message of the message size. At this time, steps 405-407 need to be performed again, and each time the NP memory read command is sent, the NP memory read command needs to be read. The text is read before it can be sent.
  • the data read initial address in each NP memory read command is set according to the address of the message read by the last NP memory read command, that is, the data read initial address in the last NP memory read command is N, the data read length is D, then the data read initial address in the current NP memory read command is N+D+1, and these address calculation processes are the same as in the prior art.
  • the data read length in the NP memory read command must satisfy the maximum cache value of the read data in the controller and the address where the data is read does not cross the 4K address boundary.
  • steps 405-407 are continuously performed until all the message size messages are sent to the controller.
  • the controller After receiving the read data corresponding to the last NP memory read command and sending it to the target device, the controller sends a message sending completion message to the target device to notify the target device that the message has been read and can be used.
  • Step 408 After the data corresponding to the packet size is received, the controller sends a message sending indication information change command to the peer device.
  • Step 409 The peer device changes the packet sending valid indication information in the packet sending indication information to be invalid according to the packet sending indication information change command.
  • the packet can be cached until the packet sending valid indication information is changed to an address defined by the invalid packet sending indication information.
  • An embodiment of the present invention provides a peer device.
  • the peer device includes: a first receiving unit 501, a splitting unit 502, and a first sending unit 503, where
  • the first receiving unit 501 is configured to receive an NP memory read command, where the NP memory read command carries a data read initial address and a data read length;
  • the splitting unit 502 is configured to split the read data corresponding to the data read initial address and the data read length when the data read length received by the first receiving unit 501 is greater than the payload payload length a number of return messages whose data length is within the payload length;
  • the first sending unit 503 is configured to sequentially return a plurality of return messages split into the splitting unit 502.
  • the returning message is a Cpld returning message
  • the first sending unit 503 is further configured to split the number of the Cpld returning packets that are split into the splitting unit 502 according to the address of the address where each Cpld returns the packet.
  • the Cpld return message carries the number of remaining bytes of the data to be returned in the read data corresponding to the NP memory read command.
  • the first sending unit 503 is further configured to send a packet sending indication information to the controller, where the packet sending indication information carries a packet sending effective indication information, a packet size, and a packet initial cache first address.
  • the message sending indication information is used to enable the controller to send the NP memory to the peer device according to the packet size and the initial buffering address of the packet when the message sending effective indication information indicates that the message is valid. Read the command.
  • the first receiving unit 501 is further configured to receive a packet sending indication information change command sent by the controller, and send the indication information change command according to the packet, and send the packet in the packet sending indication information to be valid. The indication changed to invalid.
  • the embodiment of the present invention further provides a controller.
  • the controller includes: a second sending unit 601 and a second receiving unit 602, where
  • the second sending unit 601 is configured to send an NP memory read command, where the NP memory read command carries a data read initial address and a data read length; wherein the data read length meets not exceeding the read data in the controller.
  • the maximum cache value and the address where the data is read do not cross the 4K address boundary;
  • the second receiving unit 602 is configured to receive a plurality of return messages.
  • the return message is a Cpld return message, and the Cpld return message carries the NP The number of bytes of the message to be returned in the read data corresponding to the memory read command; the second sending unit 601 is further configured to read the NP memory read command carried in the Cpld return message according to the Taking the number of bytes of the message that need to be returned in the data, and determining that the Cpld return message is sequentially received in sequence, and the plurality of Cpld return messages are all the read data corresponding to the NP memory read command, The data in several Cpld return messages is sent to the target device.
  • the second receiving unit 601 is further configured to receive the packet sending indication information sent by the peer device, where the packet sending indication information carries the packet sending effective indication information, the packet size, and the initial buffer first address of the packet. ;
  • the second sending unit 602 is further configured to: according to the packet size and the initial packet received by the second receiving unit 601, when the packet sending valid indication information received by the second receiving unit 601 is valid
  • the cache first address sends the NP memory read command to the peer device.
  • the second sending unit 602 is further configured to send a message sending indication information change command to the peer device, where the message sending indication information change command is used to instruct the peer device to send the message sending indication The message transmission valid indication information in the message is changed to invalid.
  • the first receiving unit 501, the splitting unit 502, and the first sending unit 503 may be configured by a central processing unit (CPU), a microprocessor (MPU), and a digital signal processor (DSP) located on the peer device. Or device implementation such as field programmable gate array (FPGA).
  • the second transmitting unit 601 and the second receiving unit 602 may be configured by a central processing unit (CPU), a microprocessor (MPU), a digital signal processor (DSP) or a field programmable gate array (FPGA) located on the controller. And other device implementation.
  • embodiments of the present invention can be provided as a method, system, or computer program product. Accordingly, the present invention can take the form of a hardware embodiment, a software embodiment, or a combination of software and hardware. Moreover, the present invention may employ computer-usable storage media (including but not limited to disks) in one or more of the computer-usable program code embodied therein. A form of computer program product embodied on a memory and optical storage, etc.).
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.
  • the NP memory read command sent by the controller to the peer device may be sufficiently large, as long as the maximum cache value of the read data in the controller is not exceeded and the read data is located.
  • the address does not exceed the 4K address boundary, and the data read length can exceed the payload length, as described in the NP memory read command described in the prior art.
  • the data read length must be different within the payload length. In this way, when the target device reads data of the same length, the method of the embodiment of the present invention is applied, and the number of NP memory read commands sent during the process of reading data is greatly reduced, which can save time and indirectly for other messages. Sending increases bandwidth and improves data transfer efficiency.

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Abstract

一种数据读取方法、对端设备（101）、控制器（103）及存储介质，所述方法包括：接收NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度（201）；在所述数据读取长度超过有效载荷payload长度时，将所述数据读取初始地址和数据读取长度对应的读取数据拆分成数据长度在payload长度以内的若干返回报文（202）；将所述若干返回报文依次返回（203）。

Description

一种数据读取方法、对端设备、控制器及存储介质 技术领域
本发明涉及数据传输领域，尤其涉及一种数据读取方法、对端设备、控制器及存储介质。
背景技术
增强型外设互连(PCIe，Peripheral Component Interconnect express)协议总线是第三代高性能接口总线，属于一种基于数据包的串行连接协议，它提供高速的、高带宽的、高性能的、高扩展性的、可热插拔的、点到点的、双单工的串行差分信号链路来互联设备。并且，已经被广泛应用于计算机和电子通信领域的外围设备互连上。
基于PCIe协议总线在通信领域的应用，目标设备往往需要从对端设备读取大量数据，一般的做法是目标设备打开向上获取数据的有效控制位，控制器就向对端设备发送非转发(NP，Non-posted Packet)存储器读命令，对端设备根据NP存储器读命令通过控制器向目标设备返回读数据。
现有技术中，由于PCIe协议总线在实际使用中需要考虑到PCIe传输链路使用效率、数据接收缓存以及其他命令传输等各方面的平衡原因，对端设备与控制器之间传输时携带的数据有效荷载(payload)一般不会超过256B，所以，现有技术中控制器向对端设备发送的一个NP存储器读命令中，携带的需要读取的报文的数据长度就在0～256Byte之间，对端设备接收到NP存储器读命令后返回相应长度的复杂可编程逻辑器件(Cpld，Complex Programmable Logic Device)返回报文，如果需要从对端设备中读取的数据长度比较长的话，控制器就需要多次向对端设备发送NP存储器读命令，且目前关于NP存储器读命令的做法是等当前NP存储器读命令对应 的Cpld返回报文返回后，才下发下一个NP存储器读命令，这样，一个长的报文读回来的话需要很多次这样的通信交互，需要花费大量的时间，且浪费传输线路上的带宽，与PCIe这个高速外设不匹配，也不符合通信领域对数据高速传输的要求。
发明内容
有鉴于此，本发明实施例期望提供一种数据读取方法、对端设备、控制器及存储介质，可以减少NP存储器读命令的发送个数，节省时间，提高数据传输效率。
为达到上述目的，本发明实施例的技术方案是这样实现的：
一种数据读取方法，所述方法包括：
接收非转发NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度；
在所述数据读取长度超过有效载荷payload长度时，将所述数据读取初始地址和数据读取长度对应的读取数据，拆分成数据长度在payload长度以内的若干返回报文；
将所述若干返回报文依次返回。
上述方案中，所述返回报文为Cpld返回报文，所述将所述若干返回报文依次返回，包括：
将所述若干Cpld返回报文按照各Cpld返回报文所在地址的顺序依次返回给控制器，所述Cpld返回报文中携带有所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数。
上述方案中，在接收NP存储器读命令之前，所述方法还包括：
向所述控制器发送报文发送指示信息，所述报文发送指示信息中携带有报文发送有效指示信息、报文大小和报文初始缓存首地址；所述报文发送指示信息用于使所述控制器在所述报文发送有效指示信息指示有效时， 根据所述报文大小和报文初始缓存首地址向对端设备发送所述NP存储器读命令。
上述方案中，所述将所述若干返回报文依次返回后，所述方法还包括：
接收控制器发送的报文发送指示信息更改命令，并根据所述报文发送指示信息更改命令，将所述报文发送指示信息中的报文发送有效指示信息更改为无效。
一种数据读取方法，所述方法包括：
发送非转发NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度；其中，所述数据读取长度满足不超过控制器中的读数据最大缓存值、以及读取数据所在的地址不翻越4K地址界；
接收返回报文。
上述方案中，所述返回报文为Cpld返回报文，所述Cpld返回报文中携带有所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数；
相应的，所述接收返回报文后，所述方法还包括：
根据所述Cpld返回报文中携带的所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，判断出按照顺序依次接收若干Cpld返回报文且所述若干Cpld返回报文为所述NP存储器读命令对应的全部读取数据时，将所述若干Cpld返回报文中的数据发送给目标设备。
上述方案中，在发送NP存储器读命令之前，所述方法还包括：
接收对端设备发送的报文发送指示信息，所述报文发送指示信息中携带有报文发送有效指示信息、报文大小和报文初始缓存首地址；
相应的，所述发送NP存储器读命令包括：
在所述报文发送有效指示信息指示有效时，根据所述报文大小和报文初始缓存首地址向对端设备发送所述NP存储器读命令。
上述方案中，在所述报文大小对应的数据接收完成之后，所述方法还 包括：
向所述对端设备发送报文发送指示信息更改命令，所述报文发送指示信息更改命令用于指示所述对端设备将所述报文发送指示信息中的报文发送有效指示信息更改为无效。
一种对端设备，包括：
第一接收单元，配置为接收非转发NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度；
拆分单元，配置为在所述第一接收单元接收到的数据读取长度大于超过有效载荷payload长度时，将所述数据读取初始地址和数据读取长度对应的读取数据拆分成数据长度在payload长度以内的若干返回报文；
第一发送单元，配置为将所述拆分单元拆分成的若干返回报文依次返回。
上述方案中，所述返回报文为Cpld返回报文；
所述第一发送单元，还配置为将所述拆分单元拆分成的若干Cpld返回报文按照各Cpld返回报文所在地址的顺序依次返回给控制器，所述Cpld返回报文中携带有所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数。
上述方案中，所述第一发送单元，还配置为向所述控制器发送报文发送指示信息，所述报文发送指示信息中携带有报文发送有效指示信息、报文大小和报文初始缓存首地址；所述报文发送指示信息用于使所述控制器在所述报文发送有效指示信息指示有效时，根据所述报文大小和报文初始缓存首地址向对端设备发送所述NP存储器读命令。
上述方案中，所述第一接收单元，还配置为接收控制器发送的报文发送指示信息更改命令，并根据所述报文发送指示信息更改命令，将所述报文发送指示信息中的报文发送有效指示信息更改为无效。
一种控制器，包括：
第二发送单元，配置为发送非转发NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度；其中所述数据读取长度满足不超过控制器中的读数据最大缓存值、以及读取数据所在的地址不翻越4K地址界；
所述第二接收单元，配置为接收若干返回报文。
上述方案中，所述返回报文为Cpld返回报文，所述Cpld返回报文中携带有所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数；
所述第二发送单元，还配置为在根据所述Cpld返回报文中携带的所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，判断出按照顺序依次接收若干Cpld返回报文且所述若干Cpld返回报文为所述NP存储器读命令对应的全部读取数据时，将所述若干Cpld返回报文中的数据发送给目标设备。
上述方案中，所述第二接收单元，还配置为接收对端设备发送的报文发送指示信息，所述报文发送指示信息中携带有报文发送有效指示信息、报文大小和报文初始缓存首地址；
所述第二发送单元，还配置为在所述第二接收单元接收的报文发送有效指示信息指示有效时，根据所述第二接收单元接收的所述报文大小和报文初始缓存首地址向对端设备发送所述NP存储器读命令。
上述方案中，所述第二发送单元，还配置为向所述对端设备发送报文发送指示信息更改命令，所述报文发送指示信息更改命令用于指示所述对端设备将所述报文发送指示信息中的报文发送有效指示信息更改为无效。
本发明实施例提供的数据读取方法、对端设备、控制器及存储介质，控制器向对端设备发送的NP存储器读命令，NP存储器读命令中携带的数据读取长度可以足够大，只要满足不超过控制器中的读数据最大缓存值以 及读取数据所在的地址不翻越4K地址界即可，数据读取长度可以超过payload长度，与现有技术中所述NP存储器读命令中的所述数据读取长度必须在payload长度以内不同。这样，在目标设备读取相同长度的数据时，应用本发明实施例方法，在读取数据过程中发送的NP存储器读命令的次数就会大大减少，能节省时间，且间接为其他报文的发送增加了带宽，提高了数据传输效率。
附图说明
图1为本发明实施例提供的一种PCIe链路系统的结构框图；
图2为本发明实施例1提供的一种对端设备侧的数据读取方法的流程示意图；
图3为本发明实施例1提供的一种控制器侧的数据读取方法的流程示意图；
图4为本发明实施例2提供的一种数据取方法的流程示意图；
图5为本发明实施例3提供的一种对端设备的结构框图；
图6为本发明实施例3提供的一种控制器的结构框图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述。
本发明实施例中的技术方案是基于如图1所示的PCIe链路系统架构来实施的，如图1所示，所述PCIe链路系统包括对端设备101、协议层设备102、控制器103、目标设备104；其中，
所述对端设备101可以与所述协议层设备102通过高速串行接口形成的PCIe链路(即：高速串行总线SerDes)进行信息的高速、多带宽的点对点通信。具有标准PCIe协议(包括了PCIe 3.0版本及其更低的版本)阐述 的所有功能。
协议层设备102，具有PCIe 3.0版本及其更低的版本阐述的所有功能，能实现所述协议版本规定的物理层(PHY，Physical Layer)、数据链路层(DLL，Data Link Layer)和事务层(TL，Transaction Layer)的所有功能，且在所述PHY层包含有PCIe链路功能的高速串行(SerDes)接口，在所述TL层包含具有事务层包(TLP，Transaction Layer Packet)基本结构、形式、特征的包接口(这里称之为TLP接口)。除此之外，所述协议层设备102与其之外的模块、设备(如所述控制器103)或系统之间还可包含有其他类型接口，比如：控制、状态、高性能总线(AHB)、时钟、复位等接口。
控制器103上设置有TLP接口，所述对端设备101与协议层设备102之间通过高速串行接口进行数据交互；协议层设备102与控制器103之间通过各自的TLP接口进行数据交互；控制器103与对端设备101通过协议层设备102进行通信。即：控制器103向对端设备101发送信息时，先将该信息组装成TLP包通过控制器103的TLP接口发送给协议层设备102，协议层设备102的TLP接口接收该TLP包，然后协议层设备102将该TLP包转换成PCIe协议包并通过高速串行接口发送给对端设备101，对端设备101通过高速串行接口接收该PCIe协议包。
目标设备104在需要从对端设备101读取数据时，发送给控制器的数据获取信号为有效，控制器103检测到数据信号有效时，就通过协议层设备102向对端设备101发送NP存储器读命令，对端设备101根据该NP存储器读命令通过协议层设备102向控制器103返回需要的数据；控制器103再将接收到的数据返回给目标设备104，这样，目标设备104就从对端设备101读取到了数据。
本发明实施例的方法就是基于上述的PCIe链路系统架构来实现的。
实施例1
本发明实施例提供了一种数据读取方法，应用于对端设备一侧，如图2所示，本实施例方法的处理流程包括以下步骤：
步骤201、接收NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度。
目标设备需要从对端设备读取数据时，发送给控制器的数据获取信号为有效，控制器检测到数据信号有效时，就通过协议层设备与对端设备进行交互，获得对端设备发送过来的报文发送指示信息，所述报文发送指示信息中携带有报文发送有效指示信息、报文大小和报文初始缓存首地址；所述报文发送指示信息用于使所述控制器在所述报文发送有效指示信息指示有效时，根据所述报文大小和报文初始缓存首地址向对端设备发送所述NP存储器读命令。
控制器需要从所述对端设备的报文初始缓存首地址处开始读取所述报文大小的报文，在读取所述报文大小的报文时，所述控制器需要向所述对端设备发送NP存储器读命令，这样对端设备才会根据该NP存储器读命令来读取该报文。
步骤202、在所述数据读取长度超过payload长度时，将所述数据读取初始地址和数据读取长度对应的读取数据拆分成数据长度在payload长度以内的若干返回报文。
所述返回报文可以为Cpld返回报文。
NP存储器读命令中携带有数据读取初始地址和数据读取长度，在本实施例方法中数据读取长度可以超过payload长度，通常情况下，payload长度为0-256B。
在所述数据读取长度超过payload长度时，对端设备会将所述NP存储器读命令要求读取的读取数据拆分成数据长度在payload长度以内的若干Cpld返回报文。当然在拆分时拆分的Cpld返回报文的大小应该尽量接近 payload的长度。
步骤203、将所述若干返回报文依次返回。
由于对端设备向控制器发送的数据的长度必须在payload长度之内，故对端设备通过步骤202将所述NP存储器读命令要求读取的读取数据拆分后，会依次将所述若干Cpld返回报文返回给控制器。
当然，为了保证控制器能够完整地接收到所述NP存储器读命令要求读取的读取数据，所述Cpld返回报文中携带有NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，且所述对端设备会将所述若干Cpld返回报文按照所述Cpld返回报文所在地址的顺序依次返回给控制器。这样控制器可以根据所述Cpld返回报文中携带的所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，判断出控制器是否按照顺序依次接收所述若干Cpld返回报文且所述若干Cpld返回报文是否为所述NP存储器读命令对应的全部读取数据。需要说明的是所述Cpld返回报文中携带有NP存储器读命令对应的读取数据中剩余需要返回的报文字节数包括本次Cpld返回报文中读取数据的字节数。
根据所述Cpld返回报文中携带的所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，判断出按照顺序依次接收若干Cpld返回报文且所述若干Cpld返回报文为所述NP存储器读命令对应的全部读取数据时，确定控制器完全接收到了该NP存储器读命令要求读取的读取数据。然后，控制器就会将所述若干Cpld返回报文中的数据发送给目标设备。
这样目标设备就从对端设备获得了读取数据。在目标设备需要读取的数据比较长的情况下，可以多次进行步骤201-203发送多个NP存储器读命令来从对端设备获得读取数据，这些过程都与现有技术中相同，只是本实施例中每次发送的NP存储器读命令中携带的数据读取长度都可以超过payload长度，这样在目标设备读取相同长度的数据时，应用本实施例方法， 在读取数据过程中发送的NP存储器读命令的次数就会大大减少，节省时间，同时间接为其他报文的发送增加了带宽，提高了数据传输效率。
本发明实施例还提供了一种第一计算机可读存储介质，该存储介质包括一组指令，所述指令用于执行如图2所示的数据读取方法。
本发明实施例还提供了一种数据读取方法，应用于控制器一侧，如图3所示，本实施例方法的处理流程包括以下步骤：
步骤301、发送NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度。
目标设备需要从对端设备读取数据时，发送给控制器的数据获取信号为有效，控制器检测到数据信号有效时，就通过协议层设备与对端设备进行交互，获得对端设备发送过来的报文发送指示信息，所述报文发送指示信息中携带有报文发送有效指示信息、报文大小和报文初始缓存首地址；所述报文发送指示信息用于使所述控制器在所述报文发送有效指示信息指示有效时，根据所述报文大小和报文初始缓存首地址向对端设备发送所述NP存储器读命令。
控制器需要从所述对端设备的报文初始缓存首地址处开始读取所述报文大小的报文，在读取所述报文大小的报文时，所述控制器需要向所述对端设备发送NP存储器读命令，这样对端设备才会根据该NP存储器读命令来读取该报文。本实施例方法中所述NP存储器读命令中的所述数据读取长度应该足够大，且满足不超过控制器中的读数据最大缓存值以及读取数据所在的地址不翻越4K地址界。而不是现有技术中的所述NP存储器读命令中的所述数据读取长度必须在payload长度以内。
所述数据读取初始地址以及数据读取长度就限定了读取数据所在的地址，这个地址不能翻越4K地址界，这是本领域技术人员都清楚的一项规则。
步骤302、接收返回报文。
对端设备接收到所述NP存储器读命令，在所述NP存储器读命令中携带的数据读取长度超过payload长度时，将所述NP存储器对应的读取数据拆分成数据长度在payload长度以内的返回报文依次返回给控制器，控制器就接收所述对端设备返回的返回报文。所述返回报文可以是Cpld返回报文。
所述Cpld返回报文中携带有所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数；这样控制器可以根据所述Cpld返回报文中携带的所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，判断出控制器是否按照顺序依次接收所述若干Cpld返回报文且所述若干Cpld返回报文是否为所述NP存储器读命令对应的全部读取数据。需要说明的是所述Cpld返回报文中携带有NP存储器读命令对应的读取数据中剩余需要返回的报文字节数包括本次Cpld返回报文中读取数据的字节数。
具体的判断原则是：若本次Cpld返回报文携带的剩余需要返回的报文字节数A要小于上次Cpld返回报文携带的剩余需要返回的报文字节数B，且所述B-A为上次Cpld返回报文携带的读取数据的字节数，则表明控制器是按照顺序依次接收的Cpld返回报文，若本次Cpld返回报文携带的剩余需要返回的报文字节数A等于本次Cpld返回报文携带的读取数据的字节数，则表明控制器依次接收的所述若干Cpld返回报文为所述NP存储器读命令对应的全部读取数据。
根据所述Cpld返回报文中携带的所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，判断出按照顺序依次接收若干Cpld返回报文且所述若干Cpld返回报文为所述NP存储器读命令对应的全部读取数据时，确定控制器完全接收到了该NP存储器读命令要求读取的读取数据。然后，控制器就会将所述若干Cpld返回报文中的数据发送给目标设备。
这样目标设备就从对端设备获得了读取数据。在目标设备需要读取的数据比较长的情况下，可以多次进行步骤301-302发送多个NP存储器读命 令来从对端设备获得读取数据，本实施例中每次发送的NP存储器读命令中携带的数据读取长度都可以超过payload长度，与现有技术中的所述NP存储器读命令中的所述数据读取长度必须在payload长度以内不同。这样在目标设备读取相同长度的数据时，应用本实施例方法，在读取数据过程中发送的NP存储器读命令的次数就会大大减少，节省时间，且间接为其他报文的发送增加了带宽，提高了数据传输效率。
本发明实施例还提供了一种第二计算机可读存储介质，该存储介质包括一组指令，所述指令用于执行如图3所示的数据读取方法。
实施例2
本发明实施例提供了一种数据读取方法，如图4所示，本实施例方法的处理流程包括以下步骤：
步骤401、控制器接收目标设备发送的有效的数据获取信号后，向对端设备发送携带有报文发送指示信息地址请求消息的第一读命令。
当目标设备需要从对端设备读取数据时，目标设备就向控制器发送有效的数据获取信号，控制器检测到目标设备发送的数据获取信号是有效的后，就会向对端设备发送报文发送指示信息地址请求消息，请求对端设备返回目标设备需要的数据报文对应的报文发送指示信息所在的缓存地址。
在基于PCIe协议总线的系统中，控制器与对端设备之间的通信交互是通过协议层设备进行的，控制器会将发送给对端设备的信息构建成一个所述memory读的包，以TLP包的形式通过控制器的TLP接口发送给协议层设备，协议层设备通过TLP接口接收该TLP包，并将该TLP包转换为PCIe链路包，通过高速串行接口提供的PCIe链路转发给对端设备。
本步骤中的第一读命令可以参考上述过程由控制器发送给对端设备。
步骤402、对端设备向控制器返回报文发送指示信息的第一地址信息。
对端设备会将需要发送给目标设备的报文进行缓存，并将所述报文对 应的报文发送指示信息存储在对应的缓存中，所述报文发送指示信息包括报文发送有效指示信息、报文大小和报文初始缓存首地址，其中，报文发送有效指示用于指示所述报文大小和报文初始缓存首地址限定的报文存储地址范围内是否有报文向目标设备发送。
对端设备将发送报文缓存进报文发送指示信息中所述报文大小和报文初始缓存首地址限定的地址范围后，就会将报文发送指示信息中的报文发送有效指示信息由无效设置为有效。
对端设备接收到控制器发送来的报文发送指示信息地址请求消息后，就会将需要发送给目标设备的发送报文对应的报文发送指示信息的第一地址信息返回给控制器。
在基于PCIe协议总线的系统中，对端设备向控制器发送信息时，对端设备会将该信息组装成PCIe链路包通过高速串行接口提供的PCIe链路转发给协议层设备，协议层设备通过高速串行接口接收该PCIe链路包，并将该PCIe链路包转换为TLP包，通过TLP接口发送给控制器，控制器通过TLP接口接收该TLP包，解析该TLP包后获得对端设备发送的信息。
本步骤中的第一地址信息可以参考上述过程由对端设备发送给控制器。
步骤403、控制器接收所述第一地址信息，并向对端设备发送携带有所述第一地址信息的第二读命令。
控制器接收所述第一地址信息，会通过协议层设备向对端设备发送携带有所述第一地址信息的第二读命令，具体过程参考第一读命令的发送过程。
步骤404、对端设备接收所述携带有所述第一地址信息的第二读命令，并向所述控制器返回所述第一地址信息对应的报文发送指示信息。
所述报文发送指示信息包括报文发送有效指示信息、报文大小和报文 初始缓存首地址。其发送过程参考步骤402中第一地址信息的发送过程。
步骤405、所述控制器接收所述报文发送指示信息，并在接收到的所述报文发送有效指示信息指示有效时，根据所述报文大小和报文初始缓存首地址向所述对端设备发送NP存储器读命令。
控制器接收到报文发送指示信息先查看所述报文发送指示信息中的报文发送有效指示信息指示是否有效，若有效则表明所述报文大小和报文初始缓存首地址限定的报文存储地址范围内有报文向目标设备发送，若无效则表明所述报文大小和报文初始缓存首地址限定的报文存储地址范围内没有报文向目标设备发送，需要发送的报文还没有存储到该地址内，这时，就需要不断地进行步骤403和404，直到控制器接收到报文发送指示信息中的报文发送有效指示信息为有效为止。
控制器在接收到的所述报文发送指示信息中的报文发送有效指示信息指示有效时，就可以根据所述报文大小和报文初始缓存首地址向所述对端设备发送NP存储器读命令。控制器需要从所述对端设备的报文初始缓存首地址处开始读取所述报文大小的报文，在读取所述报文大小的报文时，所述控制器需要向所述对端设备发送NP存储器读命令，这样对端设备才会根据该NP存储器读命令来读取该报文。
所述NP存储器读取命令中携带有数据读取初始地址以及数据读取长度，其中，所述数据读取长度可以足够大，只要满足不超过控制器中的读数据最大缓存值即MAX_READ_REQUEST_SIZE的值(MAX_READ_REQUEST_SIZE可以设置的尽量的大一点比如1KB或者2KB)以及读取数据所在的地址不翻越4K地址界。所述数据读取初始地址以及数据读取长度就限定了读取数据所在的地址，这个地址不能翻越4K地址界。
应用本实施例的方法在读取数据时不需要将NP存储器读命令中的数 据读取长度限制在小于payload的条件下，而是数据读取长度能大尽量的大一些。这样根据返回报文的存储地址和长度信息后，生成的NP存储器读命令中的数据读取长度就需要尽量的大一点，只要不超过控制器中的读数据最大缓存值以及读取数据所在的地址不翻越4K地址界就可以，按照这个规则来生成NP存储器读命令的话，对于一个所述报文大小超过2KB的报文需要发出的NP存储器读命令就会少很多(相对现有技术中每次最大256B来说)，节省了时间，同时在此读取数据的过程中NP存储器读命令对带宽的占用也会减少，相当于间接为其他报文的发送增加了带宽。
步骤406、对端设备接收NP存储器读命令，在所述NP存储器读命令中携带的数据读取长度超过payload长度时，将所述数据读取初始地址和数据读取长度对应的读取数据拆分成数据长度在payload长度以内的若干Cpld返回报文。
由于对端设备向控制器发送的数据的长度必须在payload长度之内，故对端设备需要将所述NP存储器读命令要求读取的读取数据拆分后成数据长度在payload长度以内的若干Cpld返回报文，才能发送给控制器。
当然在拆分时拆分的Cpld返回报文的大小应该尽量接近payload的长度，还需要遵守不翻越4K地址界以及RCB约束等要求。RCB参数设置可以设置成64B或者128B，RCB约束是指返回的Cpld返回报文中携带的数据长度应该是RCB的整数倍，这是PCIe总线协议中的一个默认规定。
步骤407、控制器接收对端设备发送的若干Cpld返回报文，并在所述NP存储器命令对应的读取数据拆分的Cpld返回报文接收完成后，向所述目标设备发送所述读取数据。
为了保证控制器能够完整地接收到所述NP存储器读命令要求读取的读取数据，所述Cpld返回报文中携带有所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，且所述对端设备会将所述若干Cpld返 回报文按照所述Cpld返回报文所在地址的顺序依次返回给控制器。这样控制器可以根据所述Cpld返回报文中携带的所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，判断出控制器是否按照顺序依次接收所述若干Cpld返回报文且所述若干Cpld返回报文是否为所述NP存储器读命令对应的全部读取数据。需要说明的是所述Cpld返回报文中携带有NP存储器读命令对应的读取数据中剩余需要返回的报文字节数包括本次Cpld返回报文中读取数据的字节数。
具体的判断原则是：若本次Cpld返回报文携带的剩余需要返回的报文字节数A要小于上次Cpld返回报文携带的剩余需要返回的报文字节数B，且所述B-A为上次Cpld返回报文携带的读取数据的字节数，则表明控制器是按照顺序依次接收的Cpld返回报文，若本次Cpld返回报文携带的剩余需要返回的报文字节数A等于本次Cpld返回报文携带的读取数据的字节数，则表明控制器依次接收的所述若干Cpld返回报文为所述NP存储器读命令对应的全部读取数据。
根据所述Cpld返回报文中携带的所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，判断出按照顺序依次接收若干Cpld返回报文且所述若干Cpld返回报文为所述NP存储器读命令对应的全部读取数据时，确定控制器完全接收到了该NP存储器读命令要求读取的读取数据。然后，控制器就会将所述若干Cpld返回报文中的数据发送给目标设备。
控制器在读取所述报文大小的报文时，第一次向对端设备发送的NP存储器读取命令中的数据读取初始地址为所述报文初始缓存首地址，所述数据读取长度应该小于等于所述报文大小。若所述数据读取长度等于所述报文大小，则表明发送一次NP存储器读取命令就可以读取所述报文大小的报文；若所述数据读取长度小于所述报文大小，则表明发送一次NP存储器读取命令不能读取所述报文大小的报文，还需要再发送一次或多次NP存储器 读取命令才能完全读取所述报文大小的报文，此时就需要再次进行步骤405-407，每次发送NP存储器读取命令都要等上次NP存储器读取命令要求读取的报文读取完成才能发送。
每次发送的NP存储器读取命令中的数据读取初始地址都根据上次NP存储器读取命令要求读取的报文的地址设置，即上次NP存储器读取命令中数据读取初始地址为N，数据读取长度为D，则本次NP存储器读取命令中的数据读取初始地址为N+D+1，这些地址计算过程都与现有技术中相同。NP存储器读取命令中的数据读取长度要满足不超过控制器中的读数据最大缓存值以及读取数据所在的地址不翻越4K地址界。
这样不断进行步骤405-407，直到所述报文大小的报文全部发送给控制器为止。控制器将最后一个NP存储器读取命令对应的读取数据接收完成并发送给目标设备后，会向目标设备发送一个报文发送完成消息，通知目标设备报文已经读取完成可以使用了。
步骤408、在所述报文大小对应的数据接收完成之后，所述控制器向所述对端设备发送报文发送指示信息更改命令。
步骤409、所述对端设备根据报文发送指示信息更改命令将所述报文发送指示信息中的报文发送有效指示信息更改为无效。
这样，当下一个需要发送给目标设备的报文进行缓存时，就可以将该报文缓存到报文发送有效指示信息更改为无效的报文发送指示信息限定的地址中。
实施例3
本发明实施例提供了一种对端设备，如图5所示，所述对端设备包括：第一接收单元501、拆分单元502、第一发送单元503，其中，
第一接收单元501，配置为接收NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度；
拆分单元502，配置为在所述第一接收单元501接收到的数据读取长度大于超过有效载荷payload长度时，将所述数据读取初始地址和数据读取长度对应的读取数据拆分成数据长度在payload长度以内的若干返回报文；
第一发送单元503，配置为将所述拆分单元502拆分成的若干返回报文依次返回。
可选的，所述返回报文为Cpld返回报文；第一发送单元503，还配置为将所述拆分单元502拆分成的若干Cpld返回报文按照各Cpld返回报文所在地址的顺序依次返回给控制器，所述Cpld返回报文中携带有所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数。
所述第一发送单元503，还配置为向所述控制器发送报文发送指示信息，所述报文发送指示信息中携带有报文发送有效指示信息、报文大小和报文初始缓存首地址；所述报文发送指示信息用于使所述控制器在所述报文发送有效指示信息指示有效时，根据所述报文大小和报文初始缓存首地址向对端设备发送所述NP存储器读命令。
所述第一接收单元501，还配置为接收控制器发送的报文发送指示信息更改命令，并根据所述报文发送指示信息更改命令，将所述报文发送指示信息中的报文发送有效指示信息更改为无效。
本发明实施例还提供了一种控制器，如图6所示，所述控制器包括：第二发送单元601、第二接收单元602，其中，
第二发送单元601，配置为发送NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度；其中所述数据读取长度满足不超过控制器中的读数据最大缓存值、以及读取数据所在的地址不翻越4K地址界；
所述第二接收单元602，配置为接收若干返回报文。
所述返回报文为Cpld返回报文，所述Cpld返回报文中携带有所述NP 存储器读命令对应的读取数据中剩余需要返回的报文字节数；所述第二发送单元601，还配置为在根据所述Cpld返回报文中携带的所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，判断出按照顺序依次接收若干Cpld返回报文且所述若干Cpld返回报文为所述NP存储器读命令对应的全部读取数据时，将所述若干Cpld返回报文中的数据发送给目标设备。
所述第二接收单元601，还配置为接收对端设备发送的报文发送指示信息，所述报文发送指示信息中携带有报文发送有效指示信息、报文大小和报文初始缓存首地址；
所述第二发送单元602，还配置为在所述第二接收单元601接收的报文发送有效指示信息指示有效时，根据所述第二接收单元601接收的所述报文大小和报文初始缓存首地址向对端设备发送所述NP存储器读命令。
所述第二发送单元602，还配置为向所述对端设备发送报文发送指示信息更改命令，所述报文发送指示信息更改命令用于指示所述对端设备将所述报文发送指示信息中的报文发送有效指示信息更改为无效。
在实际应用中，第一接收单元501、拆分单元502、第一发送单元503可以由位于对端设备上的中央处理器(CPU)、微处理器(MPU)、数字信号处理器(DSP)或现场可编程门阵列(FPGA)等器件实现。第二发送单元601、所述第二接收单元602可以由位于控制器上的中央处理器(CPU)、微处理器(MPU)、数字信号处理器(DSP)或现场可编程门阵列(FPGA)等器件实现。
本领域内的技术人员应明白，本发明的实施例可提供为方法、系统、或计算机程序产品。因此，本发明可采用硬件实施例、软件实施例、或结合软件和硬件方面的实施例的形式。而且，本发明可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘 存储器和光学存储器等)上实施的计算机程序产品的形式。
本发明是参照根据本发明实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
以上所述，仅为本发明的较佳实施例而已，并非用于限定本发明的保护范围。
工业实用性
本发明实施例控制器向对端设备发送的NP存储器读命令，NP存储器读命令中携带的数据读取长度可以足够大，只要满足不超过控制器中的读数据最大缓存值以及读取数据所在的地址不翻越4K地址界即可，数据读取长度可以超过payload长度，与现有技术中所述NP存储器读命令中的所述 数据读取长度必须在payload长度以内不同。这样，在目标设备读取相同长度的数据时，应用本发明实施例方法，在读取数据过程中发送的NP存储器读命令的次数就会大大减少，能节省时间，且间接为其他报文的发送增加了带宽，提高了数据传输效率。

Claims (18)

  1. 一种数据读取方法，包括：
    接收非转发NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度；
    在所述数据读取长度超过有效载荷payload长度时，将所述数据读取初始地址和数据读取长度对应的读取数据，拆分成数据长度在payload长度以内的若干返回报文；
    将所述若干返回报文依次返回。
  2. 根据权利要求1所述的方法，其中，所述返回报文为Cpld返回报文，所述将所述若干返回报文依次返回，包括：
    将所述若干Cpld返回报文按照各Cpld返回报文所在地址的顺序依次返回给控制器，所述Cpld返回报文中携带有所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数。
  3. 根据权利要求1所述的方法，其中，在接收NP存储器读命令之前，所述方法还包括：
    向所述控制器发送报文发送指示信息，所述报文发送指示信息中携带有报文发送有效指示信息、报文大小和报文初始缓存首地址；所述报文发送指示信息用于使所述控制器在所述报文发送有效指示信息指示有效时，根据所述报文大小和报文初始缓存首地址向对端设备发送所述NP存储器读命令。
  4. 根据权利要求3所述的方法，其中，所述将所述若干返回报文依次返回后，所述方法还包括：
    接收控制器发送的报文发送指示信息更改命令，并根据所述报文发送指示信息更改命令，将所述报文发送指示信息中的报文发送有效指示信息 更改为无效。
  5. 一种数据读取方法，包括：
    发送非转发NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度；其中，所述数据读取长度满足不超过控制器中的读数据最大缓存值、以及读取数据所在的地址不翻越4K地址界；
    接收返回报文。
  6. 根据权利要求5所述的方法，其中，所述返回报文为Cpld返回报文，所述Cpld返回报文中携带有所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数；
    相应的，所述接收返回报文后，所述方法还包括：
    根据所述Cpld返回报文中携带的所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，判断出按照顺序依次接收若干Cpld返回报文且所述若干Cpld返回报文为所述NP存储器读命令对应的全部读取数据时，将所述若干Cpld返回报文中的数据发送给目标设备。
  7. 根据权利要求5所述的方法，其中，在发送NP存储器读命令之前，所述方法还包括：
    接收对端设备发送的报文发送指示信息，所述报文发送指示信息中携带有报文发送有效指示信息、报文大小和报文初始缓存首地址；
    相应的，所述发送NP存储器读命令包括：
    在所述报文发送有效指示信息指示有效时，根据所述报文大小和报文初始缓存首地址向对端设备发送所述NP存储器读命令。
  8. 根据权利要求7所述的方法，其中，在所述报文大小对应的数据接收完成之后，所述方法还包括：
    向所述对端设备发送报文发送指示信息更改命令，所述报文发送指示信息更改命令用于指示所述对端设备将所述报文发送指示信息中的报文发 送有效指示信息更改为无效。
  9. 一种对端设备，包括：
    第一接收单元，配置为接收非转发NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度；
    拆分单元，配置为在所述第一接收单元接收到的数据读取长度大于超过有效载荷payload长度时，将所述数据读取初始地址和数据读取长度对应的读取数据拆分成数据长度在payload长度以内的若干返回报文；
    第一发送单元，配置为将所述拆分单元拆分成的若干返回报文依次返回。
  10. 根据权利要求9所述的对端设备，其中，所述返回报文为Cpld返回报文；
    所述第一发送单元，还配置为将所述拆分单元拆分成的若干Cpld返回报文按照各Cpld返回报文所在地址的顺序依次返回给控制器，所述Cpld返回报文中携带有所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数。
  11. 根据权利要求9所述的对端设备，其中，
    所述第一发送单元，还配置为向所述控制器发送报文发送指示信息，所述报文发送指示信息中携带有报文发送有效指示信息、报文大小和报文初始缓存首地址；所述报文发送指示信息用于使所述控制器在所述报文发送有效指示信息指示有效时，根据所述报文大小和报文初始缓存首地址向对端设备发送所述NP存储器读命令。
  12. 根据权利要求11所述的对端设备，其中，
    所述第一接收单元，还配置为接收控制器发送的报文发送指示信息更改命令，并根据所述报文发送指示信息更改命令，将所述报文发送指示信息中的报文发送有效指示信息更改为无效。
  13. 一种控制器，包括：
    第二发送单元，配置为发送非转发NP存储器读命令，所述NP存储器读命令中携带有数据读取初始地址和数据读取长度；其中所述数据读取长度满足不超过控制器中的读数据最大缓存值、以及读取数据所在的地址不翻越4K地址界；
    所述第二接收单元，配置为接收若干返回报文。
  14. 根据权利要求13所述的控制器，其中，所述返回报文为Cpld返回报文，所述Cpld返回报文中携带有所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数；
    所述第二发送单元，还配置为在根据所述Cpld返回报文中携带的所述NP存储器读命令对应的读取数据中剩余需要返回的报文字节数，判断出按照顺序依次接收若干Cpld返回报文且所述若干Cpld返回报文为所述NP存储器读命令对应的全部读取数据时，将所述若干Cpld返回报文中的数据发送给目标设备。
  15. 根据权利要求13所述的控制器，其中，
    所述第二接收单元，还配置为接收对端设备发送的报文发送指示信息，所述报文发送指示信息中携带有报文发送有效指示信息、报文大小和报文初始缓存首地址；
    所述第二发送单元，还配置为在所述第二接收单元接收的报文发送有效指示信息指示有效时，根据所述第二接收单元接收的所述报文大小和报文初始缓存首地址向对端设备发送所述NP存储器读命令。
  16. 根据权利要求15所述的控制器，其中，
    所述第二发送单元，还配置为向所述对端设备发送报文发送指示信息更改命令，所述报文发送指示信息更改命令用于指示所述对端设备将所述报文发送指示信息中的报文发送有效指示信息更改为无效。
  17. 一种第一计算机可读存储介质，该存储介质包括一组指令，所述指令用于执行权利要求1至4任一项所述的数据读取方法。
  18. 一种第二计算机可读存储介质，该存储介质包括一组指令，所述指令用于执行权利要求5至8任一项所述的数据读取方法。
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