WO2016188212A1 - 用于制作掩模集成框架的对位方法及系统 - Google Patents

用于制作掩模集成框架的对位方法及系统 Download PDF

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WO2016188212A1
WO2016188212A1 PCT/CN2016/077241 CN2016077241W WO2016188212A1 WO 2016188212 A1 WO2016188212 A1 WO 2016188212A1 CN 2016077241 W CN2016077241 W CN 2016077241W WO 2016188212 A1 WO2016188212 A1 WO 2016188212A1
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array substrate
coordinate system
offset
pixel
absolute coordinate
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French (fr)
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张新建
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • C23C14/042—Coating on selected surface areas, e.g. using masks using masks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00—Arrangements for image or video recognition or understanding
    • G06V10/20—Image preprocessing
    • G06V10/26—Segmentation of patterns in the image field; Cutting or merging of image elements to establish the pattern region, e.g. clustering-based techniques; Detection of occlusion
    • G06V10/267—Segmentation of patterns in the image field; Cutting or merging of image elements to establish the pattern region, e.g. clustering-based techniques; Detection of occlusion by performing operations on regions, e.g. growing, shrinking or watersheds
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00—Arrangements for image or video recognition or understanding
    • G06V10/40—Extraction of image or video features
    • G06V10/46—Descriptors for shape, contour or point-related descriptors, e.g. scale invariant feature transform [SIFT] or bags of words [BoW]; Salient regional features
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00—Arrangements for image or video recognition or understanding
    • G06V10/40—Extraction of image or video features
    • G06V10/56—Extraction of image or video features relating to colour
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/20—Movements or behaviour, e.g. gesture recognition
    • G06V40/28—Recognition of hand or arm movements, e.g. recognition of deaf sign language
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/40—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
    • H04N25/44—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled by partially reading an SSIS array
    • H04N25/441—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled by partially reading an SSIS array by reading contiguous pixels from selected rows or columns of the array, e.g. interlaced scanning

Definitions

  • An exemplary embodiment of the present invention is directed to a aligning method and system for making a mask integrated frame.
  • the fine metal mask (FMM) mode is to vapor-deposit the OLED material onto a low temperature poly-silicon (LTPS) substrate according to a predetermined procedure, and to form a red, green and blue device by using the pattern on the FMM.
  • LTPS low temperature poly-silicon
  • the mother glass Mother Glass, which is an array substrate without OLED material, only the TFT array
  • MFA mask integration frame
  • a charge coupled device (CCD) image sensor recognizes pixel position accuracy between a pattern on a mother glass and a slit of a mask corresponding to an MFA without interference (Pixel Position Accuracy, PPA) matches (eg, by measuring the distance between the center position of the slit of the mask of the MFA and the centerline of the pattern on the mother glass). Since there are different deviations in the production of the mother glass (for example, the pixel position is shifted in one direction as a whole), there is a deviation in the use of the FMM tensioning device (Tension for welding the FMM into a large MFA in a metal frame).
  • the MFA is used for vapor deposition in the subsequent process, which may result in PPA.
  • the deviation is accumulated, and the display device using the MFA eventually has a bad risk.
  • the present invention is directed to a aligning method and system for making a mask integrated frame to reduce the misalignment when making an MFA from a mother glass.
  • a method for aligning a mask integrated frame comprising:
  • the coordinates of the pixel points after moving the array substrate in the absolute coordinate system are transmitted to the tensioning device.
  • the step of controlling the movement of the array substrate such that the offset of the coordinates of the pixel point in the absolute coordinate system and the preset theoretical value is less than or equal to the predetermined error value comprises:
  • the array substrate is controlled to move the distance of the offset amount in a direction opposite to a pixel point offset when it is determined that the offset amount is greater than the predetermined error value.
  • a predetermined number of pixel points on the array substrate are selected as samples for measurement. Or selecting a plurality of pixel points on different straight lines as the samples in each effective pixel array on the array substrate for measurement.
  • the predetermined error value is 1.5 microns.
  • the alignment method further comprises transmitting the coordinates of the alignment hole and the thickness test area on the array substrate after moving the array substrate in the absolute coordinate system to the tensioning device.
  • the alignment method further comprises storing coordinates of the pixel points after moving the array substrate in an absolute coordinate system.
  • a aligning system for fabricating a mask integrated frame comprising:
  • a coordinate system establishing unit configured to establish an absolute coordinate system with a center of the metal frame as a coordinate origin, wherein a center of the metal frame coincides with a center of the array substrate as a reference;
  • a movement control unit configured to control movement of the array substrate such that an offset of a coordinate of the pixel in the absolute coordinate system and the preset theoretical value is less than or equal to a predetermined error value
  • the coordinate transmission unit is configured to transmit the coordinates of the pixel points behind the moving array substrate in the absolute coordinate system to the tensioning device.
  • the mobile control unit comprises:
  • An offset measuring unit configured to measure an offset of a coordinate of the pixel on the array substrate in an absolute coordinate system from a preset theoretical value
  • the determining moving unit is configured to control the distance that the array substrate moves the offset amount in a direction opposite to a pixel point offset when determining that the offset amount is greater than the predetermined error value.
  • the offset measuring unit is configured to select at least three pixel points on the same straight line as samples in each effective pixel array on the array substrate, or in the array substrate A plurality of pixels on different lines in each effective pixel array are selected as samples for measurement.
  • the predetermined error value is 1.5 microns.
  • the coordinate transmission unit is further configured to move the array substrate
  • the alignment holes on the array substrate and the thickness test area are transferred to the tensioning device at coordinates in the absolute coordinate system.
  • the alignment system further comprises: a coordinate storage unit configured to store coordinates of the pixel points after moving the array substrate in an absolute coordinate system.
  • the alignment method and system for fabricating a mask integrated frame by moving the position of the array substrate (ie, the mother glass) such that the coordinates in the absolute coordinate system are less than or equal to a preset theoretical value, Thereby, the alignment deviation when the MFA is made by the mother glass is reduced, and the risk of defective display device using the MFA is lowered.
  • FIG. 1 is a flow chart of a method for aligning a mask integrated frame according to an embodiment of the invention
  • step S120 in FIG. 1 is a specific flowchart of step S120 in FIG. 1;
  • FIG. 3 is a schematic diagram of selecting pixel point samples for measurement in a pixel array of an array substrate according to an embodiment of the invention
  • FIG. 4 is a schematic structural diagram of a registration system for fabricating a mask integrated frame according to an embodiment of the present invention
  • FIG. 5 is a schematic diagram of a specific structure of the mobile control unit 420 of FIG.
  • first, second, and third are used for descriptive purposes only, and are not to be construed as indicating or implying relative importance.
  • plurality refers to two or more, unless specifically defined otherwise.
  • a method for aligning a mask integrated frame includes:
  • Step S110 establishing an absolute coordinate system with the center of the metal frame as a coordinate origin, the center of the metal frame is coincident with the center of the array substrate as a reference, and the array substrate is a mother class;
  • Step S120 controlling the movement of the array substrate to make the coordinates of the pixel point in the absolute coordinate system and the preset theoretical value (the theoretical value is the theoretical design value of the different arrangement of the ideal pixels, which is the most accurate PPA The offset of the standard value is less than or equal to the predetermined error value;
  • Step S130 the coordinates of the pixel points after moving the array substrate in the absolute coordinate system are transmitted to the tensioning device, and the tensioning device can perform subsequent MFA production according to the coordinate value.
  • the alignment method of the present invention for fabricating a mask integrated frame by moving the array substrate ie, The position of the mother glass is such that the coordinates in the absolute coordinate system reach a preset theoretical value, thereby reducing the alignment deviation when the MFA is fabricated by using the mother glass, and reducing the risk of defective display device using the MFA. .
  • step S120 may specifically include:
  • Step S210 measuring an offset between a coordinate of the pixel point on the array substrate in an absolute coordinate system and a preset theoretical value
  • Step S220 determining whether the offset is greater than a predetermined error, and if greater than the predetermined error, performing step S230, otherwise stopping the movement of the array substrate;
  • Step S230 controlling the array substrate to move the distance of the offset amount in a direction opposite to a pixel point offset.
  • step S230 After step S230 is performed, the process returns to step S210, that is, S210 to S230 are repeatedly executed until the measured offset is not greater than the predetermined error.
  • a predetermined number of pixel points on the array substrate can be selected as samples for measurement. Specifically, at least three pixel points on the same straight line are selected as samples in each effective pixel array on the array substrate for measurement according to the linear type of the pixel arrangement and the validity of the pixel.
  • the position of the test point is as shown in Fig. 3.
  • the array substrate with four pixel arrays a, b, c and d can ensure the linear shape of the pixel in both the horizontal and vertical directions, eliminating the large deviation of the individual points. Overall testing and adjustment affecting absolute coordinates.
  • two linear tests make the test more precise and faster. For example, it may be selected in the effective area of each effective pixel array (cell), and multiple selected ones The pixel points are located on multiple straight lines, and the two lines are better than the one line test to better reflect the pixel position of the effective area and are more representative.
  • Each effective pixel array can select six pixels. If there are 50 effective pixel arrays, a total of 300 pixels are selected, which not only tests more accurately and quickly, but also measures the pixels of the entire array substrate. , reducing the number of measurements and improving measurement efficiency.
  • the predetermined error value is 1.5 microns, ie the offset does not exceed 1.5 microns (ie less than or equal to 1.5 microns).
  • the aligning method further comprises: transmitting the alignment holes on the array substrate behind the array substrate and the coordinates of the thickness test area in the absolute coordinate system to the tension device, and aligning the holes After inputting the tensioning device, such as the thickness test area, it is convenient to improve the alignment accuracy and reduce the error caused by the manufacturing process.
  • the alignment method further comprises storing coordinates of the pixel points after moving the array substrate in an absolute coordinate system, and then for the array substrate of the same specification, the tensioning device can directly use the saved coordinate values to make the coordinates. MFA.
  • a aligning system for fabricating a mask integrated frame including:
  • a coordinate system establishing unit 410 configured to establish an absolute coordinate system with a center of the metal frame as a coordinate origin, and a center of the metal frame coincides with a center of the array substrate as a reference;
  • a movement control unit 420 configured to control movement of the array substrate such that an offset of a coordinate of the pixel point in the absolute coordinate system and the preset theoretical value is less than or equal to a predetermined error value;
  • the coordinate transmission unit 430 is configured to transmit the coordinates of the pixel points behind the moving array substrate in the absolute coordinate system to the tensioning device.
  • the specific structure of the mobile control unit 420 may include:
  • the offset measuring unit 510 is configured to measure an offset between a coordinate of the pixel on the array substrate in an absolute coordinate system and a preset theoretical value
  • the determining moving unit 520 is configured to control the distance that the array substrate moves the offset amount in a direction opposite to a pixel point offset when determining that the offset amount is greater than the predetermined error value.
  • the offset measuring unit 510 is further configured to select at least three pixel points on the same straight line as samples in each effective pixel array on the array substrate for measurement.
  • the predetermined error value is 1.5 microns.
  • the coordinate transmission unit is further configured to transmit the coordinates of the alignment hole and the thickness test area on the array substrate behind the array substrate to the tension device.
  • the system further comprises: a coordinate storage unit for storing coordinates of the pixel points after moving the array substrate in an absolute coordinate system.
  • the alignment method and system for fabricating a mask integrated frame by moving the position of the array substrate (ie, the mother glass) such that the coordinates in the absolute coordinate system are less than or equal to a preset theoretical value, Thereby, the alignment deviation when the MFA is made by the mother glass is reduced, and the risk of defective display device using the MFA is lowered.

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Abstract

一种用于制作掩模集成框架的对位方法，包括：以金属框架的中心为坐标原点建立绝对坐标系，金属框架的中心与以作为基准的阵列基板的中心重合；控制阵列基板移动，使像素点在绝对坐标系下的坐标与预设的理论值的偏移量小于或者等于预定误差值；以及将移动阵列基板后的像素点在绝对坐标系下的坐标传输至绷紧装置。以及一种用于制作掩模集成框架的对位系统。

Description

用于制作掩模集成框架的对位方法及系统
本申请要求于2015年5月25日递交的中国专利申请第201510272246.9号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本发明的示例性实施例涉及一种用于制作掩模集成框架的对位方法及系统。
背景技术
精细金属掩膜(FMM)模式是通过蒸镀方式将OLED材料按照预定程序蒸镀到低温多晶硅(Low Temperature Poly-silicon，LTPS)基板上，利用FMM上的图形，形成红绿蓝器件。在进行FMM制作时，需要用阵列(Array)工艺制作出来的母玻璃(Mother Glass，就是未形成OLED材料的阵列基板，只有TFT阵列)作为对位焊接基准而制作掩模集成框架(Mask Frame Assembly，MFA)。电荷耦合器件(CCD)图像传感器在不受干扰的情况下识别母玻璃(Mother Glass)上图案(Pattern)与对应MFA的掩膜的狭缝(slit)之间的像素位置精度(Pixel Position Accuracy，PPA)匹配(例如，通过测量MFA的掩膜的狭缝的中心位置与母玻璃上的图案的中心线的距离)。由于制作母玻璃时会存在不同情况的偏差(例如，像素位置整体向一个方向偏移)，因此在FMM绷紧装置(Tension，用于将FMM在金属框架中焊接成一张大的MFA)使用存在偏差的母玻璃作为焊接基准时，并且在设备存在制作偏差的情况下，在后续过程中采用MFA进行蒸镀时，会导致PPA的 偏差累加，最终使用该MFA的显示器件会存在不良的风险。
发明内容
本发明旨在提供一种用于制作掩模集成框架的对位方法及系统，以便减小利用母玻璃制作MFA时的对位偏差。
根据本发明的第一方面，提供了一种用于制作掩模集成框架的对位方法，包括：
以金属框架的中心为坐标原点建立绝对坐标系，所述金属框架的中心与以作为基准的阵列基板的中心重合；
控制所述阵列基板移动，使像素点在绝对坐标系下的坐标与所述预设的理论值的偏移量小于或者等于预定误差值；以及
将移动阵列基板后的像素点在绝对坐标系下的坐标传输至绷紧装置。
根据本发明的实施例，所述控制所述阵列基板移动使像素点在绝对坐标系下的坐标与所述预设的理论值的偏移量小于或者等于预定误差值的步骤包括：
测量所述阵列基板上的像素点在绝对坐标系下的坐标与预设的理论值的偏移量；以及
当判断偏移量大于所述预定误差值时控制所述阵列基板向像素点偏移的反方向移动所述偏移量的距离。
根据本发明的实施例，在测量所述阵列基板上的像素点在绝对坐标系下的坐标与预设的理论值的偏移量时，选取阵列基板上预定数量的像素点作为样本进行测量，或者在所述阵列基板上每个有效像素阵列中选取多个在不同直线上的像素点作为样本进行测量。
根据本发明的实施例，所述预定误差值为1.5微米。
根据本发明的实施例，所述对位方法还包括将移动阵列基板后的阵列基板上的对位孔、厚度测试区域在所述绝对坐标系下的坐标传输至绷紧装置。
根据本发明的实施例，所述对位方法还包括存储移动阵列基板后的像素点在绝对坐标系下的坐标。
根据本发明的第二方面，还提供了一种用于制作掩模集成框架的对位系统，包括：
坐标系建立单元，用于以金属框架的中心为坐标原点建立绝对坐标系，所述金属框架的中心与以作为基准的阵列基板的中心重合；
移动控制单元，用于控制所述阵列基板移动，使像素点在绝对坐标系下的坐标与所述预设的理论值的偏移量小于或者等于预定误差值；以及
坐标传输单元，用于将移动阵列基板后的像素点在绝对坐标系下的坐标传输至绷紧装置。
根据本发明的实施例，所述移动控制单元包括：
偏移量测量单元，用于测量所述阵列基板上的像素点在绝对坐标系下的坐标与预设的理论值的偏移量；以及
判断移动单元，用于当判断偏移量大于所述预定误差值时，控制所述阵列基板向像素点偏移的反方向移动所述偏移量的距离。
根据本发明的实施例，所述偏移量测量单元用于在所述阵列基板上每个有效像素阵列中选取至少三个在同一直线上的像素点作为样本进行测量，或者在所述阵列基板上每个有效像素阵列中选取多个在不同直线上的像素点作为样本进行测量。
根据本发明的实施例，所述预定误差值为1.5微米。
根据本发明的实施例，所述坐标传输单元还用于将移动阵列基板后的 阵列基板上的对位孔、厚度测试区域在所述绝对坐标系下的坐标传输至绷紧装置。
根据本发明的实施例，该对位系统还包括：坐标存储单元，用于存储移动阵列基板后的像素点在绝对坐标系下的坐标。
根据本发明实施例的用于制作掩模集成框架的对位方法及系统，通过移动阵列基板(即母玻璃)的位置，使其在绝对坐标系下的坐标小于或者等于预设的理论值，从而减小了利用母玻璃制作MFA时的对位偏差，降低了最终使用该MFA的显示器件存在不良的风险。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是根据本发明一实施例的用于制作掩模集成框架的对位方法流程图；
图2是图1中步骤S120的具体流程图；
图3是根据本发明一实施例的在阵列基板的像素阵列中选取像素点样本进行测量的示意图；
图4是根据本发明一实施例的用于制作掩模集成框架的对位系统结构示意图；以及
图5是图4中移动控制单元420的具体结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
在本发明的描述中，需要说明的是，术语“上”、“下”、“顶”、“底”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。
此外，在本发明中，术语“第一”、“第二”、“第三”仅用于描述目的，而不能理解为指示或暗示相对重要性。术语“多个”指两个或两个以上，除非另有明确的限定。
如图1所示，根据本发明一实施例的用于制作掩模集成框架的对位方法包括：
步骤S110，以金属框架的中心为坐标原点建立绝对坐标系，所述金属框架的中心与以作为基准的阵列基板的中心重合，该阵列基板即为母玻璃(mother class)；
步骤S120，控制所述阵列基板移动，使像素点在绝对坐标系下的坐标与所述预设的理论值(理论值是以理想像素的不同排列方式的理论设计值，是PPA最为精准的一个标准值)的偏移量小于或者等于预定误差值；以及
步骤S130，将移动阵列基板后的像素点在绝对坐标系下的坐标传输至绷紧装置，绷紧装置可根据该坐标值进行后续的MFA的制作。
本发明的用于制作掩模集成框架的对位方法通过移动阵列基板(即， 母玻璃)的位置，使其在绝对坐标系下的坐标达到预设的理论值，从而减小了利用母玻璃制作MFA时的对位偏差，降低了最终使用该MFA的显示器件存在不良的风险。
如图2所示，步骤S120可具体包括：
步骤S210，测量所述阵列基板上的像素点在绝对坐标系下的坐标与预设的理论值的偏移量；
步骤S220，判断所述偏移量是否大于预定误差，若大于预定误差，则执行步骤S230，否则停止阵列基板的移动；以及
步骤S230，控制所述阵列基板向像素点偏移的反方向移动所述偏移量的距离。
阵列基板通常是放置在承载台上，通过机械手来移动承载台来达到移动阵列基板的目的，这种机械移动会产生设备误差，实际可能向像素点偏移的反方向移动的距离不等于所述偏移量。因此，根据本发明的实施例，步骤S230执行完后可再返回执行步骤S210，即反复执行S210～S230，直到测得的偏移量不大于预定误差。
由于像素点的偏移具有整体性，因此可选取阵列基板上预定数量的像素点作为样本进行测量。具体地，可以按着像素排列的直线型和像素的有效性，在所述阵列基板上每个有效像素阵列中选取至少三个在同一直线上的像素点作为样本进行测量。
测试点位排列位置如图3所示，具有a、b、c和d四个像素阵列的阵列基板，在横向和纵向都可以确保像素的直线型，排除因为个别点位存在较大的偏差从而影响绝对坐标的整体测试和调整。
根据本发明的实施例，两条直线型的测试会使测试更加精确、快捷。例如，可以在每个有效像素阵列(cell)的有效区域内选取，选取的多个 像素点位于多条直线上，两条直线相比较于一条直线测试可以更好的反映有效区的像素位置、更具有代表性。每个有效像素阵列可选取六个像素点，若有50个有效像素阵列(cell)，则共计选取300个像素点，不但测试更加精确、快捷，而且相对于对整个阵列基板的像素点进行测量，减少了测量次数，提高了测量效率。
根据本发明的实施例，所述预定误差值为1.5微米，即偏移量不超过1.5微米(即小于或者等于1.5微米)。
根据本发明的实施例，所述对位方法还包括将移动阵列基板后的阵列基板上的对位孔、厚度测试区域在所述绝对坐标系下的坐标传输至绷紧装置，将对位孔、厚度测试区域等输入绷紧装置后，可便于提高对位精度，降低因为制作工艺引起的误差。
根据本发明的实施例，所述对位方法还包括存储移动阵列基板后的像素点在绝对坐标系下的坐标，以后对于同样规格的阵列基板，绷紧装置可以直接用该保存的坐标值制作MFA。
如图4所示，根据本发明的实施例，还提供了一种用于制作掩模集成框架的对位系统，包括：
坐标系建立单元410，用于以金属框架的中心为坐标原点建立绝对坐标系，所述金属框架的中心与以作为基准的阵列基板的中心重合；
移动控制单元420，用于控制所述阵列基板移动，使像素点在绝对坐标系下的坐标与所述预设的理论值的偏移量小于或者等于预定误差值；以及
坐标传输单元430，用于将移动阵列基板后的像素点在绝对坐标系下的坐标传输至绷紧装置。
如图5所示，移动控制单元420的具体结构可包括：
偏移量测量单元510，用于测量所述阵列基板上的像素点在绝对坐标系下的坐标与预设的理论值的偏移量；以及
判断移动单元520，用于当判断偏移量大于所述预定误差值时，控制所述阵列基板向像素点偏移的反方向移动所述偏移量的距离。
根据本发明的实施例，所述偏移量测量单元510还用于在所述阵列基板上每个有效像素阵列中选取至少三个在同一直线上的像素点作为样本进行测量。
根据本发明的实施例，所述预定误差值为1.5微米。
根据本发明的实施例，所述坐标传输单元还用于将移动阵列基板后的阵列基板上的对位孔、厚度测试区域在所述绝对坐标系下的坐标传输至绷紧装置。
根据本发明的实施例，该系统还包括：坐标存储单元，用于存储移动阵列基板后的像素点在绝对坐标系下的坐标。
根据本发明实施例的用于制作掩模集成框架的对位方法及系统，通过移动阵列基板(即母玻璃)的位置，使其在绝对坐标系下的坐标小于或者等于预设的理论值，从而减小了利用母玻璃制作MFA时的对位偏差，降低了最终使用该MFA的显示器件存在不良的风险。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (12)

  1. 一种用于制作掩模集成框架的对位方法，包括：
    以金属框架的中心为坐标原点建立绝对坐标系，所述金属框架的中心与以作为基准的阵列基板的中心重合；
    控制所述阵列基板移动，使像素点在绝对坐标系下的坐标与所述预设的理论值的偏移量小于或者等于预定误差值；以及
    将移动阵列基板后的像素点在绝对坐标系下的坐标传输至绷紧装置。
  2. 如权利要求1所述的用于制作掩模集成框架的对位方法，其中，所述控制所述阵列基板移动，使像素点在绝对坐标系下的坐标与所述预设的理论值的偏移量小于或者等于预定误差值的步骤包括：
    测量所述阵列基板上的像素点在绝对坐标系下的坐标与预设的理论值的偏移量；以及
    当判断偏移量大于所述预定误差值时，控制所述阵列基板向像素点偏移的反方向移动所述偏移量的距离。
  3. 如权利要求2所述的用于制作掩模集成框架的对位方法，其中，所述测量所述阵列基板上的像素点在绝对坐标系下的坐标与预设的理论值的偏移量包括：在所述阵列基板上每个有效像素阵列中选取至少三个在同一直线上的像素点作为样本进行测量，或者在所述阵列基板上每个有效像素阵列中选取多个在不同直线上的像素点作为样本进行测量。
  4. 如权利要求1-3任一所述的用于制作掩模集成框架的对位方法，其中，所述预定误差值为1.5微米。
  5. 如权利要求1-4任一所述的用于制作掩模集成框架的对位方法，还包括将移动阵列基板后的阵列基板上的对位孔、厚度测试区域在所述绝对坐标系下的坐标传输至绷紧装置。
  6. 如权利要求1～5任一所述的用于制作掩模集成框架的对位方法，还包括存储移动阵列基板后的像素点在绝对坐标系下的坐标。
  7. 一种用于制作掩模集成框架的对位系统，包括：
    坐标系建立单元，用于以金属框架的中心为坐标原点建立绝对坐标系，所述金属框架的中心与以作为基准的阵列基板的中心重合；
    移动控制单元，用于控制所述阵列基板移动，使像素点在绝对坐标系下的坐标与所述预设的理论值的偏移量小于或者等于预定误差值；以及
    坐标传输单元，用于将移动阵列基板后的像素点在绝对坐标系下的坐标传输至绷紧装置。
  8. 如权利要求7所述的用于制作掩模集成框架的对位系统，其中，所述移动控制单元包括：
    偏移量测量单元，用于测量所述阵列基板上的像素点在绝对坐标系下的坐标与预设的理论值的偏移量；以及
    判断移动单元，用于当判断偏移量大于所述预定误差值时，控制所述阵列基板向像素点偏移的反方向移动所述偏移量的距离。
  9. 如权利要求8所述的用于制作掩模集成框架的对位系统，其中，所述偏移量测量单元用于在所述阵列基板上每个有效像素阵列中选取至少三个在同一直线上的像素点作为样本进行测量，或者在所述阵列基板上每个有效像素阵列中选取多个在不同直线上的像素点作为样本进行测量。
  10. 如权利要求7-9任一所述的用于制作掩模集成框架的对位系统，其中，所述预定误差值为1.5微米。
  11. 如权利要求7-10任一所述的用于制作掩模集成框架的对位系统，其中，所述坐标传输单元还用于将移动阵列基板后的阵列基板上的对位孔、厚度测试区域在所述绝对坐标系下的坐标传输至绷紧装置。
  12. 如权利要求7～11任一所述的用于制作掩模集成框架的对位系统，还包括：坐标存储单元，用于存储移动阵列基板后的像素点在绝对坐标系下的坐标。
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