WO2016165271A1 - 多模终端及其自动频率控制切换方法、计算机存储介质 - Google Patents

多模终端及其自动频率控制切换方法、计算机存储介质 Download PDF

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WO2016165271A1
WO2016165271A1 PCT/CN2015/089481 CN2015089481W WO2016165271A1 WO 2016165271 A1 WO2016165271 A1 WO 2016165271A1 CN 2015089481 W CN2015089481 W CN 2015089481W WO 2016165271 A1 WO2016165271 A1 WO 2016165271A1
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clock signal
radio frequency
chip
multimode terminal
frequency chip
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English (en)
French (fr)
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李超
谢豪律
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Sanechips Technology Co Ltd
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Sanechips Technology Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
    • H04W88/02—Terminal devices
    • H04W88/06—Terminal devices adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

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  • the present invention relates to an automatic frequency control (AFC) technology in a multimode terminal, and more particularly to a multimode terminal, an AFC switching method thereof, and a computer storage medium.
  • AFC automatic frequency control
  • a crystal oscillator In a wireless terminal, a crystal oscillator is required to provide a precise clock signal for use by chips such as radio frequency and baseband.
  • the frequency deviation of the crystal itself is often difficult to meet the clock accuracy requirements of the RF and baseband chips, so AFC technology is needed to further calibrate the crystal frequency.
  • the AFC control uses a voltage control signal to tune the output frequency of the crystal to calibrate the frequency to an acceptable range.
  • a multimode terminal typically includes a multimode baseband chip and a plurality of radio frequency chips, or a plurality of baseband chips and corresponding plurality of radio frequency chips.
  • Each mode of the multimode terminal corresponds to the complete AFC circuit to perform AFC control on the crystal oscillators in various modes, and the analog switch is used to switch the crystal control of the AFC circuit in different modes.
  • This AFC switch has the following problems:
  • control voltage input is switched from one RF chip to another. If the control voltages of the two RF chips are different at this time, the crystal frequency will shift.
  • the existing AFC switching has a problem that the crystal frequency shifts when the mode is switched, and the AFC calibration needs to be performed again, and the calibration time of the AFC is increased.
  • an embodiment of the present invention provides a multimode terminal, an AFC switching method thereof, and a computer storage medium.
  • AFC_DAC Automatic Frequency Control_Digital to Analog Converter
  • VC-TCXO Voltage Control-Temperature Compensate X'tal Oscillator
  • the generated clock signal is shaped and input to the radio frequency chip corresponding to the working mode as a clock signal of the radio frequency chip for the working mode of the multimode terminal;
  • the generated clock signal is shaped by the first RF chip and input into the multimode baseband chip to serve as a clock signal of the multimode baseband chip.
  • the operating mode of the multi-mode terminal, the clock signal is shaped and input into the radio frequency chip corresponding to the working mode, as the clock signal of the radio frequency chip, including:
  • the generated clock signal is input to the radio frequency chip corresponding to the working mode, and is shaped by the radio frequency chip as a clock signal of the radio frequency chip.
  • the operating mode of the multi-mode terminal, the clock signal is shaped and input into the radio frequency chip corresponding to the working mode, as the clock signal of the radio frequency chip, including:
  • the radio frequency chip For generating a working mode of the multimode terminal, passing the generated clock signal to the first radio frequency chip After shaping, the radio frequency chip is input to the radio frequency chip corresponding to the working mode, and is shaped by the radio frequency chip to be a clock signal of the radio frequency chip.
  • the method further includes: turning off an inoperative shaping circuit in the radio frequency chip.
  • the method further includes determining an operation mode of the multimode terminal according to a mode selection signal of the multimode baseband chip.
  • An output unit configured to utilize an AFC_DAC output control voltage in the first RF chip of the multimode terminal
  • An input unit configured to input the output control voltage into the VC-TCXO and generate a clock signal
  • a clock unit configured to shape a generated clock signal and input it into a radio frequency chip corresponding to the working mode as a clock signal of the radio frequency chip; and generate the generated clock
  • the signal is shaped by the first RF chip and input into the multimode baseband chip to serve as a clock signal of the multimode baseband chip.
  • the clock unit comprises:
  • a first input subunit configured to input the generated clock signal into a radio frequency chip corresponding to the working mode for an operation mode of the multimode terminal;
  • the second shaping subunit is configured to form the clock signal as a clock signal of the radio frequency chip after being shaped by the radio frequency chip.
  • the clock unit comprises:
  • the first input subunit is configured to be configured to be in the working mode of the multimode terminal, and the generated clock signal is shaped by the first radio frequency chip and input into the radio frequency chip corresponding to the working mode;
  • a second shaping subunit configured to pass the shaped clock signal to the radio frequency chip
  • the shape is used as a clock signal of the radio frequency chip.
  • the multimode terminal further includes:
  • the control unit is configured to turn off an inactive shaping circuit in the radio frequency chip.
  • the multimode terminal further includes:
  • a determining unit configured to determine an operating mode of the multimode terminal according to a mode selection signal of the multimode baseband chip.
  • the computer storage medium provided by the embodiment of the present invention stores a computer program configured to execute the AFC switching method of the multimode terminal.
  • the multimode terminal when the multimode terminal performs mode switching, only the AFC_DAC output control voltage of one of the radio frequency chips of the multimode terminal is used, and the AFC_DAC of the other radio frequency chip is always turned off, thereby ensuring the mode switching.
  • the control voltage input to the VC-TCXO is unchanged and the load is unchanged, thereby avoiding the clock signal of the VC-TCXO output, that is, the crystal frequency is shifted, and the crystal frequency of the VC-TCXO does not need to be recalibrated, thereby reducing the AFC. Calibration time.
  • the output clock of the single-chip radio frequency chip is used to provide other radio frequency chips, and the shaping circuits of other radio frequency chips are not turned off, thereby saving power consumption of the multi-mode terminal.
  • FIG. 1 is a schematic diagram 1 of a chip structure in a multimode terminal
  • FIG. 2 is a schematic diagram 2 of a chip structure in a multimode terminal
  • FIG. 3 is a schematic flowchart of an AFC switching method of a multimode terminal according to an embodiment of the present invention
  • FIG. 4 is a schematic diagram 3 of a chip structure in a multimode terminal
  • FIG. 5 is a schematic diagram 4 of a chip structure in a multimode terminal
  • FIG. 6 is a schematic diagram 5 of a chip structure in a multimode terminal
  • FIG. 7 is a schematic diagram 6 of a chip structure in a multimode terminal
  • FIG. 8 is a schematic structural diagram of a multimode terminal according to an embodiment of the present invention.
  • Existing multimode terminals typically include a multimode baseband chip and a plurality of radio frequency chips, or a plurality of baseband chips and corresponding plurality of radio frequency chips.
  • each mode corresponds to a complete AFC circuit to perform AFC control on the crystal oscillators in various modes, and the analog switch is used to switch the crystal control of the AFC circuit in different modes.
  • the multimode terminal includes a multimode baseband chip, two RF chips RF chip1 and RF chip2, VC-TCXO, and two switches sw1 and sw2.
  • Each RF chip includes the following modules: digital part (digital_part), internal clock signal buffer (internal_clk_buffer), AFC_DAC, temperature compensated oscillator input buffer (tcxo_input_buffer), and temperature compensated oscillator output buffer (tcxo_output_buffer).
  • RF chip1 is a dual-mode RF chip of Long Term Evolution/Wideband Code Division Multiple Access (LTE/WCDMA), and RF chip2 is a Global System for Mobile communication (GSM).
  • LTE/WCDMA Long Term Evolution/Wideband Code Division Multiple Access
  • GSM Global System for Mobile communication
  • RF chip Referring to FIG. 1, when the multimode terminal operates in the LTE/WCDMA mode, the three modules of the RF chip1 tcxo_input_buffer, tcxo_output_buffer, and AFC_DAC are all turned on, and the RFc2 tcxo_input_buffer, tcxo_output_buffer, and AFC_DAC modules are all turned off. At this time, the VC-TCXO is closed.
  • the input control voltage is provided by chip1's AFC_DAC, and the multimode baseband chip's clock signal is provided by the output of chip1's tcxo_out_buffer.
  • the RFc2's tcxo_input_buffer, tcxo_output_buffer, and AFC_DAC modules are all turned on, and the RF chip1's tcxo_input_buffer, tcxo_output_buffer, and AFC_DAC modules are all turned off.
  • the VC-TCXO input is turned off.
  • the control voltage is provided by chip2's AFC_DAC, and the multimode baseband chip's clock signal is provided by the output of chip2's tcxo_out_buffer.
  • multiple RF chips are similar to the above work process.
  • the VC-TCXO control voltage input is switched from RF chip1 to RF chip2. If the control voltage of the AFC_DAC output of RF chip2 is different from the control voltage of the AFC_DAC output of RF chip1, the crystal frequency will shift. .
  • FIG. 3 is a schematic flowchart of an AFC switching method of a multimode terminal according to an embodiment of the present invention. As shown in FIG. 3, the method includes the following steps:
  • Step 301 Output a control voltage by using an AFC_DAC in the first radio frequency chip in the multimode terminal.
  • the multimode terminal includes a multi-mode baseband chip and a plurality of radio frequency chips (RF chips) and a VC-TCXO.
  • Each RF chip includes the following modules: digital_part, internal_clk_buffer, AFC_DAC, tcxo_input_buffer, and tcxo_output_buffer.
  • the digital_part process converts the signal received and transmitted by the RF chip into a digital baseband signal and communicates with the Mulit-mode Baseband chip.
  • Internal_clk_buffer provides a clock signal to the digital part. All digital signals of the RF chip are processed in digital_part.
  • the digital_part is sent to the AFC_DAC as a multi-bit parallel digital signal, and the previous signal is usually a serial signal sent by the Mulit-mode baseband chip.
  • the original clock signal that is, the unshaped clock signal is VC-TCXO generation
  • a control voltage is output from the AFC_DAC in the RF chip to the VC-TCXO.
  • the unshaped clock signal generated by the VC-TCXO is input to each shaping module in the RF chip, for example, tcxo_input_buffer, internal_clk_buffer, and tcxo_output_buffer, and is shaped as a clock signal.
  • the unshaped clock signal generated by the VC-TCXO is sequentially input to the tcxo_input_buffer and the internal_clk_buffer to be used as the clock signal of the digital_part; the unshaped clock signal generated by the VC-TCXO is input to the tcxo_input_buffer and shaped as the AFC_DAC. Clock signal; the unshaped clock signal generated by the VC-TCXO is sequentially input to the tcxo_input_buffer and tcxo_output_buffer to be used as a clock signal of the Mulit-mode Baseband chip.
  • the tcxo_input_buffer receives an unshaped clock signal, which may be a sine wave signal or a square wave signal, and sends a shaped clock signal, usually a square wave signal with a duty ratio of 50%.
  • the first radio frequency chip may be any one of the multi-mode terminals, and the two radio frequency chips are taken as an example.
  • the multi-mode terminal includes the Mulit-mode.
  • Baseband chip, two RF chips RF chip1 and RF chip2, VC-TCXO, the first RF chip is RF chip1.
  • the AFC_DAC in RF chip1 outputs a control voltage.
  • Step 302 Input the output control voltage into the VC-TCXO and generate a clock signal.
  • control voltage output from the AFC_DAC in the RF chip1 is input to the VC-TCXO, and the VC-TCXO generates an unshaped clock signal.
  • Step 303 For the working mode of the multimode terminal, shape the generated clock signal and input it into the radio frequency chip corresponding to the working mode to serve as a clock signal of the radio frequency chip.
  • an operation mode of the multimode terminal is determined according to a mode selection signal of the multimode baseband chip.
  • the generated clock signal is shaped and input into the radio frequency chip corresponding to the working mode, as the clock signal of the radio frequency chip, specifically including:
  • the generated clock signal is input to the radio frequency chip corresponding to the working mode, and is shaped by the radio frequency chip as a clock signal of the radio frequency chip.
  • the clock signal generated by the VC-TCXO is input to the tcxo_input_buffer in the RF chip1, and is shaped as a clock signal of the AFC_DAC, and then shaped by the internal_clk_buffer.
  • the clock signal of digital_part is input to the tcxo_input_buffer in the RF chip1, and is shaped as a clock signal of the AFC_DAC, and then shaped by the internal_clk_buffer.
  • the clock signal generated by the VC-TCXO is input to the tcxo_input_buffer and tcxo_output_buffer in the RF chip2, and is used as a clock signal of the digital_part.
  • the generated clock signal is shaped and input into the radio frequency chip corresponding to the working mode, as the clock signal of the radio frequency chip, specifically including:
  • the generated clock signal is shaped by the first radio frequency chip and input into the radio frequency chip corresponding to the working mode, and is shaped by the radio frequency chip as a clock of the radio frequency chip. signal.
  • the clock signal generated by the VC-TCXO is input to the tcxo_input_buffer in the RF chip1, and is shaped as a clock signal of the AFC_DAC, and then shaped by the internal_clk_buffer.
  • the clock signal of digital_part is input to the tcxo_input_buffer in the RF chip1, and is shaped as a clock signal of the AFC_DAC, and then shaped by the internal_clk_buffer.
  • the clock signal generated by the VC-TCXO is input to the tcxo_input_buffer and tcxo_output_buffer shaping in the RF chip1. Then, it is input to the tcxo_input_buffer in the RF chip2, and is shaped by the internal_clk_buffer in the RF chip2 as a clock signal of the digital_part.
  • Step 304 The generated clock signal is shaped by the first radio frequency chip and input into the multi-mode baseband chip to serve as a clock signal of the multi-mode baseband chip.
  • the clock signal generated by the VC-TCXO is input to the tcxo_input_buffer and tcxo_output_buffer in the RF chip1, and is used as a clock signal of the Mulit-mode baseband chip.
  • the method further includes: turning off an inoperative shaping circuit in the radio frequency chip.
  • the tcxo_output_buffer, AFC_DAC, and tcxo_input_buffer that are not working in the RF chip 2 are turned off.
  • the tcxo_output_buffer and the AFC_DAC that are not working in the RF chip 2 are turned off.
  • the tcxo_output_buffer and the AFC_DAC that are not working in the RF chip 2 are turned off.
  • the tcxo_output_buffer and AFC_DAC that are not working in RF chip2 are turned off.
  • the multimode terminal when the multimode terminal performs mode switching, only the AFC_DAC output control voltage of one of the radio frequency chips of the multimode terminal is used, and the AFC_DAC of the other radio frequency chip is always turned off, thereby ensuring the mode switching.
  • the control voltage input to the VC-TCXO is unchanged and the load is unchanged, thereby avoiding the clock signal of the VC-TCXO output, that is, the crystal frequency is shifted, and the crystal frequency of the VC-TCXO does not need to be recalibrated, thereby reducing the AFC. Calibration time.
  • the output clock of the single-chip radio frequency chip is used to provide other radio frequency chips, and the shaping circuits of other radio frequency chips are not turned off, thereby saving power consumption of the multi-mode terminal.
  • FIG. 8 is a schematic structural diagram of a multimode terminal according to an embodiment of the present invention.
  • the multimode terminal according to the embodiment of the present invention has a Mulit-mode Baseband chip, multiple RF chips, and VC-TCXO.
  • Each RF chip includes the following modules: digital_part, internal_clk_buffer, AFC_DAC, tcxo_input_buffer, and tcxo_output_buffer.
  • the multimode terminal includes:
  • the output unit 81 is configured to output a control voltage by using an AFC_DAC in the first radio frequency chip in the multimode terminal;
  • the input unit 82 is configured to input the output control voltage into the VC-TCXO, and generate a clock signal
  • the clock unit 83 is configured to: for the working mode of the multimode terminal, shape the generated clock signal and input it into the radio frequency chip corresponding to the working mode to serve as a clock signal of the radio frequency chip;
  • the clock signal is shaped by the first RF chip and input into the multimode baseband chip to serve as a clock signal of the multimode baseband chip.
  • the clock unit 83 includes:
  • the first input subunit 831 is configured to input the generated clock signal into the radio frequency chip corresponding to the working mode for the working mode of the multimode terminal;
  • the second shaping subunit 832 is configured to form the clock signal as a clock signal of the radio frequency chip after being shaped by the radio frequency chip.
  • the clock unit 83 includes:
  • the first input sub-unit 831 is configured to, after being processed by the first radio frequency chip, input the generated clock signal into the radio frequency chip corresponding to the working mode, according to the working mode of the multi-mode terminal;
  • the second shaping subunit 832 is configured to form the shaped clock signal as a clock signal of the radio frequency chip after being shaped by the radio frequency chip.
  • the multimode terminal further includes:
  • the control unit 84 is configured to turn off the shaping circuit that is not working in the radio frequency chip.
  • the multimode terminal further includes:
  • the determining unit 85 is configured to determine an operating mode of the multimode terminal according to a mode selection signal of the multimode baseband chip.
  • each unit in the multimode terminal can be processed by a central processing unit (CPU), a microprocessor (Micro Processor Unit, MPU), and a digital signal processing located in the terminal. (Digital Signal Processor, DSP), or Field Programmable Gate Array (FPGA) implementation.
  • CPU central processing unit
  • MPU Micro Processor Unit
  • DSP Digital Signal Processor
  • FPGA Field Programmable Gate Array
  • each unit and its subunits in the multimode terminal shown in FIG. 8 can be understood by referring to the related description of the AFC switching method of the foregoing multimode terminal.
  • the functions of each unit and its subunits in the multimode terminal shown in FIG. 8 can be realized by a program running on a processor, or can be realized by a specific logic circuit.
  • the apparatus for tracking the service signaling may also be stored in a computer readable storage medium if it is implemented in the form of a software function module and sold or used as a separate product.
  • the technical solution of the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product stored in a storage medium, including a plurality of instructions.
  • a computer device (which may be a personal computer, server, or network device, etc.) is caused to perform all or part of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read only memory (ROM), a magnetic disk, or an optical disk.
  • program codes such as a USB flash drive, a mobile hard disk, a read only memory (ROM), a magnetic disk, or an optical disk.
  • an embodiment of the present invention further provides a computer storage medium, wherein a computer program for executing an AFC switching method of a multimode terminal according to an embodiment of the present invention is stored.
  • the disclosed apparatus and method may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner such as: multiple units or components may be combined, or Can be integrated into another system, or some features can be ignored or not executed.
  • the coupling, or direct coupling, or communication connection of the various components shown or discussed may be through some interface, device or unit.
  • the indirect coupling or communication connection can be electrical, mechanical or other form.
  • the units described above as separate components may or may not be physically separated, and the components displayed as the unit may or may not be physical units, that is, may be located in one place or distributed to multiple network units; Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may be separately used as one unit, or two or more units may be integrated into one unit;
  • the unit can be implemented in the form of hardware or in the form of hardware plus software functional units.
  • the foregoing program may be stored in a computer readable storage medium, and the program is executed when executed.
  • the foregoing steps include the steps of the foregoing method embodiments; and the foregoing storage medium includes: a removable storage device, a read only memory (ROM), a magnetic disk, or an optical disk, and the like, which can store program codes.
  • ROM read only memory
  • the above-described integrated unit of the present invention may be stored in a computer readable storage medium if it is implemented in the form of a software function module and sold or used as a standalone product.
  • the technical solution of the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product stored in a storage medium, including a plurality of instructions.
  • a computer device (which may be a personal computer, server, or network device, etc.) is caused to perform all or part of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes: a removable storage device, a read only memory (ROM), a magnetic disk, or an optical disk, and the like, which can store program codes.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
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Abstract

一种多模终端及其AFC切换方法、计算机存储介质，所述方法包括：利用多模终端中第一射频芯片中的自动频率控制数字模拟转换器AFC_DAC输出控制电压（301）；将所输出的控制电压输入至温补压控晶体振荡器VC-TCXO中，并生成时钟信号（302）；针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号（303）；将所生成的时钟信号经所述第一射频芯片整形后输入至多模基带芯片中，以作为所述多模基带芯片的时钟信号（304）。

Description

多模终端及其自动频率控制切换方法、计算机存储介质 技术领域
本发明涉及多模终端中的自动频率控制(AFC，Automatic Frequency Control)技术，尤其涉及一种多模终端及其AFC切换方法、计算机存储介质。
背景技术
无线终端中，需要晶振提供精准的时钟信号，供给射频和基带等芯片使用。而晶振本身的频率偏差往往难以满足射频和基带芯片对时钟精度的要求，所以需要采用AFC技术来对晶振频率进行进一步的校准。AFC控制是采用电压控制信号来调谐晶振的输出频率，使频率校准到可接受的范围内。
多模终端通常包括一个多模基带芯片和多个射频芯片，或者多个基带芯片和对应的多个射频芯片。多模终端的每种模式都对应完整的AFC电路来分别对各种模式下的晶振进行AFC控制，通过模拟开关实现不同模式下AFC电路对晶振控制的切换。
这种AFC切换存在以下问题：
1、当进行模式切换时，未稳定到待切换的模式时，控制电压处于不确定状态，切换将使晶振频率产生很大的偏移。
2、模式切换完成后，控制电压输入从一个射频芯片切换到了另一个射频芯片，如果此时两个射频芯片输出的控制电压不同，也会导致晶振频率出现偏移。
3、模式切换过程中，从一个射频芯片切换到了另一个射频芯会导致晶振负载的变化，从而导致晶振输出频率的变化。
综上所述，现有的AFC切换存在模式切换时晶振频率出现偏移的问题，需要重新进行AFC校准，增加了AFC的校准时间。
发明内容
为解决上述技术问题，本发明实施例提供了一种多模终端及其AFC切换方法、计算机存储介质。
本发明实施例提供的多模终端的AFC切换方法包括：
利用多模终端中第一射频芯片中的自动频率控制数字模拟转换器(AFC_DAC，Automatic Frequency Control_Digital to Analog Converter)输出控制电压；
将所输出的控制电压输入至温补压控晶体振荡器(VC-TCXO，Voltage Control-Temperature Compensate X'tal Oscillator)中，并生成时钟信号；
针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号；
将所生成的时钟信号经所述第一射频芯片整形后输入至多模基带芯片中，以作为所述多模基带芯片的时钟信号。
在一实施方式中，所述针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号，包括：
针对多模终端的工作模式，将所生成的时钟信号输入至与所述工作模式对应的射频芯片中，经所述射频芯片整形后作为所述射频芯片的时钟信号。
在一实施方式中，所述针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号，包括：
针对多模终端的工作模式，将所生成的时钟信号经所述第一射频芯片 整形后输入至与所述工作模式对应的射频芯片中，经所述射频芯片整形后作为所述射频芯片的时钟信号。
在一实施方式中，所述方法还包括：关闭射频芯片中未工作的整形电路。
在一实施方式中，所述方法还包括：根据所述多模基带芯片的模式选择信号确定所述多模终端的工作模式。
本发明实施例提供的多模终端包括：
输出单元，配置为利用多模终端中第一射频芯片中的AFC_DAC输出控制电压；
输入单元，配置为将所输出的控制电压输入至VC-TCXO中，并生成时钟信号；
时钟单元，配置为针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号；将所生成的时钟信号经所述第一射频芯片整形后输入至多模基带芯片中，以作为所述多模基带芯片的时钟信号。
在一实施方式中，所述时钟单元包括：
第一输入子单元，配置为针对多模终端的工作模式，将所生成的时钟信号输入至与所述工作模式对应的射频芯片中；
第二整形子单元，配置为将所述时钟信号经所述射频芯片整形后作为所述射频芯片的时钟信号。
在一实施方式中，所述时钟单元包括：
第一输入子单元，配置为针对多模终端的工作模式，将所生成的时钟信号经所述第一射频芯片整形后输入至与所述工作模式对应的射频芯片中；
第二整形子单元，配置为将整形后的所述时钟信号经所述射频芯片整 形后作为所述射频芯片的时钟信号。
在一实施方式中，所述多模终端还包括：
控制单元，配置为关闭射频芯片中未工作的整形电路。
在一实施方式中，所述多模终端还包括：
确定单元，配置为根据所述多模基带芯片的模式选择信号确定所述多模终端的工作模式。
本发明实施例提供的计算机存储介质存储有计算机程序，该计算机程序配置为执行上述多模终端的AFC切换方法。
本发明实施例的技术方案中，当多模终端进行模式切换时，只采用多模终端中其中一个射频芯片的AFC_DAC输出控制电压，其他射频芯片的AFC_DAC始终处于关闭状态，保证了在模式切换时，输入至VC-TCXO中的控制电压不变，负载不变，从而避免了VC-TCXO输出的时钟信号，即晶振频率发生偏移，无需重新校准VC-TCXO的晶振频率，从而减少了AFC的校准时间。本发明实施例的技术方案，采用单片射频芯片的输出时钟，提供给其它的射频芯片，同时关掉其他射频芯片未工作的整形电路，节省了多模终端的功耗。
附图说明
图1为多模终端中芯片结构组成示意图一；
图2为多模终端中芯片结构组成示意图二；
图3为本发明实施例的多模终端的AFC切换方法的流程示意图；
图4为多模终端中芯片结构组成示意图三；
图5为多模终端中芯片结构组成示意图四；
图6为多模终端中芯片结构组成示意图五；
图7为多模终端中芯片结构组成示意图六；
图8为本发明实施例的多模终端的结构组成示意图。
具体实施方式
为了更加清楚了解本发明实施例的技术方案，现对现有技术中多模终端的AFC切换方法进行阐述。
现有的多模终端通常包括一个多模基带芯片和多个射频芯片，或者多个基带芯片和对应的多个射频芯片。通常，每种模式都对应完整的AFC电路来分别对各种模式下的晶振进行AFC控制，而通过模拟开关实现不同模式下AFC电路对晶振控制的切换。
以采用两片射频芯片的多模终端为例，参照图1和图2，多模终端包括多模基带芯片、两个射频芯片RF chip1和RF chip2、VC-TCXO、两个开关sw1和sw2，其中，每个射频芯片均包括以下模块：数字部分(digital_part)、内部时钟信号缓冲器(internal_clk_buffer)、AFC_DAC、温补振荡器输入缓冲器(tcxo_input_buffer)、温补振荡器输出缓冲器(tcxo_output_buffer)。假设RF chip1为长期演进/宽带码分多址(LTE/WCDMA，Long Term Evolution/Wideband Code Division Multiple Access)双模的射频芯片，RF chip2为全球移动通信系统(GSM，Global System for Mobile communication)的射频芯片。参照图1，当多模终端工作在LTE/WCDMA模式时，RF chip1的tcxo_input_buffer，tcxo_output_buffer，AFC_DAC三个模块均打开，RF chip2的tcxo_input_buffer，tcxo_output_buffer，AFC_DAC三个模块均关闭，此时，VC-TCXO的输入控制电压由chip1的AFC_DAC提供，多模基带芯片的时钟信号由chip1的tcxo_out_buffer的输出提供。参照图2，当多模终端工作在GSM模式时，RF chip2的tcxo_input_buffer，tcxo_output_buffer，AFC_DAC三个模块均打开，RF chip1的tcxo_input_buffer，tcxo_output_buffer，AFC_DAC三个模块均关闭，此时，VC-TCXO的输入控制电压由chip2的AFC_DAC提供，多模基带芯片的时钟信号由chip2的tcxo_out_buffer的输出提供。同理，多个射频芯片类似上面的工作过程。
当进行模式切换时，比如从RF chip1的WCDMA模式切换到RF chip2的GSM模式，在切换过程中，未稳定到GSM模式时，VC-TCXO的控制电压此时是不确定的状态，如果此时开关sw1由RF chip1切换到了RF chip2，这时晶振频率可能会有很大的偏移。
模式切换完成后，VC-TCXO的控制电压输入从RF chip1切换到了RF chip2，如果此时RF chip2的AFC_DAC输出的控制电压和RF chip1的AFC_DAC输出的控制电压不同，也会导致晶振频率出现偏移。
模式切换过程中，从RF chip1切换到RF chip2会导致晶振负载的变化，从而导致晶振输出频率的变化。
下面结合附图对本发明实施例的实现进行详细阐述，所附附图仅供参考说明之用，并非用来限定本发明实施例。
图3为本发明实施例的多模终端的AFC切换方法的流程示意图，如图3所示，所述方法包括以下步骤：
步骤301：利用多模终端中第一射频芯片中的AFC_DAC输出控制电压。
本发明实施例中，多模终端包括一个多模基带芯片(Mulit-mode Baseband chip)和多个射频芯片(RF chip)以及VC-TCXO。其中，每个射频芯片均包括以下模块：digital_part、internal_clk_buffer、AFC_DAC、tcxo_input_buffer、tcxo_output_buffer。
digital_part是对RF chip接收和发射的信号进行处理转化为数字基带信号，与Mulit-mode Baseband chip进行通信。Internal_clk_buffer给digital part提供时钟信号。RF chip所有的数字信号都要在digital_part进行处理。
digital_part发送给AFC_DAC的是多比特的并行数字信号，而之前的信号通常是由Mulit-mode baseband chip发送过来的串行信号。
本发明实施例中，原始的时钟信号，即未经整形的时钟信号由 VC-TCXO生成，为保证VC-TCXO输出时钟信号的精度，由RF chip中AFC_DAC输出一控制电压至VC-TCXO。然后，将VC-TCXO生成的未经整形的时钟信号输入至RF chip中的各整形模块，例如tcxo_input_buffer、internal_clk_buffer、tcxo_output_buffer进行整形后作为时钟信号。例如，将VC-TCXO生成的未经整形的时钟信号依次输入至tcxo_input_buffer、internal_clk_buffer整形后，作为digital_part的时钟信号；将VC-TCXO生成的未经整形的时钟信号输入至tcxo_input_buffer整形后，作为AFC_DAC的时钟信号；将VC-TCXO生成的未经整形的时钟信号依次输入至tcxo_input_buffer、tcxo_output_buffer整形后，作为Mulit-mode Baseband chip的时钟信号。
上述方案中，tcxo_input_buffer接收的是未经整形的时钟信号，可以是正弦波信号，也可以是方波信号，发送的是经过整形的时钟信号，通常为占空比50％的方波信号。
本发明实施例中，第一射频芯片可以是多模终端中的任意一个射频芯片，以两个射频芯片为例，参照图4、图5、图6、图7，多模终端包括Mulit-mode baseband chip、两个射频芯片RF chip1和RF chip2、VC-TCXO，第一射频芯片为RF chip1。RF chip1中的AFC_DAC输出一控制电压。
步骤302：将所输出的控制电压输入至VC-TCXO中，并生成时钟信号。
参照图4、图5、图6、图7，RF chip1中的AFC_DAC输出的控制电压输入至VC-TCXO中，VC-TCXO生成未经整形的时钟信号。
步骤303：针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号。
本发明实施例中，根据所述多模基带芯片的模式选择信号确定所述多模终端的工作模式。
本发明实施例中，针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号，具体包括：
针对多模终端的工作模式，将所生成的时钟信号输入至与所述工作模式对应的射频芯片中，经所述射频芯片整形后作为所述射频芯片的时钟信号。
参照图4，当多模终端的工作模式为LTE/WCDMA模式时，将VC-TCXO生成的时钟信号输入至RF chip1中的tcxo_input_buffer，经整形后作为AFC_DAC的时钟信号，再经internal_clk_buffer整形后，作为digital_part的时钟信号。
参照图5，当多模终端的工作模式为GSM模式时，将VC-TCXO生成的时钟信号输入至RF chip2中的tcxo_input_buffer、tcxo_output_buffer整形后，作为digital_part的时钟信号。
本发明实施例中，针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号，具体包括：
针对多模终端的工作模式，将所生成的时钟信号经所述第一射频芯片整形后输入至与所述工作模式对应的射频芯片中，经所述射频芯片整形后作为所述射频芯片的时钟信号。
参照图6，当多模终端的工作模式为LTE/WCDMA模式时，将VC-TCXO生成的时钟信号输入至RF chip1中的tcxo_input_buffer，经整形后作为AFC_DAC的时钟信号，再经internal_clk_buffer整形后，作为digital_part的时钟信号。
参照图7，当多模终端的工作模式为GSM模式时，将VC-TCXO生成的时钟信号输入至RF chip1中的tcxo_input_buffer、tcxo_output_buffer整形 后，再输入至RF chip2中的tcxo_input_buffer，经RF chip2中的internal_clk_buffer整形后，作为digital_part的时钟信号。
步骤304：将所生成的时钟信号经所述第一射频芯片整形后输入至多模基带芯片中，以作为所述多模基带芯片的时钟信号。
参照图4、图5、图6、图7，将VC-TCXO生成的时钟信号输入至RF chip1中的tcxo_input_buffer、tcxo_output_buffer整形后，作为Mulit-mode baseband chip的时钟信号。
本发明实施例的技术方案中，所述方法还包括：关闭射频芯片中未工作的整形电路。具体地，参照图4，关闭RF chip2中未工作的tcxo_output_buffer、AFC_DAC、tcxo_input_buffer；参照图5，关闭RF chip2中未工作的tcxo_output_buffer、AFC_DAC；参照图6，关闭RF chip2中未工作的tcxo_output_buffer、AFC_DAC、tcxo_input_buffer；参照图7，关闭RF chip2中未工作的tcxo_output_buffer、AFC_DAC。
本发明实施例的技术方案中，当多模终端进行模式切换时，只采用多模终端中其中一个射频芯片的AFC_DAC输出控制电压，其他射频芯片的AFC_DAC始终处于关闭状态，保证了在模式切换时，输入至VC-TCXO中的控制电压不变，负载不变，从而避免了VC-TCXO输出的时钟信号，即晶振频率发生偏移，无需重新校准VC-TCXO的晶振频率，从而减少了AFC的校准时间。本发明实施例的技术方案，采用单片射频芯片的输出时钟，提供给其它的射频芯片，同时关掉其他射频芯片未工作的整形电路，节省了多模终端的功耗。
图8为本发明实施例的多模终端的结构组成示意图，本发明实施例的多模终端具有一个Mulit-mode Baseband chip和多个RF chip以及VC-TCXO。其中，每个射频芯片均包括以下模块：digital_part、internal_clk_buffer、AFC_DAC、tcxo_input_buffer、tcxo_output_buffer。如 图8所示，所述多模终端包括：
输出单元81，配置为利用多模终端中第一射频芯片中的AFC_DAC输出控制电压；
输入单元82，配置为将所输出的控制电压输入至VC-TCXO中，并生成时钟信号；
时钟单元83，配置为针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号；将所生成的时钟信号经所述第一射频芯片整形后输入至多模基带芯片中，以作为所述多模基带芯片的时钟信号。
在本发明一优选实施方式中，所述时钟单元83包括：
第一输入子单元831，配置为针对多模终端的工作模式，将所生成的时钟信号输入至与所述工作模式对应的射频芯片中；
第二整形子单元832，配置为将所述时钟信号经所述射频芯片整形后作为所述射频芯片的时钟信号。
在本发明另一优选实施方式中，所述时钟单元83包括：
第一输入子单元831，配置为针对多模终端的工作模式，将所生成的时钟信号经所述第一射频芯片整形后输入至与所述工作模式对应的射频芯片中；
第二整形子单元832，配置为将整形后的所述时钟信号经所述射频芯片整形后作为所述射频芯片的时钟信号。
在一实施方式中，所述多模终端还包括：
控制单元84，配置为关闭射频芯片中未工作的整形电路。
在一实施方式中，所述多模终端还包括：
确定单元85，配置为根据所述多模基带芯片的模式选择信号确定所述多模终端的工作模式。
在实际应用中，所述多模终端中的各个单元所实现的功能，均可由位于终端中的中央处理器(Central Processing Unit，CPU)、微处理器(Micro Processor Unit，MPU)、数字信号处理器(Digital Signal Processor，DSP)、或现场可编程门阵列(Field Programmable Gate Array，FPGA)等实现。
本领域技术人员应当理解，图8所示的多模终端中的各单元及其子单元的实现功能可参照前述多模终端的AFC切换方法的相关描述而理解。图8所示的多模终端中的各单元及其子单元的功能可通过运行于处理器上的程序而实现，也可通过具体的逻辑电路而实现。
本发明实施例上述业务信令跟踪的装置如果以软件功能模块的形式实现并作为独立的产品销售或使用时，也可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明实施例的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机、服务器、或者网络设备等)执行本发明各个实施例所述方法的全部或部分。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read Only Memory)、磁碟或者光盘等各种可以存储程序代码的介质。这样，本发明实施例不限制于任何特定的硬件和软件结合。
相应地，本发明实施例还提供一种计算机存储介质，其中存储有计算机程序，该计算机程序用于执行本发明实施例的多模终端的AFC切换方法。
在本申请所提供的几个实施例中，应该理解到，所揭露的设备和方法，可以通过其它的方式实现。以上所描述的设备实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，如：多个单元或组件可以结合，或可以集成到另一个系统，或一些特征可以忽略，或不执行。另外，所显示或讨论的各组成部分相互之间的耦合、或直接耦合、或通信连接可以是通过一些接口，设备或单元 的间接耦合或通信连接，可以是电性的、机械的或其它形式的。
上述作为分离部件说明的单元可以是、或也可以不是物理上分开的，作为单元显示的部件可以是、或也可以不是物理单元，即可以位于一个地方，也可以分布到多个网络单元上；可以根据实际的需要选择其中的部分或全部单元来实现本实施例方案的目的。
另外，在本发明各实施例中的各功能单元可以全部集成在一个处理单元中，也可以是各单元分别单独作为一个单元，也可以两个或两个以上单元集成在一个单元中；上述集成的单元既可以采用硬件的形式实现，也可以采用硬件加软件功能单元的形式实现。
本领域普通技术人员可以理解：实现上述方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成，前述的程序可以存储于一计算机可读取存储介质中，该程序在执行时，执行包括上述方法实施例的步骤；而前述的存储介质包括：移动存储设备、只读存储器(ROM，Read Only Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
或者，本发明上述集成的单元如果以软件功能模块的形式实现并作为独立的产品销售或使用时，也可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明实施例的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机、服务器、或者网络设备等)执行本发明各个实施例所述方法的全部或部分。而前述的存储介质包括：移动存储设备、只读存储器(ROM，Read Only Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明 的保护范围应以所述权利要求的保护范围为准。
以上所述，仅为本发明的较佳实施例而已，并非用于限定本发明的保护范围。

Claims (11)

  1. 一种多模终端的自动频率控制AFC切换方法，所述方法包括：
    利用多模终端中第一射频芯片中的自动频率控制数字模拟转换器AFC_DAC输出控制电压；
    将所输出的控制电压输入至温补压控晶体振荡器VC-TCXO中，并生成时钟信号；
    针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号；
    将所生成的时钟信号经所述第一射频芯片整形后输入至多模基带芯片中，以作为所述多模基带芯片的时钟信号。
  2. 根据权利要求1所述的多模终端的AFC切换方法，其中，所述针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号，包括：
    针对多模终端的工作模式，将所生成的时钟信号输入至与所述工作模式对应的射频芯片中，经所述射频芯片整形后作为所述射频芯片的时钟信号。
  3. 根据权利要求1所述的多模终端的AFC切换方法，其中，所述针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号，包括：
    针对多模终端的工作模式，将所生成的时钟信号经所述第一射频芯片整形后输入至与所述工作模式对应的射频芯片中，经所述射频芯片整形后作为所述射频芯片的时钟信号。
  4. 根据权利要求1所述的多模终端的AFC切换方法，其中，所述方法还包括：
    关闭射频芯片中未工作的整形电路。
  5. 根据权利要求1至4任一项所述的多模终端的AFC切换方法，其中，所述方法还包括：
    根据所述多模基带芯片的模式选择信号确定所述多模终端的工作模式。
  6. 一种多模终端，所述多模终端包括：
    输出单元，配置为利用多模终端中第一射频芯片中的AFC_DAC输出控制电压；
    输入单元，配置为将所输出的控制电压输入至VC-TCXO中，并生成时钟信号；
    时钟单元，配置为针对多模终端的工作模式，对所生成的时钟信号进行整形并输入至与所述工作模式对应的射频芯片中，以作为所述射频芯片的时钟信号；将所生成的时钟信号经所述第一射频芯片整形后输入至多模基带芯片中，以作为所述多模基带芯片的时钟信号。
  7. 根据权利要求6所述的多模终端，其中，所述时钟单元包括：
    第一输入子单元，配置为针对多模终端的工作模式，将所生成的时钟信号输入至与所述工作模式对应的射频芯片中；
    第二整形子单元，配置为将所述时钟信号经所述射频芯片整形后作为所述射频芯片的时钟信号。
  8. 根据权利要求6所述的多模终端，其中，所述时钟单元包括：
    第一输入子单元，配置为针对多模终端的工作模式，将所生成的时钟信号经所述第一射频芯片整形后输入至与所述工作模式对应的射频芯片中；
    第二整形子单元，配置为将整形后的所述时钟信号经所述射频芯片整形后作为所述射频芯片的时钟信号。
  9. 根据权利要求6所述的多模终端，其中，所述多模终端还包括：
    控制单元，配置为关闭射频芯片中未工作的整形电路。
  10. 根据权利要求6至9任一项所述的多模终端，其中，所述多模终端还包括：
    确定单元，配置为根据所述多模基带芯片的模式选择信号确定所述多模终端的工作模式。
  11. 一种计算机存储介质，所述计算机存储介质中存储有计算机可执行指令，该计算机可执行指令配置为执行权利要求1-5任一项所述的多模终端的AFC切换方法。
PCT/CN2015/089481 2015-04-14 2015-09-11 多模终端及其自动频率控制切换方法、计算机存储介质 Ceased WO2016165271A1 (zh)

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