WO2016157813A1 - Load driving apparatus - Google Patents

Load driving apparatus Download PDF

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Publication number
WO2016157813A1
WO2016157813A1 PCT/JP2016/001618 JP2016001618W WO2016157813A1 WO 2016157813 A1 WO2016157813 A1 WO 2016157813A1 JP 2016001618 W JP2016001618 W JP 2016001618W WO 2016157813 A1 WO2016157813 A1 WO 2016157813A1
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Prior art keywords
switching device
gate
zener diode
voltage
drain
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PCT/JP2016/001618
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French (fr)
Japanese (ja)
Inventor
真一 星
安史 樋口
小山　和博
青吾 大澤
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株式会社デンソー
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Publication of WO2016157813A1 publication Critical patent/WO2016157813A1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage

Definitions

  • the present disclosure relates to a load driving apparatus that includes a switching device (semiconductor switching element) that controls power supply to a load, and controls the power supply to the load by driving the switching device with a drive circuit.
  • a switching device semiconductor switching element
  • a load driving apparatus that performs power supply to a load using a switching device.
  • a nitride semiconductor represented by gallium nitride hereinafter referred to as GaN
  • GaN gallium nitride
  • bandgap energy Eg 3.4 eV
  • electron drift velocity 2.7 ⁇ 10 7 cm / s dielectric breakdown electric field 4 .0 than ⁇ 10 6 V / cm
  • Non-Patent Document 1 a low on-resistance is realized in a GaN-HEMT (gallium nitride high electron mobility transistor), which is an element representative of a nitride semiconductor, due to the high capability of the material. It is described. Specifically, in a GaN-HEMT device having a 200V breakdown voltage as an on-resistance and breakdown voltage element limit, 1/10 of MOSFET (metal-oxide film-semiconductor field effect transistor) using Si, IGBT (insulated gate multiple) The on-resistance can be reduced to 1/3 or less of that of a port transistor.
  • MOSFET metal-oxide film-semiconductor field effect transistor
  • an L load such as an inductor element
  • a switch such as an inverter having an L load motor
  • the L load withstand capability can be obtained by using a protection diode. This is a method also used in Si-IGBT when a larger L load is used.
  • the GaN-HEMT When the GaN-HEMT is off, it functions to protect the switching device from high voltage and high energy applied to the drain.
  • the gate voltage is applied to the gate of the GaN-HEMT 100 from the drive circuit 101 via the gate resistor 102 to turn on the GaN-HEMT 100, and the L load 103 connected to the drain of the GaN-HEMT 100 is applied.
  • the circuit supplies current.
  • a Zener diode 104 is connected between the gate and drain of the GaN-HEMT 100, and a Zener diode 105 for high voltage protection is also connected between the gate and source.
  • a Zener breakdown voltage (hereinafter referred to as a break voltage) Vz, which is the operating voltage of the Zener diode 104
  • Vz Zener breakdown voltage
  • the drain voltage of the GaN-HEMT 100 passes through the Zener diode 104.
  • a current flows to the GND through the gate (see the path (1) in FIG. 7).
  • a gate voltage VG is generated by the current flowing at this time and the gate resistance 102.
  • this current exceeds a predetermined current value, the GaN-HEMT 100 is turned on again, and a current flows from the L load 103 side (in FIG. 7). Route (2)).
  • the high voltage and applied energy applied to the drain are consumed by the entire chip on which the GaN-HEMT 100 or the like is formed, and it is easy to ensure a high energy resistance.
  • the break voltage Vz of the Zener diode 104 between the gate and the drain becomes the drain clamp voltage.
  • the current value of the current flowing through the path (1) and the gate voltage VG at that time change depending on the resistance value of the gate resistor 102 that determines the circuit speed. There is no sex. Further, when the resistance of the gate resistor 102 is reduced in order to increase the circuit speed, a current value for setting the gate voltage VG to turn on the GaN-HEMT 100 is required, and the capacity of the Zener diode 104 is increased. An increase in the capacitance of the Zener diode 104 causes an increase in chip area if the Zener diode 104 is built in the same chip as the GaN-HEMT 100. Further, if the Zener diode 104 is an external Zener diode that is externally attached to the chip on which the GaN-HEMT 100 is formed, the same Zener diode cannot be used and lacks versatility. In any case, the cost increases.
  • An object of the present disclosure is to provide a load driving device including a switching device capable of ensuring a withstand capability corresponding to various gate resistances, and applying a gate voltage from a driving circuit to the gate via the gate resistance.
  • the load driving device includes a semiconductor switching element configured to supply a current to the load by causing a current to flow between the drain and the source by applying a gate voltage to the gate.
  • a driving circuit for applying a voltage, and when a gate voltage exceeds a predetermined threshold voltage, a current flows between the drain and the source, and the drain and the source are connected between the gate and the drain of the first switching device.
  • a second switching device constituted by a semiconductor switching element, and the second switching device And a Zener diode connected between the drain - a second gate resistor connected to the gate, the gate of the second switching device.
  • the second switching device is arranged between the gate and drain of the first switching device. Further, a Zener diode is disposed between the gate and the drain of the second switching device, and a second gate resistor is connected to the gate. With this configuration, the second switching device can be operated based on the break voltage of the Zener diode, the resistance value of the second gate resistor, and the current flowing through the Zener diode and the second gate resistor. Since a high operating current can be obtained by turning on the second switching device, the first switching device can be turned on without increasing the capacity of the Zener diode.
  • the resistance value of the first gate resistor changes variously, it is possible to ensure the withstand capability correspondingly. Furthermore, since the range of the resistance value of the first gate resistor can be expanded, even if the resistance value of the first gate resistor is lowered to increase the circuit speed, the capacitance of the Zener diode is not increased. It is possible to secure the tolerance. Therefore, if the Zener diode is built in the same chip as the first switching device or the like, an increase in the chip area can be suppressed, and when an external Zener diode is used, the same can be used to increase versatility. Is possible.
  • FIG. 1 is a diagram illustrating a circuit configuration of the load driving device according to the first embodiment of the present disclosure.
  • FIG. 2 is a diagram illustrating a circuit configuration of the load driving device according to the second embodiment of the present disclosure.
  • FIG. 3 is a diagram illustrating an example of a mounting structure of each unit constituting the load driving device described in the third embodiment of the present disclosure.
  • FIG. 4 is a diagram illustrating an example of a mounting structure of each unit included in the load driving device described in the fourth embodiment of the present disclosure.
  • FIG. 1 is a diagram illustrating a circuit configuration of the load driving device according to the first embodiment of the present disclosure.
  • FIG. 2 is a diagram illustrating a circuit configuration of the load driving device according to the second embodiment of the present disclosure.
  • FIG. 3 is a diagram illustrating an example of a mounting structure of each unit constituting the load driving device described in the third embodiment of the present disclosure.
  • FIG. 4 is a diagram illustrating an example of a mounting structure of each unit included in the load
  • FIG. 5 is a diagram illustrating an example of a mounting structure of each part constituting the load driving device described in the fifth embodiment of the present disclosure.
  • FIG. 6 is a diagram illustrating an example of a mounting structure of each unit included in the load driving device described in the sixth embodiment of the present disclosure.
  • FIG. 7 is a diagram showing a circuit configuration of a conventional load driving device.
  • the load driving device shown in FIG. 1 includes a first switching device 2 connected to a load 1, a drive circuit 3 that supplies power to the load 1 by turning on the first switching device 2, and the like.
  • the load 1 may be any device as long as it is driven by turning on and off the power supply.
  • an inverter is configured by providing a plurality of first switching devices 2, a three-phase motor or the like is provided.
  • a power source (not shown) is provided on the opposite side of the first switching device 2 across the load 1, and when the first switching device 2 is turned on, a current path from the power source to GND is established. Conducted, current is supplied to the load 1.
  • the first switching device 2 is configured by a semiconductor switching element such as a GaN-HEMT, IGBT, or power MOSFET.
  • a semiconductor switching element such as a GaN-HEMT, IGBT, or power MOSFET.
  • the drain terminal D1 of the first switching device 2 is connected to the load 1, and the source terminal S1 is grounded to GND.
  • the source terminal S1 side is set as a reference potential point and may be set to another potential.
  • the gate G1 of the first switching device 2 is connected to the drive circuit 3 via the first gate resistor 4, and the gate voltage output from the drive circuit 3 is connected to the first switching device via the first gate resistor 4. 2 is applied to the second gate G1.
  • a second switching device 5 serving as another switching device is disposed together with a Zener diode 6 and a second gate resistor 7.
  • the source terminal S2 of the second switching device 5 is connected to the gate G1 of the first switching device 2, and the drain terminals D1 and D2 of the first switching device 2 and the second switching device 5 are connected to each other.
  • the size of the second switching device 5 is made smaller. More specifically, when the gate width of the first switching device 2 is Wg1, and the gate width of the second switching device 5 is Wg2, the relationship between the first and second switching devices 2, 5 is such that Wg1> Wg2. Dimensional design is made.
  • the zener diode 6 is connected between the gate and drain of the second switching device 5.
  • the Zener diode 6 is configured by, for example, arranging a plurality of p-type and n-type doped polysilicon in multiple stages.
  • the Zener diode 6 is a voltage equal to or higher than the break voltage Vz with a predetermined Zener breakdown voltage as the break voltage Vz from the drain side of the second switching device 5 to the direction of the second gate resistor 7 and in the opposite direction. When it is applied, current flows.
  • the break voltage Vz of the Zener diode 6 is set lower than the withstand voltages VB1 and VB2. Therefore, before the first and second switching devices 2 and 5 are destroyed, the break voltage Vz of the Zener diode 6 is reached and the Zener diode 6 is made conductive.
  • the second gate resistor 7 is connected to the gate of the second switching device 5.
  • the second gate resistor 7 has a side opposite to the side connected to the gate G ⁇ b> 2 of the second switching device 5. GND is grounded.
  • the Zener diode 8 provided between the gate and the source of the first switching device 2 is a high voltage protection Zener diode.
  • the Zener diode 8 is turned on when the gate-source voltage of the first switching device 2 is going to be a high voltage, thereby preventing the first switching device 2 from exceeding a predetermined voltage. It is designed to be protected.
  • the load driving device according to the present embodiment is configured. Next, the operation of the load driving device according to the present embodiment configured as described above will be described.
  • the first switching device 2 is turned on by applying, for example, a pulsed gate voltage (for example, 20 V) from the drive circuit 3.
  • a pulsed gate voltage for example, 20 V
  • the drain-source of the first switching device 2 becomes conductive, and the current path through which the current I flows to the GND through the load 1 is made conductive based on the current supply from the power source (not shown).
  • the power source not shown
  • the first switching device 2 is turned off.
  • the drain voltages of the first and second switching devices 2 and 5 are increased by the L load energy of the load 1.
  • the Zener diode 6 is turned on. For this reason, a current flows from the drain of the second switching device 5 to the GND through the Zener diode 6 through the gate and the second gate resistor 7 (see the path (1) in FIG. 1). The current value of the current flowing at this time is determined by the Zener diode 6 and the second gate resistor 7.
  • the second switching device 5 is turned on and the driving capability is high, and a large amount of current can flow between the drain and source of the second switching device 5.
  • the electric current (henceforth operating current) which can be sent through the gate of the 1st switching device 2 and the 1st gate resistance 4 side can be increased.
  • the Zener diode 6 provided in the circuit configuration of the present embodiment has the same width as that of a Zener diode having a conventional structure, the operating current can be increased by one digit or more.
  • the first switching device 2 can be turned on and the L load energy can be released. Is possible.
  • the resistance value of the first gate resistor 4 may be reduced to 1/10 compared with the conventional circuit configuration, the resistance value range of the first gate resistor 4 is compared with the conventional circuit configuration. Can be increased 10 times. Therefore, even if the resistance value of the first gate resistor 4 changes variously, it is possible to ensure the withstand amount correspondingly.
  • the second switching device 5 is arranged between the gate and the drain of the first switching device 2. Further, a Zener diode 6 is disposed between the gate and drain of the second switching device 5, and a second gate resistor 7 is connected to the gate. With this configuration, the second switching device 5 is operated based on the break voltage Vz of the Zener diode 6, the resistance value of the second gate resistor 7, and the current flowing through the Zener diode 6 and the second gate resistor 7. It is done. Since a high operating current can be obtained by turning on the second switching device 5, the first switching device 5 can be turned on without increasing the capacity of the Zener diode 6.
  • the resistance value of the first gate resistor 4 changes variously, it is possible to ensure the withstand capability correspondingly. Further, since the range of the resistance value of the first gate resistor 4 can be expanded, even if the resistance value of the first gate resistor 4 is lowered to increase the circuit speed, the capacitance of the Zener diode 6 is increased. Without having to do so, it is possible to ensure the tolerance. Therefore, if the Zener diode 6 is built in the same chip as the first switching device 2 or the like, an increase in the chip area can be suppressed. It becomes possible to raise.
  • the resistance value Rg1 of the first gate resistor 4 is 100 ⁇
  • an operating current of 50 mA is required to raise the gate voltage G1 to 5V.
  • the operating current generated when the break voltage Vz is applied to the Zener diode is 50 mA
  • the Zener diode is composed of polysilicon having a thickness of 250 nm, a width of 100 mm or more is required. .
  • the area where the polysilicon is installed becomes a factor for increasing the chip area.
  • the width of the polysilicon to be formed can be 1/100 of the conventional structure, that is, 1 mm. Therefore, in the case of the structure of this embodiment, if the Zener diode 6 is built in the same chip as the first switching device 2 or the like, an increase in the chip area can be suppressed. It can be used and versatility can be improved.
  • connection destination of the second gate resistor 7 is changed with respect to the first embodiment, and the other parts are the same as those in the first embodiment. Therefore, only the parts different from the first embodiment will be described. To do.
  • the load driving device according to the present embodiment is the same as the first embodiment in terms of the basic circuit configuration.
  • the side of the second gate resistor 7 opposite to the side connected to the gate of the second switching device 5 is connected between the gate of the first switching device 2 and the first gate resistor 4.
  • the second switching device 5 when the first switching device 2 is turned on, the second switching device 5 remains off because the potential between the gate and the source in the second switching device 5 is the same. It becomes. For this reason, the second switching device 5, the Zener diode 6 and the second gate resistor 7 do not particularly act, and the drive circuit 3 can control the first switching device 2 via the first gate resistor 4.
  • the drain voltages of the first and second switching devices 2 and 5 are increased by the L load energy of the load 1. .
  • the Zener diode 6 is turned on. Therefore, a current flows through the Zener diode 6 from the drain of the second switching device 5 to the gate, and further through the second gate resistor 7 and the first gate resistor 4 (see the route (1) in FIG. 2). Thereby, the same operation as in the first embodiment is performed, and it becomes possible to release L load energy.
  • the gate voltage applied from the drive circuit 3 to the first switching device 2 can be a negative voltage as well as a positive voltage.
  • the gate voltage can be controlled to ⁇ 20V. That is, since the Zener diode 6 is provided between the load 1 and the connection point between the gate of the first switching device 2 and the first gate resistor 4, the gate voltage of the first switching device 2 becomes a negative voltage. However, no current flows to the load 1 side due to the Zener diode 6. In this way, by making the gate voltage applied to the first switching device 2 not only a positive voltage but also a negative voltage, it is possible to increase the speed at the turn-off time and to reduce the switching loss. Is possible.
  • the first switching device 2, the second switching device 5, the Zener diode 6, and the like are all discrete elements (external elements). 10 is mounted. Thus, for example, all elements can be assembled as discrete elements.
  • the first switching device 2 and the second switching device 5 are configured on the same chip, and the Zener diode 6 is printed as a discrete element. It can also be configured by mounting on the substrate 10. Thus, for example, not all elements are discrete elements, but some elements can be assembled as discrete elements.
  • first and second switching devices 2 and 5 are formed on the same chip, these may be formed by lateral elements, for example, by LDMOS (Laterally Diffused Metal Oxide Semiconductor) or lateral GaN-HEMT.
  • LDMOS Laterally Diffused Metal Oxide Semiconductor
  • GaN-HEMT lateral GaN-HEMT
  • the second gate resistor 7 and the Zener diode 6 are also formed on the same chip. It is composed. Although not shown, only the first gate resistor 4 is a discrete element. Such a configuration can also be adopted.
  • the first and second switching devices 2 and 5 are configured by horizontal elements.
  • the second gate resistor 7 is constituted by a diffusion resistor formed on the semiconductor substrate constituting the chip, a metal resistor formed on the surface side of the semiconductor substrate via an insulating film or the like.
  • the Zener diode 6 is configured by arranging a plurality of p-type and n-type doped polysilicon in multiple stages through an insulating film or the like on the surface side of the semiconductor substrate constituting the chip.
  • the second gate resistor 7 and the Zener diode 6 may be configured by the same chip.
  • the second gate resistor 7 is also provided in the same chip, it is particularly preferable when the second gate resistor 7 is connected to the gate of the first switching device 2 as in the second embodiment. That is, when the second gate resistor 7 is connected to the gate of the first switching device 2, if the second gate resistor 7 is also connected to the external terminal connected to the gate of the first switching device 2, the second gate resistor 7. It is not necessary to provide an external terminal connected only to the terminal. Therefore, the number of external terminals can be reduced.
  • the Zener diode 6 when the Zener diode 6 is built in the same chip as the first and second switching devices 2 and 5 and the like, the withstand capability can be ensured without increasing the capacity of the Zener diode 6, and thus the increase in the chip area is suppressed. it can.
  • Such a configuration is particularly effective when the first and second switching devices 2 and 5 are configured by GaN-HEMTs that do not have an L load withstand capability. Even when GaN-HEMT is used, the withstand capability is ensured. However, an increase in chip area can be suppressed.
  • the first and second gate resistors 4 and 7 and the Zener diode 6 are used. All of these are composed of the same chip. Such a configuration can also be adopted.
  • the configuration can basically be the same as that of the fifth embodiment.
  • the first and second switching devices 2 and 5 are configured by horizontal elements.
  • the first gate resistor 4 may be constituted by a diffused resistor formed on the semiconductor substrate constituting the chip or a metal resistor formed on the surface side of the semiconductor substrate via an insulating film or the like.
  • all of the first and second gate resistors 4 and 7 and the Zener diode 6 may be configured on the same chip. Also in this case, since the second gate resistor 7 is provided in the same chip, the same effect as in the fifth embodiment can be obtained.
  • the numerical value of the gate voltage applied by the drive circuit 3 is an example, and may be appropriately determined based on the threshold voltage of the first switching device 2 or the like.
  • the three-phase motor etc. were mentioned as an example as an example of the load 1, another thing may be used.
  • 1 and 2 show the most simplified circuit configuration of the load driving device according to the first and second embodiments. However, other elements may be arranged in the circuit. .

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Abstract

Provided is a load driving apparatus having: a first switching device (2) for supplying current to a load (1); a first gate resistor (4) which is connected to the gate of the first switching device; a drive circuit (3) which is connected to the first gate resistor at the side thereof opposite from the side connected to the gate of the first switching device, and which applies a gate voltage; a second switching device (5) which permits current to flow between the drain and the source thereof when the gate voltage exceeds a voltage of a prescribed threshold value, such drain and source being connected between the gate and the drain of the first switching device; a second gate resistor (7) which is connected to the gate of the second switching device; and a zener diode (6) which is connected between the gate and the drain of the second switching device.

Description

負荷駆動装置Load drive device 関連出願の相互参照Cross-reference of related applications
　本出願は、２０１５年４月３日に出願された日本特許出願番号２０１５－７６８５９号に基づくもので、ここにその記載内容を援用する。 This application is based on Japanese Patent Application No. 2015-76859 filed on April 3, 2015, the contents of which are incorporated herein by reference.
　本開示は、負荷への電力供給を制御するスイッチングデバイス（半導体スイッチング素子）を有し、このスイッチングデバイスを駆動回路によって駆動することで負荷への電力供給を制御する負荷駆動装置に関するものである。 The present disclosure relates to a load driving apparatus that includes a switching device (semiconductor switching element) that controls power supply to a load, and controls the power supply to the load by driving the switching device with a drive circuit.
　従来より、負荷への電力供給をスイッチングデバイスを用いて行う負荷駆動装置が知られている。特に、窒化ガリウム（以下、ＧａＮという）に代表される窒化物半導体は、その物性値（バンドギャップエネルギーＥｇ＝３．４ｅＶ、電子のドリフト速度２．７×１０7ｃｍ／ｓ、絶縁破壊電界４．０×１０6Ｖ／ｃｍ）より、パワー系のスイッチングデバイスに適している。 2. Description of the Related Art Conventionally, a load driving apparatus that performs power supply to a load using a switching device is known. In particular, a nitride semiconductor represented by gallium nitride (hereinafter referred to as GaN) has physical properties (bandgap energy Eg = 3.4 eV, electron drift velocity 2.7 × 10 7 cm / s, dielectric breakdown electric field 4 .0 than × 10 6 V / cm), it is suitable for switching devices of the power system.
　例えば、非特許文献１において、その素材のもつ能力の高さから、窒化物半導体を代表する素子であるＧａＮ－ＨＥＭＴ（窒化ガリウム高電子移動度トランジスタ）において、低オン抵抗化が実現されていることが記載されている。具体的には、オン抵抗、耐圧の素子リミットとして、２００Ｖ耐圧をもつＧａＮ－ＨＥＭＴデバイスにおいて、Ｓｉを用いたＭＯＳＦＥＴ（金属―酸化膜―半導体電界効果トランジスタ）の１／１０、ＩＧＢＴ（絶縁ゲート倍ポートトランジスタ）の１／３以下の低オン抵抗化が実現されている。 For example, in Non-Patent Document 1, a low on-resistance is realized in a GaN-HEMT (gallium nitride high electron mobility transistor), which is an element representative of a nitride semiconductor, due to the high capability of the material. It is described. Specifically, in a GaN-HEMT device having a 200V breakdown voltage as an on-resistance and breakdown voltage element limit, 1/10 of MOSFET (metal-oxide film-semiconductor field effect transistor) using Si, IGBT (insulated gate multiple) The on-resistance can be reduced to 1/3 or less of that of a port transistor.
　しかしながら、半導体スイッチング素子、特にＧａＮ－ＨＥＭＴを例えばインダクタ素子などの誘導負荷（以下、Ｌ負荷という）のある電源や、Ｌ負荷モータを有するインバータ等のスイッチとして適用する場合、Ｌ負荷耐量が無いという問題がある。このため、保護ダイオードを用いてＬ負荷耐量を得られるようにしている。これは、より大きなＬ負荷が用いられる場合に、Ｓｉ－ＩＧＢＴでも使われている方法である。 However, when a semiconductor switching element, particularly GaN-HEMT, is applied as a power source having an inductive load (hereinafter referred to as an L load) such as an inductor element, or a switch such as an inverter having an L load motor, it is said that there is no L load tolerance. There's a problem. For this reason, the L load withstand capability can be obtained by using a protection diode. This is a method also used in Si-IGBT when a larger L load is used.
　上記した保護ダイオードを用いる形態をＧａＮ－ＨＥＭＴに応用する場合のクランプ動作について、図７に示す負荷駆動装置の回路構成を参照して説明する。これは、ノーマリオフ型のＧａＮ－ＨＥＭＴがオフ、つまりゲート電圧ＶＧ＝０Ｖのときの動作である。ＧａＮ－ＨＥＭＴがオフの際に、ドレインに印加される高電圧、高エネルギーから、スイッチングデバイスを保護する機能を発揮する。 A clamp operation when the above-described embodiment using the protection diode is applied to a GaN-HEMT will be described with reference to the circuit configuration of the load driving device shown in FIG. This is an operation when the normally-off GaN-HEMT is off, that is, when the gate voltage VG = 0V. When the GaN-HEMT is off, it functions to protect the switching device from high voltage and high energy applied to the drain.
　図７に示すように、ＧａＮ－ＨＥＭＴ１００のゲートに駆動回路１０１からゲート抵抗１０２を介してゲート電圧を印加することでＧａＮ－ＨＥＭＴ１００をオンさせ、ＧａＮ－ＨＥＭＴ１００のドレインに接続されたＬ負荷１０３に電流供給を行う回路になっている。ＧａＮ－ＨＥＭＴ１００のゲート－ドレイン間にはツェナーダイオード１０４が接続され、ゲート－ソース間にも高電圧保護用のツェナーダイオード１０５が接続されている。 As shown in FIG. 7, the gate voltage is applied to the gate of the GaN-HEMT 100 from the drive circuit 101 via the gate resistor 102 to turn on the GaN-HEMT 100, and the L load 103 connected to the drain of the GaN-HEMT 100 is applied. The circuit supplies current. A Zener diode 104 is connected between the gate and drain of the GaN-HEMT 100, and a Zener diode 105 for high voltage protection is also connected between the gate and source.
　このような回路において、ＧａＮ－ＨＥＭＴ１００のドレイン電圧が、ツェナーダイオード１０４の動作電圧となるツェナー降伏電圧（以下、ブレイク電圧という）Ｖｚ以上になると、このツェナーダイオード１０４を通ってＧａＮ－ＨＥＭＴ１００のドレインからゲートを経てＧＮＤに電流が流れる（図７中の経路（１）参照）。このときに流れる電流とゲート抵抗１０２により、ゲート電圧ＶＧが発生し、この電流が所定の電流値以上になるとＧａＮ－ＨＥＭＴ１００が再びオンすることでＬ負荷１０３側から電流が流される（図７中の経路（２）参照）。 In such a circuit, when the drain voltage of the GaN-HEMT 100 becomes equal to or higher than a Zener breakdown voltage (hereinafter referred to as a break voltage) Vz, which is the operating voltage of the Zener diode 104, the drain voltage of the GaN-HEMT 100 passes through the Zener diode 104. A current flows to the GND through the gate (see the path (1) in FIG. 7). A gate voltage VG is generated by the current flowing at this time and the gate resistance 102. When this current exceeds a predetermined current value, the GaN-HEMT 100 is turned on again, and a current flows from the L load 103 side (in FIG. 7). Route (2)).
　この結果、ドレインに印加される高電圧、印加エネルギーは、ＧａＮ－ＨＥＭＴ１００などが形成されたチップ全体で消費されることとなり、高エネルギー耐量を確保し易くなる。 As a result, the high voltage and applied energy applied to the drain are consumed by the entire chip on which the GaN-HEMT 100 or the like is formed, and it is easy to ensure a high energy resistance.
　したがって、ＧａＮ－ＨＥＭＴ１００のしきい値電圧Ｖｔとゲート抵抗１０２の関係から求まる電流値のときにゲート－ドレイン間のツェナーダイオード１０４のブレイク電圧Ｖｚがドレイン・クランプ電圧となる。 Therefore, when the current value is obtained from the relationship between the threshold voltage Vt of the GaN-HEMT 100 and the gate resistance 102, the break voltage Vz of the Zener diode 104 between the gate and the drain becomes the drain clamp voltage.
　しかしながら、このような回路構成を用いたドレインに印加される高電圧、高エネルギーの耐量確保は、次に示すような問題が発生する。 However, securing the tolerance of high voltage and high energy applied to the drain using such a circuit configuration causes the following problems.
　すなわち、上記回路構成では、回路速度を決定するゲート抵抗１０２の抵抗値に依存して、経路（１）を流れる電流の電流値とそのときのゲート電圧ＶＧが変化するので、ゲート抵抗１０２に対する汎用性がない。また、回路速度を高速化するために、ゲート抵抗１０２を低抵抗化すると、ＧａＮ－ＨＥＭＴ１００をオンするゲート電圧ＶＧにするための電流値が必要になり、ツェナーダイオード１０４の容量の増大を招く。ツェナーダイオード１０４の容量の増大は、ＧａＮ－ＨＥＭＴ１００と同一チップ内にツェナーダイオード１０４を内蔵する形態ならばチップ面積の増大を招く。また、ツェナーダイオード１０４をＧａＮ－ＨＥＭＴ１００が形成されたチップに対して外付けする外付けツェナーダイオードとする形態ならば、同じツェナーダイオードを用いることができず、汎用性に欠ける。いずれにしてもコスト増大を招く。 That is, in the above circuit configuration, the current value of the current flowing through the path (1) and the gate voltage VG at that time change depending on the resistance value of the gate resistor 102 that determines the circuit speed. There is no sex. Further, when the resistance of the gate resistor 102 is reduced in order to increase the circuit speed, a current value for setting the gate voltage VG to turn on the GaN-HEMT 100 is required, and the capacity of the Zener diode 104 is increased. An increase in the capacitance of the Zener diode 104 causes an increase in chip area if the Zener diode 104 is built in the same chip as the GaN-HEMT 100. Further, if the Zener diode 104 is an external Zener diode that is externally attached to the chip on which the GaN-HEMT 100 is formed, the same Zener diode cannot be used and lacks versatility. In any case, the cost increases.
　なお、ここではスイッチングデバイスとしてＧａＮ－ＨＥＭＴ１００を用いた回路構成について説明したが、他のスイッチングデバイス、例えばＭＯＳＦＥＴやＩＧＢＴについても、同様のことが言える。 Although the circuit configuration using the GaN-HEMT 100 as a switching device has been described here, the same can be said for other switching devices such as MOSFETs and IGBTs.
　本開示は、様々なゲート抵抗に対応して耐量確保を行える、ゲートに対してゲート抵抗を介して駆動回路からのゲート電圧が印加されるスイッチングデバイスを備えた負荷駆動装置を提供することを目的とする。 An object of the present disclosure is to provide a load driving device including a switching device capable of ensuring a withstand capability corresponding to various gate resistances, and applying a gate voltage from a driving circuit to the gate via the gate resistance. And
　本開示の態様において、負荷駆動装置は、ゲートに対してゲート電圧が印加されることによりドレイン－ソース間に電流を流すことで、負荷への電流供給を行う半導体スイッチング素子にて構成された第１スイッチングデバイスと、前記第１スイッチングデバイスのゲートに接続された第１ゲート抵抗と、前記第１ゲート抵抗のうち前記第１スイッチングデバイスのゲートと接続される側と反対側に接続され、前記ゲート電圧の印加を行う駆動回路と、ゲートの電圧が所定のしきい値電圧よりも高くなるとドレイン－ソース間に電流を流すと共に、該ドレイン－ソースが前記第１スイッチングデバイスのゲート－ドレイン間に接続され、半導体スイッチング素子にて構成された第２スイッチングデバイスと、前記第２スイッチングデバイスのゲートに対して接続された第２ゲート抵抗と、前記第２スイッチングデバイスのゲート－ドレイン間に接続されたツェナーダイオードとを有している。 In the aspect of the present disclosure, the load driving device includes a semiconductor switching element configured to supply a current to the load by causing a current to flow between the drain and the source by applying a gate voltage to the gate. A switching device; a first gate resistor connected to a gate of the first switching device; and a side of the first gate resistor connected to a side opposite to a side connected to the gate of the first switching device, A driving circuit for applying a voltage, and when a gate voltage exceeds a predetermined threshold voltage, a current flows between the drain and the source, and the drain and the source are connected between the gate and the drain of the first switching device. And a second switching device constituted by a semiconductor switching element, and the second switching device And a Zener diode connected between the drain - a second gate resistor connected to the gate, the gate of the second switching device.
　このように、第１スイッチングデバイスのゲート－ドレイン間に第２スイッチングデバイスを配置している。また、第２スイッチングデバイスのゲート－ドレイン間にツェナーダイオードを配置し、ゲートに第２ゲート抵抗を接続している。このような構成とすることで、ツェナーダイオードのブレイク電圧および第２ゲート抵抗の抵抗値とツェナーダイオードおよび第２ゲート抵抗に流れる電流に基づいて、第２スイッチングデバイスを動作させられる。そして、第２スイッチングデバイスをオンさせることで高い動作電流を得ることができることから、ツェナーダイオードの容量を増大させなくても、第１スイッチングデバイスをオンさせられる。 In this way, the second switching device is arranged between the gate and drain of the first switching device. Further, a Zener diode is disposed between the gate and the drain of the second switching device, and a second gate resistor is connected to the gate. With this configuration, the second switching device can be operated based on the break voltage of the Zener diode, the resistance value of the second gate resistor, and the current flowing through the Zener diode and the second gate resistor. Since a high operating current can be obtained by turning on the second switching device, the first switching device can be turned on without increasing the capacity of the Zener diode.
　したがって、第１ゲート抵抗の抵抗値が様々に変化したとしても、それに対応して耐量確保を行うことが可能となる。さらに、第１ゲート抵抗の抵抗値のレンジを広げられることから、回路速度の高速化のために第１ゲート抵抗の抵抗値を低抵抗化したとしても、ツェナーダイオードの容量を増大させることなく、耐量確保が行える。したがって、ツェナーダイオードを第１スイッチングデバイスなどと同一チップに内蔵する場合であればチップ面積増大を抑制できるし、外付けツェナーダイオードとする場合には同じものを用いることができて汎用性を高めることが可能となる。 Therefore, even if the resistance value of the first gate resistor changes variously, it is possible to ensure the withstand capability correspondingly. Furthermore, since the range of the resistance value of the first gate resistor can be expanded, even if the resistance value of the first gate resistor is lowered to increase the circuit speed, the capacitance of the Zener diode is not increased. It is possible to secure the tolerance. Therefore, if the Zener diode is built in the same chip as the first switching device or the like, an increase in the chip area can be suppressed, and when an external Zener diode is used, the same can be used to increase versatility. Is possible.
　本開示についての上記目的およびその他の目的、特徴や利点は、添付の図面を参照しながら下記の詳細な記述により、より明確になる。その図面は、
図１は、本開示の第１実施形態にかかる負荷駆動装置の回路構成を示した図であり、 図２は、本開示の第２実施形態にかかる負荷駆動装置の回路構成を示した図であり、 図３は、本開示の第３実施形態で説明する負荷駆動装置を構成する各部の実装構造の一例を示した図であり、 図４は、本開示の第４実施形態で説明する負荷駆動装置を構成する各部の実装構造の一例を示した図であり、 図５は、本開示の第５実施形態で説明する負荷駆動装置を構成する各部の実装構造の一例を示した図であり、 図６は、本開示の第６実施形態で説明する負荷駆動装置を構成する各部の実装構造の一例を示した図であり、 図７は、従来の負荷駆動装置の回路構成を示した図である。 The above and other objects, features, and advantages of the present disclosure will become more apparent from the following detailed description with reference to the accompanying drawings. The drawing
FIG. 1 is a diagram illustrating a circuit configuration of the load driving device according to the first embodiment of the present disclosure. FIG. 2 is a diagram illustrating a circuit configuration of the load driving device according to the second embodiment of the present disclosure. FIG. 3 is a diagram illustrating an example of a mounting structure of each unit constituting the load driving device described in the third embodiment of the present disclosure. FIG. 4 is a diagram illustrating an example of a mounting structure of each unit included in the load driving device described in the fourth embodiment of the present disclosure. FIG. 5 is a diagram illustrating an example of a mounting structure of each part constituting the load driving device described in the fifth embodiment of the present disclosure. FIG. 6 is a diagram illustrating an example of a mounting structure of each unit included in the load driving device described in the sixth embodiment of the present disclosure. FIG. 7 is a diagram showing a circuit configuration of a conventional load driving device.
　以下、本開示の実施形態について図に基づいて説明する。なお、以下の各実施形態相互において、互いに同一もしくは均等である部分には、同一符号を付して説明を行う。 Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other will be described with the same reference numerals.
　（第１実施形態）
　本開示の第１実施形態にかかる負荷駆動装置について、図１を参照して説明する。 (First embodiment)
A load driving device according to a first embodiment of the present disclosure will be described with reference to FIG.
　図１に示す負荷駆動装置は、負荷１に接続された第１スイッチングデバイス２と、第１スイッチングデバイス２をオンすることにより負荷１への電力供給を行う駆動回路３などを有するものである。
負荷１は、電力供給のオンオフによって駆動される装置であればどのようなものであってもよく、例えば第１スイッチングデバイス２を複数個備えることでインバータを構成すれば、三相モータなどとすることもできる。例えば、本実施形態の場合、負荷１を挟んで第１スイッチングデバイス２の反対側に図示しない電源が備えられており、第１スイッチングデバイス２がオンさせられると、電源からＧＮＤへの電流経路が導通させられ、負荷１に対して電流供給が為される。 The load driving device shown in FIG. 1 includes a first switching device 2 connected to a load 1, a drive circuit 3 that supplies power to the load 1 by turning on the first switching device 2, and the like.
The load 1 may be any device as long as it is driven by turning on and off the power supply. For example, if an inverter is configured by providing a plurality of first switching devices 2, a three-phase motor or the like is provided. You can also For example, in the case of the present embodiment, a power source (not shown) is provided on the opposite side of the first switching device 2 across the load 1, and when the first switching device 2 is turned on, a current path from the power source to GND is established. Conducted, current is supplied to the load 1.
　第１スイッチングデバイス２は、ＧａＮ－ＨＥＭＴ、ＩＧＢＴもしくはパワーＭＯＳＦＥＴなどの半導体スイッチング素子によって構成される。なお、本実施形態では第１スイッチングデバイス２をＧａＮ－ＨＥＭＴで構成している場合を想定して説明する。第１スイッチングデバイス２のドレイン端子Ｄ１が負荷１に接続され、ソース端子Ｓ１がＧＮＤ接地されている。なお、ここではソース端子Ｓ１をＧＮＤ接地した場合について示してあるが、ソース端子Ｓ１側は基準電位点とされ、他の電位とされることもある。 The first switching device 2 is configured by a semiconductor switching element such as a GaN-HEMT, IGBT, or power MOSFET. In the present embodiment, the case where the first switching device 2 is composed of GaN-HEMT will be described. The drain terminal D1 of the first switching device 2 is connected to the load 1, and the source terminal S1 is grounded to GND. Here, although the case where the source terminal S1 is grounded is shown, the source terminal S1 side is set as a reference potential point and may be set to another potential.
　また、第１スイッチングデバイス２のゲートＧ１が第１ゲート抵抗４を介して駆動回路３に接続されており、駆動回路３から出力されるゲート電圧が第１ゲート抵抗４を介して第１スイッチングデバイス２のゲートＧ１に印加されるようになっている。 The gate G1 of the first switching device 2 is connected to the drive circuit 3 via the first gate resistor 4, and the gate voltage output from the drive circuit 3 is connected to the first switching device via the first gate resistor 4. 2 is applied to the second gate G1.
　さらに、第１スイッチングデバイス２のゲート－ドレイン間には、もう一つのスイッチングデバイスとなる第２スイッチングデバイス５がツェナーダイオード６および第２ゲート抵抗７と共に配置されている。 Furthermore, between the gate and drain of the first switching device 2, a second switching device 5 serving as another switching device is disposed together with a Zener diode 6 and a second gate resistor 7.
　具体的には、第１スイッチングデバイス２のゲートＧ１に対して第２スイッチングデバイス５のソース端子Ｓ２が接続され、第１スイッチングデバイス２と第２スイッチングデバイス５の各ドレイン端子Ｄ１、Ｄ２同士が接続されている。第１スイッチングデバイス２のサイズと比較して、第２スイッチングデバイス５のサイズが小さくされている。より詳しくは、第１スイッチングデバイス２のゲート幅をＷｇ１とし、第２スイッチングデバイス５のゲート幅をＷｇ２とすると、これらの関係はＷｇ１＞Ｗｇ２が成り立つように第１、第２スイッチングデバイス２、５の寸法設計が為されている。 Specifically, the source terminal S2 of the second switching device 5 is connected to the gate G1 of the first switching device 2, and the drain terminals D1 and D2 of the first switching device 2 and the second switching device 5 are connected to each other. Has been. Compared to the size of the first switching device 2, the size of the second switching device 5 is made smaller. More specifically, when the gate width of the first switching device 2 is Wg1, and the gate width of the second switching device 5 is Wg2, the relationship between the first and second switching devices 2, 5 is such that Wg1> Wg2. Dimensional design is made.
　ツェナーダイオード６は、第２スイッチングデバイス５のゲート－ドレイン間に接続されている。ツェナーダイオード６は、例えばｐ型およびｎ型にドープしたポリシリコンを複数個多段に並べることによって構成されている。ツェナーダイオード６は、第２スイッチングデバイス５のドレイン側から第２ゲート抵抗７の方向に対してもその逆方向に対しても、所定のツェナー降伏電圧をブレイク電圧Ｖｚとして、ブレイク電圧Ｖｚ以上の電圧が掛かったときに電流が流れるようになっている。そして、第１スイッチングデバイス２を耐圧ＶＢ１、第２スイッチングデバイス５の耐圧をＶＢ２とすると、ツェナーダイオード６のブレイク電圧Ｖｚは耐圧ＶＢ１、ＶＢ２よりも低く設定してある。したがって、第１、第２スイッチングデバイス２、５が破壊される前にツェナーダイオード６のブレイク電圧Ｖｚに達して、ツェナーダイオード６が導通させられるようになっている。 The zener diode 6 is connected between the gate and drain of the second switching device 5. The Zener diode 6 is configured by, for example, arranging a plurality of p-type and n-type doped polysilicon in multiple stages. The Zener diode 6 is a voltage equal to or higher than the break voltage Vz with a predetermined Zener breakdown voltage as the break voltage Vz from the drain side of the second switching device 5 to the direction of the second gate resistor 7 and in the opposite direction. When it is applied, current flows. When the first switching device 2 is set to withstand voltage VB1 and the second switching device 5 is set to withstand voltage VB2, the break voltage Vz of the Zener diode 6 is set lower than the withstand voltages VB1 and VB2. Therefore, before the first and second switching devices 2 and 5 are destroyed, the break voltage Vz of the Zener diode 6 is reached and the Zener diode 6 is made conductive.
　第２ゲート抵抗７は、第２スイッチングデバイス５のゲートに接続されており、本実施形態の場合、第２ゲート抵抗７のうち第２スイッチングデバイス５のゲートＧ２に接続される側とは反対側がＧＮＤ接地されている。 The second gate resistor 7 is connected to the gate of the second switching device 5. In this embodiment, the second gate resistor 7 has a side opposite to the side connected to the gate G <b> 2 of the second switching device 5. GND is grounded.
　なお、第１スイッチングデバイス２のゲート－ソース間に備えられたツェナーダイオード８は、高電圧保護用ツェナーダイオードである。第１スイッチングデバイス２のゲート－ソース間電圧が高電圧になろうとしたときにツェナーダイオード８が導通させられることで、これらの間が所定電圧以上になることを防止し、第１スイッチングデバイス２が保護されるようにしてある。 The Zener diode 8 provided between the gate and the source of the first switching device 2 is a high voltage protection Zener diode. The Zener diode 8 is turned on when the gate-source voltage of the first switching device 2 is going to be a high voltage, thereby preventing the first switching device 2 from exceeding a predetermined voltage. It is designed to be protected.
　以上のようにして、本実施形態にかかる負荷駆動装置が構成されている。続いて、このように構成された本実施形態にかかる負荷駆動装置の作動について説明する。 As described above, the load driving device according to the present embodiment is configured. Next, the operation of the load driving device according to the present embodiment configured as described above will be described.
　まず、駆動回路３から例えばパルス状のゲート電圧（例えば２０Ｖ）が印加されることによって第１スイッチングデバイス２がオンさせられる。これにより、第１スイッチングデバイス２のドレイン－ソース間が導通し、図示しない電源からの電流供給に基づいて負荷１を通じてＧＮＤに電流Ｉが流れる電流経路が導通させられる。これにより、負荷１に対して電流供給が為され、負荷１が駆動させられる。 First, the first switching device 2 is turned on by applying, for example, a pulsed gate voltage (for example, 20 V) from the drive circuit 3. Thereby, the drain-source of the first switching device 2 becomes conductive, and the current path through which the current I flows to the GND through the load 1 is made conductive based on the current supply from the power source (not shown). As a result, current is supplied to the load 1 and the load 1 is driven.
　一方、駆動回路３からのゲート電圧の印加が停止させられると、第１スイッチングデバイス２はオフさせられる。このとき、第１、第２スイッチングデバイス２、５のドレイン電圧が負荷１のＬ負荷エネルギーによって上昇する。そして、第１、第２スイッチングデバイス２、５のドレイン電圧がツェナーダイオード６の動作電圧となるブレイク電圧Ｖｚ以上になると、ツェナーダイオード６が導通させられる。このため、ツェナーダイオード６を通じて第２スイッチングデバイス５のドレインからゲートおよび第２ゲート抵抗７を経て、ＧＮＤに電流が流れる（図１中の経路（１）参照）。このときに流れる電流の電流値は、ツェナーダイオード６および第２ゲート抵抗７によって決まる。 On the other hand, when the application of the gate voltage from the drive circuit 3 is stopped, the first switching device 2 is turned off. At this time, the drain voltages of the first and second switching devices 2 and 5 are increased by the L load energy of the load 1. When the drain voltage of the first and second switching devices 2 and 5 becomes equal to or higher than the break voltage Vz that is the operating voltage of the Zener diode 6, the Zener diode 6 is turned on. For this reason, a current flows from the drain of the second switching device 5 to the GND through the Zener diode 6 through the gate and the second gate resistor 7 (see the path (1) in FIG. 1). The current value of the current flowing at this time is determined by the Zener diode 6 and the second gate resistor 7.
　そして、第２ゲート抵抗７に対して電流が流れることで、第２スイッチングデバイス５のゲート電圧が第２スイッチングデバイス５のしきい値電圧よりも高くなり、第２スイッチングデバイス５がオンされてドレイン－ソース間に電流が流れる（図１中の経路（２）参照）。 Then, when a current flows through the second gate resistor 7, the gate voltage of the second switching device 5 becomes higher than the threshold voltage of the second switching device 5, and the second switching device 5 is turned on and drained. -A current flows between the sources (see path (2) in Fig. 1).
　このとき、第２スイッチングデバイス５がオンされていて駆動能力が高く、第２スイッチングデバイス５のドレイン－ソース間に電流を多く流すことができる。このため、第１スイッチングデバイス２のゲートや第１ゲート抵抗４側に流せる電流（以下、動作電流という）を多くすることができる。例えば、従来の回路構成のように第１スイッチングデバイス２のゲート－ドレイン間にツェナーダイオードのみを配置する構造である場合と比較して、本実施形態のツェナーダイオード６の寸法を小さくしても、従来と同様の駆動能力を得ることができる。具体的には、本実施形態の回路構成に備えられるツェナーダイオード６の幅を従来の構造のツェナーダイオードと同じ幅とした場合を想定すると、動作電流を１桁以上高くできる。 At this time, the second switching device 5 is turned on and the driving capability is high, and a large amount of current can flow between the drain and source of the second switching device 5. For this reason, the electric current (henceforth operating current) which can be sent through the gate of the 1st switching device 2 and the 1st gate resistance 4 side can be increased. For example, as compared with a case where only the Zener diode is arranged between the gate and drain of the first switching device 2 as in the conventional circuit configuration, even if the size of the Zener diode 6 of the present embodiment is reduced, A driving ability similar to the conventional one can be obtained. Specifically, assuming that the Zener diode 6 provided in the circuit configuration of the present embodiment has the same width as that of a Zener diode having a conventional structure, the operating current can be increased by one digit or more.
　したがって、第１ゲート抵抗４については、従来の回路構成の場合と比較して１／１０の抵抗値であったとしても第１スイッチングデバイス２をオンさせることができ、Ｌ負荷エネルギーを放出させることが可能となる。また、第１ゲート抵抗４の抵抗値を従来の回路構成の場合と比較して１／１０にしても良くなることから、第１ゲート抵抗４の抵抗値のレンジを従来の回路構成と比較して１０倍に高めることが可能になる。よって、第１ゲート抵抗４の抵抗値が様々に変化したとしても、それに対応して耐量確保を行うことが可能となる。 Therefore, even if the first gate resistor 4 has a resistance value of 1/10 that of the conventional circuit configuration, the first switching device 2 can be turned on and the L load energy can be released. Is possible. In addition, since the resistance value of the first gate resistor 4 may be reduced to 1/10 compared with the conventional circuit configuration, the resistance value range of the first gate resistor 4 is compared with the conventional circuit configuration. Can be increased 10 times. Therefore, even if the resistance value of the first gate resistor 4 changes variously, it is possible to ensure the withstand amount correspondingly.
　以上説明したように、本実施形態にかかる負荷駆動装置では、第１スイッチングデバイス２のゲート－ドレイン間に第２スイッチングデバイス５を配置している。また、第２スイッチングデバイス５のゲート－ドレイン間にツェナーダイオード６を配置し、ゲートに第２ゲート抵抗７を接続している。このような構成とすることで、ツェナーダイオード６のブレイク電圧Ｖｚと第２ゲート抵抗７の抵抗値およびツェナーダイオード６および第２ゲート抵抗７に流れる電流に基づいて、第２スイッチングデバイス５を動作させられる。そして、第２スイッチングデバイス５をオンさせることで高い動作電流を得ることができることから、ツェナーダイオード６の容量を増大させなくても、第１スイッチングデバイス５をオンさせられる。 As described above, in the load driving device according to the present embodiment, the second switching device 5 is arranged between the gate and the drain of the first switching device 2. Further, a Zener diode 6 is disposed between the gate and drain of the second switching device 5, and a second gate resistor 7 is connected to the gate. With this configuration, the second switching device 5 is operated based on the break voltage Vz of the Zener diode 6, the resistance value of the second gate resistor 7, and the current flowing through the Zener diode 6 and the second gate resistor 7. It is done. Since a high operating current can be obtained by turning on the second switching device 5, the first switching device 5 can be turned on without increasing the capacity of the Zener diode 6.
　したがって、第１ゲート抵抗４の抵抗値が様々に変化したとしても、それに対応して耐量確保を行うことが可能となる。さらに、第１ゲート抵抗４の抵抗値のレンジを広げられることから、回路速度の高速化のために第１ゲート抵抗４の抵抗値を低抵抗化したとしても、ツェナーダイオード６の容量を増大させることなく、耐量確保が行える。したがって、ツェナーダイオード６を第１スイッチングデバイス２などと同一チップに内蔵する場合であればチップ面積増大を抑制できるし、外付けツェナーダイオードとする場合には同じものを用いることができて汎用性を高めることが可能となる。 Therefore, even if the resistance value of the first gate resistor 4 changes variously, it is possible to ensure the withstand capability correspondingly. Further, since the range of the resistance value of the first gate resistor 4 can be expanded, even if the resistance value of the first gate resistor 4 is lowered to increase the circuit speed, the capacitance of the Zener diode 6 is increased. Without having to do so, it is possible to ensure the tolerance. Therefore, if the Zener diode 6 is built in the same chip as the first switching device 2 or the like, an increase in the chip area can be suppressed. It becomes possible to raise.
　例えば、第１ゲート抵抗４の抵抗値Ｒｇ１＝１００Ωの場合、ゲート電圧Ｇ１を５Ｖに持ち上げるためには、５０ｍＡの動作電流を要する。従来構造において、ツェナーダイオードにブレイク電圧Ｖｚが加わっているときに発生させられる動作電流が５０ｍＡであるとする場合、例えば厚さ２５０ｎｍのポリシリコンでツェナーダイオードを構成すると１００ｍｍ以上の幅を必要とする。このポリシリコンを設置する面積がチップ面積増大要因になる。 For example, when the resistance value Rg1 of the first gate resistor 4 is 100Ω, an operating current of 50 mA is required to raise the gate voltage G1 to 5V. In the conventional structure, when the operating current generated when the break voltage Vz is applied to the Zener diode is 50 mA, for example, if the Zener diode is composed of polysilicon having a thickness of 250 nm, a width of 100 mm or more is required. . The area where the polysilicon is installed becomes a factor for increasing the chip area.
　これに対して、本実施形態の構造の場合、第２ゲート抵抗７が駆動回路３から切り離されていて第２ゲート抵抗７の抵抗値Ｒｇ２を任意に設定できる。このため、動作電流として５０ｍＡを発生させるために、ゲート幅Ｗｇ２＝２５０μｍ程度とされる第２スイッチングデバイス５を備えると共に第２ゲート抵抗７の抵抗値Ｒｇ２を１００００Ωとすれば、ツェナーダイオード６を構成するポリシリコンの幅は従来構造の１／１００、つまり１ｍｍにできる。したがって、本実施形態の構造の場合、ツェナーダイオード６を第１スイッチングデバイス２などと同一チップに内蔵する場合であればチップ面積増大を抑制できるし、外付けツェナーダイオードとする場合には同じものを用いることができて汎用性を高めることが可能となる。 On the other hand, in the case of the structure of this embodiment, the second gate resistor 7 is disconnected from the drive circuit 3, and the resistance value Rg2 of the second gate resistor 7 can be arbitrarily set. For this reason, in order to generate 50 mA as an operating current, if the second switching device 5 having a gate width Wg2 = about 250 μm is provided and the resistance value Rg2 of the second gate resistor 7 is 10000Ω, the Zener diode 6 is configured. The width of the polysilicon to be formed can be 1/100 of the conventional structure, that is, 1 mm. Therefore, in the case of the structure of this embodiment, if the Zener diode 6 is built in the same chip as the first switching device 2 or the like, an increase in the chip area can be suppressed. It can be used and versatility can be improved.
　（第２実施形態）
　本開示の第２実施形態について説明する。本実施形態は、第１実施形態に対して第２ゲート抵抗７の接続先を変更したものであり、その他については第１実施形態と同様であるため、第１実施形態と異なる部分についてのみ説明する。 (Second Embodiment)
A second embodiment of the present disclosure will be described. In this embodiment, the connection destination of the second gate resistor 7 is changed with respect to the first embodiment, and the other parts are the same as those in the first embodiment. Therefore, only the parts different from the first embodiment will be described. To do.
　図２に示すように、本実施形態にかかる負荷駆動装置は、基本的な回路構成については第１実施形態と同様である。ただし、第２ゲート抵抗７のうち第２スイッチングデバイス５のゲートに接続される側とは反対側が第１スイッチングデバイス２のゲートと第１ゲート抵抗４との間に接続されるようにしている。 As shown in FIG. 2, the load driving device according to the present embodiment is the same as the first embodiment in terms of the basic circuit configuration. However, the side of the second gate resistor 7 opposite to the side connected to the gate of the second switching device 5 is connected between the gate of the first switching device 2 and the first gate resistor 4.
　このような構成とされる場合、第１スイッチングデバイス２をオンさせるときは、第２スイッチングデバイス５におけるゲート－ソース間の電位が同じであることから、第２スイッチングデバイス５はオフの状態のままとなる。このため、第２スイッチングデバイス５やツェナーダイオード６および第２ゲート抵抗７は特に作用せず、駆動回路３は第１ゲート抵抗４を介して第１スイッチングデバイス２を制御できる。 In the case of such a configuration, when the first switching device 2 is turned on, the second switching device 5 remains off because the potential between the gate and the source in the second switching device 5 is the same. It becomes. For this reason, the second switching device 5, the Zener diode 6 and the second gate resistor 7 do not particularly act, and the drive circuit 3 can control the first switching device 2 via the first gate resistor 4.
　一方、駆動回路３からのゲート電圧の印加が停止させられて第１スイッチングデバイス２がオフさせられるときには、第１、第２スイッチングデバイス２、５のドレイン電圧が負荷１のＬ負荷エネルギーによって上昇する。そして、第１、第２スイッチングデバイス２、５のドレイン電圧がツェナーダイオード６の動作電圧となるブレイク電圧Ｖｚ以上になると、ツェナーダイオード６が導通させられる。このため、ツェナーダイオード６を通じて第２スイッチングデバイス５のドレインからゲート、さらには第２ゲート抵抗７および第１ゲート抵抗４を経て、ＧＮＤに電流が流れる（図２中の経路（１）参照）。これにより、第１実施形態と同様の動作が行われ、Ｌ負荷エネルギーを放出させることが可能となる。 On the other hand, when the application of the gate voltage from the drive circuit 3 is stopped and the first switching device 2 is turned off, the drain voltages of the first and second switching devices 2 and 5 are increased by the L load energy of the load 1. . When the drain voltage of the first and second switching devices 2 and 5 becomes equal to or higher than the break voltage Vz that is the operating voltage of the Zener diode 6, the Zener diode 6 is turned on. Therefore, a current flows through the Zener diode 6 from the drain of the second switching device 5 to the gate, and further through the second gate resistor 7 and the first gate resistor 4 (see the route (1) in FIG. 2). Thereby, the same operation as in the first embodiment is performed, and it becomes possible to release L load energy.
　このように、第２ゲート抵抗７の接続先を第１スイッチングデバイス２のゲートと第１ゲート抵抗４との間としても、第１実施形態と同様の効果を得ることができる。また、このような構成の場合、駆動回路３より第１スイッチングデバイス２に印加するゲート電圧を正電圧だけでなく負電圧とすることも可能となる。例えば、ゲート電圧を±２０Ｖに制御できる。すなわち、負荷１から第１スイッチングデバイス２のゲートと第１ゲート抵抗４との接続点までの間にツェナーダイオード６が備えられていることから、第１スイッチングデバイス２のゲート電圧が負電圧となっても、ツェナーダイオード６によって負荷１側に電流が流れない。このように、第１スイッチングデバイス２に印加するゲート電圧を正電圧だけでなく負電圧にもできるようにすることで、ターンオフ時の速度を早くすることが可能となり、スイッチング損失の低減を図ることが可能となる。 Thus, even when the connection destination of the second gate resistor 7 is between the gate of the first switching device 2 and the first gate resistor 4, the same effect as in the first embodiment can be obtained. In the case of such a configuration, the gate voltage applied from the drive circuit 3 to the first switching device 2 can be a negative voltage as well as a positive voltage. For example, the gate voltage can be controlled to ± 20V. That is, since the Zener diode 6 is provided between the load 1 and the connection point between the gate of the first switching device 2 and the first gate resistor 4, the gate voltage of the first switching device 2 becomes a negative voltage. However, no current flows to the load 1 side due to the Zener diode 6. In this way, by making the gate voltage applied to the first switching device 2 not only a positive voltage but also a negative voltage, it is possible to increase the speed at the turn-off time and to reduce the switching loss. Is possible.
　（第３実施形態）
　本実施形態では、第１、第２実施形態で説明した負荷駆動装置の実装構造について説明する。 (Third embodiment)
In the present embodiment, the mounting structure of the load driving device described in the first and second embodiments will be described.
　第１、第２実施形態で示した負荷駆動装置について、図３に示すように、第１スイッチングデバイス２と第２スイッチングデバイス５およびツェナーダイオード６などをすべてディスクリート素子（外付け素子）としてプリント基板１０上に実装することで構成している。このように、例えば、すべての素子をディスクリート素子として組むことができる。 As for the load driving apparatus shown in the first and second embodiments, as shown in FIG. 3, the first switching device 2, the second switching device 5, the Zener diode 6, and the like are all discrete elements (external elements). 10 is mounted. Thus, for example, all elements can be assembled as discrete elements.
　（第４実施形態）
　本実施形態も、第１、第２実施形態で説明した負荷駆動装置の実装構造について説明する。 (Fourth embodiment)
In this embodiment, the mounting structure of the load driving device described in the first and second embodiments will be described.
　第１、第２実施形態で示した負荷駆動装置について、図４に示すように、第１スイッチングデバイス２と第２スイッチングデバイス５とを同一チップで構成しつつ、ツェナーダイオード６をディスクリート素子としてプリント基板１０上に実装することで構成することもできる。このように、例えば、すべての素子をディスクリート素子とするのではなく、一部の素子をディスクリート素子として組むことができる。 In the load driving device shown in the first and second embodiments, as shown in FIG. 4, the first switching device 2 and the second switching device 5 are configured on the same chip, and the Zener diode 6 is printed as a discrete element. It can also be configured by mounting on the substrate 10. Thus, for example, not all elements are discrete elements, but some elements can be assembled as discrete elements.
　第１、第２スイッチングデバイス２、５を同一チップで形成する場合、これらを横型素子によって構成すれば良く、例えばＬＤＭＯＳ（Laterally Diffused Metal Oxide Semiconductor）や横型のＧａＮ－ＨＥＭＴによって構成すればよい。 When the first and second switching devices 2 and 5 are formed on the same chip, these may be formed by lateral elements, for example, by LDMOS (Laterally Diffused Metal Oxide Semiconductor) or lateral GaN-HEMT.
　（第５実施形態）
　本実施形態も、第１、第２実施形態で説明した負荷駆動装置の実装構造について説明する。 (Fifth embodiment)
In this embodiment, the mounting structure of the load driving device described in the first and second embodiments will be described.
　第１、第２実施形態で示した負荷駆動装置について、図５に示すように、第１、第２スイッチングデバイス２、５に加えて、第２ゲート抵抗７やツェナーダイオード６についても同一チップで構成している。そして、図示していないが、第１ゲート抵抗４のみをディスクリート素子としている。このような構成とすることもできる。 In the load driving device shown in the first and second embodiments, as shown in FIG. 5, in addition to the first and second switching devices 2 and 5, the second gate resistor 7 and the Zener diode 6 are also formed on the same chip. It is composed. Although not shown, only the first gate resistor 4 is a discrete element. Such a configuration can also be adopted.
　このような構成とする場合、例えば第１、第２スイッチングデバイス２、５については横型素子によって構成される。第２ゲート抵抗７については、チップを構成する半導体基板に形成される拡散抵抗や半導体基板の表面側に絶縁膜などを介して形成されるメタル抵抗などによって構成される。また、ツェナーダイオード６については、チップを構成する半導体基板の表面側に絶縁膜などを介して、ｐ型およびｎ型にドープしたポリシリコンを複数個多段に並べることによって構成される。 In the case of such a configuration, for example, the first and second switching devices 2 and 5 are configured by horizontal elements. The second gate resistor 7 is constituted by a diffusion resistor formed on the semiconductor substrate constituting the chip, a metal resistor formed on the surface side of the semiconductor substrate via an insulating film or the like. Further, the Zener diode 6 is configured by arranging a plurality of p-type and n-type doped polysilicon in multiple stages through an insulating film or the like on the surface side of the semiconductor substrate constituting the chip.
　このように、第１スイッチングデバイス２と第２スイッチングデバイス５とに加えて、第２ゲート抵抗７やツェナーダイオード６についても同一チップで構成しても良い。この場合、第２ゲート抵抗７についても同一チップに備えていることから、第２実施形態のように第２ゲート抵抗７を第１スイッチングデバイス２のゲートに接続した構成とする場合に特に好ましい。すなわち、第２ゲート抵抗７を第１スイッチングデバイス２のゲートに接続する場合、第１スイッチングデバイス２のゲートに繋がる外部端子に第２ゲート抵抗７も繋がるようにしておけば、第２ゲート抵抗７にのみに繋がる外部端子を備えなくても済む。したがって、外部端子の数を減少することが可能となる。 As described above, in addition to the first switching device 2 and the second switching device 5, the second gate resistor 7 and the Zener diode 6 may be configured by the same chip. In this case, since the second gate resistor 7 is also provided in the same chip, it is particularly preferable when the second gate resistor 7 is connected to the gate of the first switching device 2 as in the second embodiment. That is, when the second gate resistor 7 is connected to the gate of the first switching device 2, if the second gate resistor 7 is also connected to the external terminal connected to the gate of the first switching device 2, the second gate resistor 7. It is not necessary to provide an external terminal connected only to the terminal. Therefore, the number of external terminals can be reduced.
　また、ツェナーダイオード６を第１、第２スイッチングデバイス２、５などと同一チップに内蔵する場合、ツェナーダイオード６の容量を増大させなくても耐量確保が可能であることから、チップ面積増大を抑制できる。このような構成は、Ｌ負荷耐量のないＧａＮ－ＨＥＭＴによって第１、第２スイッチングデバイス２、５を構成する場合に特に有効であり、ＧａＮ－ＨＥＭＴを用いる場合であっても、耐量確保を行いつつ、チップ面積の増大を抑制することが可能となる。 Further, when the Zener diode 6 is built in the same chip as the first and second switching devices 2 and 5 and the like, the withstand capability can be ensured without increasing the capacity of the Zener diode 6, and thus the increase in the chip area is suppressed. it can. Such a configuration is particularly effective when the first and second switching devices 2 and 5 are configured by GaN-HEMTs that do not have an L load withstand capability. Even when GaN-HEMT is used, the withstand capability is ensured. However, an increase in chip area can be suppressed.
　（第６実施形態）
　本実施形態も、第１、第２実施形態で説明した負荷駆動装置の実装構造について説明する。 (Sixth embodiment)
In this embodiment, the mounting structure of the load driving device described in the first and second embodiments will be described.
　第１、第２実施形態で示した負荷駆動装置について、図６に示すように、第１、第２スイッチングデバイス２、５に加えて、第１、第２ゲート抵抗４、７やツェナーダイオード６のすべてを同一チップで構成している。このような構成とすることもできる。 In the load driving device shown in the first and second embodiments, as shown in FIG. 6, in addition to the first and second switching devices 2 and 5, the first and second gate resistors 4 and 7 and the Zener diode 6 are used. All of these are composed of the same chip. Such a configuration can also be adopted.
　このような構成とする場合、基本的には第５実施形態と同様の構成とすることができる。また、例えば第１、第２スイッチングデバイス２、５については横型素子によって構成される。第１ゲート抵抗４については、チップを構成する半導体基板に形成される拡散抵抗や半導体基板の表面側に絶縁膜などを介して形成されるメタル抵抗などによって構成すれば良い。 In the case of such a configuration, the configuration can basically be the same as that of the fifth embodiment. Further, for example, the first and second switching devices 2 and 5 are configured by horizontal elements. The first gate resistor 4 may be constituted by a diffused resistor formed on the semiconductor substrate constituting the chip or a metal resistor formed on the surface side of the semiconductor substrate via an insulating film or the like.
　このように、第１、第２スイッチングデバイス２、５に加えて、第１、第２ゲート抵抗４、７やツェナーダイオード６のすべてを同一チップで構成しても良い。この場合にも、第２ゲート抵抗７についても同一チップに備えていることから、第５実施形態と同様の効果を得ることができる。 As described above, in addition to the first and second switching devices 2 and 5, all of the first and second gate resistors 4 and 7 and the Zener diode 6 may be configured on the same chip. Also in this case, since the second gate resistor 7 is provided in the same chip, the same effect as in the fifth embodiment can be obtained.
　（他の実施形態）
　例えば、駆動回路３が印加するゲート電圧の数値などは一例であり、第１スイッチングデバイス２のしきい値電圧などに基づいて適宜決めれば良い。また、負荷１の一例として三相モータなどを例に挙げたが、他のものであっても構わない。さらに、図１および図２では、第１、第２実施形態にかかる負荷駆動装置の回路構成を最も簡素化したものを示してあるが、回路中に他の素子が配置されていても構わない。 (Other embodiments)
For example, the numerical value of the gate voltage applied by the drive circuit 3 is an example, and may be appropriately determined based on the threshold voltage of the first switching device 2 or the like. Moreover, although the three-phase motor etc. were mentioned as an example as an example of the load 1, another thing may be used. 1 and 2 show the most simplified circuit configuration of the load driving device according to the first and second embodiments. However, other elements may be arranged in the circuit. .
　本開示は、実施例に準拠して記述されたが、本開示は当該実施例や構造に限定されるものではないと理解される。本開示は、様々な変形例や均等範囲内の変形をも包含する。加えて、様々な組み合わせや形態、さらには、それらに一要素のみ、それ以上、あるいはそれ以下、を含む他の組み合わせや形態をも、本開示の範疇や思想範囲に入るものである。 Although the present disclosure has been described based on the embodiments, it is understood that the present disclosure is not limited to the embodiments and structures. The present disclosure includes various modifications and modifications within the equivalent range. In addition, various combinations and forms, as well as other combinations and forms including only one element, more or less, are within the scope and spirit of the present disclosure.

Claims (7)

  1. 　ゲートに対してゲート電圧が印加されることによりドレイン－ソース間に電流を流すことで、負荷（１）への電流供給を行う半導体スイッチング素子にて構成された第１スイッチングデバイス（２）と、
    　前記第１スイッチングデバイスのゲートに接続された第１ゲート抵抗（４）と、
    　前記第１ゲート抵抗のうち前記第１スイッチングデバイスのゲートと接続される側と反対側に接続され、前記ゲート電圧の印加を行う駆動回路（３）と、
    　ゲートの電圧が所定のしきい値電圧よりも高くなるとドレイン－ソース間に電流を流すと共に、該ドレイン－ソースが前記第１スイッチングデバイスのゲート－ドレイン間に接続され、半導体スイッチング素子にて構成された第２スイッチングデバイス（５）と、
    　前記第２スイッチングデバイスのゲートに対して接続された第２ゲート抵抗（７）と、
    　前記第２スイッチングデバイスのゲート－ドレイン間に接続されたツェナーダイオード（６）と、を有している負荷駆動装置。     A first switching device (2) composed of a semiconductor switching element for supplying a current to the load (1) by flowing a current between the drain and source by applying a gate voltage to the gate;
    A first gate resistor (4) connected to the gate of the first switching device;
    A drive circuit (3) connected to the opposite side of the first gate resistor to the side connected to the gate of the first switching device, and applying the gate voltage;
    When the gate voltage becomes higher than a predetermined threshold voltage, a current flows between the drain and the source, and the drain and the source are connected between the gate and the drain of the first switching device. A second switching device (5),
    A second gate resistor (7) connected to the gate of the second switching device;
    And a Zener diode (6) connected between the gate and drain of the second switching device.
  2. 　前記第２ゲート抵抗のうち前記第２スイッチングデバイスのゲートと接続される側と反対側は、前記第１スイッチングデバイスのゲートと前記第１ゲート抵抗との間に接続されている請求項１に記載の負荷駆動装置。 2. The side of the second gate resistor opposite to the side connected to the gate of the second switching device is connected between the gate of the first switching device and the first gate resistor. Load drive device.
  3. 　前記第１スイッチングデバイス、前記第２スイッチングデバイス、前記ツェナーダイオードは、それぞれ別々のチップに形成されている請求項１または２に記載の負荷駆動装置。 The load driving device according to claim 1 or 2, wherein the first switching device, the second switching device, and the Zener diode are formed on separate chips, respectively.
  4. 　前記第１スイッチングデバイスおよび前記第２スイッチングデバイスは横型素子によって構成されていると共に同一チップに形成されており、
    　前記ツェナーダイオードは、前記第１スイッチングデバイスおよび前記第２スイッチングデバイスが形成されたチップとは別のチップに形成されている請求項１または２に記載の負荷駆動装置。     The first switching device and the second switching device are constituted by lateral elements and formed on the same chip,
    The load driving device according to claim 1, wherein the Zener diode is formed on a chip different from a chip on which the first switching device and the second switching device are formed.
  5. 　前記第１スイッチングデバイス、前記第２スイッチングデバイス、前記ツェナーダイオードおよび前記第２ゲート抵抗が同一チップに形成されている請求項１または２に記載の負荷駆動装置。 The load driving device according to claim 1 or 2, wherein the first switching device, the second switching device, the Zener diode, and the second gate resistor are formed on the same chip.
  6. 　前記第１ゲート抵抗も、前記第１スイッチングデバイス、前記第２スイッチングデバイス、前記ツェナーダイオードおよび前記第２ゲート抵抗が形成されたチップと同一チップに形成されている請求項５に記載の負荷駆動装置。 The load driving device according to claim 5, wherein the first gate resistor is also formed on the same chip as the chip on which the first switching device, the second switching device, the Zener diode, and the second gate resistor are formed. .
  7. 　前記第１スイッチングデバイスおよび前記第２スイッチングデバイスは、ＧａＮ－ＨＥＭＴである請求項１ないし６のいずれか１つに記載の負荷駆動装置。
     
          The load driving apparatus according to claim 1, wherein the first switching device and the second switching device are GaN-HEMTs.

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JP6122542B1 (en) * 2016-12-01 2017-04-26 イサハヤ電子株式会社 Active clamp circuit
US20220302818A1 (en) * 2021-03-17 2022-09-22 Sharp Kabushiki Kaisha Semiconductor power device and switching power supply apparatus

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JP2001044291A (en) * 1999-07-26 2001-02-16 Denso Corp Protection device for semiconductor device
JP2012124565A (en) * 2010-12-06 2012-06-28 Sanken Electric Co Ltd Gate drive circuit and semiconductor device
JP2013026838A (en) * 2011-07-21 2013-02-04 Toshiba Corp Active clamp circuit

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JP2001044291A (en) * 1999-07-26 2001-02-16 Denso Corp Protection device for semiconductor device
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JP2013026838A (en) * 2011-07-21 2013-02-04 Toshiba Corp Active clamp circuit

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JP6122542B1 (en) * 2016-12-01 2017-04-26 イサハヤ電子株式会社 Active clamp circuit
JP2018093344A (en) * 2016-12-01 2018-06-14 イサハヤ電子株式会社 Active Clamp Circuit
US20220302818A1 (en) * 2021-03-17 2022-09-22 Sharp Kabushiki Kaisha Semiconductor power device and switching power supply apparatus

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