JP5630484B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device having an increased overvoltage capability.

  Of course, inductance elements such as coils are often inductive due to the presence of wiring inductance, etc., even with resistive loads. If the transistor drives such an inductive load, a back electromotive force is generated when turning off. In a load driving circuit, a switching power supply circuit, an inverter circuit, and the like, a reflux diode is provided in parallel with a transistor or a load in order to prevent generation of a counter electromotive force. However, even in this case, since a surge voltage is generated due to switching, a means for protecting the transistor from the surge voltage is required.

  Patent Document 1 discloses a protection circuit in which a Zener diode group is connected between the gate and drain of a MOSFET, and the Zener diode group breaks down when a surge voltage is applied to the drain. In order to suppress an increase in gate voltage due to breakdown, a Zener diode group is also connected between the gate and source of the MOSFET.

JP 2000-77537 A

  When a Zener diode is connected between the gate and the drain and between the gate and the source as in the protection circuit described above, parasitic capacitance is added to the gate, and the switching speed is reduced. A semiconductor device having an AlGaN / GaN junction (hereinafter referred to as a GaN-HEMT) has a much lower on-resistance than a conventional Si device and is excellent in current interruption characteristics. Application to circuits is expected.

  However, since the GaN-HEMT having a high DC transfer conductance gm has a small gate capacitance of the device itself (for example, about 1/4 of the conventional element), it is more susceptible to parasitic capacitance than the conventional semiconductor element. Since GaN-HEMT has a low gate threshold (for example, about 2V) and a low gate breakdown voltage (for example, about 5V), it is difficult to take measures to increase the gate voltage and improve the switching speed.

  Further, since a conventional Si device, for example, a MOS transistor has an avalanche resistance, even if a voltage exceeding the breakdown voltage is applied between the drain and the source, it does not fail until a certain energy is reached. On the other hand, since GaN-HEMT does not have an avalanche resistance, even a small amount cannot exceed the breakdown voltage.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor device capable of increasing a withstand voltage against a surge voltage while keeping a parasitic capacitance of a gate low and maintaining a high-speed switching performance.

  According to a first aspect of the present invention, there is provided a semiconductor device comprising: a voltage detection device configured to detect a voltage at a switching element that changes a conduction state between the second terminal and the first terminal according to a gate voltage applied between the gate terminal and the first terminal. A circuit, a switch circuit, and a control circuit are added. Here, the first terminal corresponds to a source or emitter, the second terminal corresponds to a drain or collector, and the switching element is an insulated gate semiconductor element such as a GaN-HEMT, MOSFET, or IGBT.

  The voltage detection circuit outputs a detection voltage corresponding to a voltage applied between the second terminal and the first terminal of the switching element. The switch circuit is provided in series with a gate drive line connected to the gate terminal of the switching element, and switches to a high impedance state or a low impedance state according to a control signal. The control circuit outputs a control signal for switching the switch circuit to a low impedance state when the detection voltage becomes equal to or lower than the threshold voltage. As a result, the drive signal is applied to the gate terminal through the switch circuit, and the switching element is turned on and off according to the drive signal.

  On the other hand, the control circuit outputs a control signal for switching the switch circuit to the high impedance state when the detected voltage exceeds the threshold voltage due to generation of a surge voltage or the like. As a result, the gate terminal of the switching element is cut off to be in a high impedance state, and the gate voltage thereafter is the voltage applied between the second terminal and the first terminal and the gate capacitance (for example, the gate-drain capacitance). And gate-source capacitance). When the voltage between the second terminal and the first terminal suddenly rises due to turn-off or the like, the gate voltage also rises and the switching element is self-turned on. The energy of the surge voltage is released through the switching element that is self-turned on, and the voltage between the second terminal and the first terminal of the switching element is limited to the element withstand voltage or less.

  The threshold voltage is lower than the detection voltage output from the voltage detection circuit when a voltage in a range where the voltage protection operation of the switching element is to be performed is applied between the second terminal and the first terminal of the switching element. Is set. The voltage in the range where the voltage protection operation is to be performed includes at least a voltage exceeding the withstand voltage of the switching element. Further, the threshold voltage is detected by the voltage detection circuit when a voltage in a range in which the voltage protection operation of the switching element should be unnecessary is applied between the second terminal and the first terminal of the switching element. It is set higher than the voltage. The voltage in the range where the voltage protection operation is not required is a voltage lower than the withstand voltage of the switching element and does not need to protect the switching element at all.

  According to this means, since there is no (or small) parasitic capacitance added to the gate of the switching element, it is possible to increase the resistance to surge voltage applied between the second terminal and the first terminal while maintaining high-speed switching performance. be able to.

  According to the means of claim 2, the voltage detection circuit includes a first circuit and a second circuit connected in series between the second terminal and the first terminal of the switching element with the output terminal of the detection voltage interposed therebetween. It is composed of Since the first circuit and the second circuit according to claims 3 and 4 also serve as a C snubber and an RC snubber, respectively, an effect of suppressing a surge voltage can be obtained and the number of components and a mounting space can be saved. Since the first circuit and the second circuit according to claims 5 and 6 are further provided with resistors in parallel, the voltage division ratio is easily determined, and the voltage can be detected more accurately and reliably. Since the first circuit and the second circuit according to the seventh aspect are composed of resistors, the voltage can be detected more accurately and reliably.

  The first circuit and the second circuit according to claim 8 are composed of an energization circuit that shifts to an energized state when the applied voltage exceeds a specified voltage, and therefore the detected voltage is the specified voltage of the second circuit in the energized state. Therefore, the protection operation can be performed under a stable detection voltage. According to the means of claim 9, the energizing circuit is composed of one or more semiconductor elements selected from a diode, a Zener diode, a MOS transistor and a bipolar transistor, and its forward voltage, Zener voltage, The specified voltage is constituted by a threshold voltage or a combination of the voltages. This increases the degree of freedom in generating the specified voltage.

  According to the means of claim 12, between the second terminal and the gate terminal of the switching element, the voltage between the terminals is set lower than the breakdown voltage between the second terminal and the first terminal of the switching element. A first voltage control circuit that shifts to an energized state when the specified voltage is exceeded. In the case of each of the above-described means, depending on the ratio of the gate capacitance (for example, the ratio between the gate-drain capacitance and the gate-source capacitance), even if the detection voltage exceeds the threshold voltage, the second terminal and the first terminal There is a possibility that the self-turn-on may not occur while the voltage between the voltage and the voltage rises to the device breakdown voltage. Since the first voltage control circuit is energized before reaching the element breakdown voltage, the switching element can be reliably turned on.

  The first voltage control circuit used here does not exhibit the action of escaping the energy of the surge voltage, and it is sufficient if the gate of the switching element can be driven. Therefore, a small circuit may be used and the parasitic capacitance of the gate is hardly increased. . Since the first voltage control circuit is a small circuit, it may occur that the state where the gate is driven cannot be maintained. Even in this case, the process of increasing the voltage between the second terminal and the first terminal and the process of dissipating the surge energy by driving the gate are repeated, so that it is possible to increase the withstand capability against the surge voltage while maintaining the high-speed switching performance.

  According to the means of the thirteenth and fourteenth aspects, between the gate terminal of the switching element and the first terminal, the voltage (absolute value) between the terminals is that of the gate terminal with respect to the first terminal of the switching element. A second voltage control circuit that shifts to an energized state when a specified voltage that is smaller than the withstand voltage (absolute value) in the positive and negative directions is exceeded is provided. Thereby, the gate can be protected. Further, by protecting against a negative gate voltage, it is possible to speed up turn-off using a negative drive voltage and drive a normally-on type switching element.

  According to the means of claim 15, the first and second voltage control circuits are composed of one or a plurality of semiconductor elements selected from a diode, a Zener diode, a MOS transistor and a bipolar transistor, in that order. The specified voltage is constituted by a direction voltage, a Zener voltage, a threshold voltage, or a combination of the voltages. This increases the degree of freedom in generating the specified voltage.

  According to a sixteenth aspect of the present invention, the switch circuit is composed of an N-channel MOS transistor and includes a diode that is forward in the direction reaching the gate terminal of the switching element through the gate drive line. According to this configuration, the ON drive signal can be applied to the gate terminal via the diode even when the switch circuit is switched to the high impedance state.

  According to the means of claim 17, the switching element is a GaN device. A GaN device such as a GaN-HEMT has characteristics that it has no avalanche resistance, a low gate breakdown voltage, and a small gate capacitance of the element itself. If each of the above-described means is applied to a GaN device, it is possible to increase the withstand voltage against surge voltage without substantially reducing the switching speed. As a result, a voltage exceeding the element breakdown voltage may be applied, and the GaN device can be applied even in a circuit environment that requires high-speed switching, for example, a circuit that cuts off an inductive load.

The block diagram of the load drive device which shows 1st Embodiment Waveform diagram FIG. 1 equivalent diagram showing the second embodiment FIG. 1 equivalent view showing the third embodiment FIG. 1 equivalent view showing the fourth embodiment FIG. 1 equivalent diagram showing the fifth embodiment FIG. 1 equivalent view showing the sixth embodiment FIG. 1 equivalent diagram showing a seventh embodiment FIG. 1 equivalent diagram showing the eighth embodiment FIG. 1 equivalent view showing the ninth embodiment FIG. 1 equivalent diagram showing the tenth embodiment Measured waveform diagram FIG. 1 equivalent diagram showing the eleventh embodiment FIG. 1 equivalent diagram showing the twelfth embodiment FIG. 1 equivalent view showing the thirteenth embodiment FIG. 1 equivalent diagram showing the fourteenth embodiment FIG. 1 equivalent diagram showing the fifteenth embodiment

  In each embodiment, parts that are substantially the same as the configurations of the above-described embodiments are assigned the same reference numerals, and descriptions thereof are omitted. In addition, each of the second and subsequent embodiments has basically the same operations and effects as those of the first embodiment except for the operations and effects based on the configuration unique to each of the embodiments.

(First embodiment)
Hereinafter, a first embodiment will be described with reference to FIGS. 1 and 2. The load driving device 1 (corresponding to a semiconductor device) is used in, for example, an electronic control device mounted on a vehicle, and performs an on / off operation according to a driving signal input from an external circuit (not shown). A current is passed through the coil 2 that is an inductive load that is supplied with the battery voltage VB. The load driving device 1 includes an element module 3 and a driving IC 4.

  The element module 3 is configured by molding an N-channel type FET 5 and a voltage detection circuit 6 in one package. The FET 5 conducts between the drain terminal D (corresponding to the second terminal) and the source terminal S according to the gate voltage VGS applied between the gate terminal G and the source terminal S (corresponding to the first terminal). It is a switching element such as a MOSFET or GaN-HEMT that changes the state. An IGBT may be used instead of the FET. A parasitic diode 5 a is formed in the FET 5.

  The voltage detection circuit 6 includes capacitors C1 and C2 (corresponding to a first circuit and a second circuit) connected in series with an output terminal n1 between the drain and source of the FET 5. These capacitors C1 and C2 output a detection voltage obtained by dividing the voltage applied between the drain and source of the FET 5 and function as a C snubber. The capacitance value of the capacitor C1 is smaller than the capacitance value of the capacitor C2, and is set to a ratio of about C1: C2 = 1: (5 to 500), for example.

  The drive IC 4 includes a drive circuit 7, a switch circuit 8, and a control circuit 9. The drive circuit 7 outputs a gate drive signal (hereinafter simply referred to as a drive signal) for the FET 5 in accordance with a drive signal input from an external circuit such as a microcomputer. The switch circuit 8 includes an N-channel MOSFET 11 provided in series with a gate drive line 10 connected to the gate of the FET 5. In the MOSFET 11, a parasitic diode 11 a is formed in the forward direction in the direction reaching the gate of the FET 5 through the gate drive line 10.

  The control circuit 9 is composed of a P-channel type MOSFET 13 and an N-channel type MOSFET 14 that are inverter-connected with an output terminal n2 between terminals of a power source 12. Parasitic diodes 13a and 14a are formed in the MOSFETs 13 and 14, respectively. The element size of the MOSFETs 13 and 14 may be an element size sufficient to drive the MOSFET 11, and a small element size is sufficient.

  The gates of the MOSFETs 13 and 14 are connected to the output terminal n 1 of the voltage detection circuit 6. The output terminal n2 is connected to the gate of the MOSFET 11 and supplies a control signal. The DC voltage Vc supplied by the power supply 12 may be a voltage necessary for outputting a control signal for turning on / off the MOSFET 11.

Next, the operation of this embodiment will be described with reference to FIG. The voltage detection circuit 6 outputs a detection voltage represented by the expression (1) with respect to the drain-source voltage VDS of the FET 5.
Detection voltage = (C1 / (C1 + C2)) · VDS (1)

The control circuit 9 has a threshold voltage Vth used for the voltage protection operation of the FET 5. In order to reliably protect the FET 5 from a voltage exceeding the withstand voltage VDSS, the voltage range in which the voltage protection operation of the FET 5 is to be performed is set to a range equal to or higher than the voltage Vm1 set by a predetermined margin lower than the withstand voltage VDSS of the FET5. The threshold voltage Vth is set lower than the detection voltage output from the voltage detection circuit 6 when a voltage in a range where the voltage protection operation is to be performed is applied between the drain and source of the FET 5. This can be expressed by equation (2).
Vth <(C1 / (C1 + C2)). Vm1 <(C1 / (C1 + C2)). VDSS (2)

On the other hand, the voltage protection operation of the FET 5 is set within a voltage range lower than the voltage Vm2 set higher by a predetermined margin than the battery voltage VB applied to the load driving device 1 (a range lower than the voltage range in which the voltage protection operation is to be performed). Is a range that should be unnecessary. The threshold voltage Vth is set higher than the detection voltage output by the voltage detection circuit 6 when a voltage in a range where the voltage protection operation is not required is applied between the drain and source of the FET 5. . This can be expressed by equation (3).
Vth> (C1 / (C1 + C2)). Vm2> (C1 / (C1 + C2)). VB (3)

  The threshold voltages of the elements of the MOSFETs 13 and 14 constituting the control circuit 9 are set equal to the threshold voltage Vth, and an appropriate DC voltage Vc is set accordingly.

  FIG. 2 is a waveform diagram showing the drain current ID, the drain-source voltage VDS, and the gate voltage VGS of the FET 5. In a period T1 from time t1 to t2, an off drive signal is input and the FET 5 is off. In a period T2 from time t2 to t3, an ON drive signal is input, and the FET 5 is ON. The drain-source voltage VDS of the FET 5 in the periods T1 and T2 is the battery voltage VB, approximately 0 V (strictly, a voltage determined by the relationship between the on-resistance of the FET 5 and the drain current ID).

  The detection voltage output from the voltage detection circuit 6 during the periods T1 and T2 is lower than the threshold voltage Vth. Therefore, the MOSFET 13 is turned on and the MOSFET 14 is turned off, and the voltage Vc is applied to the gate of the MOSFET 11 via the MOSFET 13. As a result, the MOSFET 11 is turned on, and the switch circuit 8 connects the drive circuit 7 and the gate of the FET 5 with a low impedance. Thereby, the FET 5 performs a switching operation according to the drive signal.

  When an off drive signal is input at time t3 and the FET 5 is turned off, a surge voltage (including the back electromotive force itself) due to the back electromotive force is generated, and the drain-source voltage VDS of the FET 5 becomes equal to or higher than the voltage Vm1. At this time, the detection voltage output from the voltage detection circuit 6 is equal to or lower than the gate breakdown voltage of the MOSFETs 13 and 14 and is higher than the threshold voltage Vth. Therefore, the MOSFET 13 is turned off, the MOSFET 14 is turned on, and the gate voltage VGS of the MOSFET 11 becomes 0V. As a result, the MOSFET 11 is turned off, and the switch circuit 8 interrupts the drive circuit 7 and the gate of the FET 5 with high impedance. Along with this, the gate of the FET 5 is in an open state.

Subsequent gate voltage VGS of FET 5 is finally determined as shown in equation (4) based on drain-source voltage VDS, gate-drain capacitance CGD, and gate-source capacitance CGS.
VGS = (CGD / (CGD + CGS)) · VDS (4)

  The FET 5 is self-turned on when the gate voltage VGS exceeds its own threshold voltage. When the FET 5 is turned on, the energy of the surge voltage applied between the drain and the source is released to the source side through the FET 5, and the drain-source voltage VDS is balanced by a voltage (for example, 600 V) equal to or lower than the element breakdown voltage (period T3). Thereafter, when this balance state is maintained and the release of energy ends (time t4), the drain-source voltage VDS decreases, and the detection voltage output from the voltage detection circuit 6 becomes equal to or lower than the threshold voltage Vth. Thereby, the switch circuit 8 connects the drive circuit 7 and the gate of the FET 5 with a low impedance, and the FET 5 returns to the switching operation according to the drive signal.

  In the above operation, the maximum value of the gate current of the FET 5 is about several A, but since the turn-on time / turn-off time through which the gate current flows is very short, the rated current of the MOSFET 11 may be small. Further, since the MOSFETs 13 and 14 drive the MOSFET 11, similarly small elements are sufficient. For this reason, the switch circuit 8 and the control circuit 9 can be configured with an element size sufficiently smaller than that of the FET 5.

  Capacitors C1 and C2 act to charge and discharge the gate capacitances of MOSFETs 13 and 14 in accordance with the detected voltage. Therefore, the capacitors C1 and C2 need to have a capacitance value that can sufficiently drive the gate capacitances of the MOSFETs 13 and 14. As an example, the capacitance values of the capacitors C1 and C2 are preferably set to be about 1 to 100 times the gate capacitance of the MOSFETs 13 and 14.

  The MOSFET 11 constituting the switch circuit 8 includes a parasitic diode 11a having the drive circuit 7 side as an anode and the FET 5 gate side as a cathode. Therefore, even when the switch circuit 8 is in the cut-off state, an ON drive signal having a positive voltage output from the drive circuit 7 can be applied to the gate of the FET 5 through the parasitic diode 11a. As a result, the FET 5 can be turned on with priority given to the ON drive signal from the drive circuit 7 regardless of the state of the switch circuit 8. In addition, when using IGBT or a bipolar transistor instead of MOSFET11, the same effect is acquired by attaching a parallel diode.

  According to the present embodiment, when the drain-source voltage VDS of the FET 5 becomes equal to or higher than the voltage Vm1 set lower than the element withstand voltage VDSS, the switch circuit 8 interposed in the gate drive line 10 is cut off and the gate of the FET 5 is opened. As a result, a positive self-turn-on is induced in the FET 5. Since a diode for escaping surge is not connected to the gate of FET5, the parasitic capacitance added to the gate is smaller than that of the conventional configuration, ensuring high voltage resistance while maintaining the high-speed switching performance (especially turn-on characteristics) of FET5. can do.

  The load driving device 1 is particularly suitable for a FET 5 made of a GaN device, for example, a GaN-HEMT. GaN-HEMT does not have avalanche resistance (L load resistance), has a low gate breakdown voltage, and has a small gate capacitance of the element itself. According to the present embodiment, it is possible to increase the withstand capability against surge voltage without substantially reducing the switching speed. Of course, the present invention can also be applied to MOSFETs and IGBTs.

  Since the voltage detection circuit 6 has a C snubber configuration, dV / dt and ringing during turn-off can be suppressed, and the number of components and mounting space can be saved. Further, the voltage protection operation condition can be easily set based on the relationship between the capacitance ratio of the capacitors C1 and C2 and the element breakdown voltage of the FET 5.

  The element module 3 may be configured by forming capacitors C1 and C2 on the same semiconductor substrate as the FET 5. Alternatively, the discrete component FET 5 and capacitors C1 and C2 may be mounted on the substrate and then molded. Further, the FET 5, the capacitors C1 and C2, the switch circuit 8 and the control circuit 9 may be formed on the same semiconductor substrate. In this case, the drive circuit 7 can also be formed together. Further, only the capacitors C1 and C2 may be externally configured. In this way, the degree of freedom in circuit configuration is high and downsizing can be achieved.

(Second Embodiment)
A second embodiment will be described with reference to FIG. The driving IC 22 of the load driving device 21 includes a control circuit 23. The control circuit 23 includes a resistor 24 and a MOSFET 14 connected in series with an output terminal n2 between terminals of the power supply 12. The threshold voltage of the MOSFET 14 is set equal to the above-described threshold voltage Vth.

  When no surge voltage is applied, the detection voltage is lower than the threshold voltage Vth. For this reason, the MOSFET 14 is turned off, and the voltage Vc is applied to the gate of the MOSFET 11 via the resistor 24. On the other hand, when the surge voltage is generated and the drain-source voltage VDS of the FET 5 becomes equal to or higher than the voltage Vm1, the detection voltage is lower than the gate breakdown voltage of the MOSFET 14 and higher than the threshold voltage Vth. As a result, the MOSFET 14 is turned on and the switch circuit 8 is cut off, so that the FET 5 is self-turned on.

  According to the present embodiment, since the control circuit 23 can be configured by one MOSFET 14, the circuit area can be further reduced. However, when the MOSFET 14 is turned on, a current flows from the power source 12 through a path via the resistor 24 and the MOSFET 14. However, the frequency with which the MOSFET 14 is turned on is low and the turn-on time is short, so that there is almost no increase in power consumption.

(Third embodiment)
A third embodiment will be described with reference to FIG. The driving IC 26 of the load driving device 25 includes a control circuit 27. The control circuit 27 includes a MOSFET 13 and a resistor 28 that are connected in series with the output terminal n2 between the terminals of the power supply 12. The MOSFET 13 is configured to be turned off when the detection voltage exceeds the threshold voltage Vth.

  When no surge voltage is applied, the detection voltage is lower than the threshold voltage Vth. Therefore, the MOSFET 13 is turned on, and the voltage Vc is applied to the gate of the MOSFET 11 through the MOSFET 13. On the other hand, when the surge voltage is generated and the drain-source voltage VDS of the FET 5 becomes equal to or higher than the voltage Vm1, the detection voltage is lower than the gate breakdown voltage of the MOSFET 13 and higher than the threshold voltage Vth. As a result, the MOSFET 13 is turned off and the switch circuit 8 is cut off, so that the FET 5 is self-turned on. According to the present embodiment, since the control circuit 23 can be constituted by one MOSFET 13, the circuit area can be further reduced.

(Fourth embodiment)
A fourth embodiment will be described with reference to FIG. The load driving device 29 includes an element module 30 and a driving IC 4, and the element module 30 includes an FET 5 and a voltage detection circuit 31. In the voltage detection circuit 31, a first circuit 31a composed of a series circuit of a resistor R1 and a capacitor C1 and a second circuit 31b composed of a series circuit of a resistor R2 and a capacitor C2 are connected in series across the output terminal n1. It has the structure which was made.

  The capacitance value of the capacitor C1 is smaller than the capacitance value of the capacitor C2, and is set to a ratio of about C1: C2 = 1: (5 to 500), for example. The resistance value of the resistor R1 is larger than the resistance value of the resistor R2, and is set to a ratio of, for example, R1: R2 = (5 to 500): 1.

  Since the voltage detection circuit 31 of the present embodiment has an RC snubber configuration, the surge energy accumulated in the capacitors C1 and C2 can be consumed by the resistors R1 and R2, and the effect of further suppressing the voltage surge is obtained. It is done. Further, since the resistors R1 and R2 are provided in series, the ripple current flowing in the capacitors C1 and C2 can be reduced. If constants are set so that τ = C1 · R1≈C2 · R2, the charge / discharge states of the first circuit 31a and the second circuit 31b are equal to each other, and the voltage dividing ratio of the voltage detection circuit 31 is stabilized to a desired value. Can be

(Fifth embodiment)
A fifth embodiment will be described with reference to FIG. The load driving device 32 includes an element module 33 and a driving IC 4, and the element module 33 includes an FET 5 and a voltage detection circuit 34. The voltage detection circuit 34 includes a first circuit 34a and a second circuit 34b connected in series across the output terminal n1. The first circuit 34a and the second circuit 34b include resistors R3 and R4 in parallel with the first circuit 31a and the second circuit 31b (see FIG. 5) described above, respectively.

  The capacitance ratio of the capacitors C1 and C2 and the resistance ratio of the resistors R1 and R2 are equal to those in the fourth embodiment. The resistance value of the resistor R3 is larger than the resistance value of the resistor R4, and is set to a ratio of about R3: R4 = (5 to 500): 1, for example.

  Since the voltage detection circuit 34 of the present embodiment also has an RC snubber configuration, the effect of further suppressing the voltage surge can be obtained as in the fourth embodiment. If constants are set such that τ = C1 · R1≈C2 · R2, C2: C1≈R1: R2≈R3: R4, the charge / discharge states of the first circuit 34a and the second circuit 34b become equal to each other. The voltage dividing ratio of the voltage detection circuit 34 can be stabilized to a desired value. In particular, since the balance resistors R3 and R4 are provided, the followability with respect to the voltage change is enhanced, and the voltage division ratio at the time of transition can be further stabilized. The resistance values of the resistors R3 and R4 may be determined based on the balance between the stabilization of the voltage division ratio and the resistance loss.

(Sixth embodiment)
A sixth embodiment will be described with reference to FIG. The load driving device 35 includes an element module 36 and a driving IC 4, and the element module 36 includes an FET 5 and a voltage detection circuit 37. In the voltage detection circuit 37, a first circuit 37a composed of a parallel circuit of a capacitor C1 and a resistor R3 and a second circuit 37b composed of a parallel circuit of a capacitor C2 and a resistor R4 are connected in series with the output terminal n1 interposed therebetween. It has the structure which was made. The capacitance ratio of the capacitors C1 and C2 and the resistance ratio of the resistors R3 and R4 are set similarly to the fifth embodiment.

  If constants are set such that C2: C1≈R3: R4, the charge / discharge states of the first circuit 37a and the second circuit 37b become equal to each other, and the voltage division ratio of the voltage detection circuit 37 is stabilized to a desired value. be able to. In particular, since the balance resistors R3 and R4 are provided, the followability with respect to the voltage change is enhanced, and the voltage division ratio at the time of transition can be further stabilized. The resistance values of the resistors R3 and R4 may be determined based on the balance between the stabilization of the voltage division ratio and the resistance loss.

(Seventh embodiment)
A seventh embodiment will be described with reference to FIG. The load driving device 38 includes an element module 39 and a driving IC 4, and the element module 39 includes an FET 5 and a voltage detection circuit 40. The voltage detection circuit 40 includes resistors R3 and R4 (corresponding to a first circuit and a second circuit) connected in series with an output terminal n1 interposed between the drain and source of the FET 5. The resistors R3 and R4 have a ratio of about R3: R4 = (5 to 500): 1 and are set to relatively high resistance values so as to reduce resistance loss. Since the voltage detection circuit 40 outputs the detection voltage by resistance voltage division, the voltage detection circuit 40 has good followability with respect to a voltage change, and a stable and accurate voltage division ratio can be obtained.

(Eighth embodiment)
The eighth embodiment will be described with reference to FIG. The load driving device 41 includes an element module 42 and a driving IC 4, and the element module 42 includes an FET 5 and a voltage detection circuit 43. The voltage detection circuit 43 is composed of Zener diodes ZD1 and ZD2 (corresponding to the first circuit and the second circuit) of the polarities shown in the figure connected in series with the output terminal n1 sandwiched between the drain and source of the FET5. . The zener diodes ZD1 and ZD2 are energization circuits that shift to an energized state when the applied voltage exceeds a zener voltage (corresponding to a specified voltage).

  According to this embodiment, when the drain-source voltage VDS of the FET 5 becomes equal to or higher than the voltage Vm1, the Zener diodes ZD1 and ZD2 are energized, and the voltage at the output terminal n1 is maintained almost constant. Thereby, the switch circuit 8 can be stably cut off, and the FET 5 can be turned on. The Zener diodes ZD1 and ZD2 are not for releasing the energy of the surge voltage but for detecting the voltage. Therefore, the Zener diodes ZD1 and ZD2 only need to have a sufficient element size to drive the gate capacitances of the MOSFETs 13 and 14.

(Ninth embodiment)
A ninth embodiment will be described with reference to FIG. The load driving device 44 includes an element module 45 and a driving IC 4, and the element module 45 includes an FET 5 and a voltage detection circuit 46. The voltage detection circuit 46 has a configuration in which a resistor R3 corresponding to a first circuit and a second circuit 46b formed of a series circuit of a Zener diode ZD2 and a resistor R4 are connected in series with an output terminal n1 interposed therebetween. Yes. The resistance ratio of the resistors R3 and R4 is set in the same manner as in the fifth embodiment.

  When the drain-source voltage VDS of the FET 5 becomes equal to or higher than the voltage Vm1, the Zener diode ZD2 is energized, and the voltage at the output terminal n1 is maintained at a voltage determined by the Zener voltage and the voltage drop across the resistor R4. Thereby, the switch circuit 8 can be stably cut off, and the FET 5 can be turned on. The element size of the Zener diode ZD2 may be small as described in the eighth embodiment. Further, the resistance values of the resistors R3 and R4 may be determined from the balance between stabilization of the voltage division ratio and resistance loss.

(Tenth embodiment)
A tenth embodiment will be described with reference to FIGS. 11 and 12. The load driving device 51 includes an element module 52 and a driving IC 4 as shown in FIG. The element module 52 includes an FET 5, a voltage detection circuit 6, and a first voltage control circuit 53.

  The voltage control circuit 53 is connected between the drain and gate of the FET 5, and is energized when the voltage between the drain and gate exceeds a specified voltage set lower than the withstand voltage V DSS between the drain and source of the FET 5. Migrate to Specifically, it is configured by a series circuit of three Zener diodes 53a to 53c in the reverse direction and a diode 53d in the forward direction. The diode 53d prevents the gate current from flowing to the drain side when the gate voltage VGS is higher than the drain-source voltage VDS.

  When the surge voltage is generated and the drain-source voltage VDS of the FET 5 becomes equal to or higher than the voltage Vm1, the control circuit 9 turns off the MOSFET 11. As a result, the gate of the FET 5 is in an open state, the gate voltage VGS rises to the value shown by the equation (4), and the FET 5 is self-turned on. However, if the gate capacitance ratio (CGS / CGD) is extremely large, even if the drain-source voltage VDS reaches the withstand voltage VDSS, the gate voltage VGS does not exceed the threshold voltage of the FET 5 and may not shift to self-turn-on. is there.

  Therefore, the voltage control circuit 53 of this embodiment is energized when the drain-source voltage VDS reaches a specified voltage set lower than the withstand voltage VDSS, and clamps the gate to the drain voltage using the specified voltage as a differential voltage. As a result, the gate voltage VGS is raised with the rise of the drain-source voltage VDS and the FET 5 is turned on, so that the surge voltage energy is released to the source side through the FET 5.

  Since the voltage control circuit 53 does not release the energy of the surge voltage, the Zener diodes 53a to 53c and the diode 53d only need to have a small element size sufficient to drive the gate of the FET 5. On the other hand, the gate may not be held in a clamped state. FIG. 12 shows measured waveforms of the gate voltage VGS, drain-source voltage VDS, drain current ID, and battery voltage VB during turn-off. It can be seen that the FET 5 is repeatedly turned on and off as the gate voltage VGS rises and falls. Even in this case, the peak value of the drain-source voltage VDS is limited to a specified voltage or less, and the drain current ID decreases.

  According to the present embodiment, even when the FET 5 has a gate capacitance ratio that cannot be turned on when the gate is open, the FET 5 can be reliably turned on when the voltage control circuit 53 is energized. The FET 5 can be protected from an excessive voltage. In addition, since the element size of the voltage control circuit 53 connected to the gate of the FET 5 is small, it is possible to increase the resistance to surge voltage without substantially reducing the switching speed.

(Eleventh embodiment)
The eleventh embodiment will be described with reference to FIG. The load driving device 54 includes an element module 55 and a driving IC 4. In addition to the voltage control circuit 53, the element module 55 includes a Zener diode 56 (corresponding to a second voltage control circuit) having the gate side as a cathode between the gate and the source of the FET 5. The Zener diode 56 shifts to an energized state when the voltage between the gate and the source of the FET 5 exceeds a specified voltage set smaller than the breakdown voltage VGSS in the positive direction between the gate and the source.

  When the FET 5 is a normally-off type element, when the voltage control circuit 53 is energized and the gate is pulled up, the gate voltage VGS is clamped to a value lower than the gate withstand voltage VGSS. Thereby, the gate of FET5 can be protected. The Zener diode 56 only needs to have a small element size sufficient to clamp the gate voltage VGS. For this reason, the effect similar to 10th Embodiment is acquired also by this embodiment.

(Twelfth embodiment)
A twelfth embodiment will be described with reference to FIG. The load driving device 57 includes an element module 58 and a driving IC 4. In addition to the voltage control circuit 53, the element module 58 includes a Zener diode 59 (corresponding to a second voltage control circuit) having an anode on the gate side between the gate and the source of the FET 5. The Zener diode 59 shifts to an energized state when the voltage between the gate and the source of the FET 5 exceeds a specified voltage set smaller than the breakdown voltage VGSS in the negative direction between the gate and the source.

  When the FET 5 is a normally-on type element, the off drive signal is a negative voltage. In addition, regardless of whether the FET 5 is normally off or normally on, an off drive signal having a voltage close to the gate breakdown voltage in the negative direction of the FET 5 may be applied in order to shorten the turn-off time. In such a case, the gate voltage VGS (absolute value) is clamped to a value smaller than the gate withstand voltage VGSS (absolute value). Thereby, the gate of FET5 can be protected. Further, the Zener diode 59 only needs to have a small element size sufficient to clamp the gate voltage VGS. For this reason, the effect similar to 10th Embodiment is acquired also by this embodiment.

(13th Embodiment)
A thirteenth embodiment will be described with reference to FIG. The load driving device 60 includes an element module 61 and a driving IC 4. The element module 61 includes a second voltage control circuit 62 in addition to the voltage control circuit 53. The voltage control circuit 62 includes the series circuit of the Zener diodes 56 and 59 described in the eleventh and twelfth embodiments. According to the present embodiment, the operations and effects described in the eleventh and twelfth embodiments can be obtained.

(Fourteenth embodiment)
A fourteenth embodiment will be described with reference to FIG. The load driving device 71 is composed of an element module 3 and a driving IC 72. In the switch circuit 73 provided in the drive IC 72, a resistor 74 is connected in parallel with the MOSFET 11. The resistance value Rp of the resistor 74 is set to a much higher resistance value than the normal gate resistances Rgon and Rgoff.

  When the surge voltage is generated and the drain-source voltage VDS of the FET 5 becomes equal to or higher than the voltage Vm1, the control circuit 9 controls the MOSFET 11 to be turned off. At this time, the impedance between the output terminal of the drive circuit 7 and the gate of the FET 5 is Rp, and the gate of the FET 5 is close to the open state. By providing the resistor 74, the voltage value at which the FET 5 self-turns on can be adjusted.

(Fifteenth embodiment)
A fifteenth embodiment will be described with reference to FIG. The load driving device 81 includes the element module 3 and a driving IC 82. The control circuit 83 provided in the drive IC 82 is configured by a microcomputer 84 that operates using the output voltage Vc of the power supply 12 as a power supply voltage. The microcomputer 84 is an arithmetic unit (CPU) that controls temperature correction, overvoltage protection, overcurrent protection, and the like.

  A terminal 84a of the microcomputer 84 is a digital input terminal having a threshold voltage Vth, and generates an interrupt when it rises. The terminal 84b is a digital output terminal that outputs 0V (L level) / Vc (H level). When the surge voltage is generated and the drain-source voltage VDS of the FET 5 becomes equal to or higher than the voltage Vm1, the detection voltage output from the voltage detection circuit 6 becomes higher than the threshold voltage Vth. At this time, the microcomputer 84 shifts to an overvoltage protection interrupt process and outputs an L level voltage (0 V) from the terminal 84b. As a result, the MOSFET 11 is turned off, and the self turn-on of the FET 5 is promoted.

  According to the present embodiment, since the control circuit 83 can be configured using the microcomputer 84 that already exists in the drive IC 82 for the purpose of temperature correction or the like, the additional circuit when configuring the protection circuit against the surge voltage is further reduced. .

(Other embodiments)
As mentioned above, although preferred embodiment of this invention was described, this invention is not limited to embodiment mentioned above, A various deformation | transformation and expansion | extension can be performed within the range which does not deviate from the summary of invention.

  In each embodiment, the case where the surge voltage (including back electromotive force) generated when the energization to the coil 2 that is an inductive load is cut off is applied to the FET 5 has been described. The same applies when an overvoltage due to induction noise, battery voltage VB fluctuation, or the like is applied.

  In the eighth embodiment, Zener diodes ZD1 and ZD2 are used as the energizing circuits constituting the first circuit and the second circuit. However, the energizing circuit is a circuit that shifts to an energized state when the applied voltage exceeds a specified voltage. Any other circuit configuration may be used. In the tenth to thirteenth embodiments, the Zener diodes 53a to 53c, 56, and 59 are used as the voltage control circuit. However, the voltage control circuit is a circuit that shifts to an energized state when the applied voltage exceeds a specified voltage. Any other circuit configuration may be used. For example, it is composed of one or a plurality of semiconductor elements selected from a diode, a Zener diode, a MOS transistor and a bipolar transistor, and a specified voltage is obtained by its forward voltage, Zener voltage, threshold voltage or a combination of these voltages. It may be configured.

The control circuits 23, 27, and 83 described in the second, third, and fifteenth embodiments can be similarly applied to the fourth to fourteenth embodiments.
The first voltage control circuit 53, the Zener diodes 56 and 59 (second voltage control circuit), and the second voltage control circuit 62 described in the tenth to thirteenth embodiments are the second to ninth, fourteenth, and fifteenth. The present invention can be similarly applied to the embodiment.

The switch circuit 73 described in the fourteenth embodiment can be similarly applied to the second to thirteenth and fifteenth embodiments.
The voltage detection circuit only needs to be a circuit that outputs a detection voltage corresponding to the voltage VDS applied between the drain and source of the FET 5, and is not necessarily composed of a series circuit of the first circuit and the second circuit.

Each of the voltage detection circuits 6, 31, 34, 37, 40, 43, and 46 described above is composed of a series circuit of a first circuit and a second circuit. In these, a plurality of entire circuits of the voltage detection circuit may be provided. A plurality of first circuits or second circuits may be provided.
Although the application to the load driving device has been described, the present invention is not limited to this, and can be applied to a switching power supply circuit, an inverter circuit, and the like.

  In the drawings, 1, 21, 25, 29, 32, 35, 38, 41, 44, 51, 54, 57, 60, 71, 81 are load driving devices (semiconductor devices), 5 is an FET (switching element), 6 , 31, 34, 37, 40, 43, 46 are voltage detection circuits, 8, 73 are switch circuits, 9, 23, 27, 83 are control circuits, 10 is a gate drive line, 11 and 14 are N-channel MOSFETs ( N-channel transistor), 13 is a P-channel MOSFET (P-channel transistor), 31a, 34a and 37a are first circuits, 31b, 34b, 37b and 46b are second circuits, 53 is a first voltage control circuit, 56 59 are Zener diodes (second voltage control circuit), C1 and C2 are capacitors (first circuit and second circuit), R3 and R4 are resistors (first circuit and second circuit), and ZD1 and ZD2 are E zener diode (energizing circuit / first circuit, second circuit), n1, n2 denotes an output terminal.

Claims (17)

A switching element (5) that changes a conduction state between the second terminal (D) and the first terminal (S) according to a gate voltage applied between the gate terminal (G) and the first terminal (S). )When,
A voltage detection circuit (6, 31, 34, 37, 40, 43) that outputs a detection voltage corresponding to a voltage applied between the second terminal and the first terminal of the switching element;
A switch circuit (8, 73) provided in series with a gate drive line (10) connected to the gate terminal of the switching element, and switched to a high impedance state or a low impedance state according to a control signal;
A voltage lower than a detection voltage output by the voltage detection circuit when a voltage in a range in which a voltage protection operation of the switching element is to be performed is applied between the second terminal and the first terminal of the switching element; In addition, when a voltage in a range where the voltage protection operation of the switching element is not required is applied between the second terminal and the first terminal of the switching element, the detection voltage is higher than the detection voltage output by the voltage detection circuit. The switch circuit has a threshold voltage set high, and switches the switch circuit to a low impedance state when the detection voltage falls below the threshold voltage, and the switch circuit when the detection voltage exceeds the threshold voltage And a control circuit (9, 23, 27, 83) for outputting the control signal for switching to a high impedance state. Body apparatus.   The voltage detection circuit includes a first circuit and a second circuit connected in series with a detection voltage output terminal interposed between a second terminal and a first terminal of the switching element. The semiconductor device according to claim 1.   3. The semiconductor device according to claim 2, wherein each of the first circuit and the second circuit includes a capacitor (C1, C2).   4. The semiconductor device according to claim 3, wherein each of the first circuit (31a) and the second circuit (31b) includes a resistor (R1, R2) in series with the capacitor.   4. The semiconductor device according to claim 3, wherein each of the first circuit (37a) and the second circuit (37b) includes a resistor (R3, R4) in parallel with the capacitor.   The said 1st circuit (34a) and the 2nd circuit (34b) are each provided with resistance (R3, R4) in parallel with respect to the series circuit of the said capacitor | condenser and the said resistance. Semiconductor device.   3. The semiconductor device according to claim 2, wherein each of the first circuit and the second circuit includes resistors (R3, R4).   3. The semiconductor device according to claim 2, wherein each of the first circuit and the second circuit includes an energization circuit (ZD1, ZD2) that shifts to an energized state when an applied voltage exceeds a specified voltage.   The energization circuit includes one or more semiconductor elements selected from a diode, a Zener diode, a MOS transistor, and a bipolar transistor, and a forward voltage, a Zener voltage, a threshold voltage, or a combination of the voltages 9. The semiconductor device according to claim 8, wherein the specified voltage is configured by the following.   The control circuit (9) includes a P-channel having the threshold voltage across a control signal output terminal (n2) between power supply lines for supplying a DC voltage necessary for outputting the control signal. The type transistor (13) and the N-channel type transistor (14) are provided with an inverter connection, and the detection voltage is applied to the gates of these transistors. The semiconductor device described.   The control circuit (23, 27) includes a resistor (24, 28) and an output terminal (n2) of the control signal sandwiched between power supply lines for supplying a DC voltage necessary for outputting the control signal. The transistor (14, 13) having the threshold voltage is connected in series, and the detection voltage is applied to the gate of the transistor. A semiconductor device according to 1.   A current is passed between the second terminal and the gate terminal of the switching element when a voltage between the terminals exceeds a specified voltage set lower than a withstand voltage between the second terminal and the first terminal of the switching element. 12. The semiconductor device according to claim 1, further comprising a first voltage control circuit (53) for shifting to a state.   When the voltage between the terminals exceeds the prescribed voltage set smaller than the positive breakdown voltage of the gate terminal with respect to the first terminal of the switching element between the gate terminal and the first terminal of the switching element. 13. The semiconductor device according to claim 12, further comprising a second voltage control circuit (56) for shifting to an energized state.   When the voltage between the terminals exceeds the specified voltage set smaller than the negative withstand voltage of the gate terminal with respect to the first terminal of the switching element between the gate terminal and the first terminal of the switching element. 13. The semiconductor device according to claim 12, further comprising a second voltage control circuit (59) for shifting to an energized state.   The voltage control circuit is composed of one or a plurality of semiconductor elements selected from a diode, a Zener diode, a MOS transistor and a bipolar transistor, and its forward voltage, Zener voltage, threshold voltage or 15. The semiconductor device according to claim 12, wherein the specified voltage is configured by a combination.   The switch circuit is composed of an N-channel MOS transistor (11), and includes a diode (11a) that is forward in a direction reaching the gate terminal of the switching element through the gate drive line. The semiconductor device according to claim 1.   The semiconductor device according to claim 1, wherein the switching element is a GaN device.

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