WO2016155193A1 - 像素电路及其驱动方法、显示装置 - Google Patents

像素电路及其驱动方法、显示装置 Download PDF

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Publication number
WO2016155193A1
WO2016155193A1 PCT/CN2015/086863 CN2015086863W WO2016155193A1 WO 2016155193 A1 WO2016155193 A1 WO 2016155193A1 CN 2015086863 W CN2015086863 W CN 2015086863W WO 2016155193 A1 WO2016155193 A1 WO 2016155193A1
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Prior art keywords
control signal
signal input
energy storage
switching transistor
input terminal
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Ceased
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PCT/CN2015/086863
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English (en)
French (fr)
Inventor
张旭
孙志华
汪建明
马伟超
李承珉
张洪林
张志豪
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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Priority to US14/913,325 priority Critical patent/US9805655B2/en
Publication of WO2016155193A1 publication Critical patent/WO2016155193A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a pixel circuit, a driving method thereof, and a display device.
  • OLED Organic Light Emitting Diode
  • LCD liquid crystal display
  • the threshold voltage of the driving TFT of each pixel has unevenness due to process process and device aging. This causes a change in the current flowing through each pixel point OLED to cause uneven display brightness, thereby affecting the display effect of the entire image.
  • a first aspect of the present invention provides a pixel circuit including a driving transistor, a first energy storage component, and a driving module, and has a reset voltage input terminal, a data voltage input terminal, an operating voltage input terminal, and a plurality of control signal input terminals; among them,
  • a source of the driving transistor is connected to a first end of the first energy storage element
  • the driving module has a first node, when the first node and the second end of the first energy storage element are both floating, Between the first node and the first end of the first energy storage component The voltage difference remains the same;
  • the driving module turns on the working voltage input end and the first end of the first energy storage element when the input first control signal input end inputs an active level; and the second control that is connected When the signal input terminal inputs an active level, the first node is electrically connected to the reset voltage input terminal; when the input third control signal input terminal inputs an active level, the data voltage input terminal and the gate of the driving transistor are And the second end of the first energy storage component is turned on; and the first node is turned on with the gate of the driving transistor when the input fourth control signal input terminal inputs an active level.
  • the driving module comprises:
  • a first switching transistor connected between the operating voltage input terminal and the first end of the first energy storage component, the gate of the first switching transistor being connected to the first control signal input terminal;
  • a third switching transistor connected between the data voltage input terminal and the gate of the driving transistor
  • a fifth switching transistor connected between the second end of the first energy storage element and the gate of the driving transistor
  • a fourth switching transistor connected between the first node and the gate of the driving transistor, the gate of the four switching transistor being connected to the fourth control signal input terminal;
  • a first end of the second energy storage element is coupled to the second end of the first energy storage element, and a second end of the second energy storage element is coupled to the first node.
  • the gates of the third switching transistor and the fifth switching transistor are both connected to the third control signal input and have the same active level.
  • each of the switching transistors is a P-type transistor.
  • an active level of the fourth switching transistor is opposite to an active level of the third switching transistor and the fifth switching transistor, the fourth control signal input terminal and the third control signal The inputs can be the same input.
  • the first switching transistor and the fourth switching transistor are all P-type transistors; the second switching transistor, the third switching transistor and the fifth switching transistor are all N-type transistors.
  • the first energy storage element and / or the second energy storage element is electrically Rong.
  • the drive transistor is a P-type transistor.
  • a second aspect of the present invention provides a method for driving any of the above pixel circuits, including a reset phase, a compensation phase, and an illumination phase:
  • a corresponding active level is input to the first control signal input end, the second control signal input end, and the third control signal input end; and the fourth control signal input end is input correspondingly Invalid level
  • a third aspect of the invention provides a display device comprising any of the above pixel circuits.
  • the pixel circuit provided by the invention can make the driving current flowing through the electroluminescent unit not affected by the opening threshold of the corresponding driving transistor, thereby completely solving the problem of uneven display brightness due to the opening threshold drift of the driving transistor.
  • FIG. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention.
  • FIG. 2 is a circuit diagram of a driving module of the embodiment of FIG. 1;
  • FIG. 3 is a circuit structural diagram of a pixel circuit according to an embodiment of the present invention.
  • FIG. 4 is a timing diagram of control signals of a method of driving the pixel circuit of FIG. 3;
  • 5a-5c are schematic diagrams of current flow and node voltage values of the pixel circuit of FIG. 3 at different timings.
  • the pixel circuit may include a driving transistor DT, a first energy storage element C1, an electroluminescent element OLED, and a driving module.
  • the pixel circuit has a reset voltage input terminal Reset, a data voltage input terminal Data, an operating voltage input terminal Vdd, and four control signal input terminals S1, S2, S3, and S4.
  • the drive transistor can be a P-type transistor.
  • the source of the driving transistor DT is connected to the first end a of the first energy storage element C1.
  • the driving module is connected to the first end a end of the first energy storage element C1, the second end b end of the first energy storage element C1, the gate g of the driving transistor DT, the reset voltage input end Reset, the data voltage input terminal Data, and the working
  • the voltage input terminal Vdd is connected, and four control signal input terminals S1, S2, S3, and S4 are connected.
  • the drive module has a first node (not shown) inside. a voltage between the first node and the first end a of the first energy storage element C1 when the first node and the second end b of the first energy storage element C1 are both floating The difference remains the same.
  • the driving module turns on the working voltage input terminal Vdd and the first end a end of the first energy storage component C1 when the input first control signal input terminal S1 inputs an active level;
  • the first node is turned on with the reset voltage input terminal Reset;
  • the input third control signal input terminal S3 inputs an active level, the data voltage is input.
  • the input terminal Data is electrically connected to the gate of the driving transistor DT and the second terminal b of the first energy storage component C1; and the first node is connected when the input fourth control signal input terminal S4 inputs an active level
  • the gate of the drive transistor is turned on.
  • the pixel circuit provided by the present invention can enable the voltage of the control terminal of the driving module to include a component of the turn-on threshold of the driving transistor.
  • the included turn-on threshold component can be offset by the turn-on threshold of the drive transistor. This enables the driving current flowing through the electroluminescent unit to be unaffected by the opening threshold of the corresponding driving transistor, thereby completely solving the problem of uneven display brightness due to the opening threshold shift of the driving transistor.
  • the effective level here should be understood as the level at which the drive module can be turned on for the corresponding function.
  • its corresponding active level is understood to be the level at which the operating voltage input can be electrically connected to the first end of the first energy storage element.
  • the effective level corresponding to the second control signal input terminal S2 is understood to be capable of The level at which the node is conducting with the reset voltage input, and so on.
  • the corresponding effective levels may be different.
  • the driving module may include: five switching transistors T1, T2, T3, T4, T5 and a second energy storage element C2.
  • the first switching transistor T1 has a source connected to the operating voltage input terminal Vdd, a drain connected to the first end a of the first energy storage device C1, and a gate connected to the first control signal input terminal S1.
  • the drain of the second switching transistor T2 is connected to the reset voltage input terminal Reset, the source is connected to the first node (shown as N1 in the figure), and the gate is connected to the second control signal input terminal S2.
  • the source of the third switching transistor T3 is connected to the data voltage input terminal Data, and the drain is connected to the gate g of the driving transistor DT.
  • the source of the fifth switching transistor T5 is connected to the second terminal b end of the first energy storage element C1, and the drain is connected to the gate g of the driving transistor DT.
  • the gates of the third switching transistor T3 and the fifth switching transistor T5 are both connected to the third control signal input terminal S3 and have the same effective level.
  • the drain of the fourth switching transistor T4 is connected to the first node N1, the source is connected to the gate g of the driving transistor DT, and the gate of the fourth switching transistor T4 is connected to the fourth control signal input terminal S4.
  • the first end of the second energy storage component C2 is connected to the second end b of the first energy storage component, and the second end is connected to the first node N1.
  • the turning on and off of the third switching transistor T3 and the fifth switching transistor T5 can be controlled by the same signal line. This can reduce the use of signal lines. It is not difficult to understand that in practical applications, the third switching transistor T3 and the fifth switching transistor T5 can also be connected to different control signal lines. Accordingly, the effective levels of the third switching transistor T3 and the fifth switching transistor T5 do not need to be uniform.
  • an active level of the fourth switching transistor T4 may be opposite to an active level of the third switching transistor T3 and the fifth switching transistor T5, and the fourth control signal input terminal S4 and the The third control signal input terminal S3 can be the same input terminal.
  • the fourth switching transistor T4 is an N-type transistor. In this way, the number of signal lines used can be reduced, thereby reducing the area occupied by the pixel circuits.
  • the first switching transistor T1 and the fourth switching transistor T4 may both be P-type transistors.
  • the second switching transistor T2, the third switching transistor T3, and the first The five-switch transistor T5 may be an N-type transistor. This has the advantage that the active level (pulse level) of each of the signals for driving the pixel circuit is high. Since the structure of the shift register for outputting the pulse signal of the high level is much simpler than the structure of the shift register for outputting the pulse signal of the low level, the pixel circuit provided by the embodiment of the present invention can reduce the design of the driving circuit. The complexity.
  • each of the above switching transistors may also be a P-type transistor. This has the advantage of being able to be fabricated using the same process, thereby reducing the complexity of making the corresponding display device.
  • the reset voltage input Reset can be grounded.
  • the first energy storage component C1 and/or the second energy storage component C2 herein may be capacitors.
  • other components with energy storage functions can be used according to design requirements.
  • the anode of the electroluminescent element OLED is connected to the drain of the driving transistor, and the cathode is connected to the ground GND.
  • the cathode may also be connected to other low voltage input terminals, such as VSS.
  • the present invention also provides a driving method of a pixel circuit, which can be used to drive any of the above pixel circuits, the method comprising a reset phase, a compensation phase, and an illumination phase.
  • a corresponding active level is input at the first control signal input end, the second control signal input end, and the third control signal input end; and the fourth control signal input end is input correspondingly Invalid level.
  • the driving current flowing through the electroluminescent unit can be prevented from being affected by the opening threshold of the corresponding driving transistor, thereby completely solving the problem of uneven display brightness due to the opening threshold drift of the driving transistor.
  • FIG. 3 shows a circuit diagram of a possible pixel circuit, including five switching transistors T1-T5, a P-type driving transistor DT, and an electro-induced Light-emitting element OLED, capacitor C1 and capacitor C2.
  • the switching transistors T1, T2, T3, T4 and T5 constitute a driving module.
  • the switching transistors T1 and T4 can both be P-type transistors with an on level low.
  • the switching transistors T2, T3, and T5 may all be N-type transistors with an on level being high.
  • the pixel circuit further has a reset voltage input terminal Reset, an operating voltage input terminal Vdd, a data voltage input terminal Data, a ground terminal GND, and control signal input terminals S1, S2, and S3.
  • the source of the switching transistor T1 is connected to the operating voltage input terminal Vdd, the drain is connected to the first end a of the capacitor C1, and the gate is connected to the control signal input terminal S1.
  • the source of the switching transistor T2 is connected to the first node N1, the drain is connected to the ground GND, and the gate is connected to the control signal input terminal S1.
  • the gates of the switching transistors T3, T4 and T5 are all connected to the third control signal input terminal S3.
  • the source of the switching transistor T3 is connected to the data voltage input terminal Data, and the drain is connected to the gate g of the driving transistor DT.
  • the source of the switching transistor T4 is connected to the first node N1, and the drain is connected to the gate g of the driving transistor DT.
  • the source of the switching transistor T5 is connected to the gate g of the driving transistor DT, and the drain is connected to the second terminal b terminal of the capacitor C1.
  • the first end of the capacitor C2 is connected to the second end b of the capacitor C2, and the second end is connected to the first node N1.
  • the anode of the OLED is connected to the drain of the driving transistor DT, and the cathode is connected to the ground GND.
  • FIG. 4 is a timing diagram of key signals used in the driving method for driving the pixel circuit shown in FIG. 3, including a reset phase D1, a compensation phase D2, and an illumination phase D3.
  • a low level is applied to the control signal input terminal S1
  • a high level is applied to the control signal input terminals S2 and S3, and a data voltage Vdata is applied to the data voltage input terminal Data.
  • the switching transistors T1, T2, T3 and T5 are turned on, and the switching transistor T4 is turned off.
  • the current flow can be referred to Figure 5a.
  • the voltage at terminal a of capacitor C1 is set to Vdd
  • the voltage at point b is set to Vdata
  • the voltage at point N1 is set to 0
  • the voltage across capacitor C2 is Vdata
  • the voltage at terminal a of terminal C1 is Vdd.
  • a high level is applied to the control signal input terminals S1 and S3, and a low level is applied to the control signal input terminal S2.
  • the switching transistors T3 and T5 are turned on, and the switching transistors T1, T2, and T4 are turned off.
  • the voltage at the second terminal b of the capacitor C1 is still Vdata
  • the voltage at the first terminal a of the capacitor C1 starts to decrease
  • the capacitor C1 starts to discharge through the driving transistor DT
  • the voltage at the a terminal drops to Vdata+
  • the voltage across capacitor C2 is still Vdata. Therefore, the total series voltage of the capacitors C1 and C2, that is, the voltage difference between the N1 node and the first end a of the capacitor C1 is Vdata+
  • a low level is applied to the control signal input terminals S1, S2 and S3.
  • the switching transistors T1 and T4 are turned on, and the switching transistors T2, T3, and T5 are turned off.
  • the voltage at the first terminal a of the capacitor C1 is Vdd, and the voltage at the N1 node jumps, and the transition becomes Vdd-(Vdata+
  • the current flowing through the OLED is only affected by the carrier mobility of the driving transistor ⁇ , the capacitance C OX of the gate oxide energy storage element, and the size of the device itself (width W, length L).
  • the magnitude of the current is controlled by the data voltage Vdata regardless of the threshold voltage Vth of the driving transistor and the power supply voltage Vdd.
  • the present invention also provides a display device comprising any of the above pixel circuits.
  • the display device may be any product or component having a display function, such as an electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • a display function such as an electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)

Abstract

一种像素电路及其驱动方法、显示装置。该像素电路包括驱动晶体管（DT）和第一储能元件（C1），所述驱动晶体管（DT）的源极与所述第一储能元件（C1）的第一端（a）相连。所述像素电路还包括驱动模块，并具有复位电压输入端（Reset）、数据电压输入端（Data）、工作电压输入端（Vdd）以及多个控制信号输入端（S1、S2、S3、S4）。所述像素电路能够使得流经电致发光单元（OLED）的驱动电流不受对应的驱动晶体管（DT）的开启阈值的影响，从而彻底解决由于驱动晶体管（DT）的开启阈值漂移导致的显示亮度不均的问题。

Description

像素电路及其驱动方法、显示装置 技术领域
本发明涉及显示技术领域，尤其涉及一种像素电路及其驱动方法、显示装置。
背景技术
有机发光二极管(Organic Light Emitting Diode，OLED)是当今平板显示器研究领域的热点之一。作为一种电流型发光器件，因其所具有的自发光、快速响应、宽视角和可制作在柔性衬底上等特点而越来越多地被应用于高性能显示器当中。目前，在手机、PDA、数码相机等显示器中，OLED已经开始取代传统的液晶显示屏(LCD，Liquid Crystal Display)。像素驱动电路设计是OLED显示器的核心技术内容，具有重要的研究意义。与TFT(Thin Film Transistor，薄膜晶体管)-LCD利用稳定的电压控制亮度不同，OLED属于电流驱动，需要稳定的电流来控制发光。由于工艺制程和器件老化等原因，在原始的2T1C驱动电路(包括两个薄膜晶体管和一个电容)中，各像素点的驱动TFT的阈值电压存在不均匀性。这样就导致了流过每个像素点OLED的电流发生变化而使得显示亮度不均，从而影响整个图像的显示效果。
发明内容
本发明的一个目的是提供一种像素电路，以避免因驱动晶体管的开启阈值漂移导致的显示亮度不均。
本发明的第一方面提供了一种像素电路，包括驱动晶体管、第一储能元件和驱动模块，并具有复位电压输入端、数据电压输入端、工作电压输入端以及多个控制信号输入端；其中，
所述驱动晶体管的源极与所述第一储能元件的第一端相连；
所述驱动模块与所述第一储能元件的第一端、第一储能元件的第二端、所述驱动晶体管的栅极、所述复位电压输入端、所述数据电压输入端以及所述工作电压输入端相连，并连接多个控制信号输入端；所述驱动模块具有第一节点，在所述第一节点以及所述第一储能元件的第二端均浮置时，所述第一节点与所述第一储能元件的第一端之间 的电压差保持不变；
所述驱动模块在所接入的第一控制信号输入端输入有效电平时，将所述工作电压输入端与所述第一储能元件的第一端导通；在所接入的第二控制信号输入端输入有效电平时将所述第一节点与所述复位电压输入端导通；在所接入的第三控制信号输入端输入有效电平时，将数据电压输入端与驱动晶体管的栅极以及第一储能元件的第二端导通；在所接入的第四控制信号输入端输入有效电平时将所述第一节点与所述驱动晶体管的栅极导通。
根据一个实施例，所述驱动模块包括：
第一开关晶体管，其连接在所述工作电压输入端与所述第一储能元件的第一端之间，所述第一开关晶体管的栅极连接第一控制信号输入端；
第二开关晶体管，其连接在所述复位电压输入端与所述第一节点之间，所述第二开关晶体管的栅极连接第二控制信号输入端；
第三开关晶体管，其连接在所述数据电压输入端与驱动晶体管的栅极之间；
第五开关晶体管，其连接在所述第一储能元件的第二端与所述驱动晶体管的栅极之间；
第四开关晶体管，其连接在所述第一节点与所述驱动晶体管的栅极之间，所述四开关晶体管的栅极连接所述第四控制信号输入端；
第二储能元件的第一端与所述第一储能元件的第二端相连，所述第二储能元件的第二端与所述第一节点相连。
根据一个实施例，所述第三开关晶体管和所述第五开关晶体管的栅极均连接所述第三控制信号输入端，并具有相同的有效电平。
根据一个实施例，各个开关晶体管均为P型晶体管。
根据一个实施例，所述第四开关晶体管的有效电平与所述第三开关晶体管和所述第五开关晶体管的有效电平相反，所述第四控制信号输入端与所述第三控制信号输入端可以为同一输入端。
根据一个实施例，所述第一开关晶体管、所述第四开关晶体管均为P型晶体管；所述第二开关晶体管、所述第三开关晶体管和所述第五开关晶体管均为N型晶体管。
根据一个实施例，所述第一储能元件和/或所述第二储能元件为电 容。
根据一个实施例，所述驱动晶体管为P型晶体管。
本发明的第二方面提供了一种用于驱动上述任一种像素电路的方法，包括复位阶段、补偿阶段和发光阶段：
在复位阶段，在所述第一控制信号输入端和所述第二控制信号输入端、所述第三控制信号输入端均输入对应的有效电平；在所述第四控制信号输入端输入对应的无效电平；
在补偿阶段，在所述第三控制信号输入端输入对应的有效电平；在所述第一控制信号输入端、所述第二控制信号输入端和所述第四控制信号输入端输入对应的无效电平；
在发光阶段，在所述第一控制信号输入端和所述第四控制信号输入端输入对应的有效电平；在所述第二控制信号输入端和所述第三控制信号输入端输入对应的无效电平。
本发明的第三方面提供了一种显示装置，包括上述任一种像素电路。
本发明提供的像素电路，能够使得流经电致发光单元的驱动电流不受对应的驱动晶体管的开启阈值的影响，从而彻底解决由于驱动晶体管的开启阈值漂移导致显示亮度不均的问题。
附图说明
图1为本发明一个实施例提供的像素电路的结构示意图；
图2为图1中实施例的驱动模块的电路示意图；
图3为本发明一个实施例提供的像素电路的电路结构图；
图4为驱动图3中的像素电路的方法的控制信号的时序图；
图5a-图5c为图3中的像素电路在不同时序下的电流流向和节点电压值的示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整的描述。显然，所描述的实施例仅仅是本发明的一部分实施例，而不是全部的实施例。基于本发明的实施例，本领域普通技术人员在 没有做出创造性劳动前提下所获得的所有其他的实施例，都属于本发明保护的范围。
本发明一个实施例提供的像素电路如图1所示，该像素电路可以包括：驱动晶体管DT、第一储能元件C1、电致发光元件OLED和驱动模块。该像素电路具有复位电压输入端Reset、数据电压输入端Data、工作电压输入端Vdd以及四个控制信号输入端S1、S2、S3、S4。优选地，驱动晶体管可以是P型晶体管。
驱动晶体管DT的源极与第一储能元件C1的第一端a端相连。
驱动模块与第一储能元件C1的第一端a端、第一储能元件C1的第二端b端、驱动晶体管DT的栅极g、复位电压输入端Reset、数据电压输入端Data以及工作电压输入端Vdd相连，并连接四个控制信号输入端S1、S2、S3、S4。所述驱动模块内部具有第一节点(图中未示出)。在所述第一节点以及所述第一储能元件C1的第二端b端均浮置时，所述第一节点与所述第一储能元件C1的第一端a端之间的电压差保持不变。
所述驱动模块在所接入的第一控制信号输入端S1输入有效电平时，将所述工作电压输入端Vdd与所述第一储能元件C1的第一端a端导通；在所接入的第二控制信号输入端S2输入有效电平时将所述第一节点与所述复位电压输入端Reset导通；在所接入的第三控制信号输入端S3输入有效电平时，将数据电压输入端Data与驱动晶体管DT的栅极以及第一储能元件C1的第二端b端导通；在所接入的第四控制信号输入端S4输入有效电平时将所述第一节点与所述驱动晶体管的栅极导通。
本发明提供的像素电路，能够使得驱动模块的控制端的电压包含驱动晶体管的开启阈值的分量。这样在显示过程中，所包含的开启阈值分量可以与驱动晶体管的开启阈值相抵消。这样能够使得流经电致发光单元的驱动电流不受对应的驱动晶体管的开启阈值的影响，从而彻底解决由于驱动晶体管的开启阈值漂移导致显示亮度不均的问题。
这里的有效电平应理解为能够使驱动模块开启相应功能的电平。例如对于第一控制信号输入端S1来说，其对应的有效电平应理解为能够使工作电压输入端与所述第一储能元件的第一端导通的电平。相应地，第二控制信号输入端S2对应的有效电平应理解为能够将所述第一 节点与所述复位电压输入端导通的电平，以此类推。对于不同的控制信号输入端，其对应的有效电平可能不一样。
在具体实施时，如图2所示，该驱动模块可以包括：五个开关晶体管T1、T2、T3、T4、T5和一个第二储能元件C2。第一开关晶体管T1的源极连接工作电压输入端Vdd、漏极连接第一储能元件C1的第一端a端，栅极连接第一控制信号输入端S1。第二开关晶体管T2的漏极连接复位电压输入端Reset，源极连接第一节点(图中表示为N1)，栅极连接第二控制信号输入端S2。
第三开关晶体管T3的源极连接数据电压输入端Data，漏极连接驱动晶体管DT的栅极g。第五开关晶体管T5的源极连接第一储能元件C1的第二端b端，漏极连接驱动晶体管DT的栅极g。第三开关晶体管T3和第五开关晶体管T5的栅极均连接第三控制信号输入端S3，并具有相同的有效电平。
第四开关晶体管T4的漏极连接第一节点N1，源极连接驱动晶体管DT的栅极g，第四开关晶体管T4的栅极连接第四控制信号输入端S4。
第二储能元件C2的第一端与第一储能元件的第二端b端相连，第二端连接第一节点N1。
由于第三开关晶体管T3和第五开关晶体管T5的栅极连接同一个控制信号输入端，则可以通过同一条信号线控制第三开关晶体管T3和第五开关晶体管T5的开启和关断。这样能够减少信号线的使用。不难理解的是，在实际应用中，第三开关晶体管T3和第五开关晶体管T5也可以连接不同的控制信号线。相应地，第三开关晶体管T3和第五开关晶体管T5的有效电平也无需一致。
在具体实施时，所述第四开关晶体管T4的有效电平可以与所述第三开关晶体管T3和所述第五开关晶体管T5的有效电平相反，所述第四控制信号输入端S4与所述第三控制信号输入端S3可以为同一输入端。换句话说，如果第三开关晶体管T3和第五开关晶体管T5为P型晶体管，则第四开关晶体管T4为N型晶体管。通过这种方式，能够减少所使用的信号线的数量，从而减少像素电路所占用的面积。
所述第一开关晶体管T1和所述第四开关晶体管T4可以均为P型晶体管。所述第二开关晶体管T2、所述第三开关晶体管T3和所述第 五开关晶体管T5可以均为N型晶体管。这样做的好处是，用于驱动所述像素电路的各个信号的有效电平(脉冲电平)均为高电平。由于用于输出高电平的脉冲信号的移位寄存器的结构相对用于输出低电平的脉冲信号的移位寄存器的结构简单得多，因此本发明实施例提供的像素电路能够降低驱动电路设计的复杂度。
可替换地，在具体实施时，上述的各个开关晶体管也可以均为P型晶体管。这样做的好处是能够采用相同的工艺制作，从而降低了制作相应显示装置的复杂度。
这里的复位电压输入端Reset可以为接地端。
在具体实施时，这里的第一储能元件C1和/或第二储能元件C2可以均为电容。当然实际应用中，根据设计需要也可以采用其他具有储能功能的元件。
在图1中，电致发光元件OLED的阳极连接所述驱动晶体管的漏极，阴极连接接地端GND。当然实际应用中，阴极也可能连接其他低电压输入端，比如VSS等。
本发明还提供了一种像素电路的驱动方法，可用于驱动上述任一种像素电路，该方法包括复位阶段、补偿阶段和发光阶段。
在复位阶段，在所述第一控制信号输入端、所述第二控制信号输入端和所述第三控制信号输入端均输入对应的有效电平；在所述第四控制信号输入端输入对应的无效电平。
在补偿阶段，在所述第三控制信号输入端输入对应的有效电平；在所述第一控制信号输入端、所述第二控制信号输入端和所述第四控制信号输入端输入对应的无效电平。
在发光阶段，在所述第一控制信号输入端和所述第四控制信号输入端输入对应的有效电平；在所述第二控制信号输入端和所述第三控制信号输入端输入对应的无效电平。
通过本发明提供的驱动方法，可以使得流经电致发光单元的驱动电流不受对应的驱动晶体管的开启阈值的影响，从而彻底解决了由于驱动晶体管的开启阈值漂移导致显示亮度不均的问题。
下面结合一种具体的电路结构对本发明实施例提供的像素电路的驱动方法和工作原理进行说明。如图3所示为一种可能的像素电路的电路示意图，包括五个开关晶体管T1-T5、P型驱动晶体管DT、电致 发光元件OLED、电容C1和电容C2。开关晶体管T1、T2、T3、T4和T5构成驱动模块。开关晶体管T1和T4可以均为P型晶体管，开启电平为低电平。开关晶体管T2、T3和T5可以均为N型晶体管，开启电平为高电平。该像素电路还具有复位电压输入端Reset、工作电压输入端Vdd、数据电压输入端Data、接地端GND和控制信号输入端S1、S2、S3。开关晶体管T1的源极连接工作电压输入端Vdd，漏极连接电容C1的第一端a端，栅极连接控制信号输入端S1。开关晶体管T2的源极连接第一节点N1，漏极连接接地端GND，栅极连接控制信号输入端S1。开关晶体管T3、T4和T5的栅极均连接第三控制信号输入端S3。开关晶体管T3的源极连接数据电压输入端Data，漏极连接驱动晶体管DT的栅极g。开关晶体管T4的源极连接第一节点N1，漏极连接驱动晶体管DT的栅极g。开关晶体管T5的源极连接驱动晶体管DT的栅极g，漏极连接电容C1的第二端b端。电容C2的第一端连接电容C2的第二端b端，第二端连接第一节点N1。OLED的阳极连接驱动晶体管DT的漏极，阴极连接接地端GND。
图4为用于对图3所示的像素电路进行驱动的驱动方法中关键信号的时序图，包括复位阶段D1、补偿阶段D2和发光阶段D3。
在复位阶段D1，在控制信号输入端S1施加低电平，控制信号输入端S2和S3施加高电平，在数据电压输入端Data上施加数据电压Vdata。开关晶体管T1、T2、T3和T5打开，开关晶体管T4关断。电流流向可以参考图5a。电容C1的a端电压被置为Vdd，b点电压被置为Vdata，N1点电压被置为0，电容C2两端的电压为Vdata，电容C1的第一端a端的电压为Vdd。
在补偿阶段D2，在控制信号输入端S1和S3施加高电平，控制信号输入端S2施加低电平。开关晶体管T3和T5打开，开关晶体管T1、T2和T4关断。如图5b所示，电容C1的第二端b端的电压仍为Vdata，电容C1的第一端a端的电压开始下降，电容C1通过驱动晶体管DT开始放电，最终a端的电压下降为Vdata+|Vth|(其中，Vth为驱动晶体管DT的阈值电压)。电容C2两端电压仍为Vdata。因此，电容C1和C2的串联总电压，即N1节点与电容C1的第一端a端之间的电压差为Vdata+|Vth|。
在发光阶段D3，在控制信号输入端S1、S2和S3均施加低电平。 开关晶体管T1和T4打开，开关晶体管T2、T3和T5关断。电容C1的第一端a端的电压为Vdd，N1节点的电压发生跳变，跳变为Vdd-(Vdata+|Vth|)。由于N1节点与驱动晶体管DT的栅极g连通，驱动晶体管DT的栅极g电压也为Vdd-(Vdata+|Vth|)。
此时，流过OLED的电流为：
Figure PCTCN2015086863-appb-000001
从公式中可以看出，流经OLED的电流只受驱动晶体管载流子迁移率μ、栅氧化层储能元件的电容COX、器件本身尺寸(宽度W、长度L)等自身因素的影响。电流大小通过数据电压Vdata进行控制，与驱动晶体管的阈值电压Vth和电源电压Vdd无关。这样就彻底解决了驱动晶体管DT由于工艺制程及长时间的操作造成开启阈值Vth漂移的问题，消除其对IOLED的影响，从而保证电致发光元件OLED的正常工作。
本发明还提供了一种显示装置，包括上述任一种像素电路。
所述显示装置可以为：电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
以上所述，仅为本发明的具体实施方式，但是，本发明的保护范围不局限于此。任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到的变化或替代，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所附的权利要求的保护范围为准。

Claims (10)

  1. 一种像素电路，其特征在于，包括驱动晶体管、第一储能元件和驱动模块，并具有复位电压输入端、数据电压输入端、工作电压输入端以及多个控制信号输入端；其中，
    所述驱动晶体管的源极与所述第一储能元件的第一端相连；
    所述驱动模块与所述第一储能元件的第一端、第一储能元件的第二端、所述驱动晶体管的栅极、所述复位电压输入端、所述数据电压输入端以及所述工作电压输入端相连，并连接多个控制信号输入端；所述驱动模块具有第一节点，在所述第一节点以及所述第一储能元件的第二端均浮置时，所述第一节点与所述第一储能元件的第一端之间的电压差保持不变；
    所述驱动模块在所接入的第一控制信号输入端输入有效电平时，将所述工作电压输入端与所述第一储能元件的第一端导通；在所接入的第二控制信号输入端输入有效电平时将所述第一节点与所述复位电压输入端导通；在所接入的第三控制信号输入端输入有效电平时，将数据电压输入端与驱动晶体管的栅极以及第一储能元件的第二端导通；在所接入的第四控制信号输入端输入有效电平时将所述第一节点与所述驱动晶体管的栅极导通。
  2. 如权利要求1所述的像素电路，其特征在于，所述驱动模块包括：
    第一开关晶体管，其连接在所述工作电压输入端与所述第一储能元件的第一端之间，所述第一开关晶体管的栅极连接第一控制信号输入端；
    第二开关晶体管，其连接在所述复位电压输入端与所述第一节点之间，所述第二开关晶体管的栅极连接第二控制信号输入端；
    第三开关晶体管连接在所述数据电压输入端与驱动晶体管的栅极之间；
    第五开关晶体管，其连接在所述第一储能元件的第二端与所述驱动晶体管的栅极之间；
    第四开关晶体管，其连接在所述第一节点与所述驱动晶体管的栅极之间，所述第四开关晶体管的栅极连接所述第四控制信号输入端； 以及
    第二储能元件，所述第二储能元件的第一端与所述第一储能元件的第二端相连，所述第二储能元件的第二端与所述第一节点相连。
  3. 如权利要求2所述的像素电路，其特征在于，所述第三开关晶体管和所述第五开关晶体管的栅极均连接所述第三控制信号输入端，并具有相同的有效电平。
  4. 如权利要求3所述的像素电路，其特征在于，各个开关晶体管均为P型晶体管。
  5. 如权利要求3所述的像素电路，其特征在于，所述第四开关晶体管的有效电平与所述第三开关晶体管和所述第五开关晶体管的有效电平相反，所述第四控制信号输入端与所述第三控制信号输入端为同一输入端。
  6. 如权利要求5所述的像素电路，其特征在于，所述第一开关晶体管和所述第四开关晶体管均为P型晶体管；所述第二开关晶体管、所述第三开关晶体管和所述第五开关晶体管均为N型晶体管。
  7. 如权利要求2-6任一项所述的像素电路，其特征在于，所述第一储能元件和/或所述第二储能元件为电容。
  8. 如权利要求1所述的像素电路，其特征在于，所述驱动晶体管为P型晶体管。
  9. 一种用于驱动如权利要求1-8任一项所述的像素电路的方法，其特征在于，包括复位阶段、补偿阶段和发光阶段：
    在复位阶段，在所述第一控制信号输入端、所述第二控制信号输入端和所述第三控制信号输入端均输入对应的有效电平；在所述第四控制信号输入端输入对应的无效电平；
    在补偿阶段，在所述第三控制信号输入端输入对应的有效电平；在所述第一控制信号输入端、所述第二控制信号输入端和所述第四控制信号输入端输入对应的无效电平；
    在发光阶段，在所述第一控制信号输入端和所述第四控制信号输入端输入对应的有效电平；在所述第二控制信号输入端和所述第三控制信号输入端输入对应的无效电平。
  10. 一种显示装置，其特征在于，包括如权利要求1-8任一项所述的像素电路。
PCT/CN2015/086863 2015-04-01 2015-08-13 像素电路及其驱动方法、显示装置 Ceased WO2016155193A1 (zh)

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