WO2016134650A1 - 一种实现单线可编程电路的方法和系统 - Google Patents

一种实现单线可编程电路的方法和系统 Download PDF

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Publication number
WO2016134650A1
WO2016134650A1 PCT/CN2016/074387 CN2016074387W WO2016134650A1 WO 2016134650 A1 WO2016134650 A1 WO 2016134650A1 CN 2016074387 W CN2016074387 W CN 2016074387W WO 2016134650 A1 WO2016134650 A1 WO 2016134650A1
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WIPO (PCT)
Prior art keywords
module
circuit
wire
chip
otp
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PCT/CN2016/074387
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English (en)
French (fr)
Inventor
郑政
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智恒厦门微电子有限公司
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Publication of WO2016134650A1 publication Critical patent/WO2016134650A1/zh
Priority to US15/675,668 priority Critical patent/US10395743B2/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/143—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using laser-fusible links
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18—Auxiliary circuits, e.g. for writing into memory

Definitions

  • the invention belongs to the hardware implementation of an integrated circuit, and in particular relates to a method and a system for realizing a single-wire programmable circuit by using a common circuit interface as an output interface of the chip main circuit and a programming interface of the chip.
  • OTP programmable circuits that use memory (OTP) to control various parameters in the chip are increasingly used, such as programmable amplifiers, programmable clocks, programmable resistors, programmable capacitors, programmable SOCs, programmable integrated sensors, and Programmable sensor dedicated circuit (ASIC) for sensor calibration and temperature compensation.
  • OTP programmable amplifiers
  • programmable clocks programmable clocks
  • programmable resistors programmable resistors
  • programmable capacitors programmable SOCs
  • ASIC Programmable sensor dedicated circuit
  • SPI bus (4-wire), I2C bus (2-wire) is widely used for memory communication with the chip because of its fast communication speed and high reliability. But they require extra interfaces for the circuit.
  • One wire programmable or single wire programmable uses the output interface (OUT) of the shared circuit as the output interface of the main circuit and the programming interface of the OTP, so that the chip can be programmed without an additional circuit interface.
  • This technology enables the programmable chip to be pin-to-pin compatible with its non-programmable chip, and can implement a programmable chip with only three pins of VDD, GND, and output (OUT), in the sensor, such as Programmable amplifiers, programmable clocks, programmable resistors, programmable capacitors, and programmable SOCs are available in a wide range of applications.
  • the existing single-wire programmable implementation method uses the agreed-upon signal sent by the host computer to measure whether the output port OUT of the circuit has an agreed-upon signal when the circuit is just started. If so, the chip enters the programming state. If not, the chip outputs normally. The chip needs to be restarted due to the two states of the programming state and the normal output of the chip. In the programming process of the circuit, it is necessary to switch between the programming state and the normal output state multiple times, and the restarting of the chip extends the time required for programming and increases. The complexity of the test system.
  • the existing single-wire programmable implementation method uses the agreed-upon signal sent by the host computer to measure whether the output port OUT of the circuit has an agreed-upon signal when the circuit is just started. If so, the chip enters the programming state. If not, the chip outputs normally. The chip needs to be restarted due to the two states of the programming state and the normal output of the chip. In the programming process of the circuit, it is necessary to switch between the programming state and the normal output state multiple times, and the restarting of the chip extends the time required for programming and increases. The complexity of the test system.

Abstract

一种实现单线可编程电路的方法及其系统，该系统包括主电路模块（11）、控制主电路模块（11）的OTP存储器模块（12）、控制OTP存储器（12）的读/写熔断的OTP控制模块（13）、同OTP控制模块（13）通讯的单线转多线模块（14）、由OTP模块（12）的其中一位OTPL控制的S1,S2,S3模拟开关、同S1（18）并联的电阻R1（17）、可由S3控制的时钟（15）；R1（17）及S1（18）并联电路的一端与主电路模块（11）相连，另一端和电路的输出OUT（16）相连；单线转多线电路模块（14）的一端可选择通过S2和OUT（16）相连或直接和OUT（16）相连，另一端与OTP控制模块（13）相连；OTP控制模块（13）与OTP存储器模块（12）相连，并通过OTP存储器模块（12）实现对电路的各种参数的设置。该系统在芯片切换编程模式和正常输出模式时不需要重新启动芯片，提高了芯片编程效率，简化了芯片编程系统。

Description

一种实现单线可编程电路的方法和系统 技术领域
本发明属于集成电路(Integrated Circuit)的硬件实现，尤其涉及一种通过共同一个电路接口作为芯片主电路的输出接口和芯片的编程接口，从而实现单线可编程电路的方法和系统。
背景技术
在芯片中利用储存器(OTP)来控制各种参数的可编程电路的应用日益广泛，如可编程放大器，可编程时钟，可编程电阻，可编程电容，可编程SOC，可编程集成传感器以及用于传感器校正及温度补偿的可编程传感器专用电路(ASIC)等。
SPI总线(4线)，I2C总线(2线)由于具有通讯速度快，可靠性高的优点，因而被广泛用于同芯片内部的存储器通讯。但是它们需要电路有额外的接口。
单线可编程技术(one wire programmable或single wire programmable)通过共用电路的输出接口(OUT)作为主电路的输出接口和OTP的编程接口，实现了不需要额外的电路接口就可以对芯片进行编程。这一技术可以使可编程芯片同其非可编程芯片实现管脚兼容(pin to pin compatible)，并能实现只有VDD,GND，输出(OUT)三个管脚的可编程芯片,在传感器，如可编程放大器，可编程时钟，可编程电阻，可编程电容，可编程SOC有广泛的应用。
技术问题
现有的单线可编程的实现方法，都是利用电路刚启动的约定时间内，测量电路的输出口OUT是否有上位机发出的约定信号，如果有，芯片进入编程状态。如果没有，芯片正常输出。由于进入编程状态和芯片正常输出这两种状态转换时需要重启芯片，而在电路的编程过程中，需要多次在编程状态和正常输出状态切换，重启芯片延长了编程所需的时间，加大了测试系统的复杂性。
现有的单线可编程的实现方法，都是利用电路刚启动的约定时间内，测量电路的输出口OUT是否有上位机发出的约定信号，如果有，芯片进入编程状态。如果没有，芯片正常输出。由于进入编程状态和芯片正常输出这两种状态转换时需要重启芯片，而在电路的编程过程中，需要多次在编程状态和正常输出状态切换，重启芯片延长了编程所需的时间，加大了测试系统的复杂性。

Claims (1)

  1. Figure PCTCN2016074387-appb-100001
PCT/CN2016/074387 2015-02-28 2016-02-24 一种实现单线可编程电路的方法和系统 WO2016134650A1 (zh)

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CN201510091110.8A CN105988078B (zh) 2015-02-28 2015-02-28 一种实现单线可编程电路的方法和系统

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