WO2016123937A1 - 像素驱动电路及其驱动方法 - Google Patents

像素驱动电路及其驱动方法 Download PDF

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Publication number
WO2016123937A1
WO2016123937A1 PCT/CN2015/085395 CN2015085395W WO2016123937A1 WO 2016123937 A1 WO2016123937 A1 WO 2016123937A1 CN 2015085395 W CN2015085395 W CN 2015085395W WO 2016123937 A1 WO2016123937 A1 WO 2016123937A1
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Prior art keywords
transistor
unit
driving
threshold voltage
pole
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Ceased
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PCT/CN2015/085395
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English (en)
French (fr)
Inventor
青海刚
祁小敬
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Priority to US14/912,522 priority Critical patent/US9824633B2/en
Publication of WO2016123937A1 publication Critical patent/WO2016123937A1/zh
Anticipated expiration legal-status Critical
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
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    • G09G2300/0421—Structural details of the set of electrodes
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    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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Definitions

  • the present invention relates to the field of display, and in particular to a pixel driving circuit and a driving method thereof.
  • AMOLED Active Matrix Organic Light Emitting Diode
  • TFT driving thin film transistor
  • Vth threshold voltage
  • the conventional AMOLED driver circuit includes two thin film transistors and one storage capacitor (2T1C for short), and the brightness uniformity of the circuit has been poor.
  • Figure 1 shows a block diagram of a 2TIC circuit
  • Figure 2 shows an operational timing diagram of the 2TIC circuit.
  • the present invention provides a pixel driving circuit and a driving method thereof for solving the problem of uneven current flowing through different organic light emitting diodes when receiving the same data voltage due to a difference in threshold voltage of a driving transistor in the prior art.
  • the panel shows unevenness.
  • the present invention provides a pixel driving circuit, including:
  • a data signal input unit for receiving a data signal and providing a data voltage
  • a light emitting unit for performing light emitting display
  • An illumination control unit configured to control illumination of the illumination unit during the pixel drive display phase
  • a reference voltage supply unit for providing a reference voltage
  • a driving unit for receiving a reference voltage provided by the reference voltage supply unit and driving the pixel
  • the display unit is driven by the illumination control unit to drive the illumination unit
  • a threshold voltage compensation unit for receiving a data voltage via a data signal input unit in an initialization phase, and for storing a data voltage and a threshold voltage of the driving unit in a threshold voltage compensation phase such that a gate to the driving unit in a pixel driving display phase
  • the voltage provided by the pole can compensate the threshold voltage of the driving unit and accurately control the driving current of the driving unit.
  • the data signal input unit is connected to the data signal end, the first control signal end and the threshold voltage compensation unit;
  • the light emitting unit is connected to the light emitting control unit and the high voltage end;
  • the light emitting control unit is connected to the light emitting unit, the driving unit, the threshold voltage compensation unit, a second control signal end, a third control signal end and a low voltage end;
  • the reference voltage supply unit is connected to the driving unit, the reference voltage end and the first control signal end;
  • the driving unit is connected to the illumination control unit, the reference voltage supply unit, and the threshold voltage compensation unit
  • the threshold voltage compensation unit is connected to the data signal input unit, the illumination control unit, the drive unit, and the first control signal end.
  • the light emitting unit comprises an organic light emitting diode for emitting light, a first pole of the organic light emitting diode is connected to the light emitting control unit, and a second pole is connected to the high voltage end.
  • the data signal input unit comprises a first transistor, a gate of the first transistor is connected to the first control signal end, a first pole is connected to the data signal end, and a second pole is connected to the threshold voltage compensation unit.
  • the driving unit includes a driving transistor, a gate of the driving transistor is connected to the threshold voltage compensation unit, a first pole is connected to the lighting control unit, and a second pole is connected to the reference voltage providing unit.
  • a constant drive current independent of the threshold voltage is supplied to the light emitting unit through the light emission control unit.
  • the light emission control unit comprises a second transistor, a fourth transistor and a fifth transistor, the gate of the second transistor is connected to the second control signal end, and the first pole and the second pole of the first transistor Connected, the second pole is connected to the second pole of the driving transistor; the gate of the fourth transistor is connected to the second control signal terminal, the first pole is connected to the second pole of the driving transistor, and the second The pole is connected to the light emitting unit; the gate of the fifth transistor is connected to the third control signal end, the first pole is connected to the first pole of the driving transistor, and the second pole is connected to the low voltage end.
  • the threshold voltage compensation unit comprises a first capacitor and a third transistor, a first end of the first capacitor is connected to a second pole of the first transistor, and the second end is connected to the driving crystal a gate of the tube is connected; a gate of the third transistor is connected to the first control signal terminal, a first pole is connected to a first pole of the driving transistor, and a second pole is connected to a second pole of the first capacitor End connection.
  • the reference voltage supply unit includes a sixth transistor, the gate of the sixth transistor is connected to the first control signal end, the first pole is connected to the reference voltage terminal, and the second pole is connected to the second of the drive transistor a pole connection, the reference voltage supply unit supplies a reference voltage to the drive transistor under control of the first control signal, such that when the drive transistor is diode-connected, a reference voltage is passed through the drive transistor to the drive The gate of the transistor is charged such that the voltage of the gate of the drive transistor is equal to the difference between the reference voltage and the threshold voltage of the drive transistor.
  • the data signal input unit writes a data voltage to the first capacitor under control of the first control signal such that a voltage across the first capacitor is equal to the data voltage minus the reference voltage and The difference between the threshold voltages of the driving transistors.
  • the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the driving transistor are P-type thin film transistors, or N-type thin film transistors.
  • the present invention also provides a driving method applied to the above pixel driving circuit, comprising:
  • the initialization step initializes the gate of the driving unit to create conditions for writing the reference voltage
  • the pixel driving display step drives the light emitting unit to emit light through the light emission control unit.
  • the initializing step includes: controlling the first transistor, the third transistor, the fifth transistor, and the sixth transistor to be turned on, and controlling the second transistor and the fourth transistor to be turned off,
  • the drive transistor is diode-connected and the gate of the drive transistor is initialized.
  • the threshold voltage compensation step includes controlling the first transistor, the third transistor, and the sixth transistor to be turned on, and controlling the second transistor, the fourth transistor, and the fifth transistor Cut off, causing the reference voltage to charge the first capacitor through the driving unit, Until the drive unit is automatically turned off.
  • the pixel driving display step includes: controlling the second transistor, the fourth transistor, and the fifth transistor to be turned on, and controlling the first transistor, the third transistor, and the sixth The transistor is turned off to provide a constant driving current irrespective of a threshold voltage of the driving unit to the light emitting unit through the light emission control unit.
  • the method further includes a preparation step before the initializing step, the preparing step comprising: controlling the fifth transistor to be turned on, and controlling the first transistor, the second transistor, and the third transistor The fourth transistor and the sixth transistor are turned off to prepare for writing a data voltage to the first capacitor.
  • the method further includes a buffering step before the pixel driving display step, the buffering step comprising: controlling the first transistor, the second transistor, the third transistor, the fourth transistor, The fifth transistor and the sixth transistor are turned off.
  • the pixel driving circuit of the present invention writes a threshold voltage of a driving transistor to a capacitor by inputting a reference voltage from a source of a driving transistor and a diode connection method of the driving transistor, so that the pixel driving circuit is provided with a driving display capable of compensating for a threshold voltage of the driving transistor Features. That is, the threshold voltage is written to the capacitor by the diode in a saturated state to provide the gate-source voltage of the driving transistor, so that the driving current of the driving transistor is independent of the threshold voltage of the driving transistor, thereby improving the brightness uniformity and reliability of the display panel.
  • Figure 1 is a block diagram of a conventional 2 TIC circuit
  • Figure 2 is an operational timing diagram of the 2 TIC circuit of Figure 1;
  • FIG. 3 is a block diagram showing the structure of a pixel driving circuit according to an embodiment of the present invention.
  • FIG. 4 is a flow chart of a driving method of a pixel driving circuit according to an embodiment of the present invention.
  • FIG. 5 is a block diagram showing the structure of a pixel driving circuit according to another embodiment of the present invention.
  • FIG. 6 is a timing diagram of a pixel driving circuit according to another embodiment of the present invention.
  • FIG. 3 is a block diagram showing the structure of a pixel driving circuit 100 according to an embodiment of the present invention.
  • the pixel driving circuit 100 includes a data signal input unit 101, a light emitting unit 102, an emission control unit 103, a reference voltage supply unit 104, a driving unit 105, and a threshold voltage compensation unit 106.
  • the data signal input unit 101 is connected to the data signal terminal Data, the first control signal terminal S(n), and the threshold voltage compensation unit 106, respectively, for receiving the data signal, and supplies the data voltage Vdata to the threshold voltage compensation unit 106.
  • the light emitting unit 102 is connected to the light emission control unit 103 and the high voltage terminal ELVDD, respectively, including an organic light emitting diode (OLED) for light emission, and is used for performing light emission display.
  • OLED organic light emitting diode
  • the illumination control unit 103 is connected to the illumination unit 102, the drive unit 105, the threshold voltage compensation unit 106, the second control signal terminal EM(n), the third control signal terminal EM(n+1), and the low voltage terminal ELVSS, respectively.
  • the light emission of the light emitting unit 102 is controlled at the pixel drive display stage.
  • the reference voltage supply unit 104 is connected to the reference voltage terminal ref, the driving unit 105, and the first control signal terminal S(n), respectively, for receiving and supplying the reference voltage Vref to the driving unit 105.
  • the driving unit 105 is connected to the reference voltage supply unit 104, the light emission control unit 103, and the threshold voltage compensation unit 106, respectively, for receiving the reference voltage Vref supplied from the reference voltage supply unit 104, and is illuminated by the illumination control unit 103 during the pixel drive display phase.
  • the unit 102 provides a drive current independent of the threshold voltage Vth of the drive unit 105, thereby driving the light emitting unit to emit light.
  • the threshold voltage compensation unit 106 is connected to the data signal input unit 101 and the driving unit 105, the light emission control unit 103, and the first control signal terminal S(n), respectively, for receiving the data voltage Vdata via the data signal input unit 101 in the initialization phase, and For storing the data voltage and the threshold voltage of the driving unit 105 in the threshold voltage compensation phase. Thereby, the voltage supplied to the driving unit 105 at the pixel driving display stage can compensate the threshold voltage Vth of the driving unit 105.
  • the voltage output from the high voltage terminal ELVDD is greater than the voltage output from the low voltage terminal ELVSS.
  • the pixel driving circuit provided in this embodiment is provided with a driving display function capable of compensating for a threshold voltage of a driving transistor.
  • the threshold voltage compensation unit 106 in the pixel driving circuit is at a threshold voltage
  • the voltage supplied from the compensation stage to the gate of the driving unit 105 can compensate the threshold voltage Vth of the driving unit 105, and the driving unit 105 supplies the driving control unit 102 with the driving voltage independent of the threshold voltage Vth of the driving unit 105 in the pixel driving display phase.
  • Current The consistency of the display panel driving current is realized, thereby improving the brightness uniformity and reliability of the display panel.
  • FIG. 4 is a flowchart of a driving method of the pixel driving circuit 100 according to an embodiment of the present invention, and the driving method includes the following steps:
  • Initializing step 201 initializing the gate of the driving unit 105, so that the driving unit 105 is turned on to create conditions for writing the reference voltage Vref;
  • the threshold voltage compensation step 202 writes the data voltage Vdata to the threshold voltage compensation unit 106 while writing the reference voltage Vref to the threshold voltage compensation unit 106 through the driving unit 105, so that the threshold voltage compensation unit 106 is directed to the driving unit
  • the voltage provided by the gate of 105 can compensate for the threshold voltage of the drive unit 105;
  • the pixel driving display step 203 drives the light emitting unit 102 to emit light by the light emission control unit 103.
  • the data voltage Vdata is written to the threshold voltage compensation unit 106 while the threshold voltage Vth of the driving unit 105 and the reference voltage Vref received by the driving unit 105 from the reference voltage supply unit 104 are also written to the threshold voltage compensation.
  • the threshold voltage compensation unit 106 can supply the voltage to the driving unit 105 (ie, the gate-source voltage of the driving unit 105): Vata-(Vref ⁇
  • the drive unit 105 supplies the light emission control unit 103 with a drive current that is independent of the threshold voltage Vth of the drive unit 105. Further, the driving current uniformity of the display panel is maintained, and the brightness uniformity and reliability of the display panel are improved.
  • the illumination control unit 103 is turned on, communicating the drive unit 105 and the illumination unit 102, and the drive unit 105 provides a constant illumination current for the illumination unit 102.
  • FIG. 5 is a block diagram showing the structure of a pixel driving circuit 500 according to another embodiment of the present invention.
  • the pixel driving circuit 500 includes a data signal input unit 501, a light emitting unit 502, an emission control unit 503, a reference voltage supply unit 504, a driving unit 505, and a threshold voltage compensation unit 506.
  • the data signal input unit 501 is for receiving a data signal and supplying the data voltage Vdata to the threshold voltage compensation unit 506.
  • the light emitting unit 502 is configured to perform light emitting display.
  • the light emission control unit 503 is for controlling the light emission of the light emitting unit 502 in the pixel drive display phase.
  • the reference voltage supply unit 504 is for receiving and supplying the reference voltage Vref to the driving unit 505.
  • the driving unit 505 is for receiving the reference voltage Vref supplied from the reference voltage supply unit 504, and supplies the light emission control unit 502 with a driving current that is not affected by the threshold voltage Vth of the driving unit 505 in the pixel driving display phase.
  • the threshold voltage compensation unit 506 receives the data voltage Vdata supplied from the data signal input unit 501, and is used to store the data voltage and the threshold voltage of the driving unit 505 in the threshold voltage compensation phase.
  • the data signal input unit 501 includes a first transistor T1.
  • the light emitting unit 502 includes an organic light emitting diode (OLED) for emitting light.
  • the light emission control unit 503 includes a second transistor T2, a fourth transistor T4, and a fifth transistor T5.
  • the reference voltage supply unit 504 includes a sixth transistor T6.
  • the driving unit 505 includes a driving transistor DTFT.
  • the threshold voltage compensation unit 506 includes a first capacitor Cst and a third transistor T3.
  • the first electrode of the organic light emitting diode is connected to the second electrode of the fourth transistor T4, and the second electrode is connected to the high voltage terminal ELVDD.
  • the gate of the first transistor T1 is connected to the first control signal terminal S(n), the first electrode is connected to the data signal terminal, and the second electrode is connected to the first terminal of the first capacitor Cst.
  • the gate of the driving transistor DTFT is connected to the second end of the first capacitor Cst, the first pole is connected to the first pole of the fifth transistor T5, and the second pole is connected to the second pole of the sixth transistor T6.
  • the gate of the second transistor T2 is connected to the second control signal terminal EM(n), the first electrode is connected to the first terminal of the first capacitor Cst, and the second electrode is connected to the second electrode of the driving transistor DTFT.
  • the gate of the fourth transistor T4 is connected to the second control signal terminal EM(n), the first electrode is connected to the second electrode of the driving transistor DTFT, and the second electrode is connected to the first electrode of the organic light emitting diode.
  • the gate of the fifth transistor T5 is connected to the third control signal terminal EM(n+1), the first electrode is connected to the first electrode of the driving transistor DTFT, and the second electrode is connected to the low voltage terminal ELVSS.
  • the first end of the first capacitor Cst is connected to the second electrode of the first transistor T1, and the second end is connected to the gate of the driving transistor DTFT.
  • the gate of the third transistor T3 is connected to the first control signal terminal S(n), the first pole and the driving crystal
  • the first pole of the tube DTFT is connected, and the second pole is connected to the second end of the first capacitor Cst.
  • the gate of the sixth transistor T6 is connected to the first control signal terminal S(n), the first electrode is connected to the reference voltage terminal ref, and the second electrode is connected to the second electrode of the driving transistor DTFT.
  • the pixel driving circuit 500 is composed of seven thin film transistors and one storage capacitor.
  • the seven thin film transistors may be N-type thin film transistors, or both may be P-type thin film transistors, or both of them. combination.
  • seven thin film transistors in the pixel driving circuit 500 are all P-type thin film transistors, wherein T1 to T6 are switching transistors, DTFT is a driving thin film transistor, and ELVDD, ELVSS, and ref output three direct currents.
  • the voltage is output from the high voltage terminal ELVDD and is greater than the voltage output from the low voltage terminal ELVSS.
  • the switching thin film transistor when the control signal is at a high level, the switching thin film transistor is turned off, and when the control signal is at a low level, the switching thin film transistor is turned on.
  • the first poles of T1 to T6 and the DTFT may be the source
  • the second pole may be the drain, but the first pole may also be the drain, and the second pole may also be the source.
  • the reference voltage supply unit 504 directly supplies the reference voltage Vref to the source of the driving transistor DTFT, while the data signal input unit 501
  • the data voltage Vdata is directly written to the first capacitor Cst. Therefore, the reference voltage Vref continuously charges the first capacitor Cst through the driving transistor DTFT, and the potential at the N point rises until the potential at the N point is Vref ⁇
  • . At this time, the driving transistor DTFT is turned off, and the writing of the data voltage Vdata is also completed, so the voltage across the first capacitor Cst is Vcst Vdata ⁇ (Vref ⁇
  • the pixel drive circuit have a function of compensating for the threshold voltage Vth of the drive transistor DTFT. That is, the threshold voltage Vth is written to the first capacitor Cst in a diode-connected manner by the driving transistor, so that the threshold voltage of the driving transistor is compensated, and the driving current is independent of the threshold voltage of the driving transistor, thereby improving the brightness uniformity of the display panel and reliability.
  • FIGS. 5, 6, and 7a-f are equivalent circuit diagrams of respective stages in the timing chart of FIG.
  • the operation of the pixel driving circuit 500 is divided into six stages, namely, a preparation stage, a 2 initialization stage, a 3 threshold voltage compensation stage, a 4 first buffer stage, a 5 second buffer stage, and a 6 pixel drive display stage.
  • preparation is made for writing the data voltage Vdata to the first capacitor Cst.
  • the first control signal S(n) and the second control signal EM(n) are set to a high level, and the third control signal EM(n+1) is set to a low level, and therefore, the transistor T5 is turned on, the transistor T1, T2, T3, T4 and T6 are cut off. Since the transistor T4 is in an off state, the organic light emitting diode (OLED) is in an inoperative state. See Figure 7a for the equivalent circuit diagram for the preparation phase.
  • the reference voltage Vref is supplied to the driving transistor while the data voltage Vdata is started to be written to the first capacitor Cst.
  • the second control signal EM(n) is set to a high level
  • the first control signal S(n) and the third control signal EM(n+1) are set to a low level.
  • transistors T1, T3, T5, and T6 are turned on
  • transistors T2 and T4 are turned off.
  • the reference voltage Vref is fed from the M point. Since the transistor T3 is turned on, the driving transistor DTFT is connected and turned on as a diode, so the N-point potential is initialized to a lower potential, and the data voltage Vdata is written to the first capacitor Cst. See Figure 7b for an equivalent circuit diagram of the initialization phase.
  • the second control signal EM(n) and the third control signal EM(n+1) are set to a high level, and the first control signal S(n) is set to a low level.
  • transistors T1, T3, and T6 are turned on, and transistors T2, T4, and T5 are turned off.
  • the data voltage Vdata is continuously written to the first capacitor Cst while the threshold voltage Vth of the driving transistor DTFT is also written to the first capacitor Cst.
  • the first control signal S(n), the second control signal EM(n), and the third control signal EM(n+1) are set to a high level, and thus the transistors T1, T2, T3, and T4 , T5, T6 cutoff.
  • the transistors T1, T2, T3, and T4 , T5, T6 cutoff At this stage all signals are written for buffering to avoid switching noise at the same time causing unnecessary noise. See Figure 7d for the equivalent circuit for the first buffer stage.
  • the first control signal S(n) and the third control signal EM(n+1) are set to a high level, and the second control signal EM(n) is set to a low level, so the transistor T2 Turned on with T4, transistors T1, T3, T5, and T6 are turned off.
  • This phase is still in the buffer phase to avoid unnecessary noise caused by switching the switching signals at the same time. See Figure 7e for the equivalent circuit for the second buffer stage.
  • the driving light emission control unit 502 performs the transmission to the light emitting unit 501.
  • Light display control Specifically, during this phase, the first control signal S(n) is set to a high level, and the second control signal EM(n) and the third control signal EM(n+1) are set to a low level. Thus, transistors T2, T4, and T5 are turned on, and transistors T1, T3, and T6 are turned off.
  • the light-emission current through the organic light-emitting diode OLED is determined by the gate-source voltage Vsg of the driving transistor DTFT, which is given by the following equation.
  • I oled K(Vsg-
  • ) ⁇ 2 K[Vdata-(Vref-
  • the illuminating current of the OLED is only related to the reference voltage Vref and the data voltage Vdata, and has no relationship with the threshold voltage Vth of the driving transistor, and K is a constant related to the process and design. Since Vdata is greater than or equal to Vref, Therefore, I oled is at least 0, which means that it is at 0 gray scale. See Figure 7f for the equivalent circuit for the pixel drive display phase.
  • the operation method of the present embodiment eliminates the influence of the threshold voltage Vth of the driving transistor DTFT such that the driving current of the driving transistor is independent of the threshold voltage of the driving transistor, thereby achieving the uniformity of the driving current.
  • the brightness uniformity and reliability of the display panel are further improved.

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Abstract

提供了一种像素驱动电路及其驱动方法。像素驱动电路包括：数据信号输入单元（101），用于提供数据电压；发光单元（102），用于进行发光显示；发光控制单元（103），连接至发光单元（102），用于在像素驱动显示阶段控制发光单元（102）的发光；参考电压提供单元（104），用于提供参考电压（Vref）；驱动单元（105），分别连接至参考电压提供单元（104）和发光控制单元（103），用于接收参考电压提供单元（104）提供的参考电压（Vref），并在像素驱动显示阶段通过发光控制单元（103）来驱动发光单元（102）；以及阈值电压补偿单元（106），分别连接至数据信号输入单元（101）和驱动单元（105），用于在阈值电压补偿阶段，使得向驱动单元（105）的栅极提供的电压能够补偿驱动单元（105）的阈值电压并准确地控制驱动单元（105）的驱动电流。

Description

像素驱动电路及其驱动方法 技术领域
本发明涉及显示领域，具体地涉及一种像素驱动电路及其驱动方法。
背景技术
AMOLED(有源矩阵有机发光二极管)显示器因具有视角光、色彩对比效果好、响应速度块以及成本低等优点，从而获得了广泛应用。AMOLED能够发光是由驱动薄膜晶体管(Thin Film Transistor，TFT)在饱和时产生的电流所驱动。不管是LTPS(低温多晶硅)工艺还是氧化物工艺，由于工艺的不均匀性，薄膜晶体管背板在工艺过程中不同位置的驱动薄膜晶体管的阈值电压(Vth)的均匀性非常差，同时Vth也有漂移，这对于电流驱动器件的一致性来说是致命的。因为在输入相同的灰阶电压时，不同的阈值电压会产生不同的驱动电流，造成电流的不一致。传统的AMOLED驱动电路包含两个薄膜晶体管和一个存储电容(简称2T1C)，该电路亮度均匀性一直很差。图1示出了2TIC电路的框图，图2示出了该2TIC电路的操作时序图。
发明内容
本发明提供了一种像素驱动电路及其驱动方法，用以解决现有技术中由于驱动晶体管的阈值电压差异而导致在接收到相同数据电压时流经不同有机发光二极管的电流不均匀从而造成整个面板显示不均匀的问题。
为了解决上述问题，本发明提供了一种像素驱动电路，包括：
数据信号输入单元，用于接收数据信号并提供数据电压；
发光单元，用于进行发光显示；
发光控制单元，用于在像素驱动显示阶段控制发光单元的发光；
参考电压提供单元，用于提供参考电压；
驱动单元，用于接收参考电压提供单元提供的参考电压，并在像素驱 动显示阶段通过所述发光控制单元来驱动所述发光单元；以及
阈值电压补偿单元，用于在初始化阶段经由数据信号输入单元接收数据电压，并用于在阈值电压补偿阶段，存储数据电压以及驱动单元的阈值电压，使得在像素驱动显示阶段向所述驱动单元的栅极提供的电压能够补偿所述驱动单元的阈值电压并准确地控制驱动单元的驱动电流，
其中，数据信号输入单元连接数据信号端、第一控制信号端和阈值电压补偿单元；发光单元连接至发光控制单元和高电压端；发光控制单元连接至发光单元、驱动单元、阈值电压补偿单元、第二控制信号端、第三控制信号端和低电压端；参考电压提供单元连接驱动单元、参考电压端以及第一控制信号端；驱动单元连接发光控制单元、参考电压提供单元、阈值电压补偿单元；阈值电压补偿单元连接数据信号输入单元、发光控制单元、驱动单元、第一控制信号端。
优选地，所述发光单元包括用于发光的有机发光二极管，所述有机发光二极管的第一极与所述发光控制单元连接，第二极与高电压端连接。
优选地，所述数据信号输入单元包括第一晶体管，所述第一晶体管的栅极与第一控制信号端连接，第一极与数据信号端连接，第二极与所述阈值电压补偿单元连接。
优选地，所述驱动单元包括驱动晶体管，所述驱动晶体管的栅极与所述阈值电压补偿单元连接，第一极与所述发光控制单元连接，第二极与所述参考电压提供单元连接，以通过所述发光控制单元向所述发光单元提供与所述阈值电压无关的恒定驱动电流。
优选地，所述发光控制单元包括第二晶体管、第四晶体管和第五晶体管，所述第二晶体管的栅极与第二控制信号端连接，第一极与所述第一晶体管的第二极连接，第二极与所述驱动晶体管的第二极连接；所述第四晶体管的栅极与所述第二控制信号端连接，第一极与所述驱动晶体管的第二极连接，第二极与所述发光单元连接；所述第五晶体管的栅极与第三控制信号端连接，第一极与所述驱动晶体管的第一极连接，第二极与低电压端连接。
优选地，所述阈值电压补偿单元包括第一电容器和第三晶体管，所述第一电容器的第一端与第一晶体管的第二极连接，第二端与所述驱动晶体 管的栅极连接；所述第三晶体管的栅极与所述第一控制信号端连接，第一极与所述驱动晶体管的第一极连接，第二极与所述第一电容器的第二端连接。
优选地，所述参考电压提供单元包括第六晶体管，所述第六晶体管的栅极与第一控制信号端连接，第一极与参考电压端连接，第二极与所述驱动晶体管的第二极连接，所述参考电压提供单元在第一控制信号的控制下将参考电压提供给所述驱动晶体管，使得在所述驱动晶体管以二极管方式连接时，参考电压通过所述驱动晶体管对所述驱动晶体管的栅极充电，使得所述驱动晶体管的栅极的电压等于参考电压与所述驱动晶体管的阈值电压之差。
优选地，所述数据信号输入单元在第一控制信号的控制下将数据电压写入所述第一电容器，使得所述第一电容器两端的电压等于所述数据电压减去所述参考电压与所述驱动晶体管的阈值电压之差。
优选地，所述第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管、第六晶体管以及驱动晶体管是P型薄膜晶体管，或N型薄膜晶体管。
本发明还提供了一种应用于上述像素驱动电路的驱动方法，包括：
初始化步骤，初始化驱动单元的栅极，为参考电压的写入创造条件；
阈值电压补偿步骤，在将参考电压通过驱动单元写入阈值电压补偿单元的同时，将数据电压写入阈值电压补偿单元，使得所述阈值电压补偿单元向所述驱动单元的栅极提供的电压能够补偿所述驱动单元的阈值电压，并且准确地控制驱动单元的驱动电流；以及
像素驱动显示步骤，通过发光控制单元驱动发光单元进行发光。
优选地，所述初始化步骤包括：控制所述第一晶体管、所述第三晶体管、所述第五晶体管和所述第六晶体管导通，控制所述第二晶体管和所述第四晶体管截止，使得驱动晶体管以二极管方式连接，并对驱动晶体管的栅极进行初始化。
优选地，所述阈值电压补偿步骤包括：控制所述第一晶体管、所述第三晶体管和所述第六晶体管导通，控制所述第二晶体管、所述第四晶体管和所述第五晶体管截止，使得参考电压通过驱动单元对第一电容器充电， 直到驱动单元自动截止。
优选地，所述像素驱动显示步骤包括：控制所述第二晶体管、所述第四晶体管、所述第五晶体管导通，并且控制所述第一晶体管，所述第三晶体管和所述第六晶体管截止，以通过所述发光控制单元向发光单元提供与驱动单元的阈值电压无关的恒定驱动电流。
优选地，所述方法在所述初始化步骤之前还包括准备步骤，所述准备步骤包括：控制所述第五晶体管导通，控制所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第六晶体管截止，以便为将数据电压写入第一电容器做准备。
优选地，所述方法在所述像素驱动显示步骤之前还包括缓冲步骤，所述缓冲步骤包括：控制所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管和所述第六晶体管截止。
本发明的像素驱动电路通过从驱动晶体管的源极输入参考电压并利用驱动晶体管的二极管连接方式将驱动晶体管的阈值电压写入电容器，使得该像素驱动电路具备能够补偿驱动晶体管的阈值电压的驱动显示功能。即，通过处于饱和状态的二极管将阈值电压写入电容器以提供驱动晶体管的栅源电压，使得驱动晶体管的驱动电流与驱动晶体管的阈值电压无关，从而提高了显示面板的亮度均匀性和可靠性。
附图说明
根据结合附图的以下详细描述，本公开的多个实施例的上述和其他方面、特征以及优点将更清楚，附图中：
图1是现有的2 TIC电路的框图；
图2是图1的2 TIC电路的操作时序图；
图3是根据本发明实施例的像素驱动电路的结构框图；
图4是根据本发明实施例的像素驱动电路的驱动方法的流程图；
图5是根据本发明另一实施例的像素驱动电路的结构框图；
图6是根据本发明另一实施例的像素驱动电路的时序图；以及
图7a-f是图6的时序图中各个阶段的等效电路图。
具体实施方式
为了使本领域技术人员能够更好地理解本发明的技术方案，下面结合附图和具体实施例进行详细描述。
参照图3，图3是根据本发明实施例的像素驱动电路100的结构框图。像素驱动电路100包括：数据信号输入单元101、发光单元102、发光控制单元103、参考电压提供单元104、驱动单元105、以及阈值电压补偿单元106。
数据信号输入单元101分别连接至数据信号端Data、第一控制信号端S(n)和阈值电压补偿单元106，用于接收数据信号，并向阈值电压补偿单元106提供数据电压Vdata。
发光单元102分别连接至发光控制单元103和高电压端ELVDD，包括用于发光的有机发光二极管(OLED)，并且用于进行发光显示。
发光控制单元103分别连接至发光单元102、驱动单元105、阈值电压补偿单元106、第二控制信号端EM(n)、第三控制信号端EM(n+1)和低电压端ELVSS，用于在像素驱动显示阶段控制发光单元102的发光。
参考电压提供单元104分别连接至参考电压端ref、驱动单元105和第一控制信号端S(n)，用于接收并向驱动单元105提供参考电压Vref。
驱动单元105分别连接至参考电压提供单元104、发光控制单元103和阈值电压补偿单元106，用于接收参考电压提供单元104提供的参考电压Vref，并在像素驱动显示阶段通过发光控制单元103向发光单元102提供与驱动单元105的阈值电压Vth无关的驱动电流，从而驱动发光单元发光。
阈值电压补偿单元106分别连接至数据信号输入单元101和驱动单元105、发光控制单元103、第一控制信号端S(n)，用于在初始化阶段经由数据信号输入单元101接收数据电压Vdata，并且用于在阈值电压补偿阶段，存储数据电压以及驱动单元105的阈值电压。从而使得在像素驱动显示阶段向驱动单元105提供的电压能够补偿驱动单元105的阈值电压Vth。
优选地，高电压端ELVDD输出的电压大于低电压端ELVSS输出的电压。
本实施例提供的像素驱动电路具备能够补偿驱动晶体管的阈值电压的驱动显示功能。该像素驱动电路中的阈值电压补偿单元106在阈值电压 补偿阶段向驱动单元105的栅极提供的电压能够对驱动单元105的阈值电压Vth进行补偿，并且驱动单元105在像素驱动显示阶段向发光控制单元102提供与驱动单元105的阈值电压Vth无关的驱动电流。实现了显示面板驱动电流的一致性，从而提高了显示面板的亮度均匀性和可靠性。
参照图4，图4是根据本发明实施例的像素驱动电路100的驱动方法的流程图，该驱动方法包括以下步骤：
初始化步骤201，对驱动单元105的栅极进行初始化，使得驱动单元105开启，以便为参考电压Vref的写入创造条件；
阈值电压补偿步骤202，在将参考电压Vref通过驱动单元105写入阈值电压补偿单元106的同时，将数据电压Vdata写入阈值电压补偿单元106，使得所述阈值电压补偿单元106向所述驱动单元105的栅极提供的电压能够补偿驱动单元105的阈值电压；以及
像素驱动显示步骤203，通过发光控制单元103驱动发光单元102进行发光。
在阈值电压补偿步骤202期间，将数据电压Vdata写入阈值电压补偿单元106，同时将驱动单元105的阈值电压Vth和驱动单元105从参考电压提供单元104接收的参考电压Vref也写入阈值电压补偿单元106，直到驱动单元105自动截止。因此在数据写入完成之后，阈值电压补偿单元106可以向驱动单元105提供电压(即，驱动单元105的栅源电压)：Vata-(Vref-|Vth|)。从而在像素驱动显示步骤203期间，驱动单元105向发光控制单元103提供与驱动单元105的阈值电压Vth无关的驱动电流。进而保持显示面板的驱动电流一致性，并且提高显示面板的亮度均匀性和可靠性。
在像素驱动显示步骤203期间，发光控制单元103开启，连通驱动单元105和发光单元102，驱动单元105为发光单元102提供恒定的发光电流。
参照图5，图5是根据本发明另一实施例的像素驱动电路500的结构框图。像素驱动电路500包括：数据信号输入单元501、发光单元502、发光控制单元503、参考电压提供单元504、驱动单元505、以及阈值电压补偿单元506。
数据信号输入单元501用于接收数据信号，并向阈值电压补偿单元506提供数据电压Vdata。
发光单元502用于进行发光显示。
发光控制单元503用于在像素驱动显示阶段控制发光单元502的发光。
参考电压提供单元504用于接收并向驱动单元505提供参考电压Vref。
驱动单元505用于接收参考电压提供单元504提供的参考电压Vref，并在像素驱动显示阶段向发光控制单元502提供不受驱动单元505的阈值电压Vth影响的驱动电流。
阈值电压补偿单元506接收数据信号输入单元501提供的数据电压Vdata，并且用于在阈值电压补偿阶段，存储数据电压以及驱动单元505的阈值电压。
下面对上述各个单元的具体结构进行说明。
数据信号输入单元501包括第一晶体管T1。发光单元502包括用于发光的有机发光二极管(OLED)。发光控制单元503包括第二晶体管T2、第四晶体管T4和第五晶体管T5。参考电压提供单元504包括第六晶体管T6。驱动单元505包括驱动晶体管DTFT。阈值电压补偿单元506包括第一电容器Cst和第三晶体管T3。
有机发光二极管的第一极与第四晶体管T4的第二极连接，第二极与高电压端ELVDD连接。
第一晶体管T1的栅极与第一控制信号端S(n)连接，第一极与数据信号端连接，第二极与第一电容器Cst的第一端连接。
驱动晶体管DTFT的栅极与第一电容器Cst的第二端连接，第一极与第五晶体管T5的第一极连接，第二极与第六晶体管T6的第二极连接。
第二晶体管T2的栅极与第二控制信号端EM(n)连接，第一极与第一电容器Cst的第一端连接，第二极与驱动晶体管DTFT的第二极连接。
第四晶体管T4的栅极与第二控制信号端EM(n)连接，第一极与驱动晶体管DTFT的第二极连接，第二极与有机发光二极管的第一极连接。
第五晶体管T5的栅极与第三控制信号端EM(n+1)连接，第一极与驱动晶体管DTFT的第一极连接，第二极与低电压端ELVSS连接。
第一电容器Cst的第一端与第一晶体管T1的第二极连接，第二端与驱动晶体管DTFT的栅极连接。
第三晶体管T3的栅极与第一控制信号端S(n)连接，第一极与驱动晶体 管DTFT的第一极连接，第二极与第一电容器Cst的第二端连接。
第六晶体管T6的栅极与第一控制信号端S(n)连接，第一极与参考电压端ref，第二极与驱动晶体管DTFT的第二极连接。
在本实施例中，像素驱动电路500由7个薄膜晶体管和一个存储电容器组成，这7个薄膜晶体管可以均为N型薄膜晶体管，也可以均为P型薄膜晶体管，或者可以是这二者的组合。在本实施例中，以像素驱动电路500中7个薄膜晶体管均为P型薄膜晶体管为例，其中，T1～T6为开关晶体管，DTFT为驱动薄膜晶体管，ELVDD、ELVSS和ref均输出三个直流电平，并且高电压端ELVDD输出的电压大于低电压端ELVSS输出的电压。因此当控制信号为高电平时，开关薄膜晶体管截止，当控制信号为低电平时，开关薄膜晶体管导通。优选地，T1～T6和DTFT的第一极可以是源极，第二极可以漏极，然而第一极也可以是漏极，第二极也可以是源极。
在本实施例中，在第一控制信号端S(n)的第一控制信号的控制下，参考电压提供单元504将参考电压Vref直接提供给驱动晶体管DTFT的源极，同时数据信号输入单元501将数据电压Vdata直接写入第一电容器Cst。因此参考电压Vref通过驱动晶体管DTFT不断对第一电容器Cst充电，N点电位不断上升，直到N点电位为Vref-|Vth|为止。此时驱动晶体管DTFT截止，同时数据电压Vdata的写入也完成，因此第一电容器Cst两端的电压为Vcst＝Vdata-(Vref-|Vth|)。这样使得该像素驱动电路具备能够补偿驱动晶体管DTFT的阈值电压Vth的功能。即，通过驱动晶体管以二极管连接的方式将阈值电压Vth写入第一电容器Cst，使得驱动晶体管的阈值电压得到补偿，驱动电流与驱动晶体管的阈值电压无关，从而提高了显示面板的亮度均匀性和可靠性。
下面结合图5、图6和图7a-f具体描述根据本发明另一示例实施例的像素驱动电路的操作。图6是根据本发明另一实施例的像素驱动电路500的时序图；以及图7a-f是图6的时序图中各个阶段的等效电路图。
参照图6，像素驱动电路500的操作分为6个阶段，即，①准备阶段、②初始化阶段、③阈值电压补偿阶段、④第一缓冲阶段、⑤第二缓冲阶段和⑥像素驱动显示阶段。
在准备阶段，为将数据电压Vdata写入第一电容器Cst做准备。具体地， 将第一控制信号S(n)、第二控制信号EM(n)设置为高电平，并将第三控制信号EM(n+1)设置为低电平，因此，晶体管T5导通，晶体管T1、T2、T3、T4和T6截止。由于晶体管T4处于截止状态，因此有机发光二极管(OLED)处于非工作状态。准备阶段的等效电路图参见图7a。
在初始化阶段，向驱动晶体管提供参考电压Vref，同时开始将数据电压Vdata写入第一电容器Cst。具体地，在该阶段期间，将第二控制信号EM(n)设置为高电平，并且将第一控制信号S(n)和第三控制信号EM(n+1)设置为低电平。这样，晶体管T1、T3、T5和T6导通，晶体管T2和T4截止。参考电压Vref从M点给入，由于晶体管T3导通，驱动晶体管DTFT作为二极管连接并导通，因此N点电位被初始化为较低电位，同时数据电压Vdata被写入第一电容器Cst。初始化阶段的等效电路图参见图7b。
在阈值电压补偿阶段，将第二控制信号EM(n)和第三控制信号EM(n+1)设置为高电平，将第一控制信号S(n)设置为低电平。这样，晶体管T1、T3和T6导通，晶体管T2、T4和T5截止。继续将数据电压Vdata写入第一电容器Cst，同时将驱动晶体管DTFT的阈值电压Vth也写入第一电容器Cst。由于晶体管T3导通，因此DTFT仍然作为二极管连接，N点电位由于在初始化阶段被初始化到较低电位，因此参考电压Vref通过驱动晶体管DTFT不断对第一电容器Cst充电，N点电位不断上升，直到N点电位为Vref-|Vth|为止。此时驱动晶体管DTFT截止，同时数据电压Vdata的写入也完成，因此存储电容Cst两端的电压为Vcst＝Vdata-(Vref-|Vth|)。阈值电压补偿阶段的等效电路图参见图7c。
在第一缓冲阶段，将第一控制信号S(n)、第二控制信号EM(n)和第三控制信号EM(n+1)设置为高电平，因此晶体管T1、T2、T3、T4、T5、T6截止。在该阶段所有信号都写入完毕，用于缓冲以避免开关信号同时切换引起不必要的噪声。第一缓冲阶段的等效电路参见图7d。
在第二缓冲阶段，将第一控制信号S(n)和第三控制信号EM(n+1)设置为高电平，将第二控制信号EM(n)设置为低电平，因此晶体管T2和T4导通，晶体管T1、T3、T5和T6截止。该阶段仍为缓冲阶段，以避免开关信号同时切换引起不必要的噪声。第二缓冲阶段的等效电路参见图7e。
在像素驱动显示阶段，驱动发光控制单元502进行对发光单元501的发 光显示控制。具体地，在该阶段期间，将第一控制信号S(n)设置为高电平，并将第二控制信号EM(n)和第三控制信号EM(n+1)设置为低电平。这样，晶体管T2、T4和T5导通，晶体管T1、T3和T6截止。在该阶段，驱动晶体管DTFT栅源电压就是第一电容器Cst两端的电压，因此DTFT的栅源电压Vsg＝Vcst＝Vdata-(Vref-|Vth|)。通过有机发光二极管OLED的发光电流由驱动晶体管DTFT的栅源电压Vsg决定，该发光电流由下式给出。
Ioled＝K(Vsg-|Vth|)^2＝K[Vdata-(Vref-|Vth|)-|Vth|]^2
＝K(Vdata-Vref)^2
由上式可以知道，OLED的发光电流仅与参考电压Vref和数据电压Vdata有关系，而与驱动晶体管的阈值电压Vth没有关系，K为与工艺和设计相关的常数，由于Vdata大于或等于Vref，因此Ioled最小为0，此时表示处于0灰阶。像素驱动显示阶段的等效电路参见图7f。
本实施例的操作方法消除了驱动晶体管DTFT的阈值电压Vth的影响，使得驱动晶体管的驱动电流与驱动晶体管的阈值电压无关，从而达到驱动电流的一致。进而提高了显示面板的亮度均匀性和可靠性。
显然，本领域的技术人员可以在不脱离本发明的精神和范围的前提下对本发明的实施例进行各种改变和修改。本发明的范围由所附权利要求及其等同物来限定。

Claims (15)

  1. 一种像素驱动电路，包括：
    数据信号输入单元，用于接收数据信号并提供数据电压；
    发光单元，用于进行发光显示；
    发光控制单元，用于在像素驱动显示阶段控制发光单元的发光；
    参考电压提供单元，用于提供参考电压；
    驱动单元，用于接收参考电压提供单元提供的参考电压，并在像素驱动显示阶段通过所述发光控制单元来驱动所述发光单元；以及
    阈值电压补偿单元，用于在初始化阶段经由数据信号输入单元接收数据电压，并用于在阈值电压补偿阶段，存储数据电压以及驱动单元的阈值电压，使得在像素驱动显示阶段向所述驱动单元的栅极提供的电压能够补偿所述驱动单元的阈值电压并准确地控制所述驱动单元的驱动电流，
    其中，数据信号输入单元连接数据信号端、第一控制信号端和阈值电压补偿单元；发光单元连接至发光控制单元和高电压端；发光控制单元连接至发光单元、驱动单元、阈值电压补偿单元、第二控制信号端、第三控制信号端和低电压端；参考电压提供单元连接驱动单元、参考电压端以及第一控制信号端；驱动单元连接发光控制单元、参考电压提供单元、阈值电压补偿单元；阈值电压补偿单元连接数据信号输入单元、发光控制单元、驱动单元、第一控制信号端。
  2. 根据权利要求1所述的像素驱动电路，其中，所述发光单元包括用于发光的有机发光二极管，所述有机发光二极管的第一极与所述发光控制单元连接，第二极与高电压端连接。
  3. 根据权利要求2所述的像素驱动电路，其中，所述数据信号输入单元包括第一晶体管，所述第一晶体管的栅极与第一控制信号端连接，第一极与数据信号端连接，第二极与所述阈值电压补偿单元连接。
  4. 根据权利要求3所述的像素驱动电路，其中，所述驱动单元包括驱动晶体管，所述驱动晶体管的栅极与所述阈值电压补偿单元连接，第一极与所述发光控制单元连接，第二极与所述参考电压提供单元连接，以通过所述发光控制单元向所述发光单元提供与所述阈值电压无关的恒定驱动 电流。
  5. 根据权利要求4所述的像素驱动电路，其中，所述发光控制单元包括第二晶体管、第四晶体管和第五晶体管，所述第二晶体管的栅极与第二控制信号端连接，第一极与所述第一晶体管的第二极连接，第二极与所述驱动晶体管的第二极连接；所述第四晶体管的栅极与所述第二控制信号端连接，第一极与所述驱动晶体管的第二极连接，第二极与所述发光单元连接；所述第五晶体管的栅极与第三控制信号端连接，第一极与所述驱动晶体管的第一极连接，第二极与低电压端连接。
  6. 根据权利要求5所述的像素驱动电路，其中，所述阈值电压补偿单元包括第一电容器和第三晶体管，所述第一电容器的第一端与第一晶体管的第二极连接，第二端与所述驱动晶体管的栅极连接；所述第三晶体管的栅极与所述第一控制信号端连接，第一极与所述驱动晶体管的第一极连接，第二极与所述第一电容器的第二端连接。
  7. 根据权利要求6所述的像素驱动电路，其中，所述参考电压提供单元包括第六晶体管，所述第六晶体管的栅极与第一控制信号端连接，第一极与参考电压端连接，第二极与所述驱动晶体管的第二极连接，所述参考电压提供单元在第一控制信号的控制下将参考电压提供给所述驱动晶体管，使得在所述驱动晶体管以二极管方式连接时，参考电压通过所述驱动晶体管对所述驱动晶体管的栅极充电，从而所述驱动晶体管的栅极的电压等于参考电压与所述驱动晶体管的阈值电压之差。
  8. 根据权利要求7所述的像素驱动电路，其中，所述数据信号输入单元在第一控制信号的控制下将数据电压写入所述第一电容器，使得所述第一电容器两端的电压等于所述数据电压减去所述参考电压与所述驱动晶体管的阈值电压之差。
  9. 根据权利要求3至8中任一项所述的像素驱动电路，其中，所述第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管、第六晶体管以及驱动晶体管是P型薄膜晶体管，或N型薄膜晶体管。
  10. 一种应用于权利要求1至9中任一项所述的像素驱动电路的驱动方法，包括：
    初始化步骤，初始化驱动单元的栅极，为参考电压的写入创造条件；
    阈值电压补偿步骤，在将参考电压通过驱动单元写入阈值电压补偿单元的同时，将数据电压写入阈值电压补偿单元，使得所述阈值电压补偿单元向所述驱动单元的栅极提供的电压能够补偿所述驱动单元的阈值电压，并且准确地控制驱动单元的驱动电流；以及
    像素驱动显示步骤，通过发光控制单元驱动发光单元进行发光。
  11. 根据权利要求10所述的驱动方法，其中，所述初始化步骤包括：控制所述第一晶体管、所述第三晶体管、所述第五晶体管和所述第六晶体管导通，控制所述第二晶体管和所述第四晶体管截止，使得驱动晶体管以二极管方式连接，并对驱动晶体管的栅极进行初始化。
  12. 根据权利要求11所述的驱动方法，其中，所述阈值电压补偿步骤包括：控制所述第一晶体管、所述第三晶体管和所述第六晶体管导通，控制所述第二晶体管、所述第四晶体管和所述第五晶体管截止，使得参考电压通过驱动单元对第一电容器充电，直到驱动单元自动截止。
  13. 根据权利要求12所述的驱动方法，其中，所述像素驱动显示步骤包括：控制所述第二晶体管、所述第四晶体管、所述第五晶体管导通，并且控制所述第一晶体管，所述第三晶体管和所述第六晶体管截止，以通过所述发光控制单元向发光单元提供与驱动单元的阈值电压无关的恒定驱动电流。
  14. 根据权利要求13所述的驱动方法，其中，所述方法在所述初始化步骤之前还包括准备步骤，所述准备步骤包括：控制所述第五晶体管导通，控制所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第六晶体管截止，以便为将数据电压写入第一电容器做准备。
  15. 根据权利要求14所述的驱动方法，其中，所述方法在所述像素驱动显示步骤之前还包括缓冲步骤，所述缓冲步骤包括：控制所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管和所述第六晶体管截止。
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