WO2016086627A1 - 一种像素驱动电路、像素驱动方法和显示装置 - Google Patents

一种像素驱动电路、像素驱动方法和显示装置 Download PDF

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Publication number
WO2016086627A1
WO2016086627A1 PCT/CN2015/079904 CN2015079904W WO2016086627A1 WO 2016086627 A1 WO2016086627 A1 WO 2016086627A1 CN 2015079904 W CN2015079904 W CN 2015079904W WO 2016086627 A1 WO2016086627 A1 WO 2016086627A1
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Prior art keywords
transistor
pixel driving
driving circuit
unit
intermediate node
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PCT/CN2015/079904
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English (en)
French (fr)
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青海刚
祁小敬
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京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Priority to US14/892,553 priority Critical patent/US9905166B2/en
Priority to EP15793667.5A priority patent/EP3067879B1/en
Publication of WO2016086627A1 publication Critical patent/WO2016086627A1/zh

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    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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Definitions

  • the present invention relates to display technology, and more particularly to a pixel driving circuit, a display device, and a pixel driving method.
  • Organic light-emitting display is one of the hotspots in the field of flat panel display research. Compared with liquid crystal display (LCD), organic light-emitting diode (OLED) has low energy consumption, low production cost, self-luminescence, wide viewing angle and fast response. advantage. At present, OLEDs in mobile phones, PDAs, digital cameras and other display fields have begun to replace traditional LCD displays. Among them, pixel driving is the core technical content of AMOLED display, which has important research significance.
  • the conventional AMOLED pixel driving circuit uses a 2T1C pixel driving circuit.
  • the circuit consists of only one drive thin film transistor (DTFT), one switched thin film transistor (TFT) (ie T1) and one storage capacitor C.
  • DTFT drive thin film transistor
  • TFT switched thin film transistor
  • the scan line is gated (ie, scanned)
  • the scan signal Vscan is a low level signal
  • T1 is turned on
  • the data signal Vdara is written to the storage capacitor C.
  • Fig. 2 is a timing chart showing the operation of the pixel driving circuit shown in Fig. 1, showing the timing relationship of the scanning signal supplied from the scanning line and the data signal supplied from the data line.
  • AMOLED ability of AMOLED to emit light is driven by the current generated by the driving thin film transistor DTFT in a saturated state. Whether it is a low temperature polysilicon (LTPS) process or an oxide (Oxide) process, due to process non-uniformity, a driving thin film transistor of different positions is caused.
  • the DTFT exhibits a difference in threshold voltage, which is fatal to the consistency of the current-driven device. Because the same driving voltage is input, different threshold voltages will generate different driving currents, causing inconsistency in current flowing through the OLED, resulting in uneven display brightness, thereby affecting the display effect of the entire image.
  • the proposed solution is to add a compensation unit to each pixel to compensate for the drive transistor. In addition to the effect of the threshold voltage Vth.
  • this solution tends to cause a rapid drop in aperture ratio due to an increase in transistors in the compensation unit.
  • the current density of the organic light-emitting layer is inevitably increased, which easily leads to aging of the organic light-emitting layer material, and the service life of the entire display panel is degraded. .
  • the present disclosure proposes a pixel driving circuit, a display device, and a pixel driving method capable of improving display quality by compensating a threshold voltage of a driving unit of a light emitting element.
  • the storage capacitor not only stores the data voltage in the charging phase, but also stores the threshold voltage of the driving unit, thereby compensating the driving unit in the driving phase, so that the operating current of the driving unit is no longer affected by the threshold voltage. Therefore, the influence of the threshold voltage of the driving unit on its operating current is eliminated, and the problem that the display brightness of the light emitting element is uneven due to the inconsistency of the threshold voltage is solved, and the display quality of the display device is improved.
  • a pixel driving circuit for driving a light emitting element.
  • the pixel driving circuit includes: a scan line for providing a scan signal; a power line including first and second power lines for supplying power to the pixel driving circuit; and a data line for providing a data signal; and illumination control a signal line for providing an illumination control signal; a driving unit having an input end connected to one end of the light emitting element, a control end connected to the first intermediate node, an output end connected to the second intermediate node, and the other end of the light emitting element Connected to the first power line; the charging unit has an input connected to the data line, the control end is connected to the scan line, the output end is connected to the first intermediate node; and the storage unit has a first end connected to the second intermediate a node, the second end is connected to the third intermediate node; the reset unit has an input connected to the reference signal line, the control end is connected to the scan line, the output end is connected to the third intermediate node, and the illumination control
  • the driving unit includes a driving transistor, a gate of the driving transistor is connected to the first intermediate node, a first electrode is connected to the one end of the light emitting element, and the second electrode is opposite to the first Two intermediate nodes are connected, the first electrode is one of a source and a drain, and the second electrode is the other of the source and the drain.
  • the reference signal line provides a DC reference voltage greater than a data voltage
  • the reset unit includes: a switching transistor, a gate of the switching transistor is connected to the scan line, and a first electrode of the switching transistor Connected to the reference signal line, a second electrode of the switching transistor is connected to the third intermediate node; the first electrode is one of a source and a drain, and the second electrode is a source and The other electrode in the drain.
  • the light emission control unit includes a first transistor and a third transistor, and the gates of the first transistor and the third transistor are both connected to the light emission control signal line, and the first electrode of the first transistor Connected to the second intermediate node, the second electrode is connected to the second power line, the first electrode of the third transistor is connected to the first intermediate node, and the second electrode is connected to the third intermediate node
  • the first electrode is one of a source and a drain, and the second electrode is the other of the source and the drain.
  • the charging unit includes a second transistor, a gate of the second transistor is connected to the scan line, a first electrode is connected to the data line, and a second electrode is connected to the first intermediate node;
  • the first electrode is one of a source and a drain, and the second electrode is the other of the source and the drain.
  • the storage unit comprises a storage capacitor.
  • the driving transistor, the switching transistor, the first transistor, the second transistor, and the third transistor are all N-type thin film transistors.
  • a display device comprising: a plurality of light emitting elements, and a pixel driving circuit as described above for driving the light emitting elements.
  • a row of pixel drive circuits connected to the same scan line share a reset unit.
  • the shared reset unit is disposed outside the effective display area.
  • a pixel driving method which is applied to the pixel driving circuit, the pixel driving method includes: supplying power to the pixel driving circuit through a power line; and providing a scan signal through the scan line; And providing an emission control signal through the illumination control signal line, the illumination control signal being at a low level when the scan signal is at a high level, so that the pixel drive circuit enters a charging phase, and the scan signal changes from a high level to a low level. Normally, it changes to a high level, so that the pixel driving circuit enters the driving phase.
  • a data signal is provided to charge the memory unit through the charging unit.
  • the illumination control signal is configured to remain low for a period of time after the scan signal transitions from a high level to a low level, and then transitions to a high level.
  • the first transistor and the third transistor are turned off, the second transistor is turned on, and the driving transistor is also turned on, and the data signal charges the storage capacitor by controlling the gate voltage of the driving transistor until The drive transistor is turned off.
  • the first transistor and the third transistor are turned on, the switching transistor of the reset unit and the second transistor are turned off, and the driving transistor is turned on to drive the light emitting element.
  • the illumination control signal may be configured to remain low for a period of time after the charging phase of the pixel drive circuit, ie to enter the buffer phase and then to go high.
  • the first transistor, the second transistor, and the third transistor are turned off, the switching transistor of the reset unit is turned off, and the driving transistor is kept turned off.
  • the pixel driving circuit sets the reset unit such that the storage capacitor not only stores the data voltage in the charging phase but also stores the threshold voltage of the driving unit, thereby compensating the driving unit in the driving phase, so that The operating current of the driving unit is no longer affected by the threshold voltage, thereby eliminating the influence of the threshold voltage of the driving unit on its operating current, and solving the technical problem that the display brightness of the light-emitting elements is inconsistent due to the inconsistent threshold voltage of the driving unit.
  • the circuit ie, the reset unit
  • the aperture ratio of the pixels can be greatly increased, thereby reducing the organic light-emitting layer while obtaining uniform display brightness.
  • the current density extends the life of the display panel.
  • FIG. 1 is a schematic structural view of a conventional pixel driving circuit
  • FIG. 3 is a schematic structural diagram of a pixel driving circuit in a display device according to an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a pixel driving circuit in a display device according to another embodiment of the present invention.
  • FIG. 5 is a schematic diagram showing an operation timing of a pixel driving circuit in a display device according to another embodiment of the present invention.
  • FIG. 6 is an equivalent circuit diagram of a charging phase of a pixel driving circuit in a display device according to another embodiment of the present invention.
  • FIG. 7 is an equivalent circuit diagram of a buffer stage of a pixel driving circuit in a display device according to another embodiment of the present invention.
  • FIG. 8 is an equivalent circuit diagram of a driving phase of a pixel driving circuit in a display device according to another embodiment of the present invention.
  • FIG. 9 is a schematic structural diagram of a pixel driving circuit in a display device according to still another embodiment of the present invention.
  • FIG. 10 shows a flow chart of a pixel driving method according to an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of a pixel driving circuit 300 in a display device according to an embodiment of the present invention.
  • the pixel driving circuit 300 is for driving the light emitting element 3000.
  • the light emitting element 3000 is shown as a light emitting diode OLED.
  • the pixel driving circuit 300 of the embodiment of the present invention includes: a scan line S(n) for providing a scan signal; and a power line including a first power line ELVDD and a second power line ELVSS for The pixel driving circuit 300 supplies power; the data line DATA is used to provide a data signal; and the lighting control signal line EMB(n) is used to provide an illumination control signal.
  • the pixel driving circuit 300 further includes a driving unit 310 having an input end connected to one end of the light emitting element, a control end connected to the first intermediate node p, an output end connected to the second intermediate node q, and the other end of the light emitting element Connected to the first power line ELVDD;
  • the charging unit 320 has an input connected to the data line DATA and a control end connected to the scan line S(n), The output terminal is connected to the first intermediate node p;
  • the storage unit 330 has a first end connected to the second intermediate node q, a second end connected to the third intermediate node r, and a reset unit 340 whose input terminal is connected to the reference signal line Vref
  • the control terminal is connected to the scan line s(n), and the output terminal is connected to the third intermediate node r.
  • the illumination control unit 350 has a first input terminal connected to the second power source line ELVSS, and a second input terminal and the first intermediate portion.
  • the node p is connected, the control end is connected to the illumination control signal line EMB(n), the first output end is connected to the second intermediate node q, and the second output end is connected to the third intermediate node r.
  • the charging unit 320 turns on the data line and the first intermediate node p
  • the reset unit 340 turns on the reference signal line Vref and the third intermediate node r
  • the driving unit 310 is Under the control of the data signal, a charging voltage associated with the data voltage and its threshold voltage is provided at the output, and the storage unit 330 stores the charging voltage via the second intermediate node q.
  • the light emission control unit 350 turns on the first intermediate node p and the third intermediate node r, thereby turning on the memory unit 330.
  • the second end and the control end of the driving unit 310 are such that the driving current supplied from the driving unit 310 to the light emitting element 3000 is independent of its threshold voltage.
  • FIG. 4 is a schematic structural diagram of a pixel driving circuit in a display device according to another embodiment of the present invention.
  • the pixel driving circuit 400 of the embodiment of the present invention includes: a scan line S(n) for providing a scan signal; and a power line including a first power line ELVDD and a second power line ELVSS for The pixel driving circuit 400 supplies power; the data line data_n is used to provide a data signal; and the lighting control signal line EMB(n) is used to provide an illumination control signal.
  • the driving unit includes a driving transistor DTFT, a gate of the driving transistor is connected to the first intermediate node p, and a drain is connected to one end of the light emitting element.
  • the source is connected to the second intermediate node q.
  • the drain of the drive transistor corresponds to the input of the drive unit
  • the gate corresponds to the control terminal of the drive unit
  • the source corresponds to the output of the drive unit.
  • the reset unit includes: a switching transistor whose gate is connected to the scan line S(n), the source of the switching transistor The reference signal lines are connected, and a drain of the switching transistor is connected to a third intermediate node r.
  • the source of the switching transistor corresponds to the input of the reset unit
  • the gate corresponds to the control terminal of the reset unit
  • the drain corresponds to the output of the reset unit.
  • an illumination control unit package a first transistor T1 and a third transistor T3, the gates of the first transistor T1 and the third transistor T3 are both connected to the light emission control signal line EMB(n), the drain of the first transistor and the second intermediate node Connected to q, the source is connected to the second power supply line ELVSS, the drain of the third transistor T3 is connected to the first intermediate node p, and the source is connected to the third intermediate node r.
  • the source of the first transistor corresponds to the first input of the illumination control unit
  • the drain of the third transistor corresponds to the second input of the illumination control unit
  • the gate of the first transistor and the third transistor Corresponding to the control end of the illumination control unit, the drain of the first transistor corresponds to the first output of the illumination control unit, and the source of the third transistor corresponds to the second output of the illumination control unit.
  • the charging unit includes a second transistor T2 whose gate is connected to the scanning line S(n), and the drain and data line data_n Connected, the source is connected to the first intermediate node p.
  • the drain of the second transistor corresponds to the input of the charging unit
  • the gate corresponds to the control terminal of the charging unit
  • the source corresponds to the output of the charging unit.
  • the memory cell includes a storage capacitor C.
  • the storage capacitor C is connected between the second intermediate node p and the third intermediate node r.
  • the driving thin film transistor DTFT, the switching transistor, the first transistor T1, the second transistor T2, and the third transistor T3 shown in FIG. 4 may all be N-type thin film transistors.
  • the source and drain of the driving thin film transistor DTFT, the switching transistor, the first transistor T1, the second transistor T2, and the third transistor T3 may be interchanged depending on the type of transistor used.
  • the N-type transistor may be an enhancement transistor of the LTPS process or a depletion transistor of an oxide process.
  • the individual transistors in accordance with embodiments of the present invention may also be other types of transistors.
  • FIG. 5 is a schematic diagram of operational timings of the pixel driving circuit 400 according to an embodiment of the present invention.
  • the pixel driving circuit 400 includes three stages, a first stage, a charging stage, a second stage, a buffering stage, and a third stage, a driving stage.
  • FIG. 6 is an equivalent circuit diagram of a charging phase of the pixel driving circuit 400 according to an embodiment of the present invention.
  • FIG. 7 is an equivalent circuit diagram of a buffer stage of the pixel driving circuit 400 according to an embodiment of the present invention.
  • FIG. 8 is an equivalent circuit diagram of a driving phase of the pixel driving circuit 400 according to an embodiment of the present invention.
  • the workflow of the pixel driving circuit 400 according to an embodiment of the present invention will be described below with reference to FIGS. 5-8.
  • the first stage the scan signal Vs(n) provided by the scan line S(n) is at a high level, the data line provides a data signal Vdata, and the illumination control signal Vemb(n) provided by the illumination control signal line EMB(n) is low. level.
  • the reference signal line provides a DC reference voltage that is greater than the data voltage.
  • T1, T3 are off, T2 When turned on, the switching transistor of the reset unit is also turned on by the control of the scan signal.
  • the reference level provided by the reference signal line Vref reaches the r point of the nth pixel, and the voltage of the data signal Vdata reaches the gate of the DTFT, since the source of the DTFT is connected to the power supply low level ELVSS before the T1 is turned off, After the T1 is turned off, the DTFT has not charged the storage capacitor C. The potential at the q point is still ELVSS. Since the voltage of the data signal Vdata is higher than ELVSS, the DTFT is turned on, and the higher level of the drain of the DTFT passes through the DTFT to the storage capacitor C.
  • Vthd is the threshold voltage of the DTFT
  • Vthd is a positive value for the TFT of the LTPS process
  • Vthd may be a negative value for the TFT of the oxide process.
  • the second stage the scan signal Vs(n) supplied from the scan line S(n) is turned to a low level, the data signal Vdata supplied from the data line is turned to a low level, and the light emission control signal Vemb(n) is kept at a low level.
  • T1, T2, and T3 are turned off, the switching transistor of the reset unit is turned off, and the DTFT is kept off.
  • This phase is the buffer phase, mainly to avoid cluttered signals caused by simultaneous signal transitions.
  • the third stage the scan signal Vs(n) provided by the scan line S(n) is kept at a low level, the data signal Vdata supplied from the data line is kept at a low level, and the light emission control signal Vemb(n) is turned to a high level.
  • the illuminating current for driving the OLED is only related to the reference voltage Vref and the data voltage Vdata, and has no relationship with the threshold voltage Vthd of the DTFT, and K is a constant related to the process and design, since Vref is greater than or equal to Vdata. Therefore, I oled is at least 0, and the representation is at 0 gray scale.
  • a buffering phase is provided in the embodiments described above, it will be apparent to those skilled in the art that the buffering phase is to avoid cluttering signals caused by simultaneous signal transitions. Obviously, the buffer phase is not required.
  • FIG. 9 is a schematic structural diagram of a pixel driving circuit 900 in a display device according to still another embodiment of the present invention.
  • the difference between the pixel driving circuit 900 according to this embodiment and the pixel driving circuit 400 shown in FIG. 4 is only The light emitting element OLED is moved from the drain of the driving transistor DTFT to the source of the driving transistor DTFT. The other components remain unchanged.
  • the timing of the circuit operation is the same as the pixel drive circuit implementation shown in FIG. I will not repeat them here for the sake of brevity.
  • FIGS. 4 and 9 show only one of them.
  • the display device includes a plurality of light emitting elements and a pixel driving circuit for driving each of the light emitting elements.
  • the reset unit of each pixel driving circuit is the same. Moreover, the reset unit is controlled by the scan signal. Therefore, according to an embodiment of the present invention, a row of pixel driving circuits connected to the same scanning line can be made to share one reset unit.
  • the shared reset unit is shown in FIG. 4 as being shared by a plurality of light emitting elements (ie, pixel driving units) outside each pixel driving circuit.
  • the shared reset unit can be disposed outside the effective display area of the display device such that the aperture ratio of the pixel is greatly increased. Thereby, while obtaining uniform display brightness, the current density of the organic light-emitting layer is lowered, and the service life of the display panel is prolonged.
  • one row of pixel driving units shares one reset unit.
  • two shared reset units are shown end to end in a row in order to reduce the delay in receiving current due to the tail pixels being farther from the reset unit of the header. It is also possible that a row of light-emitting elements share a reset unit.
  • FIG. 10 shows a flow chart of a pixel driving method according to an embodiment of the present invention.
  • the method is applied to a pixel driving circuit according to an embodiment of the present invention.
  • the driving method includes: first, supplying power to the pixel driving circuit through the power line at S1010; then providing a scanning signal through the scanning line at S1020, and providing an illumination control signal at the illuminating control signal line, the illuminating control The signal is at a low level when the scan signal is at a high level, so that the pixel driving unit enters a charging phase, and transitions to a high level when the scanning signal transitions to a low level, so that the pixel driving circuit enters a driving phase.
  • the data signal is supplied for the nth pixel.
  • the light emission control signal Vemb(n) is a low level, and the data signal is paired with the storage capacitor C. Charging is performed; when the scanning signal is turned to a low level, the lighting control signal is turned to a high level, the pixel driving circuit enters a driving phase, and the driving unit supplies a driving current to the light emitting element. Since the storage capacitor compensates for the threshold voltage of the driving unit, the driving current supplied from the driving unit to the light emitting element is independent of the threshold voltage of the driving unit.
  • the light emission control signal Vemb(n) may be configured to remain low for a period of time after the scan signal transitions from a high level to a low level, and then to a high level, that is, the pixel driving circuit enters a driving phase.
  • the first transistor and the third transistor are turned off, and the second transistor is turned on and simultaneously driven.
  • the transistor is also turned on, and the data signal charges the storage capacitor by controlling the gate voltage of the drive transistor until the drive transistor is turned off.
  • the switching transistor of the reset unit is turned off, and the driving transistor is kept turned off.
  • the driving phase of the pixel driving circuit the first transistor and the third transistor are turned on, the switching transistor of the reset unit, and the second transistor are both turned off, and the driving transistor is turned on to drive the light emitting element.

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Abstract

一种像素驱动电路（300）、显示装置和像素驱动方法。像素驱动电路（300）包括复位单元（340），设置复位单元（340），使得存储电容器（C）在充电阶段不仅存储数据电压（Vdata），而且存储驱动单元（310）的阈值电压（Vthd），从而在驱动阶段对驱动单元（310）进行补偿，使得驱动单元（310）的工作电流不再受阈值电压（Vthd）的影响，从而消除了驱动单元（310）的阈值电压（Vthd）对其工作电流的影响，解决了由于阈值电压（Vthd）不一致而导致发光元件（3000）的显示亮度不均匀的问题，提高了显示装置的显示质量。此外，通过将复位单元（340）移动到有效显示区之外，一行像素驱动电路（300）共享复位单元（340），可以大大增加像素的开口率，降低了有机发光层的电流密度，延长了显示面板的使用寿命。

Description

一种像素驱动电路、像素驱动方法和显示装置 技术领域
本发明涉及显示技术，更具体地，涉及一种像素驱动电路、显示装置和像素驱动方法。
背景技术
有机发光显示器(AMOLED)是当今平板显示器研究领域的热点之一，与液晶显示器(LCD)相比，有机发光二极管(OLED)具有低能耗、生产成本低、自发光、宽视角及响应速度快等优点。目前，在手机、PDA、数码相机等显示领域OLED已经开始取代传统的LCD显示屏。其中，像素驱动是AMOLED显示器的核心技术内容，具有重要的研究意义。
与TFT-LCD利用稳定的电压控制亮度不同，OLED属于电流驱动，需要稳定的电流来控制发光。如图1所示，传统的AMOLED像素驱动电路采用2T1C像素驱动电路。该电路只有1个驱动薄膜晶体管(DTFT)，一个开关薄膜晶体管(TFT)(即T1)和一个存储电容器C组成。当扫描线选通(即扫描)某一行时，扫描信号Vscan为低电平信号，T1导通，数据信号Vdara写入存储电容器C。当该行扫描结束后，Vscan转变为高电平信号，T1关断，存储在存储电容器C上的栅极电压驱动DTFT，使其产生电流来驱动OLED，保证OLED在一帧显示内持续发光。驱动薄膜晶体管DTFT在达到饱和时的电流公式为Ioled＝K(Vgs-Vth)^2，其中K为与工艺和设计相关的参数，Vgs为驱动薄膜晶体管的栅-源电压，Vth为驱动薄膜晶体管的阈值电压。图2示出了如图1所示的像素驱动电路的操作时序图，示出了扫描线提供的扫描信号和数据线提供的数据信号的时序关系。
AMOLED能够发光是由驱动薄膜晶体管DTFT在饱和状态时产生的电流所驱动，不管是低温多晶硅(LTPS)工艺还是氧化物(Oxide)工艺，由于工艺的不均匀性，都会导致不同位置的驱动薄膜晶体管DTFT出现阈值电压的差异，这对于电流驱动器件的一致性来说是很致命的。因为输入相同的驱动电压时，不同的阈值电压会产生不同的驱动电流，造成流过OLED的电流的不一致性，使得显示亮度不均匀，从而影响整个图像的显示效果。
目前提出的解决方案是在各像素内加入补偿单元，通过补偿驱动晶体管来消 除阈值电压Vth的影响。但是，这种解决方案由于补偿单元中的晶体管的增加往往使得开口率迅速下降。在相同驱动电流的条件下，虽然开口率低的显示面板的亮度不一定会下降，但其有机发光层的电流密度必然增加，这容易导致有机发光层材料的老化，整个显示面板的使用寿命下降。
因此，需要一种能够提高驱动晶体管的驱动电流的一致性，从而提高显示质量，也不会增加电流密度的方法。
发明内容
本公开提出了一种像素驱动电路、显示装置和像素驱动方法，能够通过对发光元件的驱动单元的阈值电压进行补偿，提高显示质量。具体地，通过设置复位单元，使得存储电容器在充电阶段不仅存储数据电压，而且存储驱动单元的阈值电压，从而在驱动阶段对驱动单元进行补偿，使得驱动单元的工作电流不再受阈值电压的影响，从而消除了驱动单元的阈值电压对其工作电流的影响，解决了由于阈值电压不一致而导致发光元件的显示亮度不均匀的问题，提高了显示装置的显示质量。
根据本发明的一个方面，提出了一种像素驱动电路，用于对发光元件进行驱动。所述像素驱动电路包括：扫描线，用于提供扫描信号；电源线，包括第一和第二电源线，用于给所述像素驱动电路供电；和数据线，用于提供数据信号；发光控制信号线，用于提供发光控制信号；驱动单元，其输入端连接到所述发光元件的一端，控制端连接到第一中间节点，输出端连接到第二中间节点，所述发光元件的另一端连接到第一电源线；充电单元，其输入端连接到数据线，控制端连接到扫描线，输出端连接到所述第一中间节点；存储单元，其第一端连接到所述第二中间节点，第二端连接到第三中间节点；复位单元，其输入端连接到参考信号线，控制端连接到扫描线，输出端连接到所述第三中间节点；发光控制单元，其第一输入端与第二电源线相连，第二输入端与所述第一中间节点相连，控制端与所述发光控制信号线相连，第一输出端与所述第二中间节点相连，第二输出端与所述第三中间节点相连；其中，在像素驱动电路的充电阶段，在扫描信号的控制下，所述充电单元导通数据线和所述第一中间节点，所述复位单元导通所述参考信号线和所述第三中间节点，所述驱动单元在数据信号的控制下，在输出端提供与数据电压及其阈值电压有关的充电电压，所述存储单元存储所述充电电压； 在像素驱动电路的驱动阶段，在所述发光控制信号的控制下，所述发光控制单元导通所述第一中间节点和所述第三中间节点，从而导通所述存储单元的所述第二端和所述驱动单元的控制端，使得所述驱动单元向所述发光元件提供的驱动电流与其阈值电压无关。
优选地，所述驱动单元包括驱动晶体管，所述驱动晶体管的栅极与所述第一中间节点相连，第一电极与所述发光元件的所述一端相连，所述第二电极与所述第二中间节点相连，所述第一电极是源极和漏极中的一个电极，所述第二电极是源极和漏极中的另一个电极。
优选地，所述参考信号线提供一个大于数据电压的直流参考电压，并且所述复位单元包括：开关晶体管，所述开关晶体管的栅极与所述扫描线相连，所述开关晶体管的第一电极与所述参考信号线相连，所述开关晶体管的第二电极与所述第三中间节点相连；所述第一电极是源极和漏极中的一个电极，所述第二电极是源极和漏极中的另一个电极。
优选地，所述发光控制单元包括第一晶体管和第三晶体管，所述第一晶体管和所述第三晶体管的栅极均与所述发光控制信号线相连，所述第一晶体管的第一电极与所述第二中间节点相连，第二电极与所述第二电源线相连，所述第三晶体管的第一电极与所述第一中间节点相连，第二电极与所述第三中间节点相连；所述第一电极是源极和漏极中的一个电极，所述第二电极是源极和漏极中的另一个电极。
优选地，所述充电单元包括第二晶体管，所述第二晶体管的栅极与所述扫描线相连，第一电极与所述数据线相连，第二电极与所述第一中间节点相连；所述第一电极是源极和漏极中的一个电极，所述第二电极是源极和漏极中的另一个电极。
优选地，所述存储单元包括存储电容器。
优选地，所述驱动晶体管、开关晶体管、第一晶体管、第二晶体管以及第三晶体管均为N型薄膜晶体管。
根据本发明的第二方面，提供一种显示装置，包括：多个发光元件，以及如上所述的像素驱动电路，用于对所述发光元件进行驱动。
优选地，与同一根扫描线相连的一行像素驱动电路共享一个复位单元。
优选地，所述共享的复位单元设置在有效显示区之外。
根据本发明的第三方面，提供一种像素驱动方法，应用于上述像素驱动电路，所述像素驱动方法包括：通过电源线，给所述像素驱动电路供电；通过所述扫描线提供扫描信号；以及通过所述发光控制信号线提供发光控制信号，所述发光控制信号在扫描信号为高电平时处于低电平，使得像素驱动电路进入充电阶段，而在扫描信号从高电平转变为低电平时转变为高电平，使得像素驱动电路进入驱动阶段。
优选地，在所述扫描信号为高电平时，提供数据信号，以通过所述充电单元，对所述存储单元进行充电。
优选地，所述发光控制信号被配置为在扫描信号从高电平转变为低电平之后，保持为低电平一段时间，然后转变为高电平。
优选地，在像素驱动电路的充电阶段，第一晶体管、第三晶体管截止，第二晶体管导通，同时驱动晶体管也导通，数据信号通过控制驱动晶体管的栅极电压对存储电容器进行充电，直至驱动晶体管截止。
优选地，在像素驱动电路的驱动阶段，第一晶体管、第三晶体管导通，复位单元的开关晶体管和第二晶体管截止，驱动晶体管导通，对发光元件进行驱动。
优选地，所述发光控制信号可以被配置为在像素驱动电路的充电阶段之后，保持为低电平一段时间，即进入缓冲阶段，然后变为高电平。
优选地，当扫描信号和发光控制信号均为低电平时，第一晶体管、第二晶体管和第三晶体管截止，复位单元的开关晶体管截止，驱动晶体管保持截止。
与传统技术相比，根据本发明实施例的像素驱动电路通过设置复位单元，使得存储电容器在充电阶段不仅存储数据电压，而且存储驱动单元的阈值电压，从而在驱动阶段对驱动单元进行补偿，使得驱动单元的工作电流不再受阈值电压的影响，从而消除了驱动单元的阈值电压对其工作电流的影响，解决了由于驱动单元的阈值电压不一致而导致的发光元件的显示亮度不一致的技术问题。此外，通过将每一行发光元件的像素驱动电路共有的电路(即复位单元)移动到有效显示区之外，可以大大增加像素的开口率，从而在获得均匀显示亮度的同时，降低了有机发光层的电流密度，延长了显示面板的使用寿命。
附图说明
通过下面结合附图说明本发明的优选实施例，将使本发明的上述及其它目的、特征和优点更加清楚，其中：
图1是传统像素驱动电路的结构示意图；
图2是传统像素驱动电路的操作时序图；
图3是根据本发明实施例的显示装置中的像素驱动电路的结构示意图；
图4是根据本发明另一实施例的显示装置中的像素驱动电路的结构示意图；
图5是根据本发明另一实施例的显示装置中的像素驱动电路的操作时序的示意图；
图6是根据本发明另一实施例的显示装置中的像素驱动电路的充电阶段的等效电路图；
图7是根据本发明另一实施例的显示装置中的像素驱动电路的缓冲阶段的等效电路图；
图8是根据本发明另一实施例的显示装置中的像素驱动电路的驱动阶段的等效电路图；
图9是根据本发明又一实施例的显示装置中的像素驱动电路的结构示意图。
图10示出了根据本发明实施例的像素驱动方法的流程图。
具体实施方式
以下参照附图，对本发明的示例实施例进行详细描述。在以下描述中，一些具体实施例仅用于描述目的，而不应该理解为对本发明有任何限制，而只是本发明的示例。在可能导致对本发明的理解造成混淆时，将省略常规结构或构造。
图3是根据本发明实施例的显示装置中的像素驱动电路300的结构示意图。像素驱动电路300用于对发光元件3000进行驱动。在图3中，发光元件3000被示出为发光二极管OLED。如图3所示，本发明实施例的像素驱动电路300包括：扫描线S(n)，用于提供扫描信号；电源线，包括第一电源线ELVDD和第二电源线ELVSS，用于给所述像素驱动电路300供电；数据线DATA，用于提供数据信号；发光控制信号线EMB(n)，用于提供发光控制信号。所述像素驱动电路300还包括：驱动单元310，其输入端连接到发光元件的一端，控制端连接到第一中间节点p，输出端连接到第二中间节点q，所述发光元件的另一端连接到第一电源线ELVDD；充电单元320，其输入端连接到数据线DATA，控制端连接到扫描线S(n)， 输出端连接到第一中间节点p；存储单元330，其第一端连接到第二中间节点q，第二端连接到第三中间节点r；复位单元340，其输入端连接到参考信号线Vref，控制端连接到扫描线s(n)，输出端连接到第三中间节点r；发光控制单元350，其第一输入端与第二电源线ELVSS相连，第二输入端与所述第一中间节点p相连，控制端与所述发光控制信号线EMB(n)相连，第一输出端与第二中间节点q相连，第二输出端与第三中间节点r相连。
在像素驱动电路300的充电阶段，在扫描信号的控制下，充电单元320导通数据线和第一中间节点p，复位单元340导通参考信号线Vref和第三中间节点r，驱动单元310在数据信号的控制下，在输出端提供与数据电压及其阈值电压有关的充电电压，存储单元330经由第二中间节点q，存储所述充电电压。
在像素驱动电路的驱动阶段，在发光控制信号线EMB(n)提供的发光控制信号的控制下，发光控制单元350导通第一中间节点p和第三中间节点r，从而导通存储单元330的第二端和驱动单元310的控制端，使得驱动单元310向发光元件3000提供的驱动电流与其阈值电压无关。
图4是根据本发明另一实施例的显示装置中的像素驱动电路的结构示意图。
如图4所示，本发明实施例的像素驱动电路400包括：扫描线S(n)，用于提供扫描信号；电源线，包括第一电源线ELVDD和第二电源线ELVSS，用于给所述像素驱动电路400供电；数据线data_n，用于提供数据信号；发光控制信号线EMB(n)，用于提供发光控制信号。
如图4所示，在根据本发明实施例的像素驱动电路400中，驱动单元包括驱动晶体管DTFT，所述驱动晶体管的栅极与第一中间节点p相连，漏极与发光元件的一端相连，源极与第二中间节点q相连。在该实施例中，驱动晶体管的漏极对应于驱动单元的输入端，栅极对应于驱动单元的控制端，源极对应于驱动单元的输出端。
如图4所示，在根据本发明实施例的像素驱动电路400中，复位单元包括：开关晶体管，所述开关晶体管的栅极与扫描线S(n)相连，所述开关晶体管的源极与所述参考信号线相连，所述开关晶体管的漏极与第三中间节点r相连。在该实施例中，开关晶体管的源极对应于复位单元的输入端，栅极对应于复位单元的控制端，漏极对应于复位单元的输出端。
如图4所示，在根据本发明实施例的像素驱动电路400中，发光控制单元包 括第一晶体管T1和第三晶体管T3，所述第一晶体管T1和所述第三晶体管T3的栅极均与发光控制信号线EMB(n)相连，第一晶体管的漏极与第二中间节点q相连，源极与第二电源线ELVSS相连，第三晶体管T3的漏极与第一中间节点p相连，源极与第三中间节点r相连。在该实施例中，第一晶体管的源极对应于发光控制单元的第一输入端，第三晶体管的漏极对应于发光控制单元的第二输入端，第一晶体管和第三晶体管的栅极对应于发光控制单元的控制端，第一晶体管的漏极对应于发光控制单元的第一输出端，第三晶体管的源极对应于发光控制单元的第二输出端。
如图4所示，在根据本发明实施例的像素驱动电路400中，充电单元包括第二晶体管T2，所述第二晶体管的栅极与扫描线S(n)相连，漏极与数据线data_n相连，源极与第一中间节点p相连。在该实施例中，第二晶体管的漏极对应于充电单元的输入端，栅极对应于充电单元的控制端，源极对应于充电单元的输出端。
如图4所示，在根据本发明实施例的像素驱动电路400中，存储单元包括存储电容器C。存储电容器C连接在第二中间节点p和第三中间节点r之间。
图4所示的驱动薄膜晶体管DTFT、开关晶体管、第一晶体管T1、第二晶体管T2以及第三晶体管T3可以均为N型薄膜晶体管。根据所使用的晶体管的类型，驱动薄膜晶体管DTFT、开关晶体管、第一晶体管T1、第二晶体管T2以及第三晶体管T3的源极和漏极可以互换。
该N型晶体管可以是LTPS工艺的增强型晶体管，也可以是氧化物工艺的耗尽型晶体管。当然，根据本发明实施例的各个晶体管也可以是其他类型的晶体管。
图5是根据本发明实施例的像素驱动电路400的操作时序的示意图。如图5所示，像素驱动电路400包括三个阶段，即第一阶段，充电阶段；第二阶段，缓冲阶段；以及第三阶段，驱动阶段。
图6是根据本发明实施例的像素驱动电路400的充电阶段的等效电路图。图7是根据本发明实施例的像素驱动电路400的缓冲阶段的等效电路图。图8是根据本发明实施例的像素驱动电路400的驱动阶段的等效电路图。下面结合图5-8来描述根据本发明实施例的像素驱动电路400的工作流程。
第一阶段：扫描线S(n)提供的扫描信号Vs(n)为高电平，数据线提供数据信号Vdata，发光控制信号线EMB(n)提供的发光控制信号Vemb(n)为低电平。参考信号线提供一个大于数据电压的直流参考电压。对于第n个像素，T1、T3截止，T2 导通，同时复位单元的开关晶体管受扫描信号的控制也导通。因此参考信号线Vref提供的参考电平到达第n个像素的r点，同时数据信号Vdata的电压到达DTFT的栅极，由于DTFT的源极在T1截止之前与电源低电平ELVSS相连，因此在T1截止后DTFT还没有对存储电容器C充电，q点的电位仍为ELVSS，由于数据信号Vdata的电压高于ELVSS，因此DTFT导通，DTFT的漏极的较高电平通过DTFT对存储电容器C充电，q点的电位不断升高，直到q点电位到达Vdata-Vthd，此时DTFT才截止。Vthd为DTFT的阈值电压，对于LTPS工艺的TFT，Vthd为正值，对于氧化物工艺的TFT，Vthd可能为负值。此时存储电容器C两端的电压为Vc＝Vref-(Vdata-Vthd)；
第二阶段：扫描线S(n)提供的扫描信号Vs(n)转变为低电平，数据线提供的数据信号Vdata转变为低电平，发光控制信号Vemb(n)保持为低电平。对于第n个像素，T1、T2、T3截止，复位单元的开关晶体管截止，DTFT保持截止状态。该阶段为缓冲阶段，主要是为了避免信号同时跳变引起的杂乱信号。
第三阶段：扫描线S(n)提供的扫描信号Vs(n)保持为低电平，数据线提供的数据信号Vdata保持为低电平，发光控制信号Vemb(n)转变为高电平。对于第n个像素，T1、T3导通，复位单元的开关晶体管和T2均截止。由于T2截止，因此存储电容器C两端的电压Vc保持不变，并且此时的Vc即为DTFT的栅源电压，即Vgs＝Vc＝Vref-(Vdata-Vthd)，通过发光元件OLED的发光电流由DTFT的Vgs电压决定。
Figure PCTCN2015079904-appb-000001
由上式可以知道，驱动OLED的发光电流只与参考电压Vref和数据电压Vdata有关系，而与DTFT的阈值电压Vthd已经没有关系了，K为与工艺和设计相关的常数，由于Vref大于等于Vdata，因此Ioled最小为0，此时代表处于0灰阶。
虽然在上面所述的实施例中提供了缓冲阶段，但是本领域技术人员可以明了，缓冲阶段是为了避免信号同时跳变引起的杂乱信号。显然，缓冲阶段不是必需的。
图9是根据本发明又一实施例的显示装置中的像素驱动电路900的结构示意图。
根据该实施例的像素驱动电路900与图4所示的像素驱动电路400的区别仅 在于发光元件OLED从驱动晶体管DTFT的漏极移动到了驱动晶体管DTFT的源极。其他元件保持不变。电路操作的时序和图4所示的像素驱动电路实施是相同的。在此为了简洁起见不再赘述。
虽然在图4和图9中示出了驱动单元、充电单元、存储单元、复位单元以及发光控制单元的具体结构，但是本领域技术人员可以明了，这些单元可以采用其他结构。图4和图9仅示出了其中的一个示例。
从图4可见，显示装置包括多个发光元件以及用于驱动每个发光元件的像素驱动电路。每个像素驱动电路的复位单元是相同的。而且，复位单元受扫描信号的控制。因此，根据本发明的实施例，可以使得与同一根扫描线相连的一行像素驱动电路共享一个复位单元。在图4中将该共享的复位单元示出为在每个像素驱动电路之外，由多个发光元件(也即，像素驱动单元)共享。共享的复位单元可以设置在显示装置的有效显示区之外，使得像素的开口率大大增加。从而，在获得均匀显示亮度的同时，降低了有机发光层的电流密度，延长了显示面板的使用寿命。
类似地，在图9所示的显示装置中，一行像素驱动单元共享一个复位单元。在图4和图9中，在一行中首尾示出了两个共享的复位单元是为了减少由于尾部的像素距离首部的复位单元较远而导致其接收电流的延迟。一行发光元件共享一个复位单元也是可以的。
图10示出了根据本发明实施例的像素驱动方法的流程图。该方法应用于根据本发明实施例的像素驱动电路。如图所示，该驱动方法包括：首先，在S1010，通过电源线，给像素驱动电路供电；然后在S1020通过扫描线提供扫描信号，并在发光控制信号线提供发光控制信号，所述发光控制信号在扫描信号为高电平时处于低电平，使得像素驱动单元进入充电阶段，而在扫描信号转变为低电平时转变为高电平，使得像素驱动电路进入驱动阶段。
如图5所示，在扫描信号选中一行像素，即为高电平时，针对第n个像素提供数据信号，此时，发光控制信号Vemb(n)为低电平，由数据信号对存储电容器C进行充电；在扫描信号转变为低电平时，发光控制信号转变为高电平，该像素驱动电路进入驱动阶段，驱动单元向发光元件提供驱动电流。由于存储电容器对驱动单元的阈值电压进行补偿，因此驱动单元向发光元件提供的驱动电流与驱动单元的阈值电压无关。
如上所述，为了使得像素驱动电路更加稳定，可以在充电阶段和驱动阶段之间提供一个缓冲阶段。因此，发光控制信号Vemb(n)可以被配置为在扫描信号从高电平转变为低电平之后，保持为低电平一段时间，然后转变为高电平，即像素驱动电路进入驱动阶段。
更具体地，结合图4所示的像素驱动电路，在应用图5所示的操作时序时，在像素驱动电路的充电阶段，第一晶体管、第三晶体管截止，第二晶体管导通，同时驱动晶体管也导通，数据信号通过控制驱动晶体管的栅极电压对存储电容器充电，直至驱动晶体管截止。当扫描信号和发光控制信号均为低电平时，第一晶体管、第二晶体管和第三晶体管截止，复位单元的开关晶体管截止，驱动晶体管保持截止。在像素驱动电路的驱动阶段，第一晶体管、第三晶体管导通，复位单元的开关晶体管和第二晶体管均截止，驱动晶体管导通，对发光元件进行驱动。
应当注意的是，在以上的描述中，仅以示例的方式，示出了本发明的技术方案，但并不意味着本发明局限于上述步骤和结构。在可能的情形下，可以根据需要对步骤和结构进行调整和取舍。因此，某些步骤和单元并非实施本发明的总体发明思想所必需的元素。因此，本发明所必需的技术特征仅受限于能够实现本发明的总体发明思想的最低要求，而不受以上具体实例的限制。
至此已经结合优选实施例对本发明进行了描述。应该理解，本领域技术人员在不脱离本发明的精神和范围的情况下，可以进行各种其它的改变、替换和添加。因此，本发明的范围不局限于上述特定实施例，而应由所附权利要求所限定。

Claims (16)

  1. 一种像素驱动电路，用于对发光元件进行驱动，所述像素驱动电路包括：
    扫描线，用于提供扫描信号；电源线，包括第一电源线和第二电源线，用于给所述像素驱动电路供电；和数据线，用于提供数据信号；
    发光控制信号线，用于提供发光控制信号；
    驱动单元，其输入端连接到所述发光元件的一端，控制端连接到第一中间节点，输出端连接到第二中间节点，所述发光元件的另一端连接到第一电源线；
    充电单元，其输入端连接到数据线，控制端连接到扫描线，输出端连接到所述第一中间节点；
    存储单元，其第一端连接到所述第二中间节点，第二端连接到第三中间节点；
    复位单元，其输入端连接到参考信号线，控制端连接到扫描线，输出端连接到所述第三中间节点；以及
    发光控制单元，其第一输入端与第二电源线相连，第二输入端与所述第一中间节点相连，控制端与所述发光控制信号线相连，第一输出端与所述第二中间节点相连，第二输出端与所述第三中间节点相连；
    其中，在像素驱动电路的充电阶段，在扫描信号的控制下，所述充电单元导通数据线和所述第一中间节点，所述复位单元导通所述参考信号线和所述第三中间节点，所述驱动单元在数据信号的控制下，在输出端提供与数据电压及其阈值电压有关的充电电压，所述存储单元存储所述充电电压；
    在像素驱动电路的驱动阶段，在所述发光控制信号的控制下，所述发光控制单元导通所述第一中间节点和所述第三中间节点，从而导通所述存储单元的所述第二端和所述驱动单元的控制端，使得所述驱动单元向所述发光元件提供的驱动电流与其阈值电压无关。
  2. 根据权利要求1所述的像素驱动电路，其中，所述驱动单元包括驱动晶体管，所述驱动晶体管的栅极与所述第一中间节点相连，第一电极与所述发光元件的所述一端相连，所述第二电极与所述第二中间节点相连，所述第一电极是源极和漏极中的一个电极，所述第二电极是源极和漏极中的另一个电极。
  3. 根据权利要求1所述的像素驱动电路，其中，所述参考信号线提供一个大于 数据电压的直流参考电压，并且所述复位单元包括：
    开关晶体管，所述开关晶体管的栅极与所述扫描线相连，所述开关晶体管的第一电极与所述参考信号线相连，所述开关晶体管的第二电极与所述第三中间节点相连；所述第一电极是源极和漏极中的一个电极，所述第二电极是源极和漏极中的另一个电极。
  4. 根据权利要求1所述的像素驱动电路，其中，所述发光控制单元包括第一晶体管和第三晶体管，所述第一晶体管和所述第三晶体管的栅极均与所述发光控制信号线相连，所述第一晶体管的第一电极与所述第二中间节点相连，第二电极与所述第二电源线相连，所述第三晶体管的第一电极与所述第一中间节点相连，第二电极与所述第三中间节点相连；所述第一电极是源极和漏极中的一个电极，所述第二电极是源极和漏极中的另一个电极。
  5. 根据权利要求1所述的像素驱动电路，其中，所述充电单元包括第二晶体管，所述第二晶体管的栅极与所述扫描线相连，第一电极与所述数据线相连，第二电极与所述第一中间节点相连；所述第一电极是源极和漏极中的一个电极，所述第二电极是源极和漏极中的另一个电极。
  6. 根据权利要求1所述的像素驱动电路，其中，所述存储单元包括存储电容器。
  7. 根据权利要求1所述的像素驱动电路，其中，所述驱动晶体管、开关晶体管、第一晶体管、第二晶体管以及第三晶体管均为N型薄膜晶体管。
  8. 一种显示装置，包括：多个发光元件，以及如权利要求1-7之一所述的像素驱动电路，用于对所述发光元件进行驱动。
  9. 根据权利要求8所述的显示装置，其中，与同一根扫描线相连的一行像素驱动电路共享一个复位单元。
  10. 根据权利要求8所述的显示装置，其中，所述共享的复位单元设置在有效显示区之外。
  11. 一种像素驱动方法，应用于根据权利要求1-7之一所述的像素驱动电路，所述像素驱动方法包括：
    通过电源线，给所述像素驱动电路供电；
    通过所述扫描线提供扫描信号；以及
    通过所述发光控制信号线提供发光控制信号，所述发光控制信号在扫描信号为高电平时处于低电平，使得像素驱动电路进入充电阶段，而在扫描信号从高电平转 变为低电平时转变为高电平，使得像素驱动电路进入驱动阶段。
  12. 根据权利要求11所述的像素驱动方法，其中，在所述扫描信号为高电平时，提供数据信号，以通过所述充电单元，对所述存储单元进行充电。
  13. 根据权利要求12所述的像素驱动方法，其中，所述发光控制信号被配置为在扫描信号从高电平转变为低电平之后，保持为低电平一段时间，然后转变为高电平。
  14. 根据权利要求12所述的像素驱动方法，当所述像素驱动方法应用于如权利要求6所述的像素驱动电路时，在像素驱动电路的充电阶段，第一晶体管、第三晶体管截止，第二晶体管导通，同时驱动晶体管也导通，数据信号通过控制驱动晶体管的栅极电压对存储电容器进行充电，直至驱动晶体管截止。
  15. 根据权利要求12所述的像素驱动方法，当所述像素驱动方法应用于如权利要求6所述的像素驱动电路时，在像素驱动电路的驱动阶段，第一晶体管、第三晶体管导通，复位单元的开关晶体管和第二晶体管截止，驱动晶体管导通，对发光元件进行驱动。
  16. 根据权利要求13所述的像素驱动方法，当所述像素驱动方法应用于如权利要求6所述的像素驱动电路时，当扫描信号和发光控制信号均为低电平时，第一晶体管、第二晶体管和第三晶体管截止，复位单元的开关晶体管截止，驱动晶体管保持截止。
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