WO2016123882A1 - 非挥发性阻变存储器件及其制备方法 - Google Patents

非挥发性阻变存储器件及其制备方法 Download PDF

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WO2016123882A1
WO2016123882A1 PCT/CN2015/079006 CN2015079006W WO2016123882A1 WO 2016123882 A1 WO2016123882 A1 WO 2016123882A1 CN 2015079006 W CN2015079006 W CN 2015079006W WO 2016123882 A1 WO2016123882 A1 WO 2016123882A1
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metal electrode
resistive
layer
functional layer
inert
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刘琦
刘明
孙海涛
张科科
龙世兵
吕杭炳
白纳吉瑞塔姆
张康玮
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/828—Current flow limiting means within the switching material region, e.g. constrictions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H10N70/245—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H—ELECTRICITY
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    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/841—Electrodes
    • H10N70/8416—Electrodes adapted for supplying ionic species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8822—Sulfides, e.g. CuS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8825—Selenides, e.g. GeSe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx

Definitions

  • the invention belongs to the field of microelectronics, and in particular relates to a device unit structure and a manufacturing method of a non-volatile resistive memory (RRAM).
  • RRAM non-volatile resistive memory
  • non-volatile memory With the demand for high-capacity, low-power storage, such as multimedia applications and mobile communications, the market share of non-volatile memories, especially flash memory, has become more and more important, and it has gradually become a very important memory. .
  • the main feature of non-volatile memory is that it can store stored information for a long time without power. It has both the characteristics of read-only memory and high access speed.
  • Non-volatile memory on the market currently uses flash memory as the mainstream, but flash memory devices have excessive operating voltage, slow operation speed, insufficient durability, and too little tunneling oxide layer during device miniaturization, which will result in memory time. Long defects.
  • the ideal non-volatile memory should have low operating voltage, simple structure, non-destructive reading, fast operation speed, long memory time, small device area, and good durability.
  • many new materials and devices have been studied in an attempt to achieve the above objectives. A considerable number of new memory devices use a change in resistance value as a memory means, including a resistive memory and a solid electrolyte material. Resistive memory.
  • the resistive memory is usually based on an easy-oxidation metal/solid electrolyte/inert metal sandwich structure and can constitute an important type of non-volatile resistive memory (RRAM) memory, commonly referred to as solid electrolyte-based RRAM. , Programmable Metallization Cell Memory (PMC) or Conductive Bridging Random Access Memory (CBRAM).
  • RRAM resistive memory
  • PMC Programmable Metallization Cell Memory
  • CBRAM Conductive Bridging Random Access Memory
  • the working principle is: under the action of external electric excitation, the anode of the metal electrode A is easily oxidized (for example, Cu, Ag, Ni, etc.) is oxidized to become metal ion A+ under the action of an electric field.
  • the metal ion A+ is transported in the solid electrolyte B under the action of an electric field, moves toward the cathode and finally reaches the inert lower electrode C, and the metal ion A+ is reduced to the metal A at the lower electrode C.
  • the device resistance is in a low resistance state; under the action of the reverse electric field, the metal conductive bridge is broken, The device returns to a high impedance state.
  • metal atoms/ions easily enter the inert electrode material to form an alloy structure of an oxidizable metal and an inert metal (Document 1, YCYang, F. Pan, Q. Liu, M. Liu, and F. Zeng, Nano Lett. 9, 1636, 2009), metal atoms/ions may also migrate through the inert electrode material to the surface of the inert electrode material. Nanostructures of easily oxidizable metals (Document 2, JJ Yang, JPStrachanm, Q.
  • the object of the present invention is to overcome the above technical difficulties and overcome the problem that the metal conductive filament formed by the active electrode existing in the solid electrolytic material-based RRAM memory device enters the inert electrode material during the programming process, and provides a The reliability of the device is improved by adding a single-layer or multi-layer graphene film between the inert electrode and the solid electrolyte layer as a new device structure of the metal ion barrier layer.
  • the present invention provides a non-volatile resistive memory comprising an inert metal electrode, a resistive functional layer, and an oxidizable metal electrode, characterized in that a graphene barrier layer is interposed between the inert metal electrode and the resistive functional layer. It can prevent the easily oxidized metal ions from migrating into the inert metal electrode through the resistive functional layer under the action of the electric field during device programming.
  • the material of the oxidizable metal electrode is, for example, Cu, Ag, Ni, Sn, Co, Fe, At least one of Mg, or a combination thereof; alternatively, the thickness thereof is from 5 nm to 500 nm.
  • the material of the resistive functional layer is a solid electrolyte or a binary oxide material having a resistance change property, such as CuS, AgS, AgGeSe, CuI x S y , ZrO 2 , HfO 2 , TiO 2 , SiO 2 , WO Any one of x , NiO, CuO x , ZnO, TaO x , Y 2 O 3 or a combination thereof; alternatively, the thickness thereof is 2 nm to 200 nm.
  • the material of the inert metal electrode is, for example, any one of Pt, W, Au, Pd or a combination thereof; alternatively, the thickness thereof is, for example, 5 nm to 500 nm.
  • the graphene barrier layer is at least one of a single layer or a plurality of graphene films; alternatively, the thickness thereof is from 0.5 nm to 20 nm.
  • the invention also provides a non-volatile resistive memory manufacturing method, comprising: forming an inert metal electrode on an insulating substrate; forming a graphene barrier layer on the inert metal electrode; forming a resistive functional layer on the graphene barrier layer Forming an oxidizable metal electrode on the resistive functional layer, wherein the graphene barrier layer can prevent the easily oxidized metal ions from migrating into the inert metal electrode through the resistive functional layer under the action of the electric field during device programming.
  • the forming process of the inert metal electrode and/or the resistive functional layer and/or the oxidizable metal electrode is electron beam evaporation, chemical vapor deposition, pulsed laser deposition, atomic layer deposition, magnetron sputtering or sol-gel method.
  • the graphene barrier layer is formed by film transfer, tape stripping or chemical vapor deposition.
  • the thickness of the inert metal electrode and/or the oxidizable metal electrode is 5 nm to 500 nm; alternatively, the thickness of the resistive functional layer is 2 nm to 200 nm; alternatively, the thickness of the graphene barrier layer is 0.5 nm to 20 nm.
  • the material of the oxidizable metal electrode is, for example, at least one of Cu, Ag, Ni, Sn, Co, Fe, Mg, or a combination thereof; alternatively, the material of the resistive functional layer is a solid having resistance change characteristics Electrolyte or binary oxide material, such as CuS, AgS, AgGeSe, CuI x S y , ZrO 2 , HfO 2 , TiO 2 , SiO 2 , WO x , NiO, CuO x , ZnO, TaO x , Y 2 O Any one or a combination of 3 ; alternatively, the material of the inert metal electrode is, for example, any one of Pt, W, Au, Pd or a combination thereof.
  • a periodic structure is formed at an interface between the oxidizable metal electrode and the resistive functional layer.
  • the projected area of the graphene barrier layer and the inert metal electrode is larger than the resistive functional layer and the easily oxidizable metal electrode, and an electrode contact is formed on the exposed graphene barrier layer.
  • the oxidizable metal electrode is a plurality of splits.
  • a single-layer or multi-layer graphene film is added as a metal ion barrier layer between the inert electrode and the solid electrolyte resistive functional layer to prevent the RRAM device from being programmed.
  • the metal conductive filament formed in the resistive layer diffuses into the inert electrode layer, eliminating the misprogramming phenomenon occurring in the device erasing process and improving the reliability of the device.
  • FIG. 1 is a schematic view of a non-volatile resistive memory device in accordance with the present invention.
  • 2A-2D are schematic views showing a method of fabricating a nonvolatile resistive memory device in accordance with the present invention.
  • FIG. 3 is a schematic flow chart of a method of fabricating a non-volatile resistive memory device in accordance with the present invention.
  • a schematic diagram of a resistive memory device includes an insulating substrate 11, an inert metal electrode 12, a resistive functional layer 13, a graphene barrier layer 14, and an oxidizable metal electrode 15.
  • the material of the inert metal electrode 12 is at least one of Pt, W, Au, Pd or a combination thereof
  • the resistive functional layer 13 is a solid electrolyte or a binary oxide material having resistance change characteristics
  • the graphene barrier layer 14 is The single-layer or multi-layer graphene film
  • the oxidizable metal electrode 15 material is at least one of Cu, Ag, Ni, Sn, Co, Fe, Mg or a combination thereof.
  • the graphene film as a metal ion barrier layer will prevent metal ions in the conductive filament from diffusing into the inert electrode layer, thereby eliminating the phenomenon of misprogramming during subsequent erasing and improving the reliability of the device.
  • FIG. 3 is a manufacturer of a resistive memory device in accordance with the present invention.
  • an inert metal electrode 12 is formed on the insulating substrate 11.
  • An insulating substrate 11 is provided, which may be silicon oxide on a Si substrate, a buried oxide layer of an SOI substrate, a hard substrate such as sapphire (aluminum oxide), aluminum nitride, glass, quartz, or the like, or may be a resin or a plastic.
  • a flexible substrate An inert metal composed of an inert metal material is deposited on the insulating substrate 11 by electron beam evaporation, chemical vapor deposition (including PECVD, HDPCVD, MOCVD, etc.), pulsed laser deposition, atomic layer deposition (ALD) or magnetron sputtering.
  • the electrode 12 is made of, for example, any one or a combination of Pt, W, Au, and Pd, and has a thickness of, for example, 5 nm to 500 nm, preferably 10 to 350 nm, and most preferably 60 to 150 nm, for example, 100 nm.
  • a metal ion blocking layer 13 composed of graphene is formed on the inert metal electrode 12.
  • the formation of the graphene film layer may be a film transfer process, and the graphene layer may be prepared by tape stripping or chemical vapor deposition.
  • the graphene barrier layer has a thickness of from 0.5 nm to 20 nm, preferably from 1 nm to 15 nm, most preferably 5 nm.
  • graphene has a hexagonal cavity diameter of 65 pm, which is much smaller than the atomic size or ion size of most atoms, and is therefore a very effective atomic diffusion barrier material. .
  • the graphene barrier layer 13 may be a single layer of graphene or a multilayer graphene. Compared with other hard barrier layers such as Ta, Ti, TiN, and TaN materials, the graphene barrier layer 13 may be a single layer, or each of the multilayer structures may be flexible and bendable, and thus the resistive device The thickness of the self can be greatly reduced, it is easier to prepare on a flexible substrate, and the overall impedance is further reduced, so that it can be applied to wearable or low power electronic devices.
  • the projected area of the graphene barrier layer and the inert metal electrode is larger than the resistive functional layer and the oxidizable metal electrode to be formed later, thereby forming an electrode contact on the graphene barrier layer, having a step structure as shown in FIG. 2C.
  • This can further increase the area of the graphene and inert metal electrodes to lower the resistance of the device itself for use in low power devices.
  • a resistive functional layer 14 is formed on the graphene barrier layer 13.
  • the resistive functional layer 14 may also be referred to as a resistive memory dielectric layer, which functions as an insulating barrier between the upper and lower electrodes, and can allow metal ions of the easily oxidizable electrode 15 to pass through the resistive functional layer 14 to reach the graphite under the action of an electric field.
  • Ole barrier layer 13 Since the diameter of the hole in the two-dimensional structure of the graphene barrier layer 13 is smaller than the size of the metal ion, the metal ions are only deposited on the barrier layer 13 without entering the inert metal electrode 12, in the subsequent erasing process of applying a reverse voltage.
  • the formation process of the resistive functional layer 14 is electron beam evaporation, pulsed laser deposition, magnetron sputtering or sol-gel method.
  • the resistive functional layer 14 is a solid electrolyte or a binary oxide material having a resistance change characteristic, specifically CuS, AgS, AgGeSe, CuI x S y , ZrO 2 , HfO 2 , TiO 2 , SiO 2 , WO x , NiO Any one or a combination of CuO x , ZnO, TaO x , Y 2 O 3 (including various forms such as mixing, lamination, doping modification, etc.), and has a thickness of 2 nm to 200 nm, preferably 5 nm to 100 nm, and most preferably 10 nm. ⁇ 60nm, the best 40nm.
  • an oxidizable metal electrode 15 is formed on the resistive functional layer 14.
  • the electrode 15 is formed by electron beam evaporation, chemical vapor deposition, pulsed laser deposition, atomic layer deposition or magnetron sputtering, and the material thereof is an easily oxidizable metal material such as Cu, Ag, Ni, Sn, Co, Fe, Mg. At least one of them, or a combination thereof (for example, in the form of an alloy or a laminate), has a thickness of 5 nm to 500 nm, preferably 10 to 300 nm, and most preferably 50 to 100 nm, for example, 80 nm.
  • a periodic pattern (not shown) is formed on the top surface of the resistive functional layer 14 by using a mask or periodically controlling the deposition process parameters or etching after deposition to increase the electrode 15
  • the underlying resist ively changes the contact area between the functional layers 14, thereby improving programming and erasing efficiency.
  • the electrode layer 15 is deposited by etching or by using a mask, so that the electrode 15 is a plurality of small areas, thereby reducing the amount of the easily oxidizable metal electrode material, further reducing the easily oxidizable metal ion. The probability of migrating into the inert metal electrode 12 improves device reliability.
  • a 70 nm Pt film is magnetron-sputtered as an inert metal electrode layer on a Si substrate with an insulating layer of 200 nm thick SiO 2 by an electron beam evaporation process;
  • the tape is stripped of graphite, the graphene film is transferred onto the inert metal electrode layer, and then a 20 nm ZrO 2 resistive functional layer is deposited by magnetron sputtering deposition; finally, the electron beam evaporates 100 nm of Cu as an easy Oxidation of the electrode layer completes the basic structure of the entire device.
  • Figure 2 shows a schematic diagram of the process flow of this embodiment.
  • the oxidizable metal electrode 15, the graphene barrier layer 14, the resistive functional layer 13, and the inert metal electrode layer 12 may be sequentially deposited on the insulating substrate 11 in a different order from the above process. Material and thickness dimensions are unchanged.
  • a single-layer or multi-layer graphene film is added as a metal ion barrier layer between the inert electrode and the solid electrolyte resistive functional layer to prevent the RRAM device from being programmed.
  • the metal conductive filament formed in the resistive layer diffuses into the inert electrode layer, eliminating the misprogramming phenomenon occurring in the device erasing process and improving the reliability of the device.

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Abstract

一种非挥发性阻变存储器，包括惰性金属电极(12)、阻变功能层(14)、易氧化金属电极(15)，其特征在于：惰性金属电极(12)与阻变功能层(14)之间插入石墨烯阻挡层(13)，能够阻止器件编程过程中易氧化金属离子在电场作用下通过阻变功能层(14)迁移进入惰性金属电极(12)。非挥发性阻变存储器件及其制造方法，在惰性电极与固态电解液阻变功能层之间增加单层或多层石墨烯薄膜作为金属离子阻挡层，阻止RRAM器件编程过程中，阻变层中形成的金属导电细丝扩散进入惰性电极层，消除器件擦除过程中出现的误编程现象，提高器件的可靠性。

Description

非挥发性阻变存储器件及其制备方法 技术领域
本发明属于微电子技术领域，尤其涉及一种非挥发性阻变存储器(RRAM)的器件单元结构及制作方法。
背景技术
随着多媒体应用、移动通信等对大容量、低功耗存储的需要，非挥发性存储器、特别是闪存所占的半导体器件市场份额变得越来越大，也逐渐成为一种相当重要的存储器。非挥发性存储器的主要特点是在不加电的情况下也能够长期保存所存储的信息，其既有只读存储器的特点，又有很高的存取速度。
当前市场上的非挥发性存储器以闪存为主流，但是闪存器件存在操作电压过大、操作速度慢、耐久力不够好以及由于在器件微缩化过程中过薄的隧穿氧化层将导致记忆时间不过长等缺点。理想的非挥发性存储器应具备操作电压低、结构简单、非破坏性读取、操作速度快、记忆时间长、器件面积小、耐久了好等条件。目前已经对好多新型材料和器件进行了研究，试图来达到上述的目标，其中有相当部分的新型存储器器件都采用电阻值的改变来作为记忆的方式，包括阻变存储器及采用固态电解液材料的阻变存储器。
阻变存储器通常是基于易氧化金属/固态电解液/惰性金属的三明治结构，能够构成一类重要的非挥发性阻变存储器(RRAM，resistive switching memory)存储器，通常被称为固态电解液基RRAM，可编程金属化器件(PMC：Programmable Metallization Cell Memory)或导电桥随机存储器(CBRAM：Conductive Bridging Random Access Memory)。这类存储器具有结构简单、速度快、功耗低等优点，被受产业界的重视，成为下一代非挥发性存储技术的有力竞争者之一。
其工作原理是：在外加电激励的作用下，金属上电极A的阳极易氧化金属(如，Cu、Ag和Ni等)在电场作用下氧化成为金属离子A+， 金属离子A+在电场的作用下在固态电解液B中进行传输，向阴极移动并最终达到惰性下电极C，在下电极C处金属离子A+被还原成为金属A。随着金属不断在下电极C处沉积，最终达到上电极A，形成连通上下电极的细丝状的金属导电桥，器件电阻处于低阻状态；在反向电场作用下，该金属导电桥断开，器件恢复到高阻状态。这两种电阻状态可以在外加电场的作用相互转换。
然而，由于常用的惰性金属电极材料(如Pt、Au、Pd和W等)为多晶结构，导致金属原子/离子容易进入惰性电极材料内形成易氧化金属与惰性金属的合金结构(文献1，Y.C.Yang,F.Pan,Q.Liu,M.Liu,and F.Zeng,Nano Lett.9,1636,2009)，金属原子/离子也可能会通过惰性电极材料迁移到惰性电极材料的表面，形成易氧化金属的纳米结构(文献2，J.J.Yang,J.P.Strachanm,Q.Xia,D.A.A.Ohlberg,P.J.Kuekes,R.D.Kelley,W.F.Stickle,D.R.Stewart,G.Medeiros-Ribeiro,and R.S.Williams,Adv.Mater.22,4034,2010)。金属原子/离子进入惰性材料相当于在惰性电极处也会形成易氧化金属源，造成这类RRAM器件在反向擦除的过程中(导电细丝断裂)会出现误编程的现象(反向电压下，形成金属性导电细丝)，对器件的可靠性造成显著的影响。同时，由于这类器件擦除过程中的限流通常远远大于编程过程中的限流，因此擦除过程中的误编程现象容易造成器件的硬击穿，超出器件的失效，影响了器件的可靠性。
发明内容
由上所述，本发明的目的在于克服上述技术困难，克服基于固态电解材料的RRAM存储器件存在的活性电极形成的金属导电细丝在编程过程中进入到惰性电极材料中的问题，提供了一种通过在惰性电极和固态电解液层之间增加单层或多层石墨烯薄膜作为金属离子阻挡层的新器件结构，提高了器件的可靠性。
为此，本发明提供了一种非挥发性阻变存储器，包括惰性金属电极、阻变功能层、易氧化金属电极，其特征在于：惰性金属电极与阻变功能层之间插入石墨烯阻挡层，能够阻止器件编程过程中易氧化金属离子在电场作用下通过阻变功能层迁移进入惰性金属电极。
其中，易氧化金属电极的材料例如为Cu、Ag、Ni、Sn、Co、Fe、 Mg中的至少一种、或其组合；可选地，其厚度为5nm～500nm。
其中，阻变功能层的材料为具有电阻转变特性的固态电解液或二元氧化物材料，例如为CuS、AgS、AgGeSe、CuIxSy，ZrO2、HfO2、TiO2、SiO2、WOx、NiO、CuOx、ZnO、TaOx、Y2O3的任意一种或其组合；可选地，其厚度为2nm～200nm。
其中，惰性金属电极的材料例如为Pt、W、Au、Pd的任意一种或其组合；可选地，其厚度例如5nm～500nm。
其中，石墨烯阻挡层为单层或多层石墨烯薄膜的至少一种；可选地，其厚度为0.5nm～20nm。
本发明还提供了一种非挥发性阻变存储器制造方法，包括：在绝缘衬底上形成惰性金属电极；在惰性金属电极上形成石墨烯阻挡层；在石墨烯阻挡层上形成阻变功能层；在阻变功能层上形成易氧化金属电极，其中石墨烯阻挡层能够阻止器件编程过程中易氧化金属离子在电场作用下通过阻变功能层迁移进入惰性金属电极。
其中，惰性金属电极和/或阻变功能层和/或易氧化金属电极的形成工艺为电子束蒸发、化学气相沉积、脉冲激光沉积、原子层沉积、磁控溅射或溶胶—凝胶法。
其中，石墨烯阻挡层的形成方法为薄膜转移、胶带剥离或化学气相沉积。
其中，惰性金属电极和/或易氧化金属电极的厚度为5nm～500nm；可选的，阻变功能层的厚度为2nm～200nm；可选的，石墨烯阻挡层的厚度为0.5nm～20nm。
其中，易氧化金属电极的材料例如为Cu、Ag、Ni、Sn、Co、Fe、Mg中的至少一种、或其组合；可选的，阻变功能层的材料为具有电阻转变特性的固态电解液或二元氧化物材料，例如为CuS、AgS、AgGeSe、CuIxSy，ZrO2、HfO2、TiO2、SiO2、WOx、NiO、CuOx、ZnO、TaOx、Y2O3的任意一种或其组合；可选的，惰性金属电极的材料例如为Pt、W、Au、Pd的任意一种或其组合。
其中，在易氧化金属电极与阻变功能层之间的界面形成周期性结构。
其中，石墨烯阻挡层与惰性金属电极的投影面积大于阻变功能层和易氧化金属电极，并且在露出的石墨烯阻挡层上形成电极接触。
其中，易氧化金属电极为分裂的多个。
依照本发明的非挥发性阻变存储器件及其制造方法，在惰性电极与固态电解液阻变功能层之间增加单层或多层石墨烯薄膜作为金属离子阻挡层，阻止RRAM器件编程过程中，阻变层中形成的金属导电细丝扩散进入惰性电极层，消除器件擦除过程中出现的误编程现象，提高器件的可靠性。
附图说明
以下参照附图来详细说明本发明的技术方案，其中：
图1为依照本发明的非挥发性阻变存储器件的示意图；
图2A-2D为依照本发明的非挥发性阻变存储器件制造方法的示意图；以及
图3为依照本发明的非挥发性阻变存储器件制造方法的示意流程图。
具体实施方式
以下参照附图并结合示意性的实施例来详细说明本发明技术方案的特征及其技术效果，公开了含有单层或多层石墨烯薄膜的金属离子阻挡层以防止器件擦除过程中出现的误编程现象的非挥发性阻变存储器件及其制造方法。需要指出的是，类似的附图标记表示类似的结构，本申请中所用的术语“第一”、“第二”、“上”、“下”等等可用于修饰各种器件结构或制造工序。这些修饰除非特别说明并非暗示所修饰器件结构或制造工序的空间、次序或层级关系。
如图1所示，为依照本发明的阻变存储器件的示意图，其包括绝缘衬底11、惰性金属电极12、阻变功能层13、石墨烯阻挡层14、以及易氧化金属电极15。其中，惰性金属电极12材料为Pt、W、Au、Pd的至少一种或其组合，阻变功能层13为具有电阻转变特性的固态电解液或二元氧化物材料，石墨烯阻挡层14为单层或多层石墨烯薄膜，易氧化金属电极15材料为Cu、Ag、Ni、Sn、Co、Fe、Mg的至少一种或其组合。编程过程中，作为金属离子阻挡层的石墨烯薄膜将阻止导电细丝中的金属离子扩散进入惰性电极层中，从而消除后续擦除过程中出现误编程的现象，提高器件的可靠性。
如图2A-2D以及图3所示，为依照本发明的阻变存储器件制造方 法的各个步骤对应的示意图。
具体地，如图2A所示，在绝缘衬底11上形成惰性金属电极12。提供绝缘衬底11，其可以为Si衬底上的氧化硅、SOI衬底的埋氧层、蓝宝石(氧化铝)、氮化铝、玻璃、石英等硬质衬底，还可以是树脂、塑料等柔性衬底。采用电子束蒸发、化学气相沉积(包括PECVD、HDPCVD、MOCVD等)、脉冲激光沉积、原子层沉积(ALD)或磁控溅射方法，在绝缘衬底11上沉积由惰性金属材料构成的惰性金属电极12，其材质例如为Pt、W、Au、Pd的任意一种或其组合；其厚度例如5nm～500nm、优选为10～350nm并最佳60～150nm，例如100nm。
随后，如图2B所示，在惰性金属电极12上形成石墨烯构成的金属离子阻挡层13。形成石墨烯薄膜层可以是采用薄膜转移的工艺，石墨烯层的制备可以采用胶带剥离或者是化学气相沉积的方法。所述石墨烯阻挡层的厚度为0.5nm至20nm，优选1nm～15nm，最佳5nm。石墨烯作为一种六边形网格的二维结构，其六边形的空洞直径为65pm，远远小于大部分原子的原子尺寸或离子尺寸，因此是一种非常有效的原子扩散阻挡层材料。石墨烯阻挡层13可以是单层石墨烯，也可以是多层石墨烯。与其他例如Ta、Ti、TiN、TaN材质的硬质阻挡层相比，石墨烯阻挡层13由于可以为单层，或者多层结构中的每一层均为柔性可弯折，因此阻变器件自身厚度可以大大降低，更易于在柔性衬底上制备，也进一步降低了整体阻抗，因此可以应用于可穿戴式或低功耗电子设备。优选地，石墨烯阻挡层与惰性金属电极的投影面积大于后续要形成的阻变功能层和易氧化金属电极，由此在石墨烯阻挡层上形成电极接触，如图2C所示具有台阶结构，如此可以进一步提高石墨烯和惰性金属电极的面积从而降低器件自身的电阻，以便用于低功耗器件。
接着，如图2C所示，在石墨烯阻挡层13上形成阻变功能层14。阻变功能层14也可以称作阻变存储介质层，在上下电极之间起到绝缘隔离作用，并且能够允许易氧化电极15的金属离子在电场作用下穿过阻变功能层14而到达石墨烯阻挡层13。由于石墨烯阻挡层13的二维结构中孔洞直径小于金属离子的尺寸，金属离子仅堆积在阻挡层13上而不会进入惰性金属电极12中，在后续施加反向电压的擦除过程中，金属离子会在电场作用下全部离开石墨烯阻挡层，因此不存在误擦除。阻变功能层14的形成工艺为电子束蒸发、脉冲激光沉积、磁控溅射或溶胶—凝胶法。阻变功能层14为具有电阻转变特性的固 态电解液或二元氧化物材料，具体为CuS、AgS、AgGeSe、CuIxSy，ZrO2、HfO2、TiO2、SiO2、WOx、NiO、CuOx、ZnO、TaOx、Y2O3的任意一种或其组合(包括混合、层叠、掺杂改性等多种形式)，厚度为2nm～200nm、优选5nm～100nm、最佳10nm～60nm，最佳40nm。
最后，如图2D所示，在阻变功能层14上形成易氧化金属电极15。采用电子束蒸发、化学气相沉积、脉冲激光沉积、原子层沉积或磁控溅射方法形成电极15，其材料为易氧化的金属材料，例如为Cu、Ag、Ni、Sn、Co、Fe、Mg中的至少一种、或其组合(例如以合金形式或叠层方式)，其厚度为5nm～500nm、优选为10～300nm并最佳50～100nm，例如80nm。优选地，沉积电极15之前，采用掩模板或者周期性控制沉积工艺参数、或者沉积之后刻蚀，在阻变功能层14的顶表面形成周期性图形(未示出)，以增大电极15与其下的阻变功能层14之间的接触面积，从而提高编程、擦除效率。优选地，形成电极层15之后通过刻蚀，或者利用掩模沉积电极层15，使得电极15为小面积的多个，由此减小易氧化金属电极材料的用量，进一步减小易氧化金属离子迁移进入惰性金属电极12的几率，提高器件可靠性。
在本发明的一个实施例中，首先，利用电子束蒸发工艺，在带有200nm厚SiO2的绝缘层的Si衬底上，磁控溅射70nm的Pt薄膜作为惰性金属电极层；然后，采用胶带剥离石墨的方法，将石墨烯薄膜转移到惰性金属电极层上，然后利用磁控溅射沉积的方法，淀积一层20nm的ZrO2阻变功能层；最后电子束蒸发100nm的Cu作为易氧化电极层，完成整个器件的基本结构。图2给出了该实施例的工艺流程示意图。通过对比不含石墨烯阻挡层的相同工艺条件下生长的非易失性阻变存储器件的电学特性，发现增加这层石墨烯阻挡层能够显著减小器件在擦除过程中出现误编程的现象，改善了器件的可靠性。
在本发明的其他实施例中，与上述过程的顺序不同，可以在绝缘衬底11上依次沉积易氧化金属电极15、石墨烯阻挡层14、阻变功能层13和惰性金属电极层12，其余材料和厚度尺寸不变。
依照本发明的非挥发性阻变存储器件及其制造方法，在惰性电极与固态电解液阻变功能层之间增加单层或多层石墨烯薄膜作为金属离子阻挡层，阻止RRAM器件编程过程中，阻变层中形成的金属导电细丝扩散进入惰性电极层，消除器件擦除过程中出现的误编程现象，提高器件的可靠性。
尽管已参照一个或多个示例性实施例说明本发明，本领域技术人员可以知晓无需脱离本发明范围而对器件结构或方法流程做出各种合适的改变和等价方式。此外，由所公开的教导可做出许多可能适于特定情形或材料的修改而不脱离本发明范围。因此，本发明的目的不在于限定在作为用于实现本发明的最佳实施方式而公开的特定实施例，而所公开的器件结构及其制造方法将包括落入本发明范围内的所有实施例。

Claims (10)

  1. 一种非挥发性阻变存储器，包括惰性金属电极、阻变功能层、易氧化金属电极，其特征在于：惰性金属电极与阻变功能层之间插入石墨烯阻挡层，能够阻止器件编程过程中易氧化金属离子在电场作用下通过阻变功能层迁移进入惰性金属电极。
  2. 如权利要求1的非挥发性阻变存储器，其中，易氧化金属电极的材料例如为Cu、Ag、Ni、Sn、Co、Fe、Mg中的至少一种、或其组合；可选地，其厚度为5nm～500nm。
  3. 如权利要求1的非挥发性阻变存储器，其中，阻变功能层的材料为具有电阻转变特性的固态电解液或二元氧化物材料，例如为CuS、AgS、AgGeSe、CuIxSy，ZrO2、HfO2、TiO2、SiO2、WOx、NiO、CuOx、ZnO、TaOx、Y2O3的任意一种或其组合；可选地，其厚度为2nm～200nm。
  4. 如权利要求1的非挥发性阻变存储器，其中，惰性金属电极的材料例如为Pt、W、Au、Pd的任意一种或其组合；可选地，其厚度例如5nm～500nm。
  5. 如权利要求1的非挥发性阻变存储器，其中，石墨烯阻挡层为单层或多层石墨烯薄膜的至少一种；可选地，其厚度为0.5nm～20nm。
  6. 一种非挥发性阻变存储器制造方法，包括：
    在绝缘衬底上形成惰性金属电极；
    在惰性金属电极上形成石墨烯阻挡层；
    在石墨烯阻挡层上形成阻变功能层；
    在阻变功能层上形成易氧化金属电极，
    其中石墨烯阻挡层能够阻止器件编程过程中易氧化金属离子在电场作用下通过阻变功能层迁移进入惰性金属电极。
  7. 如权利要求6的非挥发性阻变存储器制造方法，其中，惰性金属电极和/或阻变功能层和/或易氧化金属电极的形成工艺为电子束蒸发、化学气相沉积、脉冲激光沉积、原子层沉积、磁控溅射或溶胶—凝胶法。
  8. 如权利要求6的非挥发性阻变存储器制造方法，其中，石墨烯阻挡层的形成方法为薄膜转移、胶带剥离或化学气相沉积。
  9. 如权利要求6的非挥发性阻变存储器制造方法，其中，惰性金属电极和/或易氧化金属电极的厚度为5nm～500nm；可选的，阻变功能层的厚度为2nm～200nm；可选的，石墨烯阻挡层的厚度为0.5nm～20nm。
  10. 如权利要求6的非挥发性阻变存储器制造方法，其中，易氧化金属电极的材料例如为Cu、Ag、Ni、Sn、Co、Fe、Mg中的至少一种、或其组合；可选的，阻变功能层的材料为具有电阻转变特性的固态电解液或二元氧化物材料，例如为CuS、AgS、AgGeSe、CuIxSy，ZrO2、HfO2、TiO2、SiO2、WOx、NiO、CuOx、ZnO、TaOx、Y2O3的任意一种或其组合；可选的，惰性金属电极的材料例如为Pt、W、Au、Pd的任意一种或其组合。
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