WO2016119340A1 - 触控驱动单元及其驱动方法和触控驱动电路 - Google Patents

触控驱动单元及其驱动方法和触控驱动电路 Download PDF

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Publication number
WO2016119340A1
WO2016119340A1 PCT/CN2015/079166 CN2015079166W WO2016119340A1 WO 2016119340 A1 WO2016119340 A1 WO 2016119340A1 CN 2015079166 W CN2015079166 W CN 2015079166W WO 2016119340 A1 WO2016119340 A1 WO 2016119340A1
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Prior art keywords
port
gate
output
level
module
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English (en)
French (fr)
Inventor
郝学光
李成
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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Priority to US15/122,328 priority Critical patent/US10402004B2/en
Publication of WO2016119340A1 publication Critical patent/WO2016119340A1/zh
Anticipated expiration legal-status Critical
Priority to US16/515,353 priority patent/US10649577B2/en
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04166—Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

Definitions

  • the invention belongs to the technical field of touch driving, and particularly relates to a touch driving unit, a driving method thereof and a touch driving circuit.
  • the mutual capacitive touch structure is mainly composed of a plurality of scanning electrodes (Tx) and sensing electrodes (Rx) that cross each other.
  • Each scanning electrode wheel flows into a touch signal (for example, a high-frequency alternating signal) to generate an induced signal in the sensing electrode.
  • a touch signal for example, a high-frequency alternating signal
  • the capacitance between the scan electrode and the sensing electrode at the touch point changes, and the sensing signal in the sensing electrode also changes, and the touch position can be obtained by analyzing the sensing signal.
  • a touch signal is provided for each scan electrode in turn, and the scan electrode is maintained at a stable level when there is no touch signal.
  • the stable level may be a common voltage, that is, the scan electrode may also serve as a common electrode.
  • the existing method is to provide a touch driving circuit on the substrate, the touch driving circuit is composed of a plurality of cascaded touch driving units, and each touch driving unit is configured to provide a touch signal for one scanning electrode.
  • a trigger signal is provided for the touch driving unit of the next stage, so that the next touch driving unit starts to work. In this way, all of the scan electrodes can be driven with just a few signals.
  • the existing touch driving circuit has the problems of complicated structure, large area (not conducive to narrow frame design), unstable output, and high noise.
  • the invention aims to solve the problems of complicated structure, large area, unstable output and high noise of the existing touch driving circuit, and provides a touch driving unit with simple structure, small area, stable output and low noise and driving thereof.
  • the method and a touch drive circuit are very simple structures, small area, stable output and low noise and driving thereof.
  • the embodiment of the invention provides a touch driving unit, which includes a shift register module, a gate module and an output module.
  • the shift register module includes a first control port, an access port, and a trigger signal take-off port, and is connected to the strobe module for generating a trigger signal.
  • the gating module includes a second control port and a strobe signal port, and is connected to the shift register module for controlling the output module.
  • the output module includes an output port, a stable level port, and a touch signal port for outputting a stable level or a touch signal according to the control of the gating module.
  • the touch driving unit may further include an amplifying module disposed between the gating module and the output module for amplifying a signal generated by the gating module for controlling the output module.
  • the shift register module may further include a first NOT gate, a second NOT gate, a first transistor, a first tri-state NOT gate, and a second tri-state NOT gate.
  • the first transistor is an N-type transistor, a first pole is connected to the first control port, a second pole is connected to a low level signal, and a gate is connected to an output end of the first NOT gate. The input end of the first NOT gate is connected to the first control port.
  • the input end of the first three-state NOT gate is connected to the access port, the low-level conduction end is connected to the output end of the first NOT gate, and the high-level conduction end is connected to the first control port, and the output is The terminal is connected to the input end of the second NOT gate and the output end of the second tri-state NOT gate.
  • the input end of the second three-state NOT gate is connected to the trigger signal receiving port, the output end of the second NOT gate, and the gating module, and the low-level conducting end is connected to the first control port.
  • a high level conducting terminal is coupled to the output of the first NOT gate.
  • the gating module may further include a NAND gate, a second transistor, a third transistor, a third NOT gate, and a first transmission gate.
  • the second transistor is an N-type transistor, a first pole is connected to the second control port, a second pole is connected to a low-level signal, and a gate is connected to the output of the NAND gate and the third non-gate The input terminal and the low level conduction end of the first transmission gate.
  • the first input end of the NAND gate is connected to the second control port, and the second input end is connected to the input end of the second three-state NOT gate of the shift register module.
  • An output of the third NOT gate is coupled to a gate of the third transistor and a high-level conduction terminal of the first transmission gate.
  • the third transistor is a P-type transistor, the first pole of which is connected to the output end of the amplification module and the first transmission gate, and the second pole is connected to the low level signal.
  • the input end of the first transmission gate is connected to the strobe signal port.
  • the amplifying module may include an even number of non-gates connected in series, and an output end of the upper non-gate in the even number of non-gates connected in series is connected to an input terminal of the lower non-gate adjacent to the upper non-gate.
  • the input terminal of the first NOT gate is connected to the first pole of the third transistor of the gate module, and the input terminal and the output terminal of the last NOT gate are connected to the output module.
  • the number of non-gates connected in series in the amplification module may be four.
  • the output module may further include a second transmission gate and a third transmission gate.
  • the input end of the second transmission gate is connected to the touch signal port, the output end is connected to the output port, and the high-level conduction end is connected to the output end of the last non-gate of the amplification module.
  • the terminal is connected to the input of the last NOT gate of the amplification module.
  • the input end of the third transmission gate is connected to the stable level port, the output end is connected to the output port, and the high level conduction end is connected to the input end of the last non-gate of the amplification module, the low level guide
  • the terminal is connected to the output of the last non-gate of the amplification module.
  • the stable level port can be a common voltage port.
  • Another embodiment of the present invention provides a driving method of the touch driving unit, including: a triggering phase: causing the trigger signal to be connected to a port to output a trigger signal, and outputting a stable level to the receiving port; Control phase: the trigger signal is connected to the port to output a trigger signal, and the touch signal is output to the output port; the recovery phase: the trigger signal is connected to the port output trigger signal, and the stable level is output to The take-out port; and a looping phase: causing the trigger signal to be connected to the port to output a low-level signal, and continuously outputting a stable level to the take-off port.
  • the driving method of the touch driving unit may include: inputting a high level to the access port, inputting a high level to the first control port, and inputting to the second control port in the triggering phase a low level, inputting a low level to the strobe signal port; in the touch phase, inputting a low level to the first control port, and inputting a high level to the second control port Transmitting a signal port to input a high level; in the recovery phase, inputting a low level to the first control port, inputting a high level to the second control port, and inputting a low level to the strobe signal port a level; and in the cycle phase, performing a first sub-cycle phase and a second sub-cycle phase in turn, in which a low level is input to the access port in the first sub-cycle phase, to the a control port inputting a high level, inputting a low level to the second control port, and inputting a low level to the first control port in the second sub-cycle phase, inputting to the second control port High
  • Another embodiment of the present invention provides a touch driving circuit including a plurality of the above-mentioned touch driving units.
  • the output ports of each touch driving unit are connected to one scanning electrode, and the trigger signal is connected to the port.
  • the first control port of one touch driving unit can receive the first clock signal
  • the second control port can receive the second clock signal
  • the second touch driving unit A control port can receive the second clock signal
  • a second control port can receive the first clock signal
  • the level states of the first clock signal and the second clock signal may be opposite.
  • non-gate Non-gate
  • NAND gate transmission gate
  • tri-state NOT gate all logic circuits.
  • the NOT gate can perform a NOT operation on the input, that is, the output is low when the input is high, and the output is high when the input is low.
  • a non-gate must be connected to a high level signal and a low level signal to operate normally.
  • the NAND gate first performs an AND operation on the two inputs, followed by a NOT operation. Therefore, its output is low only when both inputs are high, otherwise the output is high. In general, a high-level signal and a low-level signal are required to work properly with the NAND gate.
  • the transmission gate functions like a switch, and can be turned on according to the signal of the control terminal.
  • the transmission gate has two control terminals of a high-voltage conduction terminal and a low-level conduction terminal, and is only turned on when the low-level conduction terminal is low level and the high-level conduction terminal is high level, otherwise it is turned off. .
  • the tri-state NAND gate has a shutdown state and a conduction state. When it is in the conduction state, it performs a NOT operation on the signal at the input end, that is, it is equivalent to a transmission gate NAND gate.
  • the three-state NOT gate has two control terminals of a high-voltage conduction terminal and a low-level conduction terminal, and is turned on only when the low-level conduction terminal is at a low level and the high-level conduction terminal is at a high level, otherwise Shut down.
  • a three-state non-gate must also be connected to a high-level signal to work properly. Number and a low level signal.
  • the touch driving unit of the invention has a reasonable structure, so the number of components is small, the structure is simple, the occupied area is small, and the narrow frame design is facilitated, and the influence of each control signal can be effectively eliminated, the noise is reduced, and the output is stabilized.
  • FIG. 1 is a circuit diagram of a touch driving unit according to an embodiment of the present invention.
  • FIG. 2 is a signal timing diagram of each port of the touch driving circuit of the embodiment of the present invention.
  • FIG. 3 is a structural block diagram of a touch driving circuit according to an embodiment of the present invention.
  • an embodiment of the present invention provides a touch driving unit including a shift register module, a gate module, and an output module.
  • the shift register module includes a first control port K1, an access port IN, and a trigger signal output port SOUT, and is connected to the gating module for generating a trigger signal.
  • the gating module includes a second control port K2 and a strobe signal port KX, and is connected to the shift register module for controlling the output module.
  • the output module includes an output port OUT, a stable level port, and a touch signal port VC for outputting a stable level or a touch signal (usually a high frequency alternating signal) according to the control of the gating module.
  • the stable level port is a common voltage port VCOM, that is, the stable level port is connected to a common voltage, so that the scan electrode is loaded with a common voltage when there is no touch signal, so the scan electrode is also used as a common electrode.
  • VCOM common voltage port
  • the stable level port is the common voltage port VCOM.
  • the touch driving unit may further include: an amplifying module disposed between the shift register module and the output module, configured to amplify a signal generated by the gating module for controlling the output module.
  • the amplification module can be disposed between the gating module and the output module, as shown in FIG.
  • the amplification module can also be provided to amplify the control signal outputted by the shift register module, thereby improving the reliability and stability of the touch driving unit.
  • the amplification module can also be provided to amplify the control signal outputted by the shift register module, thereby improving the reliability and stability of the touch driving unit.
  • the shift register module may further include a first NOT gate F1, a second NOT gate F2, a first transistor M1, a first tri-state NOT gate SF1, and a second tri-state NOT gate SF2.
  • the first transistor M1 is an N-type transistor, the first pole is connected to the first control port K1, the second pole is connected to the low level signal VSS, and the gate is connected to the output end of the first NOT gate F1.
  • the input of the first NOT gate F1 is connected to the first control port K1.
  • the input end of the first three-state NOT gate SF1 is connected to the access port IN, the low-level conduction terminal PG is connected to the output end of the first NOT gate F1, and the high-level conduction terminal NG is connected to the first control port K1, and the output terminal is connected.
  • the input end of the second three-state NOT gate SF2 is connected to the trigger signal output port SOUT, the output end of the second NOT gate F2, and the strobe module, and the low-level conduction terminal PG is connected to the first control port K1, and the high level is turned on.
  • the terminal NG is connected to the output of the first NOT gate F1.
  • the gating module may further include a NAND gate YF, a second transistor M2, a third transistor M3, a third NOT gate F3, and a first transmission gate C1.
  • the second transistor M2 is an N-type transistor, the first pole is connected to the second control port K2, the second pole is connected to the low level signal VSS, the gate is connected to the output of the NAND gate YF, and the input of the third NOT gate F3 is The low level conduction terminal PG of the first transmission gate C1.
  • the first input terminal of the NAND gate YF is connected to the second control port K2, and the second input terminal is connected to the input terminal of the second three-state NOT gate SF2 of the shift register module.
  • the output terminal of the third NOT gate F3 is connected to the gate of the third transistor M3 and the high-level conduction terminal NG of the first transmission gate C1.
  • the third transistor M3 is a P-type transistor, the first pole of which is connected to the amplification module and the output end of the first transmission gate C1, and the second pole is connected to the low-level signal VSS.
  • the input terminal of the first transmission gate C1 is connected to the strobe signal port KX.
  • the amplification module may include an even number of non-gates connected in series, and an output of the upper non-gate in the even number of series non-gates is connected to an input of the lower non-gate adjacent to the upper non-gate.
  • the number of non-gates connected in series in the amplification module is four, that is, the fourth non-gate F4, the fifth non-gate F5, the sixth non-gate F6, and the seventh non-gate F7, which are all described below as an example ( It should be understood that the invention is not limited thereto.
  • the input of the first NOT gate (eg, the fourth NOT gate F4) is coupled to the first pole of the third transistor M3 of the gating module.
  • the input and output of the last non-gate (for example, the seventh non-gate F7) are connected to the output module.
  • the output module may further include a second transmission gate C2 and a third transmission gate C3.
  • the input end of the second transmission gate C2 is connected to the touch signal port VC, the output end is connected to the output port OUT, and the high level conduction end NG is connected to the output end of the last non-gate of the amplification module (for example, the seventh non-gate F7).
  • the low level conduction terminal PG is connected to the input terminal of the last non-gate of the amplification module.
  • the input end of the third transmission gate C3 is connected to the common voltage port VCOM, the output end is connected to the output port OUT, and the high-level conduction end NG is connected to the input end of the last non-gate of the amplification module (for example, the seventh non-gate F7).
  • the low level conduction terminal PG is connected to the output of the last non-gate of the amplification module.
  • a low level signal VSS and a high level signal VDD are also connected to a portion of the logic circuit, which is a known manner required to maintain the logic circuit operation, and will not be described in detail herein.
  • Another embodiment of the present invention provides a driving method of the above touch driving unit, which includes the following stages.
  • Trigger phase The trigger signal is connected to the port SOUT to output a trigger signal, and the common voltage is output to the output port OUT.
  • the trigger signal is output to the port SOUT to output a trigger signal, and the touch signal is output to the output port OUT.
  • the trigger signal is connected to the port SOUT to output a trigger signal, and the common voltage is output to the output port OUT.
  • the trigger signal is connected to the port SOUT output low level, and the stable level is continuously output to the output port OUT.
  • the driving method specifically includes the following steps S01 to S04.
  • step S01 ie, the trigger phase
  • a high level is input to the access port IN
  • a high level is input to the first control port K1
  • a low level is input to the second control port K2
  • the high level input to the first control port K1 goes low after passing through the first NOT gate F1, thereby turning off the first transistor M1.
  • the high-level conduction terminal NG of the first three-state NOT gate SF1 is at a high level
  • the low-level conduction terminal PG is at a low level, so that the first three-state NOT gate SF1 is turned on, and accordingly, the second The level at each control terminal of the tri-state NOT gate SF2 is opposite to the level at each control terminal of the first tri-state NOT gate SF1, so it is necessarily turned off.
  • the first three-state NOT gate SF1 changes the high level from the access port IN to a low level, and then passes through the second NOT gate F2 to become a high level trigger signal.
  • the high level trigger signal is output from the trigger signal to the port SOUT and simultaneously (through the second input of the NAND gate YF) to the NAND gate YF.
  • the other input terminal of the NAND gate YF (ie, the first input terminal) inputs a low level from the second control port K2 at this time, so that the output thereof is at a high level, so that the second transistor M2 is turned on, and the low voltage is low.
  • the flat signal VSS is conducted through the second transistor M2 to the first input of the NAND gate YF, stabilizing its input to a low level.
  • the high level of the output terminal of the NAND gate YF also goes to the low level after the third NOT gate F3, so that the first transmission gate C1 is turned off, and the third transistor M3 is turned on, and the low level signal VSS passes.
  • the third transistor M3 is transmitted to the output terminal of the first transmission gate C1 to stabilize the signal of the output terminal of the first transmission gate C1 to a low level.
  • a low level at the output of the first transmission gate C1 is amplified by each of the non-gates of the module After step-by-step amplification, input to the output module.
  • the last NOT gate for example, the seventh NOT gate F7
  • the levels of the input terminal and the output terminal are necessarily opposite, so the second transmission gate C2 and the third transmission gate C3 are necessarily one turned on and the other turned off.
  • the third transfer gate C3 is turned on, so that the common voltage of the common voltage port VCOM is output from the take-out port OUT to the scan electrodes, so that the scan electrodes are displayed.
  • the first input end of the NAND gate YF is stabilized to a low level, thereby avoiding the influence of the signal fluctuation of the second control port K2, thereby ensuring the A transmission gate C1 is turned off.
  • the level of the output end of the first transmission gate C1 is stably pulled to a low level, thereby avoiding noise interference of the strobe signal, so that the touch driving unit stably outputs the common voltage.
  • the high-level time of the access port IN is very short, because the figure is illustrated by the first-level touch driving unit in FIG. 3, and the trigger signal of the touch driving unit of the level (
  • the signal from the access port IN can be specifically provided by the driving chip, so it is preferably shorter, and then the trigger signal of the touch driving unit of each stage is the output signal of the upper trigger signal receiving port SOUT, according to the following description,
  • the trigger signal has a high high time, but its high level does not affect the operation of the circuit.
  • step S02 ie, the touch phase
  • a low level is input to the first control port K1
  • a high level is input to the second control port K2
  • a high level is input to the strobe signal port KX.
  • the signal of the first control port K1 becomes a low level, which becomes a high level through the first NOT gate F1, turning on the first transistor M1, whereby the low level signal VSS passes through the first transistor.
  • M1 is introduced to the first control port K1 to make its low level more stable and reduce noise interference.
  • the state of the two three-state NOT gates is opposite to the trigger phase, that is, the first three-state NOT gate SF1 is turned off and the second three-state NOT gate SF2 is turned on. Since the first three-state NOT gate SF1 is turned off, the signal of the access port IN cannot enter the circuit and does not affect the circuit (so the length of the trigger signal high level does not affect the operation of the circuit).
  • the output end of the first three-state NOT gate SF1 is at a low level without a signal, and the low level passes through the second NOT gate F2 to become a high level, and then passes through the second three-state NOT gate.
  • SF2 changes back to a low level, so that the trigger signal is connected to the trigger signal of the port SOUT to be high level, which is used to trigger the touch drive circuit of the next stage, and the high level is also input to the input of the NAND gate YF. End (eg, second input).
  • the signal of the other input terminal of the NAND gate YF (for example, the first input terminal, which is connected to the second control port K2) also becomes a high level, and the output of the NAND gate YF becomes a low level, which is low.
  • the level goes high through the third NOT gate F3, causing both the third transistor M3 and the second transistor M2 to be turned off.
  • the first transmission gate C1 is turned on, and the strobe signal from the strobe signal port KX is introduced to the amplification module.
  • the strobe signal is at a high level, so the level states of the points in the amplifying module and the output module are opposite to the triggering phase, and the output module outputs the touch signal of the touch signal port VC to the output port OUT, thereby
  • the scan electrode inputs a touch signal for touch.
  • step S03 ie, the recovery phase
  • a low level is input to the first control port K1
  • a high level is input to the second control port K2
  • a low level is input to the strobe signal port KX.
  • the signals of all the ports except the strobe signal port KX are unchanged, only the strobe signal becomes low level, and the low level is input to the amplification module, so that the amplification module and the output module are The state is the same as in the trigger phase, so the output module outputs the common voltage of the common voltage port VCOM to the take-out port OUT, thereby keeping the scan electrode at a common voltage and for display.
  • step S04 ie, the cycle phase
  • the first sub-cycle phase and the second sub-cycle phase are executed in turn, in the first sub-cycle phase, a low level is input to the access port IN, and a high input is input to the first control port K1.
  • the signal of the first control port K1 changes to a high level again, and the first three-state NOT gate SF1 is turned on.
  • the signal of the access port IN is at a low level at this time, so the low level signal passes the first three-state NOT gate SF1 and the second NOT gate F2, and the signal of the trigger signal to the output port SOUT becomes a low level, and the trigger is triggered.
  • the signal output port SOUT no longer outputs a trigger signal, but outputs a low level.
  • the input signal (the signal from the second control port K2) is also low, so its output is high, thereby turning off the first transmission gate C1, so that no matter what the strobe signal is, it will not be a subsequent module. Have an impact.
  • the output end of the first transmission gate C1 is introduced to a low level through the third transistor M3, whereby the input of the amplification module is a low level, and the output module stably outputs a common voltage.
  • the signal of the first control port K1 changes to a low level again, the first tri-state NOT gate SF1 is turned off and the second tri-state NOT gate SF2 is turned on, because the second tri-state is not
  • the input of the gate SF2 is at a low level, so that the loop of the second NAND gate F2 causes the trigger signal to be taken out of the port SOUT to maintain a low level output, and the corresponding input of the NAND gate YF (for example, the second input)
  • the terminal is low, so the output of the NAND gate YF remains high, the first transmission gate C1 is still turned off, the strobe signal cannot be introduced, and the output module continues to output the common voltage.
  • the output of the trigger signal output port SOUT becomes a low level (ie, the trigger signal is no longer output), and the signal is output regardless of the signals of the first control port K1 and the second control port K2.
  • the signal at port OUT is always a common voltage and can be used for continuous display.
  • the touch driving unit re-enters the triggering phase to start the work of the new cycle.
  • another embodiment of the present invention provides a touch driving circuit including a plurality of cascaded touch driving units, wherein an output port OUT of each touch driving unit is used to connect a scan.
  • the electrode, the trigger signal output port SOUT of the upper-level touch driving unit is connected to the access port IN of the next-level touch driving unit adjacent to the upper-level touch driving unit.
  • the access port IN can be connected with a special initial trigger signal, and can also be connected to the trigger signal output port SOUT of the last level touch driving unit, which is not detailed here. limited.
  • the first control port K1 of one touch driving unit receives the first clock signal.
  • the second control port K2 receives the second clock signal, the first control port K1 of the other touch driving unit receives the second clock signal, and the second control port K2 receives the first clock signal.
  • the trigger signal generated by the first-level touch driving unit is used to trigger the touch driving unit of the next stage.
  • the working state of the next-level touch driving unit is higher than the level.
  • the touch drive unit is half a cycle of the clock signal. Therefore, as long as two clock signals of opposite level states are provided, and the clock signals connected to the control ports of the adjacent two-stage touch driving units are opposite, the control of the circuit can be realized with fewer control signals. Reduce the number of leads.

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  • Shift Register Type Memory (AREA)

Abstract

本发明提供触控驱动单元及其驱动方法和触控驱动电路，其可解决现有的触控驱动电路的结构复杂、面积大、输出不稳定、噪声大的问题。所述触控驱动单元包括移位寄存模块、选通模块和输出模块，其中：所述移位寄存模块包括第一控制端口、接入端口和触发信号接出端口，并与所述选通模块相连，用于产生触发信号；所述选通模块包括第二控制端口和选通信号端口，并与所述移位寄存模块相连，用于控制所述输出模块；以及所述输出模块包括接出端口、稳定电平端口和触控信号端口，用于根据所述选通模块的控制而输出稳定电平或触控信号。

Description

触控驱动单元及其驱动方法和触控驱动电路 技术领域
本发明属于触控驱动技术领域，具体涉及一种触控驱动单元及其驱动方法和一种触控驱动电路。
背景技术
互电容式触控结构主要由多条相互交叉的扫描电极(Tx)和感应电极(Rx)组成。各扫描电极轮流通入触控信号(例如高频的交变信号)，从而使感应电极中产生感应信号。当触摸发生时，触摸点处的扫描电极与感应电极间的电容变化，感应电极中的感应信号也变化，通过分析感应信号即可得到触摸位置。
在触控过程中，要为各扫描电极轮流提供触控信号，而没有触控信号时扫描电极要保持稳定电平，该稳定电平可为公共电压，即扫描电极也可同时作为公共电极。若要用驱动芯片直接为每条扫描电极提供上述信号，会导致驱动芯片结构复杂。因此，现有方法是在基板上设置触控驱动电路，该触控驱动电路由多个级联的触控驱动单元组成，每个触控驱动单元用于为一根扫描电极提供触控信号，同时为下一级的触控驱动单元提供触发信号，使下一级触控驱动单元开始工作。这样，只需几个信号即可实现对所有扫描电极的驱动。
但是，现有的触控驱动电路存在结构复杂、面积大(不利于窄边框设计)、输出不稳定、噪声大等问题。
发明内容
本发明针对现有的触控驱动电路的结构复杂、面积大、输出不稳定、噪声大的问题，提供一种结构简单、面积小、输出稳定、噪声低的一种触控驱动单元及其驱动方法和一种触控驱动电路。
本发明实施例提供一种触控驱动单元，该触控驱动单元包括移位寄存模块、选通模块和输出模块。所述移位寄存模块包括第一控制端口、接入端口和触发信号接出端口，并与所述选通模块相连，用于产生触发信号。所述选通模块包括第二控制端口和选通信号端口，并与所述移位寄存模块相连，用于控制所述输出模块。所述输出模块包括接出端口、稳定电平端口和触控信号端口，用于根据所述选通模块的控制而输出稳定电平或触控信号。
所述触控驱动单元还可以包括放大模块，其设于所述选通模块和所述输出模块之间，用于对所述选通模块产生的用于控制所述输出模块的信号进行放大。
所述移位寄存模块还可以包括第一非门、第二非门、第一晶体管、第一三态非门和第二三态非门。所述第一晶体管为N型晶体管，其第一极连接所述第一控制端口，第二极连接低电平信号，栅极连接所述第一非门的输出端。所述第一非门的输入端连接所述第一控制端口。所述第一三态非门的输入端连接所述接入端口，低电平导通端连接所述第一非门的输出端，高电平导通端连接所述第一控制端口，输出端连接所述第二非门的输入端和所述第二三态非门的输出端。所述第二三态非门的输入端连接所述触发信号接出端口、所述第二非门的输出端和所述选通模块，低电平导通端连接所述第一控制端口，高电平导通端连接所述第一非门的输出端。
所述选通模块还可以包括与非门、第二晶体管、第三晶体管、第三非门和第一传输门。所述第二晶体管为N型晶体管，其第一极连接所述第二控制端口，第二极连接低电平信号，栅极连接所述与非门的输出端、所述第三非门的输入端和所述第一传输门的低电平导通端。所述与非门的第一输入端连接所述第二控制端口，第二输入端连接所述移位寄存模块的第二三态非门的输入端。所述第三非门的输出端连接所述第三晶体管的栅极和所述第一传输门的高电平导通端。所述第三晶体管为P型晶体管，其第一极连接所述放大模块和所述第一传输门的输出端，第二极连接低电平 信号。所述第一传输门的输入端连接所述选通信号端口。
所述放大模块可以包括偶数个串联的非门，在所述偶数个串联的非门中上级非门的输出端连接与该上级非门相邻的下级非门的输入端。第一个非门的输入端连接所述选通模块的第三晶体管的第一极，最后一个非门的输入端和输出端均连接所述输出模块。
所述放大模块中的串联的非门个数可以为4个。
所述输出模块还可以包括第二传输门和第三传输门。所述第二传输门的输入端连接所述触控信号端口，输出端连接所述接出端口，高电平导通端连接所述放大模块的最后一个非门的输出端，低电平导通端连接所述放大模块的最后一个非门的输入端。所述第三传输门的输入端连接所述稳定电平端口，输出端连接所述接出端口，高电平导通端连接所述放大模块的最后一个非门的输入端，低电平导通端连接所述放大模块的最后一个非门的输出端。
所述稳定电平端口可以为公共电压端口。
本发明另一实施例提供一种上述触控驱动单元的驱动方法，其包括：触发阶段：使所述触发信号接出端口输出触发信号，并将稳定电平输出到所述接出端口；触控阶段：使所述触发信号接出端口输出触发信号，并将触控信号输出到所述接出端口；恢复阶段：使所述触发信号接出端口输出触发信号，并将稳定电平输出到所述接出端口；以及循环阶段：使所述触发信号接出端口输出低电平信号，并将稳定电平持续地输出到所述接出端口。
所述触控驱动单元的驱动方法可以包括：在所述触发阶段中，向所述接入端口输入高电平，向所述第一控制端口输入高电平，向所述第二控制端口输入低电平，向所述选通信号端口输入低电平；在所述触控阶段中，向所述第一控制端口输入低电平，向所述第二控制端口输入高电平，向所述选通信号端口输入高电平；在所述恢复阶段中，向所述第一控制端口输入低电平，向所述第二控制端口输入高电平，向所述选通信号端口输入低电平；以及在所述循环阶段中，轮流执行第一子循环阶段和第二子循环阶段，在所述第一子循环阶段中向所述接入端口输入低电平，向所述第 一控制端口输入高电平，向所述第二控制端口输入低电平，以及在所述第二子循环阶段中向所述第一控制端口输入低电平，向所述第二控制端口输入高电平。
本发明又一实施例提供一种触控驱动电路，其包括级联的多个上述触控驱动单元，每级触控驱动单元的接出端口用于连接一条扫描电极，触发信号接出端口连接与该级触控驱动单元相邻的下一级触控驱动单元的接入端口。
在任意两级相邻的触控驱动单元中，其中一个触控驱动单元的第一控制端口可接收第一时钟信号，第二控制端口可接收第二时钟信号，另一个触控驱动单元的第一控制端口可接收所述第二时钟信号，第二控制端口可接收所述第一时钟信号。
所述第一时钟信号和所述第二时钟信号的电平状态可相反。
本发明中所称的“非门”、“与非门”、“传输门”、“三态非门”均为逻辑电路。
具体的，非门可对输入进行“非”运算，即输入为高电平时输出为低电平，输入为低电平时输出为高电平。通常而言，非门要正常工作还需连接一个高电平信号和一个低电平信号。
与非门则先对两个输入进行“与”运算，之后再进行“非”运算。因此，只有当其两个输入均为高电平时其输出才为低电平，否则输出均为高电平。通常而言，与非门要正常工作也需连接一个高电平信号和一个低电平信号。
传输门的作用类似开关，可根据控制端的信号决定是否导通。传输门具有高压导通端和低电平导通端两个控制端，只有当低电平导通端为低电平并且高电平导通端为高电平时才导通，否则为关断。
三态非门具有关断状态和导通状态，当其处于导通状态时，会对输入端的信号进行“非”运算，即其相当于传输门加非门。三态非门具有高压导通端和低电平导通端两个控制端，只有当低电平导通端为低电平并且高电平导通端为高电平时才导通，否则为关断。通常而言，三态非门要正常工作也需连接一个高电平信 号和一个低电平信号。
以上各逻辑电路的具体组成形式是多样且已知的，故在此就不再对其进行详细介绍。
本发明的触控驱动单元结构合理，故器件数量少，结构简单，所占面积小，利于实现窄边框设计，同时其还可有效地消除各控制信号的影响，降低噪声，使输出稳定。
附图说明
图1为本发明的实施例的触控驱动单元的电路图。
图2为本发明的实施例的触控驱动电路的各端口的信号时序图。
图3为本发明的实施例的触控驱动电路的结构框图。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明作进一步详细描述。
如图1至图3所示，本发明实施例提供一种触控驱动单元，其包括移位寄存模块、选通模块和输出模块。
移位寄存模块包括第一控制端口K1、接入端口IN和触发信号接出端口SOUT，并与选通模块相连，用于产生触发信号。
选通模块包括第二控制端口K2和选通信号端口KX，并与移位寄存模块相连，用于控制输出模块。
输出模块包括接出端口OUT、稳定电平端口和触控信号端口VC，用于根据选通模块的控制而输出稳定电平或触控信号(通常为高频的交变信号)。
例如，稳定电平端口为公共电压端口VCOM，即该稳定电平端口接入的是公共电压，从而扫描电极在无触控信号时加载的是公共电压，故扫描电极同时也作为公共电极使用，且以下均以稳定电平端口为公共电压端口VCOM为例进行说明。
当然，应当理解，若稳定电平端口输入的是其他的稳定信号， 也是可行的。
例如，该触控驱动单元还可以包括：放大模块，其设于移位寄存模块和输出模块之间，用于对选通模块产生的用于控制输出模块的信号进行放大。更具体地，放大模块可以设于选通模块和输出模块之间，如图1所示。
也就是说，还可设置放大模块以对移位寄存模块输出的控制信号进行放大，从而提高触控驱动单元的可靠性和稳定性。当然，应当理解，若没有上述放大模块也是可行的。
如图1所示，下面对该触控驱动单元的优选具体结构进行介绍。
例如，移位寄存模块还可以包括第一非门F1、第二非门F2、第一晶体管M1、第一三态非门SF1和第二三态非门SF2。
第一晶体管M1为N型晶体管，其第一极连接第一控制端口K1，第二极连接低电平信号VSS，栅极连接第一非门F1的输出端。
第一非门F1的输入端连接第一控制端口K1。
第一三态非门SF1的输入端连接接入端口IN，低电平导通端PG连接第一非门F1的输出端，高电平导通端NG连接第一控制端口K1，输出端连接第二非门F2的输入端和第二三态非门SF2的输出端。
第二三态非门SF2的输入端连接触发信号接出端口SOUT、第二非门F2的输出端和选通模块，低电平导通端PG连接第一控制端口K1，高电平导通端NG连接第一非门F1的输出端。
例如，选通模块还可以包括与非门YF、第二晶体管M2、第三晶体管M3、第三非门F3和第一传输门C1。
第二晶体管M2为N型晶体管，其第一极连接第二控制端口K2，第二极连接低电平信号VSS，栅极连接与非门YF的输出端、第三非门F3的输入端和第一传输门C1的低电平导通端PG。
与非门YF的第一输入端连接第二控制端口K2，第二输入端连接移位寄存模块的第二三态非门SF2的输入端。
第三非门F3的输出端连接第三晶体管M3的栅极和第一传输门C1的高电平导通端NG。
第三晶体管M3为P型晶体管，其第一极连接放大模块和第一传输门C1的输出端，第二极连接低电平信号VSS。
第一传输门C1的输入端连接选通信号端口KX。
例如，放大模块可以包括偶数个串联的非门，在所述偶数个串联的非门中上级非门的输出端连接与该上级非门相邻的下级非门的输入端。例如，放大模块中的串联的非门个数为4个，即第四非门F4、第五非门F5、第六非门F6和第七非门F7，以下均以此为例进行介绍(应当理解的是，本发明不限于此)。
第一个非门(例如，第四非门F4)的输入端连接选通模块的第三晶体管M3的第一极。
最后一个非门(例如，第七非门F7)的输入端和输出端均连接输出模块。
例如，输出模块还可以包括第二传输门C2和第三传输门C3。
第二传输门C2的输入端连接触控信号端口VC，输出端连接接出端口OUT，高电平导通端NG连接放大模块的最后一个非门(例如，第七非门F7)的输出端，低电平导通端PG连接放大模块的最后一个非门的输入端。
第三传输门C3的输入端连接公共电压端口VCOM，输出端连接接出端口OUT，高电平导通端NG连接放大模块的最后一个非门(例如，第七非门F7)的输入端，低电平导通端PG连接放大模块的最后一个非门的输出端。
在图1中，部分逻辑电路上还连接有低电平信号VSS和高电平信号VDD，这是维持逻辑电路工作所需的已知方式，在此不再详细描述。
本发明另一实施例提供一种上述触控驱动单元的驱动方法，其包括以下阶段。
触发阶段：使触发信号接出端口SOUT输出触发信号，并将公共电压输出到接出端口OUT。
触控阶段：使触发信号接出端口SOUT输出触发信号，并将触控信号输出到接出端口OUT。
恢复阶段：使触发信号接出端口SOUT输出触发信号，并将公共电压输出到接出端口OUT。
循环阶段：使触发信号接出端口SOUT输出低电平，并将稳定电平持续地输出到接出端口OUT。
如图2所示，下面结合触控驱动单元的具体结构，对其驱动方法和工作原理进行说明，该驱动方法具体包括以下步骤S01至步骤S04。
在步骤S01(即，触发阶段)中，向接入端口IN输入高电平，向第一控制端口K1输入高电平，向第二控制端口K2输入低电平，向选通信号端口KX输入低电平。
在本阶段中，向第一控制端口K1输入的高电平，其经过第一非门F1后变为低电平，从而使第一晶体管M1关断。同时，第一三态非门SF1的高电平导通端NG处于高电平，低电平导通端PG处于低电平，故第一三态非门SF1导通，相应地，第二三态非门SF2的各个控制端处的电平与第一三态非门SF1的各个控制端处的电平相反，故其必然关断。此时第一三态非门SF1将来自接入端口IN的高电平变为低电平，再经过第二非门F2后变为高电平的触发信号。该高电平的触发信号从触发信号接出端口SOUT输出，同时(通过与非门YF的第二输入端)输入到与非门YF中。
与非门YF的另一输入端(即，第一输入端)此时输入的是来自第二控制端口K2的低电平，故其输出高电平，从而第二晶体管M2导通，低电平信号VSS经过第二晶体管M2传导至与非门YF的第一输入端，将其输入稳定为低电平。同时，与非门YF的输出端的高电平还经第三非门F3后变为低电平，使第一传输门C1关断，同时使第三晶体管M3导通，低电平信号VSS经过第三晶体管M3传至第一传输门C1的输出端，将第一传输门C1的输出端的信号稳定为低电平。
第一传输门C1的输出端处的低电平经放大模块的各个非门 逐级放大后输入到输出模块中。对于最后一个非门(例如，第七非门F7)，其输入端和输出端的电平必然相反，故第二传输门C2和第三传输门C3必然是一个导通而另一个关断。此时是第三传输门C3导通，从而使公共电压端口VCOM的公共电压从接出端口OUT输出到扫描电极上，使得扫描电极进行显示。
可见，在本阶段中，由于第二晶体管M2的作用，与非门YF的第一输入端被稳定为低电平，从而避免了第二控制端口K2的信号波动所产生的影响，进而保证第一传输门C1关断。此外，由于第三晶体管M3的作用，使得第一传输门C1的输出端的电平被稳定拉至低电平，从而可避免选通信号的噪声干扰，使触控驱动单元稳定地输出公共电压。
图2中，接入端口IN的高电平时间很短，这是因为该图是以图3中的第一级触控驱动单元为例进行说明的，该级触控驱动单元的触发信号(来自接入端口IN的信号)可由驱动芯片专门提供，故其优选较短，而之后各级触控驱动单元的触发信号则为上级触发信号接出端口SOUT的输出信号，根据下文的叙述可知，该触发信号的高电平时间较长，但其高电平的长短并不影响电路的工作。
在步骤S02(即，触控阶段)中，向第一控制端口K1输入低电平，向第二控制端口K2输入高电平，向选通信号端口KX输入高电平。
在本阶段中，第一控制端口K1的信号变为低电平，其经过第一非门F1变为高电平，使第一晶体管M1导通，由此低电平信号VSS经第一晶体管M1引入到第一控制端口K1处，使其低电平更稳定，减小噪声干扰。同时，两个三态非门的状态与触发阶段相反，即，第一三态非门SF1关断而第二三态非门SF2导通。由于第一三态非门SF1关断，故接入端口IN的信号不能进入电路中，不会对电路造成影响(所以说触发信号高电平的长短并不影响电路的工作)。并且，第一三态非门SF1的输出端无信号而处于低电平，该低电平经过第二非门F2变为高电平，再经第二三态非门 SF2变回低电平，从而使触发信号接出端口SOUT稳定为高电平的触发信号，用于触发下一级的触控驱动电路，同时该高电平还输入至与非门YF的输入端(例如，第二输入端)。
此时与非门YF的另一个输入端(例如，第一输入端，其连接第二控制端口K2)的信号也变为高电平，与非门YF的输出变为低电平，该低电平经过第三非门F3变为高电平，使第三晶体管M3和第二晶体管M2均关断。同时，第一传输门C1导通，将来自选通信号端口KX的选通信号引入放大模块。
此时选通信号是高电平，故放大模块和输出模块中各点的电平状态均与触发阶段相反，输出模块将触控信号端口VC的触控信号输出到接出端口OUT，从而向扫描电极输入触控信号，以进行触控。
在步骤S03(即，恢复阶段)中，向第一控制端口K1输入低电平，向第二控制端口K2输入高电平，向选通信号端口KX输入低电平。
在本阶段中，除选通信号端口KX外的其他各端口的信号均不变，只有选通信号变为低电平，该低电平被输入到放大模块中，使放大模块和输出模块的状态与触发阶段中的相同，故输出模块将公共电压端口VCOM的公共电压输出到接出端口OUT，从而使扫描电极保持公共电压并用于显示。
在步骤S04(即，循环阶段)中，轮流执行第一子循环阶段和第二子循环阶段，在第一子循环阶段中向接入端口IN输入低电平，向第一控制端口K1输入高电平，向第二控制端口K2输入低电平；在第二子循环阶段中向第一控制端口K1输入低电平，向第二控制端口K2输入高电平。
在第一子循环阶段中，第一控制端口K1的信号再次变为高电平，第一三态非门SF1导通。但此时接入端口IN的信号是低电平，故该低电平经过第一三态非门SF1和第二非门F2后将触发信号接出端口SOUT的信号变为低电平，触发信号接出端口SOUT不再输出触发信号，而是输出低电平。同时与非门YF的另一个输 入信号(来自第二控制端口K2的信号)也是低电平，故其输出为高电平，从而将第一传输门C1关断，由此不论选通信号的情况如何都不会对后续模块产生影响。同时，第一传输门C1的输出端经过第三晶体管M3引入低电平，由此，放大模块的输入是低电平，输出模块稳定的输出公共电压。
在第二子循环阶段中，第一控制端口K1的信号再次变为低电平，第一三态非门SF1关断而第二三态非门SF2导通，由于此时第二三态非门SF2的输入端为低电平，从而经过其与第二非门F2的循环，使触发信号接出端口SOUT保持低电平输出，且与非门YF的相应输入端(例如，第二输入端)为低电平，故与非门YF的输出保持高电平，第一传输门C1仍然关断，选通信号无法引入，输出模块继续输出公共电压。
可见，在本阶段中，触发信号接出端口SOUT的输出变成了低电平(即不再输出触发信号)，同时不论第一控制端口K1和第二控制端口K2的信号如何变化，接出端口OUT的信号始终为公共电压，可用于进行持续的显示。
因此，根据第一控制端口K1和第二控制端口K2的信号的变化，以上第一子循环阶段、第二子循环阶段交替出现。在接入端口IN的信号再次变为高电平时，触控驱动单元重新进入触发阶段，开始新一周期的工作。
如图3所示，本发明另一实施例提供一种触控驱动电路，其包括多个级联的上述触控驱动单元，其中每级触控驱动单元的接出端口OUT用于连接一条扫描电极，上一级触控驱动单元的触发信号接出端口SOUT连接与该上一级触控驱动单元相邻的下一级触控驱动单元的接入端口IN。
当然，对于其中第一级的触控驱动单元，其接入端口IN可以连接一个专门的初始触发信号，也可连接最后一级触控驱动单元的触发信号接出端口SOUT，在此不再详细限定。
例如，对于上述触控驱动单元，在任意两级相邻的触控驱动单元中，一个触控驱动单元的第一控制端口K1接收第一时钟信 号，第二控制端口K2接收第二时钟信号，另一个触控驱动单元的第一控制端口K1接收第二时钟信号，第二控制端口K2接收第一时钟信号。
根据以上的连接方法可知，一级触控驱动单元产生的触发信号是用于触发下一级的触控驱动单元的，如图2所示，下一级触控驱动单元的工作状态比该级触控驱动单元晚了时钟信号的半个周期。为此，只要提供两个电平状态相反的时钟信号，并使相邻两级触控驱动单元的控制端口所接的时钟信号相反，即可用较少的控制信号来实现对电路的控制，从而减少引线数量。
应当理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也属于本发明的保护范围。

Claims (13)

  1. 一种触控驱动单元，包括移位寄存模块、选通模块和输出模块，其中：
    所述移位寄存模块包括第一控制端口、接入端口和触发信号接出端口，并与所述选通模块相连，用于产生触发信号；
    所述选通模块包括第二控制端口和选通信号端口，并与所述移位寄存模块相连，用于控制所述输出模块；以及
    所述输出模块包括接出端口、稳定电平端口和触控信号端口，用于根据所述选通模块的控制而输出稳定电平或触控信号。
  2. 根据权利要求1所述的触控驱动单元，还包括：
    放大模块，其设于所述选通模块和所述输出模块之间，用于对所述选通模块产生的用于控制所述输出模块的信号进行放大。
  3. 根据权利要求2所述的触控驱动单元，其中，所述移位寄存模块还包括第一非门、第二非门、第一晶体管、第一三态非门和第二三态非门，其中：
    所述第一晶体管为N型晶体管，其第一极连接所述第一控制端口，第二极连接低电平信号，栅极连接所述第一非门的输出端；
    所述第一非门的输入端连接所述第一控制端口；
    所述第一三态非门的输入端连接所述接入端口，低电平导通端连接所述第一非门的输出端，高电平导通端连接所述第一控制端口，输出端连接所述第二非门的输入端和所述第二三态非门的输出端；以及
    所述第二三态非门的输入端连接所述触发信号接出端口、所述第二非门的输出端和所述选通模块，低电平导通端连接所述第一控制端口，高电平导通端连接所述第一非门的输出端。
  4. 根据权利要求3所述的触控驱动单元，其中，所述选通模 块还包括与非门、第二晶体管、第三晶体管、第三非门和第一传输门，其中：
    所述第二晶体管为N型晶体管，其第一极连接所述第二控制端口，第二极连接低电平信号，栅极连接所述与非门的输出端、所述第三非门的输入端和所述第一传输门的低电平导通端；
    所述与非门的第一输入端连接所述第二控制端口，第二输入端连接所述移位寄存模块的第二三态非门的输入端；
    所述第三非门的输出端连接所述第三晶体管的栅极和所述第一传输门的高电平导通端；
    所述第三晶体管为P型晶体管，其第一极连接所述放大模块和所述第一传输门的输出端，第二极连接低电平信号；以及
    所述第一传输门的输入端连接所述选通信号端口。
  5. 根据权利要求4所述的触控驱动单元，其中，所述放大模块包括偶数个串联的非门，在所述偶数个串联的非门中上级非门的输出端连接与该上级非门相邻的下级非门的输入端，其中：
    第一个非门的输入端连接所述选通模块的第三晶体管的第一极；以及
    最后一个非门的输入端和输出端均连接所述输出模块。
  6. 根据权利要求5所述的触控驱动单元，其中，所述放大模块中的串联的非门个数为4个。
  7. 根据权利要求5所述的触控驱动单元，其中，所述输出模块还包括第二传输门和第三传输门，其中：
    所述第二传输门的输入端连接所述触控信号端口，输出端连接所述接出端口，高电平导通端连接所述放大模块的最后一个非门的输出端，低电平导通端连接所述放大模块的最后一个非门的输入端；以及
    所述第三传输门的输入端连接所述稳定电平端口，输出端连 接所述接出端口，高电平导通端连接所述放大模块的最后一个非门的输入端，低电平导通端连接所述放大模块的最后一个非门的输出端。
  8. 根据权利要求1至7中任意一项所述的触控驱动单元，其中，所述稳定电平端口为公共电压端口。
  9. 一种触控驱动单元的驱动方法，所述触控驱动单元为权利要求1至8中任意一项所述的触控驱动单元，所述触控驱动单元的驱动方法包括：
    触发阶段：使所述触发信号接出端口输出触发信号，并将稳定电平输出到所述接出端口；
    触控阶段：使所述触发信号接出端口输出触发信号，并将触控信号输出到所述接出端口；
    恢复阶段：使所述触发信号接出端口输出触发信号，并将稳定电平输出到所述接出端口；以及
    循环阶段：使所述触发信号接出端口输出低电平，并将稳定电平持续地输出到所述接出端口。
  10. 根据权利要求9所述的触控驱动单元的驱动方法，其中，在所述触控驱动单元为根据权利要求7所述的触控驱动单元的情况下，所述触控驱动单元的驱动方法包括：
    在所述触发阶段中，向所述接入端口输入高电平，向所述第一控制端口输入高电平，向所述第二控制端口输入低电平，向所述选通信号端口输入低电平；
    在所述触控阶段中，向所述第一控制端口输入低电平，向所述第二控制端口输入高电平，向所述选通信号端口输入高电平；
    在所述恢复阶段中，向所述第一控制端口输入低电平，向所述第二控制端口输入高电平，向所述选通信号端口输入低电平；以及
    在所述循环阶段中，轮流执行第一子循环阶段和第二子循环阶段，在所述第一子循环阶段中向所述接入端口输入低电平，向所述第一控制端口输入高电平，向所述第二控制端口输入低电平，以及在所述第二子循环阶段中向所述第一控制端口输入低电平，向所述第二控制端口输入高电平。
  11. 一种触控驱动电路，包括级联的多个触控驱动单元，所述多个触控驱动单元中的每一个都是根据权利要求1至8中任意一项所述的触控驱动单元，其中，
    每级触控驱动单元的接出端口用于连接一条扫描电极，触发信号接出端口连接与该级触控驱动单元相邻的下一级触控驱动单元的接入端口。
  12. 根据权利要求11所述的触控驱动电路，其中，
    所述触控驱动单元为权利要求7所述的触控驱动单元；以及
    在任意两级相邻的触控驱动单元中，其中一个触控驱动单元的第一控制端口接收第一时钟信号，第二控制端口接收第二时钟信号，另一个触控驱动单元的第一控制端口接收所述第二时钟信号，第二控制端口接收所述第一时钟信号。
  13. 根据权利要求12所述的触控驱动电路，其中，所述第一时钟信号和所述第二时钟信号的电平状态相反。
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