WO2016119316A1 - 像素电路及其驱动方法、显示面板及显示装置 - Google Patents

像素电路及其驱动方法、显示面板及显示装置 Download PDF

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Publication number
WO2016119316A1
WO2016119316A1 PCT/CN2015/076851 CN2015076851W WO2016119316A1 WO 2016119316 A1 WO2016119316 A1 WO 2016119316A1 CN 2015076851 W CN2015076851 W CN 2015076851W WO 2016119316 A1 WO2016119316 A1 WO 2016119316A1
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Prior art keywords
storage capacitor
voltage
transistor
charging module
pole
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PCT/CN2015/076851
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English (en)
French (fr)
Inventor
王博
玄明花
张毅
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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Priority to US14/904,799 priority Critical patent/US20160343300A1/en
Publication of WO2016119316A1 publication Critical patent/WO2016119316A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular to a pixel circuit and a driving method thereof, a display panel, and a display device.
  • An Active Matrix Organic Light Emitting Diode (AMOLED) display panel utilizes OLEDs to emit light of different brightnesses, and each pixel corresponding to each OLED displays a corresponding brightness; compared to a conventional thin film transistor
  • the liquid crystal display (Thin Film Transistor Liquid Crystal Display, hereinafter referred to as TFT LCD) panel the AMOLED display panel has a faster reaction speed, higher contrast ratio and a wider viewing angle, and is an important development direction of the display panel.
  • the current that drives the OLED illumination can be expressed by the following formula:
  • Vgs is the voltage difference between the gate and the source of the driving transistor
  • ⁇ is a parameter related to the process parameters and feature sizes of the driving transistor
  • Vth is the threshold voltage of the driving transistor
  • the driving current for driving the light emitting device OLED to emit light is related to the threshold voltage Vth of the driving transistor.
  • the threshold voltage Vth of the driving transistor changes during the light emitting phase, thereby affecting the light emitting brightness of the light emitting device OLED. Further, it adversely affects the display effect of the AMOLED display panel.
  • the present invention aims to at least solve one of the technical problems existing in the prior art, and proposes a pixel circuit and a driving method thereof, a display substrate and a display device, which can avoid driving crystals
  • the change of the threshold voltage of the body tube during the display process has an influence on the light-emitting brightness of the light-emitting device, so that the light-emitting brightness of the light-emitting device remains stable during the display process.
  • a pixel circuit for the purpose of the present invention, including: a first charging module, a storage capacitor, a second charging module, a reset module, a driving transistor, a lighting control module, and a light emitting device;
  • the second charging module is respectively connected to the two ends of the storage capacitor for charging both ends of the storage capacitor;
  • the reset module is connected to both ends of the storage capacitor for using the storage capacitor The voltages at the two ends are respectively reset to their respective initial voltages;
  • the control electrode of the driving transistor is connected to one end of the storage capacitor connected to the second charging module, and the first pole is connected to the high voltage end, and the second pole Connected to the second charging module, for driving the light emitting device to emit light;
  • the light emitting control module is connected between the second pole of the driving transistor and the light emitting device, for driving the driving transistor and the The connection between the light emitting devices is turned on or off.
  • the first charging module includes a front charging unit and a post charging unit.
  • the front charging unit is configured to charge the storage capacitor after the storage capacitor is reset, so that the storage capacitor is the first One end of the connection of the charging module has a first voltage;
  • the post-charging unit is configured to charge the storage capacitor after the front charging unit charges the storage capacitor, so that the storage capacitor and the first charging module One end of the connection has a second voltage.
  • the front charging unit comprises a fourth transistor, the control electrode of the fourth transistor is connected to the gate line, the first pole is connected to the first data line providing the first voltage, and the second pole is connected to the storage a rear end of the capacitor connected to the first charging module;
  • the post charging unit includes a fifth transistor, the control electrode of the fifth transistor is connected to the light emitting control signal end, and the first pole is provided with the second voltage The second data line is connected, and the second pole is connected to one end of the storage capacitor connected to the first charging module.
  • the second charging module includes a second transistor; the control electrode of the second transistor is connected to the gate line, the first pole is connected to the second pole of the driving transistor, and the second pole is connected to the storage capacitor Connected to one end of the second charging module.
  • the reset module includes a first transistor and a seventh transistor; a control electrode of the first transistor, a first pole connected to the reset signal end, a second pole and the storage capacitor and the second charging module One end of the connection is connected; the control electrode of the seventh transistor is The reset signal terminal is connected, the first pole is connected to the high voltage end, and the second pole is connected to one end of the storage capacitor connected to the first charging module.
  • the illuminating control module includes a sixth transistor, the control electrode of the sixth transistor is connected to the illuminating control signal end, the first pole is connected to the second pole of the driving transistor, and the second pole is connected to the illuminating device .
  • each of the transistors is a P-type tube.
  • the light emitting device is an OLED; an anode of the OLED is connected to a second pole of the sixth transistor, and a cathode is connected to a low voltage end.
  • the present invention further provides a driving method of the above pixel circuit, comprising the steps of:
  • the voltage across the storage capacitor is reset to its respective initial voltage
  • each of the transistors is a P-type tube; in the first stage, the illumination control signal end outputs a high level signal, the reset signal end outputs a low level signal, and the gate line outputs a high level signal; in the second stage, the illumination The control signal end outputs a high level signal, the reset signal end outputs a high level signal, and the gate line outputs a low level signal; in the third stage, the illumination control signal end outputs a low level signal, and the reset signal end outputs a high level signal.
  • the gate line outputs a high level signal.
  • the present invention also provides a display panel including the above pixel circuit provided by the present invention.
  • the present invention also provides a display device comprising the above display panel provided by the present invention.
  • the pixel circuit provided by the invention can prevent the change of the threshold voltage of the driving transistor during the display process from affecting the light-emitting brightness of the light-emitting device, thereby contributing to the stability of the light-emitting brightness of the light-emitting device during the display process, thereby contributing to the improvement of the display. effect.
  • the driving method provided by the invention can prevent the change of the threshold voltage of the driving transistor during the display process from affecting the brightness of the light emitting device, thereby contributing to the stability of the light emitting brightness of the light emitting device during the display process, thereby contributing to the improvement of the display. effect.
  • the display panel provided by the present invention adopts the above-mentioned pixel circuit provided by the present invention, which can prevent the change of the threshold voltage of the driving transistor during the display process from affecting the light-emitting brightness of the light-emitting device, thereby contributing to the light-emitting brightness of the light-emitting device during the display process. It stays stable and helps to improve the display.
  • the display device provided by the present invention adopts the above display panel provided by the present invention, which can prevent the change of the threshold voltage of the driving transistor during the display process from affecting the light-emitting brightness of the light-emitting device, thereby contributing to the light-emitting brightness of the light-emitting device during the display process. It stays stable and helps to improve the display.
  • FIG. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention.
  • FIG. 2 is a circuit diagram of the pixel circuit shown in FIG. 1;
  • FIG. 3 is a timing chart of signals in the pixel circuit shown in FIG.
  • 1 first charging module; 2: second charging module; 3: reset module; 4: lighting control module; 5: lighting device; 10: front charging unit; 11: post charging unit; C: storage capacitor; T1: First transistor; T2: second transistor; T3: driving transistor; T4: fourth transistor; T5: fifth transistor; T6: sixth transistor; T7: seventh transistor; S1: first data line; S2: second Data line; VDD: high voltage terminal; VSS: low voltage terminal; EM: lighting control signal terminal; RESET: reset signal terminal; Gate: gate Polar line.
  • FIG. 1 is a structural diagram of a pixel circuit according to an embodiment of the present invention.
  • the pixel circuit includes: a first charging module 1 , a storage capacitor C, a second charging module 2, a reset module 3, a driving transistor T3, a lighting control module 4, and a light emitting device 5;
  • the first charging module 1 and the second charging module 2 are respectively connected to both ends of the storage capacitor C for charging both ends of the storage capacitor C.
  • the reset module 3 and the storage capacitor C are both An end connection for resetting voltages across the storage capacitor C to their respective initial voltages; a control electrode of the driving transistor T3 and a storage capacitor C connected to the second charging module 2 One end (ie, the right end in FIG. 1 ) is connected, the first pole is connected to the high voltage terminal VDD, and the second pole is connected to the second charging module 2 for driving the light emitting device 5 to emit light; the light emitting control module 4 It is connected between the second pole of the driving transistor T3 and the light emitting device 5 for turning on or off the connection between the driving transistor T3 and the light emitting device 5.
  • the reset module 3 first resets both ends of the storage capacitor C such that the voltages at both ends thereof are their respective initial voltages; after the resetting process is completed, the first charging is performed.
  • the module 1 charges one end of the storage capacitor C connected to the first charging module 1 (ie, the left end in FIG. 1 ), so that the left end of the storage capacitor C has a first voltage Vdata, and the second charging module 2 pairs the storage capacitor C The right end is charged so that the voltage at the terminal is VDD+Vth, where VDD is the voltage at the high voltage terminal VDD and Vth is the threshold voltage of the driving transistor T3.
  • the second charging module 2 stops charging the right end of the storage capacitor C, so that the storage capacitor C is in the following state: when the voltage of the left end of the storage capacitor C changes, the voltage at the right end thereof changes accordingly.
  • the first charging module 1 charges the left end of the storage capacitor C such that the left end of the storage capacitor C has the second voltage Vref, It can be understood that at this time, the voltage at the right end of the storage capacitor C changes accordingly, and the voltage value thereof should be: VDD+Vth+Vref-Vdata.
  • the light emission control module 4 controls the connection between the driving transistor T3 and the light emitting device 5 to be disconnected; and after the above process ends, the light emission control module 4 controls the connection between the driving transistor T3 and the light emitting device 5 to be turned on. At this time, the current flowing from the driving transistor T3 to the light emitting device 5 is:
  • the current is the current for driving the light-emitting device 5 to emit light.
  • the current is independent of the threshold voltage Vth of the driving transistor T3. Therefore, the brightness of the light-emitting device 5 during display is not caused by the threshold voltage Vth of the driving transistor T3.
  • the change of the change is made, so that the stability of the light-emitting luminance of the light-emitting device 5 during display can be improved, so that the display effect of the OLED display device can be improved.
  • the first charging module 1 includes a front charging unit 10 and a post charging unit 11; the front charging unit 10 is configured to store the capacitor C after the storage capacitor C is reset. Charging is performed such that one end of the storage capacitor C connected to the first charging module 1 (ie, the left end in FIG. 2) has a first voltage Vdata; the post-charging unit 11 is used in the front charging unit 10 After charging the storage capacitor C, the storage capacitor C is charged, so that one end of the storage capacitor C connected to the first charging module 1 has a second voltage Vref.
  • the front charging unit 10 includes a fourth transistor T4, the control electrode of the fourth transistor T4 is connected to the gate line Gate, and the first pole is connected to the first data line S1 that provides the first voltage Vdata.
  • a second pole is connected to an end of the storage capacitor C that is connected to the first charging module 1;
  • the post-charging unit 11 includes a fifth transistor T5, and a control pole of the fifth transistor T5 and an emission control signal terminal EM The first pole is connected to the second data line S2 that supplies the second voltage Vref, and the second pole is connected to one end of the storage capacitor C that is connected to the first charging module 1.
  • the second charging module 2 includes a second transistor T2; the control electrode of the second transistor T2 is connected to the gate line Gate, and the first electrode is connected to the second electrode of the driving transistor T3, The two poles are connected to one end of the storage capacitor C that is connected to the second charging module 2 (ie, the right end in FIG. 2).
  • the reset module 3 includes a first transistor T1 and a seventh transistor T7.
  • the control electrode and the first pole of the first transistor T1 are connected to the reset signal terminal RESET, and the second pole is coupled to the storage capacitor C.
  • One end of the connection of the second charging module 2 ie, the right end in FIG. 2) is connected;
  • the control electrode of the seventh transistor T7 is connected to the reset signal terminal RESET,
  • the first pole is connected to the high voltage terminal VDD, and the second pole is connected with One end of the storage capacitor C connected to the first charging module 1 (ie, the left end in FIG. 2) is connected.
  • the illuminating control module 4 includes a sixth transistor T6, the control electrode of the sixth transistor T6 is connected to the illuminating control signal end EM, the first pole is connected to the second pole of the driving transistor T3, and the second pole is The light emitting devices 5 are connected.
  • the light emission control signal terminal EM outputs an emission control signal to the control electrode of the sixth transistor T6 such that the connection between the driving transistor T3 and the light emitting device 5 is turned on or off by the sixth transistor T6. Open for control.
  • the light emitting device 5 is an OLED; an anode of the OLED is connected to a second electrode of the sixth transistor T6, and a cathode is connected to a low voltage terminal VSS.
  • control electrode of each transistor refers to a gate thereof, and the first pole and the second pole respectively indicate a source and a drain thereof, wherein the first pole source and the second pole may be
  • the two extremely drains can also make the first extreme drain and the second extreme source.
  • each of the transistors may be a P-type tube.
  • P-type tubes the principle and process of driving pixel illumination by the pixel circuit provided by the present embodiment will be described in detail with reference to FIG. 2 and FIG.
  • the illumination control signal terminal EM outputs a high level signal to turn off the fifth transistor T5 and the sixth transistor T6; the reset signal terminal RESET outputs a low level signal to make the first transistor T1 and the seventh transistor T7 are turned on; the gate line Gate outputs a high level signal to turn off the second transistor T2 and the fourth transistor T4; that is, in the first stage, only the first transistor T1 and the seventh transistor T7 is in the on state.
  • the high voltage terminal VDD is charged to the left end of the storage capacitor C via the seventh transistor T7, so that the terminal has the voltage VDD, and the reset signal terminal RESET is charged to the right end of the storage capacitor C via the first transistor T1, so that the terminal has V RESET voltage, VDD, and the voltage V RESET i.e. the initial voltage stored across the capacitor C; Further, the V RESET voltage will be the drive transistor T3 is turned on after the second stage.
  • the illumination control signal terminal EM outputs a high level signal to turn off the fifth transistor T5 and the sixth transistor T6; the reset signal terminal RESET outputs a high level signal to make the first transistor T1 and the seventh transistor T7 is disconnected; the gate line Gate outputs a low level signal to turn on the second transistor T2 and the fourth transistor T4; that is, in the second stage, only the second transistor T2, the fourth transistor T4, and the driving transistor T3 is in the on state.
  • the voltage Vdata on the first data line S1 is input to the left end of the storage capacitor C via the fourth transistor T4, so that the terminal has the voltage Vdata; the high voltage terminal VDD passes through the driving transistor T3 and the second transistor T2 to the storage capacitor.
  • the right end of C is charged until the voltage at the right end of the storage capacitor C reaches a voltage value that causes the driving transistor T3 to be turned off.
  • the driving transistor T3 and the second transistor T2 form a diode structure
  • the light-emitting control signal terminal EM outputs a low-level signal to turn on the fifth transistor T5 and the sixth transistor T6; the reset signal terminal RESET outputs a high-level signal, so that the first transistor T1 and the seventh transistor The transistor T7 is turned off; the gate line Gate outputs a high level signal to turn off the second transistor T2 and the fourth transistor T4; that is, in the third stage, only the fifth transistor T5 and the sixth transistor T6 are in an on state. .
  • the voltage Vref on the second data line S2 is input to the left end of the storage capacitor C via the fifth transistor T5, so that the voltage of the terminal is changed from Vdata to Vref, and since the right end of the storage capacitor C is not connected to the power source. Therefore, the voltage at the right end of the storage capacitor C changes with the change of the voltage at the left end of the storage capacitor C. Finally, the voltage value at the right end of the storage capacitor C is changed from VDD+Vth to VDD+Vth+Vref-Vdata.
  • the voltage of the gate of the driving transistor T3 (the potential of which is equal to the potential of the right end of the storage capacitor C) is: VDD + Vth + Vref - Vdata; the voltage of the source of the driving transistor T3 is VDD; Therefore, the drive current is generated according to the voltage difference between the gate and the source of the drive transistor T3:
  • the above driving current is input to the light emitting device 5 via the sixth transistor T6 to drive the light emitting device 5 to emit light. Since the driving current is independent of the threshold voltage Vth of the driving transistor T3, the light-emitting luminance of the light-emitting device 5 does not fluctuate due to the change of the threshold voltage Vth of the driving transistor T3, so that the light-emitting device 5 can be improved during display. The stability of the illuminating brightness can improve the display effect of the OLED display device.
  • the pixel circuit provided by the embodiment of the present invention can prevent the variation of the threshold voltage Vth of the driving transistor T3 during the display process from affecting the luminance of the light emitting device 5, thereby contributing to the luminance of the light emitting device 5. It remains stable during the display process, which in turn helps to improve the display.
  • One embodiment of the present invention also provides a driving method of a pixel circuit for use in the pixel circuit provided by the above-described embodiment of the present invention.
  • the driving method includes the following steps:
  • the voltage across the storage capacitor is reset to its respective initial voltage
  • each of the transistors (T1 to T7) is a P-type tube
  • the light-emission control signal terminal EM outputs a high-level signal, and is reset.
  • Signal terminal RESET outputs low level signal
  • gate line Gate outputs a high level signal
  • the illumination control signal terminal EM outputs a high level signal
  • the reset signal terminal RESET outputs a high level signal
  • the gate line Gate outputs a low level signal
  • the illumination control The signal terminal EM outputs a low level signal
  • the reset signal terminal RESET outputs a high level signal
  • the gate line Gate outputs a high level signal.
  • the driving method provided by the embodiment of the present invention can prevent the variation of the threshold voltage of the driving transistor during the display process from affecting the illuminating brightness of the illuminating device, thereby contributing to the illuminating brightness of the illuminating device being stable during the display process, thereby facilitating To improve the display.
  • One embodiment of the present invention also provides a display panel.
  • the display panel includes the pixel circuit provided by the above embodiment of the present invention.
  • the display panel provided by the embodiment of the present invention adopts the pixel circuit provided by the above embodiment of the present invention, which can prevent the variation of the threshold voltage of the driving transistor during the display process from affecting the luminance of the light emitting device, thereby contributing to the light emitting device.
  • the brightness of the light is kept stable during the display process, which in turn helps to improve the display.
  • One embodiment of the present invention also provides a display device.
  • the display device includes the display panel provided by the above embodiment of the present invention.
  • the display device provided by the embodiment of the present invention adopts the display panel provided by the above embodiments of the present invention, which can prevent the variation of the threshold voltage of the driving transistor during the display process from affecting the luminance of the light emitting device, thereby contributing to the light emitting device.
  • the brightness of the light is kept stable during the display process, which in turn helps to improve the display.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种像素电路及其驱动方法、显示面板及显示装置。所述像素电路包括：第一充电模块（1）、存储电容、第二充电模块（2）、重置模块（3）、驱动晶体管、发光控制模块（4）和发光器件（5）；第一充电模块（1）、第二充电模块（2）分别与存储电容的两端连接，用于向存储电容的两端充电；重置模块（3）与存储电容的两端连接，用于将存储电容的两端的电压分别重置为其各自的初始电压；驱动晶体管的控制极与存储电容的与第二充电模块（2）连接的一端连接，第一极与高电压端连接，第二极与第二充电模块（2）连接，用于驱动发光器件（5）发光；发光控制模块（4）连接在驱动晶体管与发光器件（5）之间，用于使驱动晶体管与发光器件（5）之间的连接接通或断开。上述像素电路可使发光器件（5）的发光亮度在显示过程中保持稳定，从而能提高显示效果。

Description

像素电路及其驱动方法、显示面板及显示装置 技术领域
本发明涉及液晶显示技术领域，具体地，涉及像素电路及其驱动方法、显示面板及显示装置。
背景技术
有源矩阵有机发光二极管(Active Matrix Organic Light Emitting Diode，以下简称为AMOLED)显示面板利用各OLED发出不同亮度的光线、使与各OLED对应的各像素显示各自相应的亮度；相对于传统的薄膜晶体管液晶显示(Thin Film Transistor Liquid Crystal Display，以下简称为TFT LCD)面板，AMOLED显示面板具有更快的反应速度、更高的对比度以及更广大的视角，是显示面板的一个重要的发展方向。
驱动OLED发光的电流可以用以下公式表示：
Figure PCTCN2015076851-appb-000001
其中，Vgs为驱动晶体管的栅极与源极之间的电压差，β是与驱动晶体管的工艺参数和特征尺寸有关的参数，Vth为驱动晶体管的阈值电压。
根据上述公式，驱动发光器件OLED发光的驱动电流与驱动晶体管的阈值电压Vth有关，而在实际应用中，驱动晶体管的阈值电压Vth会在发光阶段发生变化，从而会影响发光器件OLED的发光亮度，进而会对AMOLED显示面板的显示效果产生不良影响。
发明内容
本发明旨在至少解决现有技术中存在的技术问题之一，提出了一种像素电路及其驱动方法、显示基板及显示装置，其可以避免驱动晶 体管的阈值电压在显示过程中的变化对发光器件的发光亮度产生影响，使发光器件的发光亮度在显示过程中保持稳定。
为实现本发明的目的而提供一种像素电路，其包括：第一充电模块、存储电容、第二充电模块、重置模块、驱动晶体管、发光控制模块和发光器件；所述第一充电模块、第二充电模块分别与所述存储电容的两端连接，用于向所述存储电容的两端充电；所述重置模块与所述存储电容的两端连接，用于将所述存储电容的两端的电压分别重置为其各自的初始电压；所述驱动晶体管的控制极与所述存储电容的与所述第二充电模块连接的一端连接，第一极与高电压端连接，第二极与所述第二充电模块连接，用于驱动所述发光器件发光；所述发光控制模块连接在所述驱动晶体管的第二极与所述发光器件之间，用于使所述驱动晶体管与所述发光器件之间的连接接通或断开。
其中，所述第一充电模块包括前充电单元和后充电单元；所述前充电单元用于在所述存储电容重置后，对存储电容进行充电，使所述存储电容的与所述第一充电模块连接的一端具有第一电压；所述后充电单元用于在所述前充电单元对所述存储电容充电后，对存储电容进行充电，使所述存储电容的与所述第一充电模块连接的一端具有第二电压。
其中，所述前充电单元包括第四晶体管，所述第四晶体管的控制极与栅极线连接，第一极与提供所述第一电压的第一数据线连接，第二极与所述存储电容的与所述第一充电模块连接的一端连接；所述后充电单元包括第五晶体管，所述第五晶体管的控制极与发光控制信号端连接，第一极与提供所述第二电压的第二数据线连接，第二极与所述存储电容的与所述第一充电模块连接的一端连接。
其中，所述第二充电模块包括第二晶体管；所述第二晶体管的控制极与栅极线连接，第一极与所述驱动晶体管的第二极连接，第二极与所述存储电容的与所述第二充电模块连接的一端连接。
其中，所述重置模块包括第一晶体管和第七晶体管；所述第一晶体管的控制极、第一极与复位信号端连接，第二极与所述存储电容的与所述第二充电模块连接的一端连接；所述第七晶体管的控制极与 复位信号端连接，第一极与高电压端连接，第二极与所述存储电容的与所述第一充电模块连接的一端连接。
其中，所述发光控制模块包括第六晶体管，所述第六晶体管的控制极与发光控制信号端连接，第一极与所述驱动晶体管的第二极连接，第二极与所述发光器件连接。
其中，各所述晶体管为P型管。
其中，所述发光器件为OLED；所述OLED的阳极与所述第六晶体管的第二极连接，阴极与低电压端连接。
作为另一个技术方案，本发明还提供一种上述像素电路的驱动方法，其包括步骤：
在第一阶段将存储电容两端的电压分别重置为其各自的初始电压；
在第二阶段对存储电容的与第一充电模块连接的一端进行充电，使该端具有第一电压，以及对存储电容的与第二充电模块连接的一端充电；和
在第三阶段对存储电容的与第一充电模块连接的一端进行充电，使该端具有第二电压，以及使存储电容的与第二充电模块连接的一端具有预设电压，其中，所述预设电压减去所述驱动晶体管的源极的电压和所述驱动晶体管的阈值电压之后的差值为所述第二电压减去第一电压的差值。
其中，各所述晶体管为P型管；在第一阶段，发光控制信号端输出高电平信号，复位信号端输出低电平信号，栅极线输出高电平信号；在第二阶段，发光控制信号端输出高电平信号，复位信号端输出高电平信号，栅极线输出低电平信号；在第三阶段，发光控制信号端输出低电平信号，复位信号端输出高电平信号，栅极线输出高电平信号。
作为另一个技术方案，本发明还提供一种显示面板，其包括本发明提供的上述像素电路。
作为另一个技术方案，本发明还提供一种显示装置，其包括本发明提供的上述显示面板。
本发明具有以下有益效果：
本发明提供的像素电路可以避免驱动晶体管的阈值电压在显示过程中的变化对发光器件的发光亮度产生影响，从而有助于发光器件的发光亮度在显示过程中保持稳定，进而有助于提高显示效果。
本发明提供的驱动方法可以避免驱动晶体管的阈值电压在显示过程中的变化对发光器件的发光亮度产生影响，从而有助于发光器件的发光亮度在显示过程中保持稳定，进而有助于提高显示效果。
本发明提供的显示面板采用了本发明提供的上述像素电路，可以避免驱动晶体管的阈值电压在显示过程中的变化对发光器件的发光亮度产生影响，从而有助于发光器件的发光亮度在显示过程中保持稳定，进而有助于提高显示效果。
本发明提供的显示装置采用了本发明提供的上述显示面板，可以避免驱动晶体管的阈值电压在显示过程中的变化对发光器件的发光亮度产生影响，从而有助于发光器件的发光亮度在显示过程中保持稳定，进而有助于提高显示效果。
附图说明
附图是用来提供对本发明的进一步理解，并且构成说明书的一部分，与下面的具体实施方式一起用于解释本发明，但并不构成对本发明的限制。在附图中：
图1为本发明的实施方式提供的像素电路的结构示意图；
图2为图1所示的像素电路的电路图；
图3为图2所示的像素电路中各信号的时序图。
附图标记：
1：第一充电模块；2：第二充电模块；3：重置模块；4：发光控制模块；5：发光器件；10：前充电单元；11：后充电单元；C：存储电容；T1：第一晶体管；T2：第二晶体管；T3：驱动晶体管；T4：第四晶体管；T5：第五晶体管；T6：第六晶体管；T7：第七晶体管；S1：第一数据线；S2：第二数据线；VDD：高电压端；VSS：低电压端；EM：发光控制信号端；RESET：复位信号端；Gate：栅 极线。
具体实施方式
以下结合附图对本发明的具体实施方式进行详细说明。应当理解的是，此处所描述的具体实施方式仅用于说明和解释本发明，并不用于限制本发明。
本发明提供一种像素电路的实施方式，图1为本发明的实施方式提供的像素电路的结构图。如图1所示，所述像素电路包括：第一充电模块1、存储电容C、第二充电模块2、重置模块3、驱动晶体管T3、发光控制模块4和发光器件5；其中，所述第一充电模块1、第二充电模块2分别与所述存储电容C的两端连接，用于向所述存储电容C的两端充电；所述重置模块3与所述存储电容C的两端连接，用于将所述存储电容C的两端的电压分别重置为其各自的初始电压；所述驱动晶体管T3的控制极与所述存储电容C的与所述第二充电模块2连接的一端(即图1中的右端)连接，第一极与高电压端VDD连接，第二极与所述第二充电模块2连接，用于驱动所述发光器件5发光；所述发光控制模块4连接在所述驱动晶体管T3的第二极与所述发光器件5之间，用于使所述驱动晶体管T3与所述发光器件5之间的连接接通或断开。
在本实施方式提供的像素电路中，重置模块3首先对存储电容C的两端进行重置，使其两端的电压分别为其各自的初始电压；在上述重置过程完成后，第一充电模块1对存储电容C的与所述第一充电模块1连接的一端(即图1中的左端)进行充电，使存储电容C的左端具有第一电压Vdata，第二充电模块2对存储电容C的右端进行充电，使该端的电压为VDD+Vth，其中，VDD为高电压端VDD上的电压，Vth为驱动晶体管T3的阈值电压。
在上述过程完成后，第二充电模块2停止向存储电容C的右端充电，使存储电容C处于以下状态：当存储电容C的左端的电压发生变化时，其右端的电压会随之变化。在此情况下，第一充电模块1向存储电容C的左端充电，使存储电容C的左端具有第二电压Vref， 可以理解，这时，存储电容C的右端的电压会相应变化，其电压值应为：VDD+Vth+Vref－Vdata。
在上述过程中，发光控制模块4控制驱动晶体管T3与发光器件5之间的连接断开；而在上述过程结束后，发光控制模块4控制驱动晶体管T3与发光器件5之间的连接接通，这时，由驱动晶体管T3流向发光器件5的电流为：
Figure PCTCN2015076851-appb-000002
上述电流即为驱动发光器件5发光的电流，由上述公式可知，该电流与驱动晶体管T3的阈值电压Vth无关，因此，发光器件5在显示过程中的亮度不会因驱动晶体管T3的阈值电压Vth的变化而变动，这样就可以提高发光器件5在显示过程中的发光亮度的稳定性，从而可以提高OLED显示装置的显示效果。
具体地，如图2所示，所述第一充电模块1包括前充电单元10和后充电单元11；所述前充电单元10用于在所述存储电容C被重置后，对存储电容C进行充电，使所述存储电容C的与所述第一充电模块1连接的一端(即图2中的左端)具有第一电压Vdata；所述后充电单元11用于在所述前充电单元10对所述存储电容C充电后，对存储电容C进行充电，使所述存储电容C的与所述第一充电模块1连接的一端具有第二电压Vref。
进一步地，所述前充电单元10包括第四晶体管T4，所述第四晶体管T4的控制极与栅极线Gate连接，第一极与提供所述第一电压Vdata的第一数据线S1连接，第二极与所述存储电容C的与所述第一充电模块1连接的一端连接；所述后充电单元11包括第五晶体管T5，所述第五晶体管T5的控制极与发光控制信号端EM连接，第一极与提供所述第二电压Vref的第二数据线S2连接，第二极与所述存储电容C的与所述第一充电模块1连接的一端连接。
继续参看图2，所述第二充电模块2包括第二晶体管T2；所述第二晶体管T2的控制极与栅极线Gate连接，第一极与所述驱动晶体管T3的第二极连接，第二极与所述存储电容C的与所述第二充电模块2连接的一端(即图2中的右端)连接。
所述重置模块3包括第一晶体管T1和第七晶体管T7；其中，所述第一晶体管T1的控制极和第一极与复位信号端RESET连接，第二极与所述存储电容C的与所述第二充电模块2连接的一端(即图2中的右端)连接；所述第七晶体管T7的控制极与复位信号端RESET连接，第一极与高电压端VDD连接，第二极与所述存储电容C的与所述第一充电模块1连接的一端(即图2中的左端)连接。
所述发光控制模块4包括第六晶体管T6，所述第六晶体管T6的控制极与发光控制信号端EM连接，第一极与所述驱动晶体管T3的第二极连接，第二极与所述发光器件5连接。发光控制信号端EM向所述第六晶体管T6的控制极输出发光控制信号，以使得通过所述第六晶体管T6对所述驱动晶体管T3与所述发光器件5之间的连接的接通或断开进行控制。
所述发光器件5为OLED；所述OLED的阳极与所述第六晶体管T6的第二极连接，阴极与低电压端VSS连接。
在本实施方式中，需要说明的是，上述各晶体管的控制极是指其栅极，第一极、第二极分别表示其源极和漏极，其中，可以是第一极为源极、第二极为漏极，也可以使第一极为漏极、第二极为源极。
在本实施方式中，各所述晶体管可以为P型管。下面以上述各晶体管为P型管为例，结合图2和图3，对本实施方式提供的像素电路驱动像素发光的原理和过程进行详细描述。
首先，在第一阶段(重置阶段)，发光控制信号端EM输出高电平信号，使第五晶体管T5、第六晶体管T6断开；复位信号端RESET输出低电平信号，使第一晶体管T1和第七晶体管T7导通；栅极线Gate输出高电平信号，使第二晶体管T2、第四晶体管T4断开；也就是说，在第一阶段，仅第一晶体管T1和第七晶体管T7处于导通状态。在此情况下，高电压端VDD经第七晶体管T7向存储电容C 的左端充电，使该端具有电压VDD，复位信号端RESET经第一晶体管T1向存储电容C的右端充电，使该端具有电压VRESET，该电压VDD和VRESET即分别为存储电容C两端的初始电压；另外，上述电压VRESET会在以后的第二阶段使驱动晶体管T3导通。
其次，在第二阶段，发光控制信号端EM输出高电平信号，使第五晶体管T5、第六晶体管T6断开；复位信号端RESET输出高电平信号，使第一晶体管T1和第七晶体管T7断开；栅极线Gate输出低电平信号，使第二晶体管T2、第四晶体管T4导通；也就是说，在第二阶段，仅第二晶体管T2、第四晶体管T4、以及驱动晶体管T3处于导通状态。在此情况下，第一数据线S1上的电压Vdata经第四晶体管T4输入到存储电容C的左端，使该端具有电压Vdata；高电压端VDD经驱动晶体管T3、第二晶体管T2向存储电容C的右端充电，直至存储电容C右端的电压达到使驱动晶体管T3断开的电压值，根据二极管的特性(驱动晶体管T3和第二晶体管T2形成一个二极管结构)可知，在驱动晶体管T3断开前，存储电容C右端的电压为VDD+Vth。
其后，在第三阶段，发光控制信号端EM输出低电平信号，使第五晶体管T5、第六晶体管T6导通；复位信号端RESET输出高电平信号，使第一晶体管T1和第七晶体管T7断开；栅极线Gate输出高电平信号，使第二晶体管T2、第四晶体管T4断开；也就是，在第三阶段，仅第五晶体管T5、第六晶体管T6处于导通状态。在此情况下，首先，第二数据线S2上的电压Vref经第五晶体管T5输入到存储电容C的左端，使该端的电压由Vdata变为Vref，而由于存储电容C的右端不与电源连接，因此，存储电容C右端的电压会随着存储电容C左端电压的变化而变化，最终，存储电容C右端的电压值由VDD+Vth变为VDD+Vth+Vref－Vdata。
根据上述，在第三阶段，驱动晶体管T3的栅极(其电位等同于存储电容C的右端的电位)的电压为：VDD+Vth+Vref－Vdata；驱动晶体管T3的源极的电压为VDD；因此，根据驱动晶体管T3的栅极和源极的电压差而产生的驱动电流：
Figure PCTCN2015076851-appb-000003
上述驱动电流经第六晶体管T6输入发光器件5中，驱使发光器件5发光。而由于上述驱动电流与驱动晶体管T3的阈值电压Vth无关，因此，发光器件5的发光亮度不会因驱动晶体管T3的阈值电压Vth的变化而变动，这样就可以提高发光器件5在显示过程中的发光亮度的稳定性，从而可以提高OLED显示装置的显示效果。
综上所述，本发明的实施方式提供的像素电路可以避免驱动晶体管T3的阈值电压Vth在显示过程中的变化对发光器件5的发光亮度产生影响，从而有助于发光器件5的发光亮度在显示过程中保持稳定，进而有助于提高显示效果。
本发明的一个实施方式还提供一种像素电路的驱动方法，所述驱动方法用于本发明的上述实施方式提供的像素电路。在本实施方式中，所述驱动方法包括步骤：
在第一阶段将存储电容两端的电压分别重置为其各自的初始电压；
在第二阶段对存储电容的与第一充电模块连接的一端进行充电，使该端具有第一电压，以及对存储电容的与第二充电模块连接的一端充电；和
在第三阶段对存储电容的与第一充电模块连接的一端进行充电，使该端具有第二电压，以及使存储电容的与第二充电模块连接的一端具有预设电压，其中，所述预设电压减去所述驱动晶体管的源极的电压和所述驱动晶体管的阈值电压之后的差值为所述第二电压减去第一电压的差值。
具体地，如上述像素电路的实施方式中所描述的：在各所述晶体管(T1～T7)为P型管的情况下，在第一阶段，发光控制信号端EM输出高电平信号，复位信号端RESET输出低电平信号，栅极线 Gate输出高电平信号；在第二阶段，发光控制信号端EM输出高电平信号，复位信号端RESET输出高电平信号，栅极线Gate输出低电平信号；在第三阶段，发光控制信号端EM输出低电平信号，复位信号端RESET输出高电平信号，栅极线Gate输出高电平信号。
此外，由于在上述像素电路的实施方式中已有了详细描述，上述第一阶段、第二阶段、第三阶段的具体过程不再赘述。
本发明的实施方式提供的驱动方法可以避免驱动晶体管的阈值电压在显示过程中的变化对发光器件的发光亮度产生影响，从而有助于发光器件的发光亮度在显示过程中保持稳定，进而有助于提高显示效果。
本发明的一个实施方式还提供一种显示面板。在本实施方式中，所述显示面板包括本发明的上述实施方式提供的像素电路。
本发明的实施方式提供的显示面板采用了本发明的上述实施方式提供的像素电路，可以避免驱动晶体管的阈值电压在显示过程中的变化对发光器件的发光亮度产生影响，从而有助于发光器件的发光亮度在显示过程中保持稳定，进而有助于提高显示效果。
本发明的一个实施方式还提供一种显示装置。在本实施方式中，所述显示装置包括本发明的上述实施方式提供的显示面板。
本发明的实施方式提供的显示装置采用了本发明的上述实施方式提供的显示面板，可以避免驱动晶体管的阈值电压在显示过程中的变化对发光器件的发光亮度产生影响，从而有助于发光器件的发光亮度在显示过程中保持稳定，进而有助于提高显示效果。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (12)

  1. 一种像素电路，其特征在于，包括：第一充电模块、存储电容、第二充电模块、重置模块、驱动晶体管、发光控制模块和发光器件；
    所述第一充电模块、第二充电模块分别与所述存储电容的两端连接，用于向所述存储电容的两端充电；
    所述重置模块与所述存储电容的两端连接，用于将所述存储电容的两端的电压分别重置为其各自的初始电压；
    所述驱动晶体管的控制极与所述存储电容的与所述第二充电模块连接的一端连接，第一极与高电压端连接，第二极与所述第二充电模块连接，用于驱动所述发光器件发光；
    所述发光控制模块连接在所述驱动晶体管的第二极与所述发光器件之间，用于使所述驱动晶体管与所述发光器件之间的连接接通或断开。
  2. 根据权利要求1所述的像素电路，其特征在于，所述第一充电模块包括前充电单元和后充电单元；
    所述前充电单元用于在所述存储电容重置后，对存储电容进行充电，使所述存储电容的与所述第一充电模块连接的一端具有第一电压；
    所述后充电单元用于在所述前充电单元对所述存储电容充电后，对存储电容进行充电，使所述存储电容的与所述第一充电模块连接的一端具有第二电压。
  3. 根据权利要求2所述的像素电路，其特征在于，所述前充电单元包括第四晶体管，所述第四晶体管的控制极与栅极线连接，第一极与提供所述第一电压的第一数据线连接，第二极与所述存储电容的与所述第一充电模块连接的一端连接；
    所述后充电单元包括第五晶体管，所述第五晶体管的控制极与 发光控制信号端连接，第一极与提供所述第二电压的第二数据线连接，第二极与所述存储电容的与所述第一充电模块连接的一端连接。
  4. 根据权利要求3所述的像素电路，其特征在于，所述第二充电模块包括第二晶体管；
    所述第二晶体管的控制极与栅极线连接，第一极与所述驱动晶体管的第二极连接，第二极与所述存储电容的与所述第二充电模块连接的一端连接。
  5. 根据权利要求4所述的像素电路，其特征在于，所述重置模块包括第一晶体管和第七晶体管；
    所述第一晶体管的控制极、第一极与复位信号端连接，第二极与所述存储电容的与所述第二充电模块连接的一端连接；
    所述第七晶体管的控制极与复位信号端连接，第一极与高电压端连接，第二极与所述存储电容的与所述第一充电模块连接的一端连接。
  6. 根据权利要求5所述的像素电路，其特征在于，所述发光控制模块包括第六晶体管，所述第六晶体管的控制极与发光控制信号端连接，第一极与所述驱动晶体管的第二极连接，第二极与所述发光器件连接。
  7. 根据权利要求6所述的像素电路，其特征在于，各所述晶体管为P型管。
  8. 根据权利要求6或7所述的像素电路，其特征在于，所述发光器件为OLED；所述OLED的阳极与所述第六晶体管的第二极连接，阴极与低电压端连接。
  9. 一种像素电路的驱动方法，所述像素电路为上述权利要求1-8 中任一项所述的像素电路，其特征在于，所述方法包括步骤：
    在第一阶段将存储电容两端的电压分别重置为其各自的初始电压；
    在第二阶段对存储电容的与第一充电模块连接的一端进行充电，使该端具有第一电压，以及对存储电容的与第二充电模块连接的一端充电；和
    在第三阶段对存储电容的与第一充电模块连接的一端进行充电，使该端具有第二电压，以及使存储电容的与第二充电模块连接的一端具有预设电压，其中，所述预设电压减去所述驱动晶体管的源极的电压和所述驱动晶体管的阈值电压之后的差值为所述第二电压减去第一电压的差值。
  10. 一种像素电路的驱动方法，所述像素电路为权利要求7所述的像素电路，其特征在于，所述方法包括步骤：
    在第一阶段，发光控制信号端输出高电平信号，复位信号端输出低电平信号，栅极线输出高电平信号，以将存储电容两端的电压分别重置为其各自的初始电压；
    在第二阶段，发光控制信号端输出高电平信号，复位信号端输出高电平信号，栅极线输出低电平信号，以对存储电容的与第一充电模块连接的一端进行充电，使该端具有第一电压，以及对存储电容的与第二充电模块连接的一端充电；
    在第三阶段，发光控制信号端输出低电平信号，复位信号端输出高电平信号，栅极线输出高电平信号，以对存储电容的与第一充电模块连接的一端进行充电，使该端具有第二电压，以及使存储电容的与第二充电模块连接的一端具有预设电压，其中，所述预设电压减去所述驱动晶体管的源极的电压和所述驱动晶体管的阈值电压之后的差值为所述第二电压减去第一电压。
  11. 一种显示面板，其特征在于，包括权利要求1～8任意一项所述的像素电路。
  12. 一种显示装置，其特征在于，包括权利要求11所述的显示面板。
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