CN104485074B - 像素驱动电路、方法和显示装置 - Google Patents

像素驱动电路、方法和显示装置 Download PDF

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CN104485074B
CN104485074B CN201410841476.8A CN201410841476A CN104485074B CN 104485074 B CN104485074 B CN 104485074B CN 201410841476 A CN201410841476 A CN 201410841476A CN 104485074 B CN104485074 B CN 104485074B
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CN104485074A (zh
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周茂秀
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Hefei Xinsheng Optoelectronics Technology Co Ltd
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    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275Details of drivers for data electrodes
    • G09G3/3291Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
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Abstract

本发明提供了一种像素驱动电路、方法和显示装置。像素驱动电路包括预充电控制单元、存储电容、驱动晶体管和阈值补偿单元,预充电控制单元预充电阶段通过电源电压对存储电容充电;阈值补偿单元在阈值补偿阶段,在控制信号的控制下与驱动晶体管一起控制存储电容放电直到驱动晶体管的第一极的电位为Vdata+Vth,在发光阶段控制驱动晶体管的栅源电压补偿Vth;Vdata为数据线上的数据信号的电压,Vth为驱动晶体管的阈值电压。本发明在对驱动晶体管的阈值电压进行补偿时,采用数据信号直接控制驱动晶体管,可以节省晶体管数目,从而能够减小电路设计的空间,增加像素间距。

Description

像素驱动电路、方法和显示装置
技术领域
本发明涉及显示技术领域,尤其涉及一种像素驱动电路、方法和显示装置。
背景技术
由于工艺偏差,AMOLED(Active Matrix/Organic Light Emitting Diode,有源矩阵有机发光二极管面板)上的TFT(Thin Film Transistor,薄膜晶体管)的阈值电压Vth会发生偏移,导致不同的像素的电流出现不均匀的现象。现有的具有阈值补偿功能的像素驱动电路大多是在预充电阶段通过数据线上的数据信号的电压Vdata对存储电容进行充电,在补偿阶段通过存储电容放电来达到阈值补偿,之后在发光阶段驱动OLED(Organic LightEmitting Diode,有机发光二极管)发光,这样的设置会导致结构相对复杂,采用的控制信号多,从而使得像素间距小。
发明内容
本发明的主要目的在于提供一种像素驱动电路、方法和显示装置,解决现有技术中采用较多的晶体管来实现对驱动晶体管阈值电压进行补偿从而使得像素间距小的问题。
为了达到上述目的,本发明提供了一种像素驱动电路,包括预充电控制单元、存储电容、驱动晶体管和阈值补偿单元,其中,
所述驱动晶体管,栅极通过所述预充电控制单元与数据线连接,第一极与发光元件连接,第二极与所述存储电容的第一端连接;
所述预充电控制单元,分别接入第一扫描信号、第二扫描信号和电源电压Vdd,分别与所述存储电容的第一端、所述驱动晶体管的栅极和数据线连接,并通过所述阈值补偿单元与所述存储电容的第二端连接;
所述阈值补偿单元,接入控制信号,分别与所述驱动晶体管的栅极、所述驱动晶体管的第一极、所述存储电容的第二端和地端连接,用于在预充电阶段在所述控制信号的控制下导通所述驱动晶体管的栅极和所述存储电容的第二端的连接;
所述预充电控制单元,用于在预充电阶段,在所述第一扫描信号和第二扫描信号的控制下通过所述电源电压Vdd对所述存储电容充电,使得所述存储电容的第一端的电位为Vdd,在阈值补偿阶段在所述第二扫描信号的控制下控制所述驱动晶体管的栅极接入所述数据线在阈值补偿阶段输出的数据信号,在发光阶段在所述第一扫描信号的控制下控制所述驱动晶体管的第二极接入所述电源电压Vdd;
所述阈值补偿单元,进一步用于在阈值补偿阶段,在所述控制信号的控制下与所述驱动晶体管一起控制所述存储电容放电直到所述驱动晶体管的第一极的电位为Vdata+Vth,还用于在发光阶段导通所述驱动晶体管的栅极与所述存储电容的第二端的连接,从而控制所述驱动晶体管的栅源电压补偿Vth;Vth为驱动晶体管的阈值电压,Vdata为所述数据信号的电压。
实施时,所述预充电控制单元包括:
第一预充电晶体管,栅极接入所述第一扫描信号,第一极与所述存储电容的第一端连接,第二极接入所述电源电压;
以及,第二预充电晶体管,栅极接入所述第二扫描信号,第一极与所述数据线连接,第二极与所述驱动晶体管的栅极连接。
实施时,所述阈值补偿单元包括:
第一补偿晶体管,栅极接入所述控制信号,第一极与所述存储电容的第二端连接,第二极与所述驱动晶体管的栅极连接;
以及,第二补偿晶体管,栅极接入所述控制信号,第一极接地,第二极与所述驱动晶体管的第一极连接。
实施时,所述第一预充电晶体管、所述第二预充电晶体管、所述第二补偿晶体管和所述驱动晶体管都为NMOS管,所述第一补偿晶体管为PMOS管。
实施时,所述第一预充电晶体管、所述第二预充电晶体管、所述第二补偿晶体管和所述驱动晶体管都为PMOS管,所述第一补偿晶体管为NMOS管。
本发明还提供了一种像素驱动方法,应用上述的像素驱动电路,所述像素驱动方法包括:
在预充电阶段,数据线输出零电平,阈值补偿单元在控制信号的控制下导通驱动晶体管的栅极和存储电容的第二端的连接,预充电控制单元在第一扫描信号和第二扫描信号的控制下通过电源电压Vdd对存储电容充电,使得存储电容的第一端的电位为Vdd;
在阈值补偿阶段,数据线输出数据信号,驱动晶体管导通,预充电控制单元在第二扫描信号的控制下控制驱动晶体管的栅极接入所述数据信号,阈值补偿单元在控制信号的控制下与驱动晶体管一起控制存储电容放电直到驱动晶体管的第一极的电位为Vdata+Vth;Vth为驱动晶体管的阈值电压,Vdata为所述数据信号的电压;
在发光阶段,预充电控制单元在第一扫描信号的控制下控制驱动晶体管的第二极接入所述电源电压Vdd,阈值补偿单元导通驱动晶体管的栅极与存储电容的第二端的连接,使得驱动晶体管驱动发光元件发光,并控制所述驱动晶体管的栅源电压补偿Vth。
本发明还提供了一种像素驱动方法,应用上述的像素驱动电路,所述像素驱动方法包括:
在预充电阶段,数据线输出零电平,在控制信号的控制下,第一阈值补偿晶体管导通,在第一扫描信号和第二扫描信号的控制下,第一预充电晶体管和第二预充电晶体管都导通,通过电源电压对存储电容充电;
在阈值补偿阶段,所述第一扫描信号控制所述第一预充电晶体管断开,所述第二扫描信号继续控制所述第二预充电晶体管导通;数据线输出数据信号,以控制驱动晶体管导通,控制信号控制第二补偿晶体管导通,所述存储电容通过所述驱动晶体管和所述第二补偿晶体管向地端放电,直至驱动晶体管的第一极的电位为Vdata+Vth;Vth为驱动晶体管的阈值电压,Vdata为所述数据信号的电压;
在发光阶段,第一扫描信号控制第一预充电晶体管导通,使得驱动晶体管的第二极接入所述电源电压Vdd,控制信号控制第一补偿晶体管导通而第二补偿晶体管断开,以导通驱动晶体管的栅极与存储电容的第二端的连接,使得驱动晶体管导通以驱动发光元件发光,并控制所述驱动晶体管的栅源电压补偿Vth。
本发明还提供了一种显示装置,包括上述的像素驱动电路。
与现有技术相比,本发明所述的像素驱动电路、方法和显示装置,在对驱动晶体管的阈值电压进行补偿时,采用数据信号直接控制驱动晶体管,可以节省晶体管数目,从而能够减小电路设计的空间,增加像素间距。
附图说明
图1是本发明实施例所述的像素驱动电路的电路图;
图2是本发明另一实施例所述的像素驱动电路的电路图;
图3是本发明该实施例所述的像素驱动电路的信号时序图;
图4A是本发明该实施例所述的像素驱动电路在预充电阶段S1的工作示意图;
图4B是本发明该实施例所述的像素驱动电路在阈值补偿阶段S2的工作示意图;
图4C是本发明该实施例所述的像素驱动电路在发光阶段S3的工作示意图;
图5是本发明又一实施例所述的像素驱动电路的信号时序图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
本发明所有实施例中采用的晶体管均可以为薄膜晶体管或场效应管或其他特性相同的器件。在本发明实施例中,将晶体管除栅极之外的两极分别称为第一极和第二极。
如图1所示,本发明实施例所述的像素驱动电路,包括预充电控制单元11、存储电容Cs、驱动晶体管DTFT和阈值补偿单元12,其中,
所述驱动晶体管DTFT,栅极通过所述预充电控制单元11与数据线Data连接,第一极与发光元件D1的阳极连接,第二极与所述存储电容Cs的第一端A连接;发光元件D1的阴极与地端GND连接;
所述预充电控制单元11,分别接入第一扫描信号Scan1、第二扫描信号Scan2和电源电压Vdd,还分别与所述存储电容Cs的第一端A、所述驱动晶体管的栅极和数据线Data连接,并通过所述阈值补偿单元与所述存储电容Cs的第二端B连接;
所述阈值补偿单元12,接入控制信号EN,分别与所述驱动晶体管DTFT的栅极、所述驱动晶体管DTFT的第一极、所述存储电容Cs的第二端B和地端GND连接,用于在预充电阶段在所述控制信号EN的控制下导通所述驱动晶体管DTFT的栅极与所述存储电容Cs的第二端B的连接;
所述预充电单元,用于在预充电阶段,在所述第一扫描信号Scan1和所述第二扫描信号Scan2的控制下通过所述电源电压Vdd对所述存储电容Cs充电,使得所述存储电容Cs的第一端的电位为Vdd,在阈值补偿阶段在所述第二扫描信号Scan2的控制下控制所述驱动晶体管DTFT的栅极接入所述数据线Data在阈值补偿阶段输出的数据信号,在发光阶段在所述第一扫描信号Scan1的控制下控制所述驱动晶体管DTFT的第二极接入所述电源电压Vdd;所述阈值补偿单元12,用于在阈值补偿阶段,在所述控制信号EN的控制下与所述驱动晶体管DTFT一起控制所述存储电容Cs放电直到所述驱动晶体管DTFT的第一极的电位为Vdata+Vth,还用于在发光阶段导通所述驱动晶体管DTFT的栅极与所述存储电容Cs的第二端B的连接,从而控制所述驱动晶体管DTFT的栅源电压补偿Vth;Vdata为所述数据信号的电压,Vth为驱动晶体管DTFT的阈值电压。
本发明实施例所述的像素驱动电路采用数据线Data上的数据信号直接控制驱动晶体管DTFT,可以在补偿驱动晶体管的阈值电压的同时,节省晶体管数目,从而能够减小电路设计的空间,增加像素间距。
在具体实施时,所述预充电控制单元可以包括:
第一预充电晶体管,栅极接入所述第一扫描信号,第一极与所述存储电容的第一端连接,第二极接入所述电源电压;
以及,第二预充电晶体管,栅极接入所述第二扫描信号,第一极与所述数据线连接,第二极与所述驱动晶体管的栅极连接。
在具体实施时,所述阈值补偿单元可以包括:
第一补偿晶体管,栅极接入所述控制信号,第一极与所述存储电容的第二端连接,第二极与所述驱动晶体管的栅极连接;
以及,第二补偿晶体管,栅极接入所述控制信号,第一极接地,第二极与所述驱动晶体管的第一极连接。
下面通过具体实施例来说明本发明所述的像素驱动电路。
如图2所示,在本发明一具体实施例所述的像素驱动电路中,所述发光元件为发光二极管OLED;
所述预充电控制单元包括:
第一预充电晶体管T11,栅极接入所述第一扫描信号Scan1,第一极与所述存储电容Cs的第一端A连接,第二极接入所述电源电压Vdd;
以及,第二预充电晶体管T12,栅极接入所述第二扫描信号Scan2,第一极与数据线Data连接,第二极与所述驱动晶体管DTFT的栅极连接。
所述阈值补偿单元包括:
第一补偿晶体管T21,栅极接入所述控制信号EN,第一极与所述存储电容Cs的第二端B连接,第二极与所述驱动晶体管DTFT的栅极连接;
以及,第二补偿晶体管T22,栅极接入所述控制信号EN,第一极与地端GND连接,第二极与所述驱动晶体管DTFT的第一极连接;
所述驱动晶体管DTFT,栅极与数据线Data连接,第一极与发光二极管OLED的阳极连接,第二极与第一预充电晶体管T11的第一极连接;
发光二极管OLED的阴极与地端GND连接。
在图2所示的像素驱动电路的实施例中,所述第一预充电晶体管、所述第二预充电晶体管、所述第二补偿晶体管和所述驱动晶体管都为NMOS(N-Mental-Oxide-Semiconductor,N型金属-氧化物-半导体)管,所述第一补偿晶体管为PMOS(P-Mental-Oxide-Semiconductor,P型金属-氧化物-半导体)管;
其中,将所述第一补偿晶体管和所述第二补偿晶体管设置为类型相反的MOS管,从而可以减少控制信号的个数,方便电路设计。
本发明如图2所示的像素驱动电路的实施例采用5T1C结构来实现对驱动晶体管的阈值电压的补偿,采用数据信号直接控制驱动晶体管,节省晶体管数,比起6T1C结构来说减少了一个晶体管,并且采用一个控制信号即可以控制类型相反的两个补偿晶体管,减少了控制信号的数目,从而可以能够节省电路设计的空间,增加像素间距。
如图2所示的像素驱动电路在工作时(图3是第一扫描信号Scan1、第二扫描信号Scan2、控制信号EN和Vdata在预充电阶段S1、阈值补偿阶段S2和发光阶段S3的时序图:
如图4A所示,在预充电阶段S1,第一扫描信号Scan1和第二扫描信号Scan2都为高电平,数据线Data输出零电平,控制信号EN为低电平,第一预充电晶体管T11和第二预充电晶体管T12都导通,第一补偿晶体管T21导通,通过电源电压Vdd对存储电容Cs充电;
如图4B所示,在阈值补偿阶段S2,第一扫描信号Scan1跳变为低电平,第二扫描信号Scan2仍为高电平,控制信号EN跳变为高电平,所述第一预充电晶体管T11断开,所述第二预充电晶体管T12继续导通,此时数据线Data输出数据信号,以控制驱动晶体管DTFT导通,第二补偿晶体管T22导通,所述存储电容Cs通过所述驱动晶体管DTFT和所述第二补偿晶体管T22向地端GND放电,直至驱动晶体管DTFT的第一极的电位为Vdata+Vth;Vth为驱动晶体管DTFT的阈值电压,Vdata为数据线Data上的数据信号的电压;
在发光阶段S3,第一扫描信号Scan1跳变为高电平,第二扫描信号Scan2跳变为低电平,如图4C所示,所述第一预充电晶体管T11导通,所述第二预充电晶体管T12断开,使得驱动晶体管DTFT的第二极接入所述电源电压Vdd,控制信号EN跳变为低电平,所述控制信号EN控制第一补偿晶体管T21导通而所述第二补偿晶体管T22断开,以导通驱动晶体管DTFT的栅极与存储电容的第二端B的连接,此时DTFT的栅极电位被存储电容自举为Vdd-(Vdata+Vth),驱动晶体管导通以驱动发光元件发光,此时流过OLED的电流I=K×(Vdd-(Vdd-Vdata-Vth)-Vth)2=K×Vdata2,所述驱动晶体管DTFT的栅源电压补偿Vth。
在图4A、图4B和图4C中,用虚线框起来的晶体管是导通的。
在具体实施时,在如图2所示的像素驱动电路的实施例中,所述第一预充电晶体管T11、所述第二预充电晶体管T12、所述第二补偿晶体管T22和所述驱动晶体管DTFT也可以都为PMOS管,所述第一补偿晶体管T21可以为NMOS管,在实际操作时,如图5所示,只需将图3中的第一扫描信号Scan2、第二扫描信号Scan2、数据线Data上的数据信号和控制信号EN设置为反相即可实施,以上晶体管类型的变化和各信号的时序的变化为本领域技术人员所公知,在此不再赘述。
本发明实施例所述的像素驱动方法,应用上述的像素驱动电路,包括:
在预充电阶段,数据线输出零电平,阈值补偿单元在控制信号的控制下导通驱动晶体管的栅极和存储电容的第二端的连接,预充电控制单元在第一扫描信号和第二扫描信号的控制下通过电源电压Vdd对存储电容充电,使得存储电容的第一端的电位为Vdd;
在阈值补偿阶段,数据线输出数据信号,驱动晶体管导通,预充电控制单元在第二扫描信号的控制下控制驱动晶体管的栅极接入所述数据信号,阈值补偿单元在控制信号的控制下与驱动晶体管一起控制存储电容放电直到驱动晶体管的第一极的电位为Vdata+Vth;Vth为驱动晶体管的阈值电压,Vdata为所述数据信号的电压;
在发光阶段,预充电控制单元在第一扫描信号的控制下控制驱动晶体管的第二极接入所述电源电压Vdd,阈值补偿单元导通驱动晶体管的栅极与存储电容的第二端的连接,使得驱动晶体管驱动发光元件发光,并控制所述驱动晶体管的栅源电压补偿Vth。
本发明实施例所述的像素驱动方法,应用上述的像素驱动电路,包括:
在预充电阶段,数据线输出零电平,在控制信号的控制下,第一阈值补偿晶体管导通,在第一扫描信号和第二扫描信号的控制下,第一预充电晶体管和第二预充电晶体管都导通,通过电源电压对存储电容充电;
在阈值补偿阶段,所述第一扫描信号控制所述第一预充电晶体管断开,所述第二扫描信号继续控制所述第二预充电晶体管导通;数据线输出数据信号,以控制驱动晶体管导通,控制信号控制第二补偿晶体管导通,所述存储电容通过所述驱动晶体管和所述第二补偿晶体管向地端放电,直至驱动晶体管的第一极的电位为Vdata+Vth;Vth为驱动晶体管的阈值电压,Vdata为所述数据信号的电压;
在发光阶段,第一扫描信号控制第一预充电晶体管导通,使得驱动晶体管的第二极接入所述电源电压Vdd,控制信号控制第一补偿晶体管导通而第二补偿晶体管断开,以导通驱动晶体管的栅极与存储电容的第二端的连接,使得驱动晶体管导通以驱动发光元件发光,并控制所述驱动晶体管的栅源电压补偿Vth。
本发明实施例所述的显示装置,包括上述的像素驱动电路。
该显示装置可以为液晶显示器、液晶电视、OLED(Organic Light-EmittingDiode,有机电致发光二极管)显示面板、OLED显示器、OLED电视或电子纸等显示装置。
以上所述是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明所述原理的前提下,还可以作出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。

Claims (8)

1.一种像素驱动电路,其特征在于,包括预充电控制单元、存储电容、驱动晶体管和阈值补偿单元,其中,
所述驱动晶体管,栅极通过所述预充电控制单元与数据线连接,第一极与发光元件连接,第二极与所述存储电容的第一端连接;
所述预充电控制单元,分别接入第一扫描信号、第二扫描信号和电源电压Vdd,分别与所述存储电容的第一端、所述驱动晶体管的栅极和数据线连接,并通过所述阈值补偿单元与所述存储电容的第二端连接;
所述阈值补偿单元,接入控制信号,分别与所述驱动晶体管的栅极、所述驱动晶体管的第一极、所述存储电容的第二端和地端连接,用于在预充电阶段在所述控制信号的控制下导通所述驱动晶体管的栅极和所述存储电容的第二端的连接;
所述预充电控制单元,用于在预充电阶段,在所述第一扫描信号和第二扫描信号的控制下通过所述电源电压Vdd对所述存储电容充电,使得所述存储电容的第一端的电位为Vdd,在阈值补偿阶段在所述第二扫描信号的控制下控制所述驱动晶体管的栅极接入所述数据线在阈值补偿阶段输出的数据信号,在发光阶段在所述第一扫描信号的控制下控制所述驱动晶体管的第二极接入所述电源电压Vdd;
所述阈值补偿单元,进一步用于在阈值补偿阶段,在所述控制信号的控制下与所述驱动晶体管一起控制所述存储电容放电直到所述驱动晶体管的第一极的电位为Vdata+Vth,还用于在发光阶段导通所述驱动晶体管的栅极与所述存储电容的第二端的连接,从而控制所述驱动晶体管的栅源电压补偿Vth;Vth为驱动晶体管的阈值电压,Vdata为所述数据信号的电压。
2.如权利要求1所述的像素驱动电路,其特征在于,所述预充电控制单元包括:
第一预充电晶体管,栅极接入所述第一扫描信号,第一极与所述存储电容的第一端连接,第二极接入所述电源电压;
以及,第二预充电晶体管,栅极接入所述第二扫描信号,第一极与所述数据线连接,第二极与所述驱动晶体管的栅极连接。
3.如权利要求2所述的像素驱动电路,其特征在于,所述阈值补偿单元包括:
第一补偿晶体管,栅极接入所述控制信号,第一极与所述存储电容的第二端连接,第二极与所述驱动晶体管的栅极连接;
以及,第二补偿晶体管,栅极接入所述控制信号,第一极接地,第二极与所述驱动晶体管的第一极连接。
4.如权利要求3所述的像素驱动电路,其特征在于,所述第一预充电晶体管、所述第二预充电晶体管、所述第二补偿晶体管和所述驱动晶体管都为NMOS管,所述第一补偿晶体管为PMOS管。
5.如权利要求3所述的像素驱动电路,其特征在于,所述第一预充电晶体管、所述第二预充电晶体管、所述第二补偿晶体管和所述驱动晶体管都为PMOS管,所述第一补偿晶体管为NMOS管。
6.一种像素驱动方法,应用如权利要求1至5中任一权利要求所述的像素驱动电路,其特征在于,所述像素驱动方法包括:
在预充电阶段,数据线输出零电平,阈值补偿单元在控制信号的控制下导通驱动晶体管的栅极和存储电容的第二端的连接,预充电控制单元在第一扫描信号和第二扫描信号的控制下通过电源电压Vdd对存储电容充电,使得存储电容的第一端的电位为Vdd;
在阈值补偿阶段,数据线输出数据信号,驱动晶体管导通,预充电控制单元在第二扫描信号的控制下控制驱动晶体管的栅极接入所述数据信号,阈值补偿单元在控制信号的控制下与驱动晶体管一起控制存储电容放电直到驱动晶体管的第一极的电位为Vdata+Vth;Vth为驱动晶体管的阈值电压,Vdata为所述数据信号的电压;
在发光阶段,预充电控制单元在第一扫描信号的控制下控制驱动晶体管的第二极接入所述电源电压Vdd,阈值补偿单元导通驱动晶体管的栅极与存储电容的第二端的连接,使得驱动晶体管驱动发光元件发光,并控制所述驱动晶体管的栅源电压补偿Vth。
7.一种像素驱动方法,应用如权利要求3至5中任一权利要求所述的像素驱动电路,其特征在于,所述像素驱动方法包括:
在预充电阶段,数据线输出零电平,在控制信号的控制下,第一阈值补偿晶体管导通,在第一扫描信号和第二扫描信号的控制下,第一预充电晶体管和第二预充电晶体管都导通,通过电源电压对存储电容充电;
在阈值补偿阶段,所述第一扫描信号控制所述第一预充电晶体管断开,所述第二扫描信号继续控制所述第二预充电晶体管导通;数据线输出数据信号,以控制驱动晶体管导通,控制信号控制第二补偿晶体管导通,所述存储电容通过所述驱动晶体管和所述第二补偿晶体管向地端放电,直至驱动晶体管的第一极的电位为Vdata+Vth;Vth为驱动晶体管的阈值电压,Vdata为所述数据信号的电压;
在发光阶段,第一扫描信号控制第一预充电晶体管导通,使得驱动晶体管的第二极接入所述电源电压Vdd,控制信号控制第一补偿晶体管导通而第二补偿晶体管断开,以导通驱动晶体管的栅极与存储电容的第二端的连接,使得驱动晶体管导通以驱动发光元件发光,并控制所述驱动晶体管的栅源电压补偿Vth。
8.一种显示装置,包括如权利要求1至5中任一权利要求所述的像素驱动电路。
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