WO2016106844A1 - 侧栅极tft开关及液晶显示装置 - Google Patents

侧栅极tft开关及液晶显示装置 Download PDF

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Publication number
WO2016106844A1
WO2016106844A1 PCT/CN2015/070631 CN2015070631W WO2016106844A1 WO 2016106844 A1 WO2016106844 A1 WO 2016106844A1 CN 2015070631 W CN2015070631 W CN 2015070631W WO 2016106844 A1 WO2016106844 A1 WO 2016106844A1
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Prior art keywords
source
gate
drain
substrate
tft switch
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French (fr)
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唐岳军
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US14/417,531 priority Critical patent/US9508860B2/en
Publication of WO2016106844A1 publication Critical patent/WO2016106844A1/zh
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices

Definitions

  • a side-gate TFT switch and a liquid crystal display device in particular, a method for improving a TFT switching charging capability, reducing a TFT switching volume, and increasing an aperture ratio (Aperture Ratio).
  • the PPI of the panel Panel Per Inch
  • the size of the TFT switch is getting smaller and smaller, and the charging ability of the pixel electrode needs to be increased accordingly.
  • FIG. 1 is a schematic view showing the detailed structure of a TFT 10 in the prior art. From bottom to top, the gate electrode 16, the gate insulating layer 15 and the amorphous silicon (a-Si) are sequentially arranged. In the layer 14, a two-ohmic contact layer (n+) 13 is disposed on the active layer 14, and a source electrode 11 and a drain electrode 12 are respectively disposed on the two-ohmic contact layer 13. Under the traditional structure, it is impossible to simultaneously improve the charging ability and increase the aperture ratio.
  • An object of the present invention is to provide a side-gate TFT switch and a liquid crystal display device, which can improve the switching capability of the TFT switch, reduce the TFT switching volume, and increase the aperture ratio.
  • the present invention provides another side gate TFT switch and a liquid crystal display device.
  • the side gate includes a substrate, a source and drain region, a gate insulating layer and a gate.
  • the source and drain regions are disposed on the substrate and include a source and a drain
  • the semiconductor layer is located between the source and the drain, and the source and the drain are vertically disposed on the substrate.
  • the gate insulating layer is disposed adjacent to the source and drain regions.
  • the gate is disposed adjacent to the gate insulating layer.
  • the gate insulating layer is used to separate the source and drain regions and the gate.
  • the gate insulating layer and the gate are directly disposed on the substrate.
  • the semiconductor layer includes a first ohmic contact layer, an active layer, and a second ohmic contact layer.
  • the first ohmic contact layer and the second ohmic contact layer may be the same or different materials.
  • the source directly contacts the substrate.
  • the drain directly contacts the substrate.
  • an insulating layer is further disposed between a portion of the source and the semiconductor layer.
  • a portion of the source and the semiconductor layer that is not provided with the insulating layer forms a conductive channel.
  • the source and the drain pass current through the conductive channel.
  • a further aspect of the embodiments of the present invention further provides a liquid crystal display device including the foregoing side gate TFT switch.
  • the beneficial technical effect is that the charging function of the TFT switch can be improved, the TFT switching volume can be reduced, and the aperture ratio can be improved by adopting the arrangement of the source and the drain and the side gate in the vertical direction.
  • FIG. 1 is a schematic view showing the detailed structure of a TFT in the prior art.
  • FIG. 2 is a detailed structural view showing the first state of the side gate TFT of the first preferred embodiment of the present invention.
  • 3(a) is a first positional view of the first state of the side gate TFT of the first preferred embodiment of the present invention in the display unit.
  • 3(b) is a view showing a second position of the first state of the side gate TFT of the first preferred embodiment of the present invention in the display unit.
  • FIG. 4 is a schematic view showing a manufacturing process of a side gate TFT according to a first preferred embodiment of the present invention.
  • FIG. 5 is a schematic view showing the detailed structure of a side gate TFT according to a second preferred embodiment of the present invention.
  • FIG. 6 is a view showing the position of a side gate TFT in a display unit of a third preferred embodiment of the present invention.
  • FIG. 7 is a schematic view showing the detailed structure of a side gate TFT according to a third preferred embodiment of the present invention.
  • FIG. 8(a) is a flow chart showing the fabrication of the first state of the side gate TFT of the fourth preferred embodiment of the present invention.
  • FIG. 8(b) is a flow chart showing the second embodiment of the side gate TFT of the fourth preferred embodiment of the present invention.
  • Side gate TFT 100 includes a substrate 170, a source and drain region 180, a gate insulating layer 150, and a gate electrode 160.
  • the source and drain regions 180, the gate insulating layer 150, and the gate 160 are disposed on the substrate 170.
  • the source and drain regions 180 include a source 110, a drain 120, and a semiconductor layer 135.
  • the active layer 140 and the first ohmic contact layer 130 and the second ohmic contact layer 130' are located between the source 110 and the drain 120.
  • the gate insulating layer 150 is disposed directly adjacent to the source and drain regions 180 and disposed above the substrate 170 for separating the source and drain regions 180 and the gate electrode 160.
  • the gate 160 abuts the gate insulating layer 150 and is disposed directly on the substrate 170. As shown in FIG.
  • the source 110, the first ohmic contact layer 130, the active layer 140, and the second ohmic contact layer 130 are sequentially disposed in a vertical direction according to the substrate 170.
  • the source and drain regions 180, the gate insulating layer 150, and the gate electrode 160 are sequentially disposed in the horizontal direction on the basis of the substrate 170.
  • the semiconductor layer 135, that is, the active layer 140, the first ohmic contact layer 130 and the second ohmic contact layer 130 ' A conductive channel is formed for transferring current between the source 110 and the drain 120.
  • FIG. 3(a) illustrates a side gate TFT of a first preferred embodiment of the present invention.
  • the first position of 100 is in the first position map in the display unit.
  • 3(b) is a view showing a second position of the first state of the side gate TFT of the first preferred embodiment of the present invention in the display unit.
  • Side gate TFT The setting direction of the source/drain regions of 100 may be set to the horizontal direction of FIG. 3(a) or the vertical direction of FIG. 3(b) according to the requirements of different pixels 190.
  • the conductive channel 135 can be curved on a horizontal line.
  • FIG. 4 is a diagram showing a side gate TFT of a first preferred embodiment of the present invention. Schematic diagram of the production process of 100. It should be noted that this flowchart is for explaining the fabrication flow of the side gate TFT 100, and is not intended to explain the side gate TFT. Location map of each component of 100.
  • the first ohmic contact layer 130 and the second ohmic contact layer 130' may be the same or different materials.
  • a source and drain region 180 including the source 110, the first ohmic contact layer 130, the second ohmic contact layer 130', the active layer 140, and the drain 120 is completed.
  • a gate insulating layer 150 is formed beside the source and drain regions 180, and a third metal layer for forming a gate electrode 160 is deposited beside the gate insulating layer 150.
  • the purpose of the gate insulating layer 150 is to form the gate 160 and the source and drain regions 180 in an insulated state.
  • FIG. 5 is a schematic view showing the detailed structure of the side gate TFT 200 of the second preferred embodiment of the present invention.
  • Side gate TFT of the preferred embodiment The difference between the 200 and the first preferred embodiment is that a drain 220 is directly disposed on a substrate 270 in the preferred embodiment.
  • the drain 220, the first ohmic contact layer 230, the active layer 240, the second ohmic contact layer 230', and the source 210 are sequentially disposed in a vertical direction with the substrate 270 as a standard.
  • the source/drain regions 280, the gate insulating layer 250, and the gate 260 are disposed in the horizontal direction in accordance with the substrate 270.
  • FIG. 6 is a diagram showing a side gate TFT of a third preferred embodiment of the present invention. 300 location map in the display unit.
  • FIG. 7 is a schematic view showing the structure of the side gate TFT 300 of FIG. 6.
  • the preferred embodiment incorporates the structures of the first preferred embodiment and the second preferred embodiment.
  • Two-sided gate TFT The gates 360 of 300 are connected to each other.
  • two of the side gate TFTs 300 is connected to a first data line 396, a second data line 394, a main pixel 393 and a primary pixel 395, respectively.
  • the double data lines can be applied to separate the upper and lower data lines by the active layer insulation among the pixels of adjacent rows and columns. Since adjacent side gate TFTs can be
  • the gates 360 of 300 are fabricated together to further increase the aperture ratio and charging capability.
  • FIG. 8(a) is a flow chart showing the fabrication of the first state of the side gate TFT 400 of the fourth preferred embodiment of the present invention.
  • FIG. 8(b) is a flow chart showing the second embodiment of the side gate TFT of the fourth preferred embodiment of the present invention.
  • the preferred embodiment differs from the first preferred embodiment in that a process sequence is provided between a source 410 and a semiconductor layer 435, and a process of providing an insulating layer 415 is provided. As shown in FIG.
  • a second metal layer for forming a drain 420, a first ohmic contact layer 430, an active layer 440, and a second ohmic contact layer 430' are deposited on a substrate 470.
  • the first ohmic contact layer 430 and the second ohmic contact layer 430' may be the same or different materials.
  • 8(b) is different from FIG. 8(a) in that the positions of the source 410 and the drain 420 are different and the order of fabrication of the insulating layer 415 is different. For other processes, please refer to FIG. 8 ( a). In the process sequence, taking FIG.
  • the source 410 of FIG. 8(a) can be connected to a data line by providing the insulating layer 415.
  • FIG. The source 410 of (b) may be connected to another data line without interfering with each other. In the case where a driving voltage is applied to the gate 460, the source 410 and the drain 420 pass current through the conductive channel.
  • FIG. 1 Another embodiment of the present invention also provide a liquid crystal display device including the aforementioned side gate TFT switch.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
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  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)

Abstract

一种侧栅极TFT开关及液晶显示装置。侧栅极TFT(100)包括一基板(170)、一源漏区(180)、一栅极绝缘层(150)及一栅极(160)。源漏区(180)设置于基板(170)之上，包括一源极(110)、一漏极(120)和半导体层(135)。半导体层(135)位于源极(110)与漏极(120)之间。源极(110)、漏极(120)垂直设置于基板(170)之上。栅极绝缘层(150)紧靠源漏区(180)设置。栅极(160)紧靠栅极绝缘层(150)设置。栅极绝缘层(150)用于分隔源漏区(180)以及栅极(160)。

Description

侧栅极TFT开关及液晶显示装置 技术领域
一种侧栅极TFT开关及液晶显示装置，尤涉及一种用于提升TFT开关充电能力，缩小TFT开关体积以及提升开口率 (Aperture Ratio)的。
 背景技术
随着液晶显示技术的进步，面板的PPI (Pixel Per Inch)逐渐提升。为提升开口率，TFT开关制作尺寸越来越小，像素电极的充电能力也需要随之增加，提升像素电极的充电能力有几种方式：1. 制作较大尺寸的TFT，选择较大的W/L(Width/Length)值，特别是在车载与工控产品上采用这种方式，但需要牺牲开口率；2. 选择高迁移率工艺，采用LTPS(Low Temperature Poly Silicon) 、IGZO(Indium Gallium Zinc Oxide)等半导体工艺，虽然提高充电能力，但是制作工序复杂，生产良率备受质疑。
图1绘示现有技术中TFT10的细部结构示意图。由下而上依序为栅极16、栅极绝缘层15以及非晶硅(a-Si) 层14，在所述有源层14上设置二欧姆接触层(n+)13，在所述二欧姆接触层13上分别设置源极11与漏极12。在传统结构下，提升充电能力与提升开口率是无法同时达成的。
故，有必要提供一种侧栅极TFT开关及其制作方法，以解决现有技术所存在的问题。
 技术问题
本发明的一目的在于提供一种侧栅极TFT开关及液晶显示装置，可以提升TFT开关充电能力，缩小TFT开关体积以及提升开口率。
 技术解决方案
为实现上述目的，本发明提供另一种侧栅极TFT开关及液晶显示装置，所述侧栅极包括一基板、一源漏区、一栅极绝缘层及一栅极。
所述源漏区设置于所述基板之上,包括一源极和一漏极
和半导体层，所述半导体层位于所述源极与所述漏极之间，所述源极、所述漏极垂直设置于所述基板之上。所述栅极绝缘层紧靠所述源漏区设置。所述栅极紧靠所述栅极绝缘层设置。所述栅极绝缘层用于分隔所述源漏区以及所述栅极。
在本发明的一优选实施例中，所述栅极绝缘层与所述栅极直接设置于所述基板之上。
在本发明的一优选实施例中，所述半导体层包括第一欧姆接触层、有源层和第二欧姆接触层。
在本发明的一优选实施例中，所述第一欧姆接触层及所述第二欧姆接触层可为相同或相异材质。
在本发明的一优选实施例中，所述源极直接接触所述基板。
在本发明的一优选实施例中，所述漏极直接接触所述基板。
在本发明的一优选实施例中，进一步包含一绝缘层设置于部分所述源极与所述半导体层之间。
在本发明的一优选实施例中，所述源极与所述半导体层之间没有设置所述绝缘层的部分形成一导电沟道。
在本发明的一优选实施例中，在所述栅极施加驱动电压的情况下，所述源极与所述漏极通过所述导电沟道传递电流。相应地，本发明实施例的再一方面还提供一种液晶显示装置，其包括前述的侧栅极TFT开关。
 有益效果
因此通过本发明的技术方案，产生的有益技术效果在于，藉由采用垂直方向的源极及漏极以及侧栅极的设置方式，可以提升TFT开关充电能力，缩小TFT开关体积以及提升开口率。
 附图说明
图1绘示现有技术中TFT的细部结构示意图。
图2绘示本发明的第一优选实施例的侧栅极TFT的第一样态的细部结构示意图。
图3(a)绘示本发明的第一优选实施例的侧栅极TFT的第一样态在显示单元中的第一位置图。
图3(b)绘示本发明的第一优选实施例的侧栅极TFT的第一样态在显示单元中的第二位置图。
图4绘示本发明的第一优选实施例的侧栅极TFT的制作流程示意图。
图5绘示本发明的第二优选实施例的侧栅极TFT的细部结构示意图。
图6绘示本发明的第三优选实施例的侧栅极TFT在显示单元中的位置图。
图7绘示本发明的第三优选实施例的侧栅极TFT的细部结构示意图。
图8(a)绘示本发明的第四优选实施例的侧栅极TFT的第一样态的制作流程示意图。
图8(b)绘示本发明的第四优选实施例的侧栅极TFT的第二样态的制作流程示意图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
图2绘示本发明的第一优选实施例的侧栅极TFT的第一样态的细部结构示意图。所述侧栅极TFT 100包括一基板(Glass)170、一源漏区180、一栅极绝缘层150及一栅极160。
所述源漏区180、所述栅极栅极绝缘层150以及所述栅极160设置于所述基板170之上。所述源漏区180包括一源极110、一漏极120、一半导体层135。所述有源层140与所述第一欧姆接触层130与所述第二欧姆接触层130’位于所述源极110与所述漏极120之间。所述栅极绝缘层150紧靠所述源漏区180并直接设置于所述基板170之上，用于分隔所述源漏区180以及所述栅极160。所述栅极160紧靠所述栅极绝缘层150并直接设置于所述基板170之上。如图2，以所述基板170为准，在垂直的方向上依序设置所述源极110、所述第一欧姆接触层130、所述有源层140、所述第二欧姆接触层130’以及所述漏极120，形成所述的源漏区180。以所述基板170为准，在水平方向上依序设置所述源漏区180、所述栅极绝缘层150及所述栅极160。
在所述源漏区180之中，当所述栅极160接收驱动电压时，所述半导体层135，即所述有源层140、所述第一欧姆接触层130与第二欧姆接触层130’ 会形成一导电沟道，用于传递所述源极110与所述漏极120之间的电流。
参考图3(a)及图3(b)。图3(a)绘示本发明的第一优选实施例的侧栅极TFT 100的第一样态在显示单元中的第一位置图。图3(b)绘示本发明的第一优选实施例的侧栅极TFT的第一样态在显示单元中的第二位置图。所述侧栅极TFT 100源漏区的设置方向可以根据不同的像素190的需求而设置为如图3(a)的水平方向或是如图3(b)的垂直方向。在其他优选实施例中，所述导电沟道135可以在水平线上是弯曲的。
图4绘示本发明的第一优选实施例的侧栅极TFT 100的制作流程示意图。应留意此流程图是用于说明所述侧栅极TFT 100的制作流程，而非用于说明所述侧栅极TFT 100的各组件的位置图。在一基板170上依序沉积用于形成一源极110的第一金属层D/S、第一欧姆接触层130、一有源层140、第二欧姆接触层130’、以及用于形成一漏极120的第二金属层 S/D。所述第一欧姆接触层130与所述第二欧姆接触层130’可为相同或相异材质。至此，包括所述源极110、所述第一欧姆接触层130、所述第二欧姆接触层130’、所述有源层140及所述漏极120的一源漏区180制作完成。接着在所述基板170上，所述源漏区180的旁边形成一栅极绝缘层150，在所述栅极绝缘层150的旁边沉积用于形成一栅极160的第三金属层。所述栅极绝缘层150的目的在于使所述栅极160与所述源漏区180形成绝缘状态。
本发明中仅以一层以及两层欧姆接触层为例,但是在其他优选实施例中可以有超过两层的欧姆接触层。
图5绘示本发明的第二优选实施例的侧栅极TFT 200的细部结构示意图。本优选实施例的侧栅极TFT 200与所述第一优选实施例的差异在于：本优选实施例中一漏极220是直接设置在一基板270之上。详细地，以所述基板270为准，在垂直的方向上依序设置所述漏极220、第一欧姆接触层230、有源层240、第二欧姆接触层230’以及所述源极210，形成所述的源漏区280。以所述基板270为准，在水平方向上以需设置所述源漏区280、所述栅极绝缘层250及所述栅极260。
参考图6及图7。图6绘示本发明的第三优选实施例的侧栅极TFT 300在显示单元中的位置图。图7绘示图6的侧栅极TFT 300的细部结构示意图。本优选实施例结合第一优选实施例与第二优选实施例的结构。二侧栅极TFT 300的栅极360相互连接。在本优选实施例中，两个所述侧栅极TFT 300分别连接一第一数据线396、一第二数据线394、一主像素393与一次像素395。藉由这样的设置，双数据线可以应用在相邻行、列的像素之中通过所述有源层绝缘隔开上下两条数据线。由于可以将相邻侧栅极TFT 300的栅极360制作在一起，可以进一步提高开口率和充电能力。
[根据细则91更正 15.02.2015]　
参考图8(a)及图8(b)。图8(a)绘示本发明的第四优选实施例的侧栅极TFT400的第一样态的制作流程示意图。图8(b)绘示本发明的第四优选实施例的侧栅极TFT的第二样态的制作流程示意图。本优选实施例与所述第一优选实施例的区别在于：在一源极410与一半导体层435之间多了一工艺顺序，多设置一绝缘层415的工艺。如图8(a)，在一基板470上依序沉积用于形成一漏极420的第二金属层、第一欧姆接触层430、一有源层440、第二欧姆接触层430’、所述绝缘层415、用于形成一源极410的第一金属层、所述栅极绝缘层。所述第一欧姆接触层430与所述第二欧姆接触层430’可为相同或相异材质。图8(b)与图8(a)的区别在于所述源极410及所述漏极420的位置是不同的以及所述绝缘层415的制作顺序是不同的，其余流程请参考图8(a)。在工艺顺序上，以图8(a)为例，在制作所述半导体层435之后，接着沉积所述绝缘层415，接着蚀刻部分所述绝缘层，再沉积所述源极410，因此所述绝缘层415设置于部分所述源极410与所述半导体层435之间，因此所述源极410与所述半导体层435之间没有设置所述绝缘层415的部分形成一导电沟道。在双数据线(Dualdatalines)的结构中，特别是上下重迭的双数据线，透过设置所述绝缘层415，图8(a)的所述源极410可以与一数据线连接，图8(b)的所述源极410可以与另一数据线连接，而不会相互干扰。在所述栅极460施加驱动电压的情况下，所述源极410与所述漏极420通过所述导电沟道传递电流。
本发明的其他实施例还提供一种液晶显示装置，其包括前述的侧栅极TFT开关。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (18)

  1. 一种侧栅极TFT开关，其中包括：
    一基板；
    一源漏区，设置于所述基板之上,包括一源极和一漏极
    和半导体层，所述半导体层位于所述源极与所述漏极之间，所述源极、所述漏极垂直设置于所述基板之上；
    一栅极绝缘层,紧靠所述源漏区设置；
    一栅极,紧靠所述栅极绝缘层设置；
    其中，所述栅极绝缘层用于分隔所述源漏区以及所述栅极，所述半导体层包括第一欧姆接触层、有源层和第二欧姆接触层，所述有源层位在所述第一欧姆接触层与第二欧姆接触层之间。
  2. 根据权利要求1的侧栅极TFT开关，其中所述栅极绝缘层与所述栅极直接设置于所述基板之上。
  3. 根据权利要求1的侧栅极TFT开关，其中所述第一欧姆接触层及所述第二欧姆接触层可为相同或相异材质。
  4. 根据权利要求1的侧栅极TFT开关，其中所述源极直接接触所述基板。
  5. 根据权利要求1的侧栅极TFT开关，其中所述漏极直接接触所述基板。
  6. 根据权利要求1的侧栅极TFT开关，其中进一步包含一绝缘层设置于部分所述源极与所述半导体层之间。
  7. 根据权利要求6的侧栅极TFT开关，其中所述源极与所述半导体层之间没有设置所述绝缘层的部分形成一导电沟道。
  8. 根据权利要求7的侧栅极TFT开关，其中在所述栅极施加驱动电压的情况下，所述源极与所述漏极通过所述导电沟道传递电流。
  9. 一种侧栅极TFT开关，其中包括：
    一基板；
    一源漏区，设置于所述基板之上,包括一源极和一漏极
    和半导体层，所述半导体层位于所述源极与所述漏极之间，所述源极、所述漏极垂直设置于所述基板之上；
    一栅极绝缘层,紧靠所述源漏区设置；
    一栅极,紧靠所述栅极绝缘层设置；
    其中，所述栅极绝缘层用于分隔所述源漏区以及所述栅极。
  10. 根据权利要求9的侧栅极TFT开关，其中所述栅极绝缘层与所述栅极直接设置于所述基板之上。
  11. 根据权利要求9的侧栅极TFT开关，其中所述半导体层包括第一欧姆接触层、有源层和第二欧姆接触层。
  12. 根据权利要求11的侧栅极TFT开关，其中所述第一欧姆接触层及所述第二欧姆接触层可为相同或相异材质。
  13. 根据权利要求9的侧栅极TFT开关，其中所述源极直接接触所述基板。
  14. 根据权利要求9的侧栅极TFT开关，其中所述漏极直接接触所述基板。
  15. 根据权利要求9的侧栅极TFT开关，其中进一步包含一绝缘层设置于部分所述源极与所述半导体层之间。
  16. 根据权利要求15的侧栅极TFT开关，其中所述源极与所述半导体层之间没有设置所述绝缘层的部分形成一导电沟道。
  17. 根据权利要求16的侧栅极TFT开关，其中在所述栅极施加驱动电压的情况下，所述源极与所述漏极通过所述导电沟道传递电流。
  18. 一种液晶显示装置，其包括侧栅极TFT开关，所述侧栅
    极TFT开关包括：
    一基板；
    一源漏区，设置于所述基板之上,包括一源极和一漏极
    和半导体层，所述半导体层位于所述源极与所述漏极之间，所述源极、所述漏极垂直设置于所述基板之上；
    一栅极绝缘层,紧靠所述源漏区设置；
    一栅极,紧靠所述栅极绝缘层设置；
    其中，所述栅极绝缘层用于分隔所述源漏区以及所述栅极。
PCT/CN2015/070631 2014-12-31 2015-01-13 侧栅极tft开关及液晶显示装置 Ceased WO2016106844A1 (zh)

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