WO2016093114A1 - 接着剤組成物、その硬化物を含む半導体装置およびそれを用いた半導体装置の製造方法 - Google Patents

接着剤組成物、その硬化物を含む半導体装置およびそれを用いた半導体装置の製造方法 Download PDF

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Publication number
WO2016093114A1
WO2016093114A1 PCT/JP2015/083758 JP2015083758W WO2016093114A1 WO 2016093114 A1 WO2016093114 A1 WO 2016093114A1 JP 2015083758 W JP2015083758 W JP 2015083758W WO 2016093114 A1 WO2016093114 A1 WO 2016093114A1
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Prior art keywords
adhesive composition
semiconductor device
film
average particle
mass
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PCT/JP2015/083758
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English (en)
French (fr)
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松村和行
藤丸浩一
金森大典
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東レ株式会社
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Priority to CN201580064713.7A priority Critical patent/CN107001895B/zh
Priority to JP2015560433A priority patent/JP6589638B2/ja
Priority to SG11201704434RA priority patent/SG11201704434RA/en
Priority to MYPI2017000605A priority patent/MY180588A/en
Priority to US15/533,182 priority patent/US10294395B2/en
Priority to KR1020177017325A priority patent/KR102360805B1/ko
Publication of WO2016093114A1 publication Critical patent/WO2016093114A1/ja
Priority to PH12017500832A priority patent/PH12017500832A1/en

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    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3512—Cracking

Definitions

  • the present invention relates to an adhesive composition used when electrically bonding or adhering semiconductor chips to a circuit board, or bonding or laminating semiconductor chips, a semiconductor device including a cured product thereof, and a semiconductor using the same
  • the present invention relates to a device manufacturing method.
  • an object of the present invention is to provide an adhesive composition capable of recognizing an alignment mark, sufficiently ensuring solder wettability of a joint, and excellent in suppressing void generation.
  • the adhesive composition of the present invention is excellent in film-forming properties when formed into a film by including (A) a polymer compound.
  • the high molecular compound means a compound having a weight average molecular weight of 5,000 or more and 500,000 or less.
  • Examples of the polymer compound (A) include acrylic resin, phenoxy resin, polyester resin, polyurethane resin, polyimide resin, siloxane-modified polyimide resin, polybenzoxazole resin, polyamide resin, polycarbonate resin, polybutadiene, and the like. Not. Two or more of these may be combined.
  • (D) the dispersibility of the inorganic particles having an alkoxysilane having a phenyl group on the surface with an average particle diameter of 30 to 200 nm is good, and the film has high transparency when formed into a film.
  • a phenoxy resin is preferable from the viewpoint of easy recognition.
  • a polyimide resin is preferable from the viewpoint of suppressing voids after mounting.
  • the toughness of the cured adhesive composition can be increased.
  • the epoxy equivalent By setting the epoxy equivalent to 500 or less, the crosslinking density of the cured adhesive composition is increased, and the heat resistance can be improved.
  • the weight average molecular weight of the (B) epoxy compound having a weight average molecular weight of 100 or more and 3,000 or less in the present invention is the same as the weight average molecular weight of the polymer compound (A), gel permeation chromatography (GPC). Method) and calculated in terms of polystyrene.
  • the liquid epoxy compound shows a viscosity of 150 Pa ⁇ s or less at 25 ° C. and 1.013 ⁇ 10 5 N / m 2
  • the solid epoxy compound shows a viscosity exceeding 150 Pa ⁇ s at 25 ° C. Is.
  • the liquid epoxy compound include jER (registered trademark) YL980, jER (registered trademark) YL983U, jER (registered trademark) 152, jER (registered trademark) 630, jER (registered trademark) YX8000 (trade name, Mitsubishi Chemical Corporation). )), EPICLON (registered trademark) HP-4032 (trade name, manufactured by DIC Corporation), and the like, but are not limited thereto.
  • jER registered trademark 1002, jER (registered trademark) 1001, jER (registered trademark) YX4000H, jER (registered trademark) 4004P, jER (registered trademark) 5050, jER (registered trademark) 154, jER (registered trademark) 157S70, jER (registered trademark) 180S70, jER (registered trademark) 1032H60 (trade name, manufactured by Mitsubishi Chemical Corporation), TEPIC (registered trademark) S (trade name, Nissan Chemical Industries, Ltd.) ), Epototo (registered trademark) YH-434L (trade name, manufactured by Nippon Steel Chemical Co., Ltd.), EPPN502H, NC3000 (above product name, manufactured by Nippon Kayaku Co., Ltd.), EPICLON (registered trademark) N695, EPICLON (Registered trademark) N865, EPICLON
  • the content of the epoxy compound having a weight average molecular weight of 100 or more and 3,000 or less exhibits sufficient adhesion and improves the connection reliability of the semiconductor device after mounting. It is preferable that it is 50 mass parts or more with respect to 100 mass parts of high molecular compounds, and it is more preferable that it is 100 mass parts or more. On the other hand, it is preferably 500 parts by mass or less, and more preferably 300 parts by mass or less, from the viewpoint of improving the wettability of the solder at the joint.
  • the adhesive composition of the present invention contains (C) flux, and (C) flux contains acid-modified rosin.
  • the flux is a compound that removes oxides on the metal surface and improves the wettability of the solder.
  • Acid-modified rosin is made from raw rosins such as gum rosin, wood rosin, tall rosin and unsaturated carboxylic acids such as (meth) acrylic acid, (anhydrous) maleic acid, fumaric acid, (anhydrous) citraconic acid, (anhydrous) itaconic acid, It was obtained by Diels-Alder reaction (addition reaction).
  • the raw material rosin is preferably purified by distillation, recrystallization, extraction, etc.
  • the acid-modified rosin can be converted to an acid-modified rosin having a transparent color tone by hydrogenation.
  • Examples of such acid-modified rosin include Pine Crystal (registered trademark) KE-604, Pine Crystal (registered trademark) KR-120, Marquide (registered trademark) No. 33 (above trade name, manufactured by Arakawa Chemical Industries, Ltd.). These acid-modified rosins contain two or more carboxyl groups. For this reason, the acid-modified rosin reacts with the epoxy compound to form a dense network structure and can improve heat resistance.
  • the content of the acid-modified rosin in the flux is preferably 50% by mass or more from the viewpoint of improving the storage stability of the adhesive composition at room temperature and suppressing voids after mounting. It is more preferable that it is 90 mass% or more, and it is more preferable that it is 95 mass% or more. Moreover, as an upper limit, it is 100 mass% from which all flux becomes acid-modified rosin.
  • the lower limit of the average particle size of the inorganic particles having (D) an alkoxysilane having a phenyl group on the surface and an average particle size of 30 to 200 nm is preferably 50 nm or more, and more preferably 75 nm or more.
  • the upper limit of the average particle size of the inorganic particles having (D) an alkoxysilane having a phenyl group on the surface and an average particle size of 30 to 200 nm is preferably 175 nm or less, and more preferably 150 nm or less.
  • inorganic particles having an alkoxysilane having a phenyl group on the surface and an average particle diameter of 30 to 200 nm inorganic particles surface-treated with a phenylsilane coupling agent, for example, Sciqas 0.15 ⁇ m phenylsilane treatment, Sciqas 0.1 ⁇ m phenylsilane Treatment, Sciqas 0.05 ⁇ m phenylsilane treatment (trade name, manufactured by Sakai Chemical Industry Co., Ltd.) and YA050C (trade name, manufactured by Admatechs Co., Ltd.).
  • a phenylsilane coupling agent for example, Sciqas 0.15 ⁇ m phenylsilane treatment, Sciqas 0.1 ⁇ m phenylsilane Treatment, Sciqas 0.05 ⁇ m phenylsilane treatment (trade name, manufactured by Sakai Chemical Industry Co., Ltd.) and YA050C (trade name, manufactured by Admatechs
  • Examples of inorganic particles used for inorganic particles having an alkoxysilane having a phenyl group on the surface and an average particle diameter of 30 to 200 nm include silicic acids such as talc, fired clay, unfired clay, mica, and glass.
  • the adhesive composition of the present invention preferably contains (E) a curing accelerator. Since the curing accelerator is present in the adhesive composition without being dissolved, the curing reaction of the epoxy compound is delayed, and the storage stability at room temperature is improved. Accelerator particles are preferred. In addition, it is preferable to use imidazole-based curing accelerator particles as the curing accelerator particles because the epoxy resin has a high curing rate and can suppress voids after mounting.
  • the lower limit of the average particle diameter of the curing accelerator particles is preferably 0.1 ⁇ m or more, and more preferably 0.15 ⁇ m or more. Further, the upper limit of the average particle diameter is preferably 2 ⁇ m or less, and more preferably 1 ⁇ m or less.
  • the average particle diameter means the average particle diameter when the curing accelerator particles are present alone.
  • the shape of the curing accelerator particles is spherical, the diameter is represented, and when the shape is elliptical or flat, the maximum length of the shape is represented. Furthermore, when the shape is rod-like or fibrous, it represents the maximum length in the longitudinal direction.
  • the particle size can be measured by directly observing particles with an SEM (scanning electron microscope) and calculating the average particle size of 100 particles.
  • SEM scanning electron microscope
  • the average particle size is 0.1 ⁇ m or more, the dispersibility of the adhesive film is good, the transparency of the film when it is made into a film is high, and the alignment mark is easily recognized.
  • the average particle size is 2 ⁇ m or less, the specific surface area of the curing accelerator increases, the curing reaction of the epoxy compound easily proceeds, the amount contained in the adhesive composition decreases, and the generation of voids after mounting is suppressed. It becomes possible to do.
  • the content of (E) the curing accelerator is such that the curing reaction of the epoxy compound proceeds, a sufficient adhesive force is expressed, and the connection reliability of the semiconductor device after mounting is improved.
  • 1 mass part or more is preferable with respect to 100 mass parts of epoxy compounds whose molecular weight is 100 or more and 3,000 or less, and 3 mass parts or more is more preferable.
  • the adhesive composition of the present invention may further contain an ion scavenger, a surfactant, a silane coupling agent, an organic dye, an inorganic pigment, and the like.
  • Solvents include ketone solvents acetone, methyl ethyl ketone, methyl isobutyl ketone, cyclopentanone, cyclohexanone; ether solvents 1,4-dioxane, tetrahydrofuran, diglyme; glycol ether solvents methyl cellosolve, ethyl cellosolve, propylene glycol monomethyl Ether, propylene glycol monoethyl ether, propylene glycol monobutyl ether, diethylene glycol methyl ethyl ether; other benzyl alcohol, N-methylpyrrolidone, ⁇ -butyrolactone, ethyl acetate, N, N-dimethylformamide, etc. It can be used, but is not limited to these.
  • the peelable substrate polypropylene film, polyethylene terephthalate film, polyethylene naphthalate film, polyester film, polyvinyl chloride film, polycarbonate film, polyimide film, polytetrafluoroethylene film and other fluororesin films, polyphenylene sulfide film, polypropylene film , Polyethylene film and the like, but are not limited thereto.
  • the release substrate may be subjected to a release treatment with a silicone release agent, a long-chain alkyl release agent, a fluorine release agent, an aliphatic amide release agent, or the like.
  • the thickness of the peelable substrate is not particularly limited, but usually 5 to 75 ⁇ m is preferable.
  • peelable substrate it is preferable to laminate another peelable substrate on the surface opposite to the surface having the releasable substrate of the adhesive to form an adhesive film sandwiched between the upper and lower surfaces by the peelable substrate.
  • another peelable substrate the same materials as described above can be used. Both peelable substrates may be the same.
  • the adhesive composition in which each constituent material is mixed in a solvent to form a varnish can be applied to a semiconductor wafer, a circuit board or the like and removed from the solvent.
  • the adhesive composition of the present invention is suitably used as an adhesive composition for semiconductors for bonding or fixing circuit members such as semiconductor elements, circuit boards, and metal wiring materials used in semiconductor devices, and for sealing semiconductor elements. Can be used.
  • the semiconductor device of the present invention includes a cured product of the adhesive composition or a cured product of the adhesive composition film.
  • the semiconductor device in the present invention refers to all devices that can function by utilizing the characteristics of semiconductor elements.
  • a semiconductor device includes a semiconductor element connected to a substrate, a semiconductor element or substrates connected to each other, an electro-optical device, a semiconductor circuit substrate, and an electronic device.
  • a first circuit member having a first connection terminal and a second circuit member having a second connection terminal are prepared.
  • the circuit member is a chip component such as a semiconductor chip, a resistor chip, a capacitor chip, a semiconductor chip having a TSV (through silicon via) electrode, a silicon interposer, a glass epoxy circuit board, a substrate such as a film circuit board, etc.
  • connection terminals include bump electrodes such as plating bumps and stud bumps, pad electrodes, and the like.
  • the penetration electrode may be formed in the first circuit member and / or the second circuit member, and the connection terminal may be formed on one side and / or both sides of the member.
  • the first circuit member and the second circuit member are arranged so that the first connection terminal and the second connection terminal face each other.
  • the adhesive composition of the present invention is interposed between the first connection terminal and the second connection terminal that are arranged to face each other. And a 1st circuit member and a 2nd circuit member are heat-pressed, and the 1st connection terminal and 2nd connection terminal which were arrange
  • the first circuit member and the second circuit member are firmly electrically connected, and the adhesive is cured, so that the first circuit member and the second circuit member are physically connected. Fixed to.
  • the adhesive composition may be applied to only the surface on the connection terminal side of one of the circuit members, or applied to both surfaces on the connection terminal side of the first and second circuit members. May be.
  • the semiconductor chip as the first circuit member is arranged so that the bump of the first circuit member and the wiring pattern of the second circuit member face each other, and both are heated and pressed using a bonding apparatus.
  • the heating and pressing conditions are not particularly limited as long as electrical connection can be obtained satisfactorily.
  • the temperature is 100 ° C. or more
  • the pressure is 1 mN / bump or more
  • the time is 0. • Heating and pressing for 1 second or more is necessary.
  • the temperature is 120 ° C. to 300 ° C., more preferably 150 ° C.
  • the bonding conditions are set to 60 seconds or shorter, more preferably 2 seconds to 30 seconds. Also, after bonding, the bump on the semiconductor chip and the wiring pattern on the circuit board are brought into contact with each other by heating and pressing at a temperature of 50 ° C. or more, a pressure of 1 mN / bump or more, and a time of 0.1 second or more. Bonding may be performed under the above conditions. If necessary, after bonding, the circuit board with a semiconductor chip may be heated at a temperature of 50 ° C. to 200 ° C. for 10 seconds to 24 hours.
  • ⁇ Average particle size of inorganic particles> The particle size of 100 particles was observed with an SEM (scanning electron microscope, JSM-6510A manufactured by JEOL Ltd.), and the average value was taken as the average particle size. In the observation, when the particle was observed as a circle, the diameter was defined as the particle diameter, and when the particle was observed as an ellipse or the like, the length of the section having the longest distance in the particle outline was defined as the particle diameter.
  • flip chip bonding was performed on the substrate (WALTS-KIT CC80-0102JY [MAP] _ModelI (Cu + OSP specification), manufactured by Waltz). .
  • Flip chip bonding is performed by placing a substrate on a bonding stage heated to 140 ° C., temporarily bonding the substrate at a temperature of 140 ° C. and a pressure of 150 N / chip for 1 second, and then at a temperature of 250 ° C. and a pressure of 150 N.
  • the main press bonding was performed at a time of 5 seconds.
  • the obtained semiconductor device was observed for voids using an ultrasonic imaging device (manufactured by Hitachi Power Solutions, Ltd., FS300III).
  • the ratio of voids to the chip area was recorded. The lower limit of the result was 1% or less, and the upper limit of the result was 10% or more.
  • the polyimide (A) used in each Example and Comparative Example was synthesized as follows.
  • the components (A) to (F) used in the examples and comparative examples are as follows.
  • (D) Component Sciqas 0.15 ⁇ m phenylsilane treatment (trade name, silica, average particle diameter 150 nm, phenylsilane coupling surface treatment, that is
  • Cyclohexanone was used as the organic solvent, and additives other than the solvent were used as the solid content to obtain an adhesive composition varnish having a solid content concentration of 53%.
  • the prepared adhesive composition varnish was applied to the surface treated surface of a 38 ⁇ m thick polyethylene terephthalate film as a peelable substrate using a slit die coater (coating machine), and dried at 100 ° C. for 10 minutes. It was.
  • the adhesive surface of the dicing tape (T1902-90, polyolefin base material, manufactured by Furukawa Electric Co., Ltd.) was pasted on the adhesive film having a thickness of 30 ⁇ m after drying thus obtained. An adhesive composition film having a sandwiched structure was obtained.

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  • Organic Chemistry (AREA)
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  • Power Engineering (AREA)
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  • Chemical Kinetics & Catalysis (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Die Bonding (AREA)

Abstract

　本発明の目的は、アライメントマークの認識が可能であり、接合部のハンダの濡れ性が十分に確保され、ボイド発生を抑制することに優れた接着剤組成物を提供することであり、本発明は、（Ａ）高分子化合物、（Ｂ）重量平均分子量が１００以上３，０００以下であるエポキシ化合物、（Ｃ）フラックスおよび（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子を含有する接着剤組成物であって、（Ｃ）フラックスが酸変性ロジンを含有することを特徴とする接着剤組成物である。

Description

接着剤組成物、その硬化物を含む半導体装置およびそれを用いた半導体装置の製造方法
　本発明は、半導体チップを回路基板に電気的に接合もしくは接着する際や、半導体チップ同士を接合もしくは積層する際に用いられる接着剤組成物、その硬化物を含む半導体装置およびそれを用いた半導体装置の製造方法に関する。
　近年、半導体装置の小型化と高密度化に伴い、半導体チップを回路基板に実装する方法としてフリップチップ実装が注目され、急速に広まってきている。フリップチップ実装においては、半導体チップの接着には、半導体チップ上に形成されたバンプ電極と回路基板のパッド電極の間にエポキシ樹脂系接着剤を介在させることが一般的な方法として採られている。
　バンプ電極にハンダを有するフリップチップ実装においては、ハンダ表面や電極表面に存在する酸化膜を除去する目的でフラックス機能を有する接着剤が提案されている（例えば特許文献１および２参照）。
　また、フリップチップ実装では、接着剤組成物越しに基板やチップ上に形成されたアライメントマークを認識することが要求される。つまり、接着剤組成物には透明性が必要とされる。しかしながら、上記のような接着剤組成物を用いて半導体装置を作製しようとした場合、透明性が不足しアライメントマークの認識ができなかったり、フラックス性が不十分で実装後の接合部のハンダの濡れ性が不良であったり、実装後に半導体装置内にボイドが残存する場合があった。
特開２０１３－１７３８３４号公報 国際公開第２０１４／１０３６３７号
　かかる状況に鑑み、本発明は、アライメントマークの認識が可能であり、接合部のハンダの濡れ性が十分に確保され、ボイド発生を抑制することに優れた接着剤組成物を提供することを目的とする。
　すなわち本発明は、（Ａ）高分子化合物、（Ｂ）重量平均分子量が１００以上３，０００以下であるエポキシ化合物、（Ｃ）フラックスおよび（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子を含有する接着剤組成物であって、（Ｃ）フラックスが酸変性ロジンを含有することを特徴とする接着剤組成物である。
　本発明によれば、アライメントマークの認識が可能であり、接合部のハンダの濡れ性が十分に確保され、ボイド発生を抑制することに優れた接着剤組成物を得ることができる。
本発明の接着剤組成物を用いて作製した半導体装置の接合部のハンダ濡れ性を示す模式図である。
　本発明の接着剤組成物は、（Ａ）高分子化合物、（Ｂ）重量平均分子量が１００以上３，０００以下であるエポキシ化合物、（Ｃ）フラックスおよび（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子を含有する接着剤組成物であって、（Ｃ）フラックスが酸変性ロジンを含有することを特徴とする接着剤組成物である。
　本発明の接着剤組成物は、（Ａ）高分子化合物を含むことにより、フィルム状にする際の製膜性に優れる。高分子化合物とは、重量平均分子量で５，０００以上５００，０００以下のものを言う。
　（Ａ）高分子化合物としては、アクリル樹脂、フェノキシ樹脂、ポリエステル樹脂、ポリウレタン樹脂、ポリイミド樹脂、シロキサン変性ポリイミド樹脂、ポリベンゾオキサゾール樹脂、ポリアミド樹脂、ポリカーボネート樹脂、ポリブタジエン等が挙げられるが、これらに限定されない。これらを２種以上組み合わせてもよい。これらのうち、（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子の分散性が良好で、フィルムにした際の膜の透明性が高く、アライメントマークの認識が容易になる点から、フェノキシ樹脂が好ましい。また、実装後のボイドを抑制する点から、ポリイミド樹脂が好ましい。
　（Ａ）高分子化合物の重量平均分子量の下限としては１０，０００以上であることが好ましく、３０，０００以上であることがより好ましい。また重量平均分子量の上限１００，０００以下であることが好ましく、８０，０００以下であることがより好ましい。（Ａ）高分子化合物が２種以上含まれる場合、そのうちの少なくとも１種の重量平均分子量が上記範囲であればよい。重量平均分子量が１０，０００以上だと、硬化膜の機械強度が向上し、サーマルサイクル試験でのクラック発生等が抑制され、信頼性の高い半導体装置を得ることができる。一方、重量平均分子量が１００，０００以下であると、接着剤組成物の流動性が高くなり、実装後の接合部のハンダの濡れ性が向上する。なお、本発明における（Ａ）高分子化合物の重量平均分子量は、ゲルパーミエーションクロマトグラフィー法（ＧＰＣ法）によって測定し、ポリスチレン換算で算出する。
　本発明の接着剤組成物は、（Ｂ）重量平均分子量が１００以上３，０００以下であるエポキシ化合物を含有する。エポキシ化合物は、一般に収縮を伴わない開環反応によって硬化するため、接着剤組成物の硬化時の収縮を低減することが可能となる。また重量平均分子量が１００以上３,０００以下であることにより、エポキシ化合物の反応性が高く、結果として硬化速度が速くなり、実装後のボイドを抑制することが可能となる。（Ｂ）重量平均分子量が１００以上３，０００以下であるエポキシ化合物としては、エポキシ基を２個以上有するものや、エポキシ当量が１００～５００であるものが好ましい。エポキシ当量を１００以上とすることで、硬化した接着剤組成物の靭性を高くすることができる。エポキシ当量を５００以下とすることで、硬化した接着剤組成物の架橋密度が高くなり、耐熱性を向上することができる。なお、本発明における（Ｂ）重量平均分子量が１００以上３，０００以下であるエポキシ化合物の重量平均分子量は、（Ａ）高分子化合物の重量平均分子量と同様に、ゲルパーミエーションクロマトグラフィー法（ＧＰＣ法）によって測定し、ポリスチレン換算で算出する。
　また、（Ｂ）重量平均分子量が１００以上３，０００以下であるエポキシ化合物は、液状エポキシ化合物と固形状エポキシ化合物の両方を含有していることが好ましい。液状エポキシ化合物を含有することで、接着剤組成物をフィルム状にした際に膜のクラックを抑制できる。固形状エポキシ化合物を含有することで、実装後のボイドの発生を抑制することができる。
　ここで液状エポキシ化合物とは、２５℃、１．０１３×１０５Ｎ／ｍ２で１５０Ｐａ・ｓ以下の粘度を示すものであり、固形エポキシ化合物とは２５℃で１５０Ｐａ・ｓを越える粘度を示すものである。液状エポキシ化合物としては、例えばｊＥＲ（登録商標）ＹＬ９８０、ｊＥＲ（登録商標）ＹＬ９８３Ｕ、ｊＥＲ（登録商標）１５２、ｊＥＲ（登録商標）６３０、ｊＥＲ（登録商標）ＹＸ８０００（以上商品名、三菱化学（株）製）、ＥＰＩＣＬＯＮ（登録商標）ＨＰ－４０３２（以上商品名、ＤＩＣ（株）製）などが挙げられるが、これらに限定されない。これらを２種以上組み合わせてもよい。また、固形エポキシ化合物としては、ｊＥＲ（登録商標）１００２、ｊＥＲ（登録商標）１００１、ｊＥＲ（登録商標）ＹＸ４０００Ｈ、ｊＥＲ（登録商標）４００４Ｐ、ｊＥＲ（登録商標）５０５０、ｊＥＲ（登録商標）１５４、ｊＥＲ（登録商標）１５７Ｓ７０、ｊＥＲ（登録商標）１８０Ｓ７０、ｊＥＲ（登録商標）１０３２Ｈ６０（以上商品名、三菱化学（株）製）、ＴＥＰＩＣ（登録商標）Ｓ（以上商品名、日産化学工業（株）製）、エポトート（登録商標）ＹＨ－４３４Ｌ（商品名、新日鐵化学（株）製）、ＥＰＰＮ５０２Ｈ、ＮＣ３０００（以上商品名、日本化薬（株）製）、ＥＰＩＣＬＯＮ（登録商標）Ｎ６９５、ＥＰＩＣＬＯＮ（登録商標）Ｎ８６５、ＥＰＩＣＬＯＮ（登録商標）ＨＰ－７２００、ＥＰＩＣＬＯＮ（登録商標）ＨＰ－４７００（以上商品名、ＤＩＣ（株）製）などが挙げられるが、これらに限定されない。これらを２種以上組み合わせてもよい。
　また（Ｂ）重量平均分子量が１００以上３，０００以下であるエポキシ化合物の含有量としては、接着力が十分に発現し、実装後の半導体装置の接続信頼性が向上する点から、（Ａ）高分子化合物１００質量部に対して５０質量部以上であることが好ましく、１００質量部以上であることがより好ましい。一方、接合部のハンダの濡れ性が向上する点から、５００質量部以下であることが好ましく、３００質量部以下であることがより好ましい。
　本発明の接着剤組成物は、（Ｃ）フラックスを含有し、（Ｃ）フラックスは酸変性ロジンを含有することを特徴とする。（Ｃ）フラックスは、金属表面の酸化物を除去しハンダの濡れ性を向上する化合物である。酸変性ロジンは、ガムロジン、ウッドロジン、トールロジン等の原料ロジン類と（メタ）アクリル酸、（無水）マレイン酸、フマル酸、（無水）シトラコン酸、（無水）イタコン酸等の不飽和カルボン酸を、ディールス・アルダー反応（付加反応）させて得られたものである。原料ロジンは、蒸留、再結晶、抽出等により金属などの不純物除去および樹脂色調の向上のために精製したものを用いることが好ましい。また、酸変性ロジンは、水素添加することにより、透明な色調の酸変性ロジンにすることができる。このような酸変性ロジンとしては、パインクリスタル（登録商標）ＫＥ－６０４、パインクリスタル（登録商標）ＫＲ－１２０、マルキード（登録商標）Ｎｏ．３３（以上商品名、荒川化学工業（株）製）が挙げられる。これらの酸変性ロジンは、カルボキシル基を２個以上含有している。このため酸変性ロジンはエポキシ化合物と反応し、密度の高い網目構造を形成し、耐熱性を向上することができる。なお、酸変性ロジンは、その化合物の嵩高い構造と酸変性により生成した嵩高い環構造を有しており、これがカルボキシル基へのエポキシの反応を立体的に阻害し、接着剤組成物の室温下での保存性が向上する。一方でハンダ融点付近の２００℃から２５０℃の温度では、酸変性ロジンの分子運動性が高まり、ハンダ表面や接合金属表面の酸化皮膜を除去し接合部のハンダの濡れ性が向上する。
　（Ｃ）フラックスにおける酸変性ロジンの含有量は、接着剤組成物の室温下での保存安定性が向上する点や実装後のボイドを抑制する点から、５０質量％以上であることが好ましく、９０質量％以上であることがさらに好ましく、９５質量％以上であることがより好ましい。また上限としては、フラックスが全て酸変性ロジンとなる１００質量％である。
　接着剤組成物における（Ｃ）フラックスにおける酸変性ロジンの含有量はハンダの濡れ性が向上する点から、（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子１００質量部に対し５質量部以上が好ましく、１０質量部以上がより好ましく、１５質量部以上が更に好ましい。一方、実装後のボイドを抑制する点から、（Ｃ）フラックスの含有量は、（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子１００質量部に対し３５質量部以下が好ましく、３０質量部以下がより好ましく、２５質量部以下が更に好ましい。
　本発明の接着剤組成物は、（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子を含有する。上記のようにフェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍであれば、接着剤樹脂組成物への無機粒子の分散性が優れ、結果として接着剤組成物の透明性が確保され、アライメントマークの認識が可能になる。さらには、該無機粒子の分散性が優れることから、接着剤組成物に無機粒子を高濃度に充填することが可能となり、接着剤組成物とした際に実装後にボイドの発生を抑制することができ、さらには硬化物とした際の線膨張係数が低下し、半導体装置の接続信頼性を高めることができる。また（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子の平均粒子径の下限としては５０ｎｍ以上であることが好ましく、７５ｎｍ以上であることがより好ましい。また（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子の平均粒子径の上限としては１７５ｎｍ以下であることが好ましく、１５０ｎｍ以下であることがより好ましい。
　フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子としては、フェニルシランカップリング剤により表面処理された無機粒子、例えばＳｃｉｑａｓ０．１５μｍフェニルシラン処理、Ｓｃｉｑａｓ０．１μｍフェニルシラン処理、Ｓｃｉｑａｓ０．０５μｍフェニルシラン処理（以上商品名、堺化学工業（株）製）、ＹＡ０５０Ｃ（商品名、（株）アドマテックス製）を挙げることができる。
　なお、無機粒子の平均粒子径とは、無機粒子が単独で存在した場合の粒子径を示し、観察された粒子径の平均の値をいう。形状が球状の場合はその直径を表し、楕円状および扁平状の場合は形状の最大長さを表す。さらにロッド状または繊維状の場合は長手方向の最大長さを表す。接着剤組成物中の無機粒子の平均粒子径を測定する方法としては、ＳＥＭ（走査型電子顕微鏡）により直接粒子を観察し、１００個の粒子の粒子径の平均を計算する方法により測定することができる。
　（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子に用いられる無機粒子としては、例えば、タルク、焼成クレー、未焼成クレー、マイカ、ガラス等のケイ酸塩、酸化チタン、アルミナ、シリカ等の酸化物、炭酸カルシウム、炭酸マグネシウム等の炭酸塩、水酸化アルミニウム、水酸化マグネシウム、水酸化カルシウム等の水酸化物、硫酸バリウム、硫酸カルシウム、亜硫酸カルシウム等の硫酸塩または亜硫酸塩、ホウ酸亜鉛、メタホウ酸バリウム、ホウ酸アルミニウム、ホウ酸カルシウム、ホウ酸ナトリウム等のホウ酸塩、窒化アルミニウム、窒化ホウ素、窒化ケイ素等の窒化物等を挙げることができる。これらの無機粒子は複数種含有してもよいが、信頼性およびコストの点から、シリカまたは酸化チタンが好ましい。
　（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子の含有量は、溶剤を除いた接着剤組成物の有機物全量に対して４５質量部以上であることが好ましく、５０質量部以上であることがより好ましい。４５質量部以上であれば、接着剤組成物とした際に実装後のボイドの発生を抑制することができ、さらには硬化物とした際の線膨張係数が低下し、半導体装置の接続信頼性を高めることができる。また、無機粒子同士の凝集が抑制され、接着剤組成物の流動性が良く、実装後の接合部のハンダの濡れ性が向上する点から、７０質量％以下であることが好ましく、６５質量部以下であることがより好ましい。
　（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子の形状は、球状、楕円状、扁平状、ロッド状、繊維状等の非球状のいずれであっても良いが、球状の無機粒子がアルカリ可溶性接着剤フィルム中で均一分散しやすいことから好ましく使用することができる。
　本発明の接着剤組成物は、（Ｅ）硬化促進剤を含有することが好ましい。硬化促進剤が、接着剤組成物に溶解せずに存在することで、エポキシ化合物の硬化反応が遅くなり、室温下での保存性が向上する点から、（Ｅ）硬化促進剤としては、硬化促進剤粒子が好ましい。また、硬化促進剤粒子としてイミダゾール系硬化促進剤粒子を用いると、エポキシ樹脂の硬化速度が速く、実装後のボイドを抑制することが可能となるため好ましい。このような硬化促進剤粒子としては、キュアゾール（登録商標）２ＰＺＣＮＳ、キュアゾール（登録商標）２ＰＺＣＮＳ－ＰＷ、キュアゾール（登録商標）Ｃ１１Ｚ－ＣＮＳ、キュアゾール（登録商標）２ＭＺ－Ａ、キュアゾール（登録商標）Ｃ１１－Ａ、キュアゾール（登録商標）２Ｅ４ＭＺ－Ａ、キュアゾール（登録商標）２ＭＺＡ－ＰＷ、キュアゾール（登録商標）２ＭＡＯＫ－ＰＷ、キュアゾール（登録商標）２ＰＨＺ－ＰＷ（以上商品名、四国化成工業（株）製）などが好ましく用いられる。
　硬化促進剤粒子の平均粒子径の下限としては０．１μｍ以上であることが好ましく、０．１５μｍ以上であることがより好ましい。また平均粒子径の上限としては２μｍ以下であることが好ましく、１μｍ以下であることがより好ましい。ここで平均粒子径とは硬化促進剤粒子が単独で存在した場合の平均粒子径を示すものをいう。硬化促進剤粒子の形状が球状の場合はその直径を表し、楕円状および扁平状の場合は形状の最大長さを表す。さらに形状がロッド状または繊維状の場合は長手方向の最大長さを表す。平均粒子径を測定する方法としては、ＳＥＭ（走査型電子顕微鏡）により直接粒子を観察し、１００個の粒子の粒子径の平均を計算する方法により測定することができる。平均粒子径が０．１μｍ以上であると接着剤フィルムの分散性が良好で、フィルムにした際の膜の透明性が高く、アライメントマークの認識が容易になる。平均粒子径が２μｍ以下であると、硬化促進剤の比表面積が大きくなり、エポキシ化合物の硬化反応が進行し易く、接着剤組成物に含有させる量が少なくなり、実装後のボイドの発生を抑制することが可能となる。
　また（Ｅ）硬化促進剤の含有量としては、エポキシ化合物の硬化反応を進行させ、十分な接着力が発現し、実装後の半導体装置の接続信頼性が向上する点から、（Ｂ）重量平均分子量が１００以上３，０００以下であるエポキシ化合物１００質量部に対し、１質量部以上が好ましく、３質量部以上がより好ましい。一方、硬化反応が抑制され、室温下での保存安定性が向上し、結果として接合部のハンダの濡れ性が向上する点から、（Ｂ）重量平均分子量が１００以上３，０００以下であるエポキシ化合物１００質量部に対し、１５質量部以下が好ましく、１０質量部以下がより好ましい。
　本発明の接着剤組成物は、さらにイオン補足剤、界面活性剤、シランカップリング剤、有機染料、無機顔料などを含有しても良い。
　本発明の接着剤組成物は、各構成材料を溶媒中でワニスとして用いても良く、該ワニスを剥離性基材上に塗布および脱溶媒してフィルムにして用いてもよい。
　溶媒としては、ケトン系溶剤のアセトン、メチルエチルケトン、メチルイソブチルケトン、シクロペンタノン、シクロヘキサノン；エーテル系溶剤の１，４－ジオキサン、テトラヒドロフラン、ジグライム；グリコールエーテル系溶剤のメチルセロソルブ、エチルセロソルブ、プロピレングリコールモノメチルエーテル、プロピレングリコールモノエチルエーテル、プロピレングリコールモノブチルエーテル、ジエチレングリコールメチルエチルエーテル；その他ベンジルアルコール、Ｎ－メチルピロリドン、γ－ブチロラクトン、酢酸エチル、Ｎ，Ｎ－ジメチルホルムアミドなどを単独あるいは２種以上混合して使用することができるが、これらに限られない。
　剥離性基材としては、ポリプロピレンフィルム、ポリエチレンテレフタレートフィルム、ポリエチレンナフタレートフィルム、ポリエステルフィルム、ポリ塩化ビニルフィルム、ポリカーボネートフィルム、ポリイミドフィルム、ポリテトラフルオロエチレンフィルム等のフッ素樹脂フィルム、ポリフェニレンサルファイドフィルム、ポリプロピレンフィルム、ポリエチレンフィルム等が挙げられるが、これらに限られない。また、剥離性基材はシリコーン系離型剤、長鎖アルキル系離型剤、フッ素系離型剤、脂肪族アミド系離型剤等により離型処理が施されていてもよい。剥離性基材の厚みは、特に限定されないが、通常５～７５μｍのものが好ましい。また、接着剤の離型性基材を有する面とは反対側の面にさらに別の剥離性基材をラミネートして、剥離性基材で上下を挟まれた接着剤フィルムにすることが好ましい。別の剥離性基材の材質および厚みとしては、先に説明したものと同様のものを用いることができる。両方の剥離性基材が同一のものであっても構わない。
　また、各構成材料を溶媒中で混合してワニス状にした接着剤組成物は、半導体ウエハや回路基板などに塗布および脱溶媒して使用することもできる。
　本発明の接着剤組成物は、半導体装置に用いられる半導体素子、回路基板、金属配線材料等の回路部材同士の接着または固定や半導体素子の封止のための半導体用接着剤組成物として好適に使用することができる。
　本発明の半導体装置は、上記接着剤組成物の硬化物または上記接着剤組成物フィルムの硬化物を含む。本発明でいう半導体装置とは、半導体素子の特性を利用することで機能しうる装置全般を指す。半導体素子を基板に接続したものや、半導体素子同士または基板同士を接続したもの、電気光学装置、半導体回路基板および電子機器は全て半導体装置に含まれる。
　本発明の半導体装置の製造方法は、第一の回路部材と第二の回路部材の間に上記接着剤組成物または上記接着剤組成物フィルムを介在させ、加熱加圧により前記第一の回路部材と前記第二の回路部材を電気的に接続することを特徴とする。
　本発明の接着剤組成物を用いた半導体装置の製造方法の一例は以下の通りである。まず、第一の接続端子を有する第一の回路部材と、第二の接続端子を有する第二の回路部材とを準備する。ここで、回路部材とは、半導体チップ、抵抗体チップ、コンデンサチップ等のチップ部品、ＴＳＶ（スルーシリコンビア）電極を有する半導体チップやシリコンインターポーザー、ガラスエポキシ回路基板、フィルム回路基板等の基板等が挙げられる。また、接続端子としては、めっきバンプやスタッドバンプなどのバンプ電極や、パッド電極などが挙げられる。また、第一の回路部材および／または第二の回路部材に貫通電極が形成され部材の片面および／または両面に接続端子が形成されていてもよい。
　第一の回路部材と第二の回路部材とを、第一の接続端子と第二の接続端子が対向するように配置する。次に、前記対向配置した第一の接続端子と第二の接続端子の間に本発明の接着剤組成物を介在させる。そして、第一の回路部材と第二の回路部材とを加熱加圧して、前記対向配置した第一の接続端子と第二の接続端子を電気的に接続させる。この工程によって、第一の回路部材と第二の回路部材とが、しっかりと電気的に接続されるとともに、接着剤が硬化して、第一の回路部材と第二の回路部材とが物理的に固定される。
　ここで、接着剤組成物は、先にいずれかの回路部材の接続端子側の面のみに付与してもよいし、第一および第二の回路部材の接続端子側の両方の面に付与してもよい。
　より詳細な実施態様の例として、第一の回路部材とバンプを有する半導体チップを、第二の回路部材として配線パターンを有する回路基板または半導体チップとを用い、両者を本発明の接着剤組成物フィルムを介して接続し、第一の回路部材と第二の回路部材との間の空隙を接着剤で封止して半導体装置を作製する方法について説明する。
　まず、接着剤組成物フィルムを、第二の回路部材である、配線パターンが形成された回路基板または半導体チップに貼り付ける。このとき、接着剤組成物フィルムは、所定の大きさに切り出した後で、配線パターンが形成された回路基板の配線パターン面または半導体チップのバンプ形成面に貼り付けてもよい。また、半導体ウエハのバンプ形成面に接着剤フィルムを貼り付けた後、半導体ウエハをダイシングして個片化することによって、接着剤フィルムが貼り付いた半導体チップを作製してもよい。
　次に、第一の回路部材である半導体チップを、第一の回路部材のバンプと第二の回路部材の配線パターンとが対向するように配置し、ボンディング装置を用いて、両者を加熱加圧する。加熱加圧条件は、電気的接続が良好に得られる範囲であれば特に限定されるものではないが、接着剤の硬化を行うためには、温度１００℃以上、圧力１ｍＮ／バンプ以上、時間０．１秒以上の加熱加圧は必要である。好ましくは１２０℃以上３００℃以下、より好ましくは１５０℃以上２５０℃以下の温度、好ましくは５ｍＮ／バンプ以上５００００ｍＮ／バンプ以下、より好ましくは１０ｍＮ／バンプ以上１００００ｍＮ／バンプ以下の圧力、好ましくは１秒以上６０秒以下、より好ましくは、２秒以上３０秒以下の時間でのボンディング条件で行う。また、ボンディング時に、仮圧着として、温度５０℃以上、圧力１ｍＮ／バンプ以上、時間０．１秒以上の加熱加圧により、半導体チップ上のバンプと回路基板上の配線パターンとを接触させた後、上記の条件でボンディングを行ってもよい。必要に応じボンディング後に、半導体チップ付き回路基板を５０℃以上２００℃以下の温度で１０秒以上２４時間以下加熱してもよい。
　本発明の接着剤は、この他にも、ダイアタッチフィルム、ダイシングダイアタッチフィルム、リードフレーム固定テープ、放熱板、補強板、シールド材の接着剤、ソルダーレジスト等を作製するための接着性樹脂材料として使用することができる。
　以下に、本発明を実施例に基づいて具体的に説明するが、本発明はこれに限定されるものではない。
　＜高分子化合物、エポキシ化合物の重量平均分子量＞
　Ｎ－メチル－２－ピロリドン（以下、ＮＭＰとする）に溶解して濃度０．１重量％の溶液を調整して、測定サンプルとした。下に示す構成のＧＰＣ装置Ｗａｔｅｒｓ２６９０（Ｗａｔｅｒｓ（株）製）を用いて、ポリスチレン換算の重量平均分子量を算出した。ＧＰＣ測定条件は、移動層をＬｉＣｌとリン酸をそれぞれ濃度０．０５ｍｏｌ／Ｌで溶解したＮＭＰとし、流量を０．４ｍＬ／分とした。また、カラムはカラムオーブンを用いて４０℃に加温した。
検出器：Ｗａｔｅｒｓ９９６
システムコントローラー：Ｗａｔｅｒｓ２６９０
カラム：ＴＯＳＯＨ　ＴＳＫ－ＧＥＬ　α－４０００
カラム：ＴＯＳＯＨ　ＴＳＫ－ＧＥＬ　α－２５００。
　＜無機粒子の平均粒子径＞
　ＳＥＭ（走査型電子顕微鏡、日本電子社製ＪＳＭ－６５１０Ａ）により１００個の粒子の粒子径を観察し、その平均値を平均粒子径とした。観察において、粒子が円として観察された場合はその直径を粒子径とし、楕円等の形状として観察された場合は、粒子の輪郭において最も距離が長くなる区間の長さを粒子径とした。
　＜アライメントマークの認識＞
　接着剤組成物のアライメントマークの認識の評価は、以下のようにして行った。各実施例および比較例で作製した接着剤フィルムから保護フィルムを剥離した後、該接着剤組成物フィルムを、ラミネート装置（（株）名機製作所製、ＭＶＬＰ６００）を用いて、銅ピラーバンプ付きＴＥＧチップ（（株）ウォルツ製、ＷＡＬＴＳ－ＴＥＧ　ＣＣ８０－０１０１ＪＹ）の銅ピラーバンプ形成面に貼り合せた。そして、基材フィルムを剥離し、接着剤組成物付きの評価チップを作製した。該評価チップは１０個作製した。その後、フリップチップボンディング装置（東レエンジニアリング（株）製、ＦＣ－３０００ＷＳ）のカメラによって、チップ上のパターン認識性評価を行った。１０個作製した評価チップのうち、自動認識が可能であった数を記録した。
　＜ボイドの評価＞
　上記のようにして、アライメントマークの認識評価をした後、被着体となる基板（（株）ウォルツ製、ＷＡＬＴＳ－ＫＩＴ　ＣＣ８０－０１０２ＪＹ[ＭＡＰ]＿ＭｏｄｅｌＩ（Ｃｕ＋ＯＳＰ仕様））にフリップチップボンディングを行った。フリップチップボンディングの条件は、１４０℃に加熱されたボンディングステージ上に基板を置き、温度１４０℃、圧力１５０Ｎ／チップ、時間１秒の条件で仮圧着した後、温度２５０℃、圧力１５０Ｎの条件で時間を５秒にして本圧着を行った。得られた半導体装置を超音波映像装置（（株）日立パワーソリューションズ製、ＦＳ３００ＩＩＩ）を用いて、ボイドの観察を行った。ボイドの評価は、チップ面積に占めるボイドの割合を記録した。なお、結果の下限は１％以下、結果の上限は１０％以上とした。
　＜接合部のハンダ濡れ性評価＞
　上記のようにして、ボイドの評価を行った後、半導体装置を断面研磨し接合箇所を露出させた。その後、光学顕微鏡にて接合形状を観察した。図１のように、銅ピラーバンプ１００のハンダ１０１が基板の銅配線１０２の側面の両側が濡れている場合をＡ、片側のみ濡れている場合をＢ、どちらの側面も濡れていないが配線上は濡れている場合をＣ、どちらの側面も濡れず、配線上にも接着剤組成物１０３の噛み込みがあるものをＤとした（図１）。
　各実施例および比較例で用いた（Ａ）成分のポリイミドは以下のとおり合成した。
　合成例１　ポリイミドの合成
　乾燥窒素気流下、１，３－ビス（３－アミノフェノキシ）ベンゼン　４．８２ｇ（０．０１６５モル）、３，３’－ジアミノ－４，４’－ジヒドロキシジフェニルスルホン　３．０８ｇ（０．０１１モル）、１，３－ビス（３－アミノプロピル）テトラメチルジシロキサン　４．９７ｇ（０．０２モル）、および、末端封止剤としてアニリン０．４７ｇ（０．００５モル）をＮＭＰ１３０ｇに溶解した。ここに２，２－ビス｛４－（３，４－ジカルボキシフェノキシ）フェニル｝プロパン二無水物　２６．０２ｇ（０．０５モル）をＮＭＰ２０ｇとともに加えて、２５℃で１時間反応させ、次いで５０℃で４時間撹拌した。その後、１８０℃で５時間撹拌した。撹拌終了後、溶液を水３Ｌに投入し、ろ過して沈殿を回収し、水で３回洗浄した後、真空乾燥機を用いて８０℃２０時間乾燥した。得られたポリマー固体の赤外吸収スペクトルを測定したところ、１７８０ｃｍ－１付近、１３７７ｃｍ－１付近にポリイミドに起因するイミド構造の吸収ピークが検出された。また、得られたポリイミドの重量平均分子量は１８０００であった。
　その他に、各実施例および比較例で用いた（Ａ）～（Ｆ）成分は、以下のとおりである。
（Ａ）成分
１２５６（商品名、フェノキシ樹脂、重量平均分子量５００００、三菱化学（株）製）
４２５０（商品名、フェノキシ樹脂、重量平均分子量６００００、三菱化学（株）製）
（Ｂ）成分
ＹＬ－９８０（商品名、液状エポキシ化合物、重量平均分子量３７０、三菱化学（株）製）
Ｎ－８６５（商品名、固形状エポキシ化合物、重量平均分子量８５０、ＤＩＣ（株）製）
１０３２Ｈ６０（商品名、固形状エポキシ化合物、重量平均分子量５２５、三菱化学（株）製）
（Ｃ）成分
ＫＲ－１２０（商品名、酸変性ロジン１００％、荒川化学工業（株）製）
（Ｄ）成分
Ｓｃｉｑａｓ０．１５μｍフェニルシラン処理（商品名、シリカ、平均粒子径１５０ｎｍ、フェニルシランカップリング表面処理、すなわちフェニル基を有するアルコキシシランを表面に有する、堺化学工業（株）製）
ＹＡ０５０Ｃ（商品名、シリカ、平均粒子径５０ｎｍ、フェニルシランカップリング表面処理、すなわちフェニル基を有するアルコキシシランを表面に有する、（株）アドマテックス製）
（Ｅ）成分
２ＭＡＯＫ－ＰＷ（商品名、イミダゾール系硬化促進剤粒子、四国化成工業（株）製）
（Ｆ）その他
アジピン酸（フラックス）
Ｓｃｉｑａｓ０．１５μｍ（商品名、シリカ、平均粒子径１５０ｎｍ、未表面処理、堺化学工業（株）製）
　実施例１～９および比較例１～３
　（１）接着剤組成物フィルムの作製方法
　表１に示される（Ａ）～（Ｆ）成分を表１に記載の組成比で混合して、接着剤組成物ワニスを作製した。有機溶剤として、シクロヘキサノンを使用し、溶媒以外の添加物を固形分として、固形分濃度が５３％である接着剤組成物ワニスとした。作製した接着剤組成物ワニスを、スリットダイコーター（塗工機）を用いて、剥離性基材である厚さ３８μｍのポリエチレンテレフタレートフィルムの表面処理面に塗布し、１００℃で１０分間乾燥を行った。これにより得られた乾燥後の厚みが３０μｍの接着剤フィルム上にダイシングテープ（Ｔ１９０２－９０、ポリオレフィン基材、古河電気工業（株）製）の粘着面を貼り合わせ、基材フィルムと保護フィルムに挟まれた構造の接着剤組成物フィルムを得た。この際、ダイシングテープが基材フィルム、ポリエチレンテレフタレートフィルムが保護フィルムとして機能する。得られた接着剤組成物フィルムを用いて、前記のようにアライメントマークの認識、ボイドの評価、接合部のハンダ濡れ性評価を実施した。結果を表１に示す。
Figure JPOXMLDOC01-appb-T000001
　本発明の接着剤組成物は、パソコン、携帯端末に使用される電子部品もしくは放熱板とプリント基板もしくはフレキシブル基板との接着、および基板同士の接着に用いられる接着剤として利用できる。さらにＩＣ、ＬＳＩ等半導体チップをフレキシブル基板、ガラスエポキシ基板、ガラス基板、セラミックス基板などの回路基板に接着あるいは直接電気的接合する際に用いられる半導体用接着剤として好適に利用可能である。
１００：銅ピラーバンプ
１０１：ハンダ
１０２：銅配線
１０３：接着剤組成物

Claims (8)

  1. （Ａ）高分子化合物、（Ｂ）重量平均分子量が１００以上３，０００以下であるエポキシ化合物、（Ｃ）フラックスおよび（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子を含有する接着剤組成物であって、（Ｃ）フラックスが酸変性ロジンを含有することを特徴とする接着剤組成物。
  2. 前記（Ａ）高分子化合物が、重量平均分子量１０，０００以上１００，０００以下のフェノキシ樹脂である請求項１に記載の接着剤組成物。
  3. 前記（Ｃ）フラックスにおける酸変性ロジンの含有量が５０質量％以上１００質量％以下である請求項１または２に記載の接着剤組成物。
  4. 前記（Ｃ）フラックスにおける酸変性ロジンの含有量が、前記（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子１００質量部に対し５～３５質量部である請求項１～３のいずれかに記載の接着剤組成物。
  5. 更に（Ｅ）硬化促進剤を含有する請求項１～４のいずれかに記載の接着剤組成物。
  6. 前記（Ｄ）フェニル基を有するアルコキシシランを表面に有する平均粒子径が３０～２００ｎｍである無機粒子の含有量が、接着剤組成物の全量に対して４５～７０質量％である請求項１～５のいずれかに記載の接着剤組成物。
  7. 請求項１～６のいずれかに記載の接着剤組成物の硬化物を含む半導体装置。
  8. 第一の回路部材と第二の回路部材の間に請求項１～６のいずれかに記載の接着剤組成物を介在させ、前記第一の回路部材と前記第二の回路部材を電気的に接続する半導体装置の製造方法。
PCT/JP2015/083758 2014-12-08 2015-12-01 接着剤組成物、その硬化物を含む半導体装置およびそれを用いた半導体装置の製造方法 WO2016093114A1 (ja)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018145346A (ja) * 2017-03-08 2018-09-20 リンテック株式会社 回路部材接続用シートおよび半導体装置の製造方法

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI661022B (zh) * 2018-05-30 2019-06-01 律勝科技股份有限公司 接著劑組成物及其接著劑與硬化物
JP2020150202A (ja) * 2019-03-15 2020-09-17 キオクシア株式会社 半導体装置の製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012190924A (ja) * 2011-03-09 2012-10-04 Sekisui Chem Co Ltd フリップチップ実装用接着剤、フリップチップ実装用接着フィルム及び半導体チップの実装方法
JP2014107321A (ja) * 2012-11-26 2014-06-09 Toray Ind Inc 接着層付き基板の製造方法および半導体装置の製造方法
WO2014103637A1 (ja) * 2012-12-27 2014-07-03 東レ株式会社 接着剤、接着フィルム、半導体装置およびその製造方法
JP2014140006A (ja) * 2012-12-18 2014-07-31 Sekisui Chem Co Ltd 半導体パッケージ

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG177608A1 (en) * 2009-07-10 2012-02-28 Toray Industries Adhesive composition, adhesive sheet, circuit board and semiconductor device both produced using these, and processes for producing these
JP5123341B2 (ja) * 2010-03-15 2013-01-23 信越化学工業株式会社 接着剤組成物、半導体ウエハ保護膜形成用シート
SG190423A1 (en) * 2010-12-01 2013-06-28 Toray Industries Adhesive composition, adhesive sheet, and semiconductor device using the adhesive composition or the adhesive sheet
JP6047888B2 (ja) 2012-02-24 2016-12-21 日立化成株式会社 半導体用接着剤及び半導体装置の製造方法
JP6657104B2 (ja) * 2014-10-10 2020-03-04 ナミックス株式会社 熱硬化性樹脂組成物及びその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012190924A (ja) * 2011-03-09 2012-10-04 Sekisui Chem Co Ltd フリップチップ実装用接着剤、フリップチップ実装用接着フィルム及び半導体チップの実装方法
JP2014107321A (ja) * 2012-11-26 2014-06-09 Toray Ind Inc 接着層付き基板の製造方法および半導体装置の製造方法
JP2014140006A (ja) * 2012-12-18 2014-07-31 Sekisui Chem Co Ltd 半導体パッケージ
WO2014103637A1 (ja) * 2012-12-27 2014-07-03 東レ株式会社 接着剤、接着フィルム、半導体装置およびその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018145346A (ja) * 2017-03-08 2018-09-20 リンテック株式会社 回路部材接続用シートおよび半導体装置の製造方法

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CN107001895B (zh) 2019-11-19
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