WO2016070668A1 - Procédé, dispositif et support de stockage informatique pour mettre en œuvre une conversion de format de données - Google Patents

Procédé, dispositif et support de stockage informatique pour mettre en œuvre une conversion de format de données Download PDF

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Publication number
WO2016070668A1
WO2016070668A1 PCT/CN2015/087549 CN2015087549W WO2016070668A1 WO 2016070668 A1 WO2016070668 A1 WO 2016070668A1 CN 2015087549 W CN2015087549 W CN 2015087549W WO 2016070668 A1 WO2016070668 A1 WO 2016070668A1
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data
beat
indication signal
spliced
switching position
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PCT/CN2015/087549
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English (en)
Chinese (zh)
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刘飞
陈亚亮
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中兴通讯股份有限公司
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems

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  • the invention relates to a data format transmission technology based on an inter-chip high-speed data transmission protocol, in particular to a method, a device and a computer storage medium for realizing data format conversion.
  • Interlaken is an inter-chip high-speed data transmission protocol that enables high-bandwidth and high-reliability packet transmission.
  • segment format data is proposed.
  • each beat data is divided into several slices, each slice having an independent valid indication signal, an invalid byte indication signal, and a channel indication signal, and each slice may be an Ethernet header or a packet. tail.
  • each beat data has only one valid indication signal, one invalid byte indication signal, one channel indication signal, and one Ethernet header or trailer end indication signal.
  • non-segment format data is more convenient for data processing and transmission, but there is currently no related art related to conversion from segment format data to non-segment format data.
  • Embodiments of the present invention are desirable to provide a method, apparatus, and computer storage medium for implementing data format conversion, which can implement conversion from segmented format data to non-segmented format data.
  • An embodiment of the present invention provides a method for implementing data format conversion, where the method includes:
  • the beat data including the plurality of channels exists in the input data after the invalid byte is removed
  • the beat data is spliced, and the stitched data is obtained and output.
  • the segment format data is written into the buffer, including:
  • an indication signal and channel data for each slice in each beat segment format data is written to the buffer.
  • the stitching processing is performed on the beat data, including:
  • the corresponding data after the channel switching position is temporarily stored, and the corresponding data before the channel switching position and the corresponding data after the temporarily switched channel switching position are once spliced to obtain the spliced data.
  • the method further includes: when determining that the outputted spliced data includes a packet tail indication signal, according to the size relationship between the number of bytes after the end of the packet indication signal and the non-segmented format data width The byte after the end of the packet indication signal in the output spliced data is temporarily stored.
  • the method further includes converting the multi-path non-segment format data into one non-segment format data when it is determined that the outputted spliced data has several groups satisfying the non-segment format data.
  • An embodiment of the present invention further provides a computer storage medium, where the computer storage medium is stored
  • the computer executable instructions are used to execute the method for implementing data format conversion according to the embodiment of the present invention.
  • An embodiment of the present invention further provides an apparatus for implementing data format conversion, where the apparatus includes a write data module, a read data module, a removal module, and a splicing processing module;
  • the write data module is configured to write the segment format data into the buffer
  • the read data module is configured to perform a polling read operation on the buffer to obtain input data
  • the removing module is configured to remove invalid bytes in the input data, and obtain input data after removing invalid bytes;
  • the splicing processing module is configured to perform splicing processing on the beat data when the tempo data containing the plurality of channels exists in the input data after the invalid byte is removed, and obtain and output the spliced data.
  • the write data module includes a write control unit and a write data unit;
  • the write control unit is configured to perform a write control operation of the buffer by using a valid indication signal of the first slice in each beat segment format data;
  • the write data unit is configured to, in response to the write control operation, write an indication signal and channel data for each slice in each beat segment format data to a buffer.
  • the splicing processing module includes a determining unit, a data splitting unit, and a splicing processing unit;
  • the determining unit is configured to determine a channel switching position when there is beat data including a plurality of channels in the input data after determining the removal of the invalid byte;
  • the data splitting unit is configured to divide the beat data into corresponding data before the channel switching position and corresponding data after the channel switching position according to the channel switching position;
  • the splicing processing unit is configured to temporarily store corresponding data after the channel switching position, corresponding data before the channel switching position and corresponding data after the temporarily switched previous channel switching position Perform a splicing to obtain the spliced data.
  • the device further includes a tail processing module
  • the packet tail processing module is configured to: when it is determined that the outputted spliced data includes a tail end indication signal, outputting according to the size relationship between the number of bytes of the packet end indication signal and the non-segment format data bit width In the spliced data, the bytes following the end of the packet indication signal are temporarily stored.
  • the device further includes a conversion module; wherein
  • the conversion module is configured to convert the multi-path non-segment format data into one non-segment format data when it is determined that the outputted spliced data has several sets of data satisfying the non-segment format.
  • the method and device for implementing data format conversion and the computer storage medium write segment data into a buffer, perform a polling read operation on the buffer, obtain input data, and remove the input data.
  • the invalid byte the input data after the invalid byte is removed, and when it is determined that the data of the plurality of channels is included in the input data after the invalid byte is removed, the beat data is spliced to obtain Output the stitched data.
  • the conversion from segmented format data to non-segmented format data can be realized, thereby improving the transmission efficiency of the Interlaken interface.
  • FIG. 2 is a schematic flowchart of writing segment format data into a buffer according to an embodiment of the present invention
  • FIG. 3 is a schematic flowchart of splicing processing data according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram showing an example of splicing processing data according to an embodiment of the present invention.
  • FIG. 5 is a schematic flowchart 2 of a method for implementing data format conversion according to an embodiment of the present invention
  • FIG. 6 is a schematic diagram showing an example of temporary storage of bytes after the end-of-package indication signal in the outputted spliced data according to an embodiment of the present invention
  • FIG. 7 is a schematic flowchart 3 of a method for implementing data format conversion according to an embodiment of the present invention.
  • FIG. 8 is a schematic flowchart of converting multi-channel non-segment format data into one non-segment format data according to an embodiment of the present invention
  • FIG. 9 is a schematic flowchart diagram of a method for implementing data format conversion according to an application example of the present invention.
  • FIG. 10 is a schematic structural diagram 1 of a device for implementing data format conversion according to an embodiment of the present invention
  • FIG. 11 is a schematic structural diagram of a structure of a write data module in an apparatus for implementing data format conversion according to an embodiment of the present invention
  • FIG. 12 is a schematic structural diagram of a structure of the splicing processing module in an apparatus for implementing data format conversion according to an embodiment of the present invention
  • FIG. 13 is a schematic structural diagram 2 of a device for implementing data format conversion according to an embodiment of the present invention.
  • FIG. 14 is a schematic structural diagram 3 of a device for implementing data format conversion according to an embodiment of the present invention.
  • the segment format data is written into the buffer, the buffer is subjected to a polling read operation, the input data is obtained, the invalid bytes in the input data are removed, and the invalid bytes are removed.
  • Input data when it is determined that there is a plurality of channels of beat data in the input data after the invalid bytes are removed, the stitched data is stitched, and the stitched data is obtained and output.
  • FIG. 1 is a schematic flowchart 1 of a method for implementing data format conversion according to an embodiment of the present invention. As shown in FIG. 1 , a method for implementing data format conversion according to an embodiment of the present invention includes:
  • Step S101 Writing segment format data into the buffer
  • the buffer may be a first input first output (FIFO) or other readable and writable memory.
  • FIFO first input first output
  • the writing of the segment format data to the buffer includes:
  • Step S101a performing a write control operation of the buffer by using a valid indication signal of the first slice in each beat segment format data
  • Step S101b In response to the write control operation, the indication signal and the channel data of each slice in each beat segment format data are written into the buffer.
  • the indication signal of each slice includes a valid indication signal, a channel indication signal, a packet header or a trailer end indication signal, and an invalid byte indication signal.
  • Step S102 Perform a polling read operation on the buffer to obtain input data.
  • the number of polling read buffers per time is related to the non-segment format data bit width.
  • the Interlaken interface is a transmission unit of 64 bits
  • the product of the number of FIFO data buffers and the 64 bits per polling is equal to the data width of the non-segment format format.
  • non-segment format data bit width may be preset according to data transmission performance requirements in an actual application.
  • Step S103 removing invalid bytes in the input data, and obtaining input data after removing invalid bytes
  • the partial invalid data is removed according to the valid indication signal in the input data
  • the invalid byte in the input data is removed according to the invalid byte indication signal in the input data.
  • Step S104 When it is determined that the beat data containing the plurality of channels exists in the input data after the invalid byte is removed, the beat data is spliced, and the stitched data is obtained and output.
  • the spliced data may be output to a register through step S104; the register may be a random access memory (RAM).
  • the register may be a random access memory (RAM).
  • the stitching processing is performed on the beat data, including:
  • Step S104a determining that the channel switching position is determined when there is beat data including a plurality of channels in the input data after the invalid byte is removed;
  • the beat data is traversed, and the channel switching position in the beat data is determined by finding a channel switching identifier.
  • Step S104b dividing the beat data into corresponding data before the channel switching position and corresponding data after the channel switching position according to the channel switching position;
  • Step S104c temporarily storing the corresponding data after the channel switching position, and splicing the corresponding data before the channel switching position with the corresponding data after the temporarily switched channel switching position to obtain the spliced data.
  • FIG. 4 An example effect of splicing the beat data containing a plurality of channels as shown in the embodiment of the present invention is shown in FIG. 4 .
  • the method for implementing data format conversion according to the embodiment of the present invention can implement conversion from segment format data to non-segment format data, thereby improving the transmission efficiency of the Interlaken interface.
  • the embodiment of the invention further provides a computer storage medium, wherein the computer storage medium stores computer executable instructions, and the computer executable instructions are used to execute the method for implementing data format conversion according to the embodiment of the invention.
  • FIG. 5 is a schematic flowchart 2 of a method for implementing data format conversion according to an embodiment of the present invention. As shown in FIG. 5, a method for implementing data format conversion according to an embodiment of the present invention includes:
  • Step S101 Writing segment format data into the buffer
  • Step S102 Perform a polling read operation on the buffer to obtain input data.
  • Step S103 removing invalid bytes in the input data, and obtaining input data after removing invalid bytes
  • Step S104 When it is determined that the data of the plurality of channels is included in the input data after the invalid byte is removed, the stitching data is spliced, and the number of the stitched processing is obtained and outputted. according to;
  • Steps S101 to S104 in the second embodiment of the present invention can be referred to the steps S101 to S104 in the first embodiment, respectively.
  • Step S201 When it is determined that the outputted spliced data includes a tail-of-package indication signal, the outputted spliced data is output according to the size relationship between the number of bytes after the end-of-package indication signal and the non-segmented format data width. The byte following the end of the indication signal is temporarily stored.
  • the byte after the end of the packet indication signal in the outputted spliced data is temporarily stored, including:
  • the byte after the end of the packet indication signal in the outputted spliced data is temporarily stored, and the outputted spliced processing is performed.
  • the channel data before the end of the packet indication signal and the channel indication signal and the packet header indication signal are output to the next stage register;
  • FIG. 6(a) an example effect diagram of temporarily storing bytes after the end-of-package indication signal in the outputted spliced data according to the embodiment of the present invention is shown in FIG. 6(a).
  • FIG. 6(b) an example effect diagram of temporarily storing bytes after the end-of-package indication signal in the outputted spliced data according to the embodiment of the present invention is as shown in FIG. 6(b).
  • the number of bytes immediately following the end-of-package indication signal in the outputted spliced data is the number of non-segmented format data bits.
  • the channel data before the end of the byte and the end of the indication signal is output to the next stage register together with the channel indication signal and the header indication signal, and the remaining bytes in the outputted spliced data are temporarily stored.
  • the end-of-package indication letter in the data after the splicing process is output
  • An example effect diagram of the byte after the number is temporarily stored as shown in Figure 6(c).
  • the embodiment of the invention further provides a computer storage medium, wherein the computer storage medium stores computer executable instructions, and the computer executable instructions are used to execute the method for implementing data format conversion according to the embodiment of the invention.
  • FIG. 7 is a schematic flowchart 3 of a method for implementing data format conversion according to an embodiment of the present invention. As shown in FIG. 7 , a method for implementing data format conversion according to an embodiment of the present invention includes:
  • Step S101 Writing segment format data into the buffer
  • Step S102 Perform a polling read operation on the buffer to obtain input data.
  • Step S103 removing invalid bytes in the input data, and obtaining input data after removing invalid bytes
  • Step S104 When it is determined that there is a beat data containing a plurality of channels in the input data after the invalid byte is removed, the shot data is spliced, and the stitched data is obtained and outputted;
  • Steps S101 to S104 in the third embodiment of the present invention can be referred to the steps S101 to S104 in the first embodiment, respectively.
  • Step S301 When it is determined that the outputted spliced data has several groups satisfying the non-segment format data, the multiplex non-segment format data is converted into one non-segment format data.
  • the splicing processed data bit width obtained by splicing the corresponding data before the channel switching position and the corresponding data of the previously recorded previous channel switching position in step S104 may be larger than the non-segment format
  • the data bit width is wide, and at the same time, the obtained spliced data may have a tail end indication signal, so that the output spliced data may appear in a plurality of sets of data satisfying the non-segment format data. Therefore, when it is determined that the outputted spliced data has several sets of data satisfying the non-segment format format, the multiplex non-segment format data is converted into one non-segment format data.
  • converting the multi-channel non-segment format data into one non-segment format data includes:
  • Step S301a Calculate a maximum number N of sets of data satisfying the non-segment format data according to the output data bit width and the non-segment format data bit width; wherein N is a positive integer greater than 1.
  • Step S301b determining a register at the time of reading, such as a random storage register, the bit width is N non-segment format data bit width;
  • Step S301c The number of groups satisfying the non-segment format data bit width is counted by a counter to control the read operation of the spliced data outputted to the register, thereby converting the multi-channel non-segment format data into one way.
  • the purpose of the segment format data is counted by a counter to control the read operation of the spliced data outputted to the register, thereby converting the multi-channel non-segment format data into one way. The purpose of the segment format data.
  • the embodiment of the invention further provides a computer storage medium, wherein the computer storage medium stores computer executable instructions, and the computer executable instructions are used to execute the method for implementing data format conversion according to the embodiment of the invention.
  • FIG. 9 is a schematic flowchart of a method for implementing data format conversion according to an application example of the present invention.
  • the data width of the segment format is 4 ⁇ 128 bits
  • the data width of the non-segment format is 320 bits
  • the segment format is pre-defined.
  • the data is divided into four slices as an example to illustrate the whole process of the method for implementing data format conversion in the embodiment of the present invention.
  • the method for implementing data format conversion in the embodiment of the present invention includes:
  • Steps S401 to S402 writing the segment format data into the FIFO data buffer FIFO, performing a polling read operation on the FIFO data buffer, and obtaining input data;
  • 8 blocks of FIFO are used for data buffering, and slices 0-3 correspond to FIFO#0-7, respectively.
  • An 8-block FIFO write enable signal is generated based on the valid indication signal of the 0th slice in the segment format data.
  • FIFO#0 reaches the waterline, the FIFO read signal is initiated, and each time the polling reads 5 FIFOs.
  • the polling read rule is: 1st beat FIFO #0-FIFO#4, 2nd beat FIFO FIFO#5-FIFO#1, 3rd beat FIFO#2-FIFO#6, 4th beat Read FIFO#7-FIFO#3, 5th beat FIFO FIFO#4-FIFO#0, 6th beat FIFO#1-FIFO#5, 7th beat FIFO#6-FIFO#2, 8th read FIFO#3-FIFO7, ninth beat FIFO#0-FIFO#4..., one read cycle every 8 beats.
  • Step S403 Removing invalid bytes in the input data, and obtaining input data after removing invalid bytes
  • part of the invalid data is removed according to the valid indication signal in the input data, and then it is determined whether the invalid byte indication signal is greater than or equal to 64 bits, and if the condition is met, the wireless byte indicates an invalid byte corresponding to the signal.
  • Step S404 When it is determined that the data of the plurality of channels is included in the input data after the invalid byte is removed, the stitching data is spliced, and the stitched data is obtained and outputted;
  • the channel switching position is determined. If the first group of the five sets of FIFO data read by the first beat belongs to the channel A, The second group belongs to channel B, the channel A data is output, and the channel B data is temporarily stored; if the second group reads 5 groups of FIFO data, the first 1-3 belongs to channel B, and the fourth to fifth belongs to channel C, Then, the first beat channel B temporary storage data and the second beat channel B data need to be spliced and outputted (the output also includes the valid indication signal, the channel indication signal, the packet header or the package tail indication signal, and the output valid data group number), channel C. Data temporary storage.
  • Up to 4 sets of data are temporarily stored for each 1st shot, that is, 4x64bit.
  • there are up to 5 sets of valid data that is, up to 9 sets of data are output after splicing, that is, 9x64bit.
  • the channel number is The address reads the last stitched temporary data from the dual-port random access register, and splicing according to the number of input data sets and the number of temporary data sets.
  • the number of temporary data sets is 0-4. At this time, it is impossible to include the end of the indication signal, and the number of input data sets is 1-9.
  • the number of input data sets When the number of input data sets is 9, there may be no end-of-package indication signal, and there may be an end-of-package indication signal corresponding to the 4th or 9th group number; when the number of input data sets is 8, there may be no end-of-package indication signal There may also be a tail and tail indication signal corresponding to the 3rd or 8th group number; when the number of input data sets is 7, there may be no tail and tail indication signal, or there may be a tail and tail indication signal, and corresponding to the 2nd or 7th group When the number of input data sets is 6, there may be no end-of-package indication signal, and there may be a tail-end indication signal corresponding to the first or sixth group number; when the number of input data sets is 5, there may be no end-of-package The indication signal may also have an end-of-package indication signal corresponding to the fifth group number; when the number of input data groups is 4, there may be no end-of-package indication signal, and there may be a tail
  • the end of the packet indication signal corresponds to the second group number
  • the number of invalid bytes in the 64-bit data is 3
  • the number of temporary data sets is 4
  • the result of the splicing is temporary storage of 4 sets of data + input 1 Group data, input the second group number; input the 3-7 group data, input the 8-9 group number needs to be temporarily stored, and write the double port random access register with the channel number as the address.
  • Step S405 When it is determined that the output data after the splicing process includes the end-of-package indication signal, the outputted spliced data according to the size relationship between the number of bytes after the end-of-package indication signal and the non-segmented format data bit width The byte after the end of the indication signal is temporarily stored;
  • step S404 It can be determined in step S404 that the number of possible output data groups is 1 to 9, and the position of the end-of-package indication signal may be located in any group, and all cases need to be enumerated for processing.
  • Separate Generate the temporary storage byte, the corresponding channel indication signal number, and the packet header indication signal in each case, filter according to the number of input data groups, and write the dual-port random access register with the channel number as the address, and simultaneously write the corresponding data.
  • the channel number, the header/packet end indication signal, and the remaining bytes are temporarily stored.
  • the no-end indication signal or the end-of-pack indication signal corresponds to the 4th or 9th group number, and is directly output to the next-level register; if the end-of-package indication signal corresponds to the 3rd or 8th group number, temporary storage The number of the 9th group; if the end of the packet indication signal corresponds to the 2nd or 7th group number, temporarily store the 8-9th group number; if the end of the packet indication signal corresponds to the 1st or 6th group number, temporarily store the 7th to 9th group number If the end of the packet indication signal corresponds to the fifth group number, the number of groups 6-9 is temporarily stored.
  • Step S406 When it is determined that the outputted spliced data has several groups satisfying the non-segment format data, the multiplex non-segment format data is converted into one non-segment format data.
  • the embodiment of the invention further provides a computer storage medium, wherein the computer storage medium stores computer executable instructions, and the computer executable instructions are used to execute the method for implementing data format conversion according to the embodiment of the invention.
  • FIG. 10 is a schematic structural diagram of a device for implementing data format conversion according to an embodiment of the present invention.
  • an apparatus for implementing data format conversion according to an embodiment of the present invention includes a write data module 51, a read data module 52, a removal module 53, and Splicing processing module 54; wherein
  • the write data module 51 is configured to write the segment format data into the buffer
  • the read data module 52 is configured to perform a polling read operation on the buffer to obtain an input. data
  • the removing module 53 is configured to remove invalid bytes in the input data, and obtain input data after removing invalid bytes;
  • the splicing processing module 54 is configured to perform splicing processing on the tempo data when the tempo data containing the plurality of channels exists in the input data after the invalid byte is removed, and obtain and output the spliced data.
  • the write data module 51 includes a write control unit 511 and a write data unit 512;
  • the write control unit 511 is configured to perform a write control operation of the buffer by using a valid indication signal of the first slice in each beat segment format data;
  • the write data unit 512 is configured to, in response to the write control operation, write an indication signal and channel data for each slice in each beat segment format data to the buffer.
  • the splicing processing module 54 includes a determining unit 541, a data splitting unit 542, and a splicing processing unit 543;
  • the determining unit 541 is configured to determine a channel switching position when there is beat data including a plurality of channels in the input data after determining the removal of the invalid byte;
  • the data splitting unit 542 is configured to divide the beat data into corresponding data before the channel switching position and corresponding data after the channel switching position according to the channel switching position;
  • the splicing processing unit 543 is configured to temporarily store the corresponding data after the channel switching position, and the corresponding data before the channel switching position and the corresponding data after the temporarily switched channel switching position are once spliced to obtain splicing processing. After the data.
  • the device further includes a tail processing module 55;
  • the packet tail processing module 55 is configured to, when determining that the output data after the splicing process includes the end-of-package indication signal, according to the size relationship between the number of bytes after the end-of-package indication signal and the non-segment format data bit width The byte after the end of the packet indication signal in the output spliced data is temporarily suspended. Save.
  • the device further includes a conversion module 56;
  • the conversion module 56 is configured to convert the multi-path non-segment format data into one non-segment format data when it is determined that the outputted spliced data has several sets of data satisfying the non-segment format.
  • each module and each module thereof can be implemented by a central processing unit (CPU) and a microprocessor (Micro Processor Unit) in a device for implementing data format conversion according to an embodiment of the present invention.
  • CPU central processing unit
  • Microprocessor Micro Processor Unit
  • MPU Micro Processor Unit
  • DSP Digital Signal Processor
  • FPGA Field Programmable Gate Array
  • embodiments of the present invention can be provided as a method, system, or computer program product. Accordingly, the present invention can take the form of a hardware embodiment, a software embodiment, or a combination of software and hardware. Moreover, the invention can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) including computer usable program code.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

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Abstract

Des modes de réalisation de la présente invention concernent une méthode, un dispositif et un support de stockage informatique pour mettre en œuvre une conversion de format de données. Des données de format de segment sont écrites dans un cache, une opération de lecture d'interrogation est effectuée sur le cache pour produire des données d'entrée, tout octet invalide dans les données d'entrée est éliminé pour produire des données d'entrée à octets invalides éliminés, lorsqu'il est déterminé que des battements de données contenant de multiples canaux sont présents dans les données d'entrée à octets invalides éliminés, les battements de données sont concaténés, et les données concaténées sont acquises et fournies en sortie.
PCT/CN2015/087549 2014-11-07 2015-08-19 Procédé, dispositif et support de stockage informatique pour mettre en œuvre une conversion de format de données WO2016070668A1 (fr)

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CN114064532B (zh) * 2021-11-08 2022-06-17 深圳华云信息系统有限公司 一种数据处理方法、装置、电子设备及存储介质

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101729593A (zh) * 2008-11-03 2010-06-09 北大方正集团有限公司 一种上传和接收文件的方法、系统及装置
CN102281321A (zh) * 2011-04-25 2011-12-14 程旭 云存储分割与备份数据的方法及装置
US8407245B2 (en) * 2010-11-24 2013-03-26 Microsoft Corporation Efficient string pattern matching for large pattern sets
US8504846B2 (en) * 2007-05-25 2013-08-06 Samsung Electronics Co., Ltd. Method and apparatus for secure storing of private data on user devices in telecommunications networks

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7995759B1 (en) * 2006-09-28 2011-08-09 Netapp, Inc. System and method for parallel compression of a single data stream
CN101931833A (zh) * 2009-06-25 2010-12-29 中兴通讯股份有限公司 实现光通道数据单元解映射的装置及方法
CN102387177B (zh) * 2010-09-01 2015-05-06 腾讯科技(深圳)有限公司 影音文件的下载方法及装置
CN102508631B (zh) * 2011-09-26 2014-07-30 福建星网锐捷网络有限公司 用于写入任意字节数据的fifo的写入数据处理装置
CN103780506B (zh) * 2012-10-26 2017-08-08 中兴通讯股份有限公司 一种用于以太网设备的数据缓存系统及方法
CN103179214B (zh) * 2013-04-10 2016-01-13 网宿科技股份有限公司 基于http协议的直播流推流方法和系统

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8504846B2 (en) * 2007-05-25 2013-08-06 Samsung Electronics Co., Ltd. Method and apparatus for secure storing of private data on user devices in telecommunications networks
CN101729593A (zh) * 2008-11-03 2010-06-09 北大方正集团有限公司 一种上传和接收文件的方法、系统及装置
US8407245B2 (en) * 2010-11-24 2013-03-26 Microsoft Corporation Efficient string pattern matching for large pattern sets
CN102281321A (zh) * 2011-04-25 2011-12-14 程旭 云存储分割与备份数据的方法及装置

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