WO2016063860A1

WO2016063860A1 - Board processing method, computer storage medium, and board processing system

Info

Publication number: WO2016063860A1
Application number: PCT/JP2015/079538
Authority: WO
Inventors: 誠司永原; 豪介白石; 寺下　裕一; 勝友野
Original assignee: 東京エレクトロン株式会社
Priority date: 2014-10-23
Filing date: 2015-10-20
Publication date: 2016-04-28
Also published as: JP2016086042A; TW201626437A

Abstract

A board processing method for processing a board on which a resist film has been formed comprises: an exposure step in which an electron beam is used to perform a pattern exposure of the resist film on the board; a post-exposure step in which a UV light is used to perform a post-exposure of the resist film on the board after performance of the pattern exposure; a PEB processing step in which a PEB processing is performed for the board after the post-exposure; and a development processing step in which the resist film as subjected to the PEB processing is developed, thereby forming a resist pattern on the board. If a cycle time from the end of the exposure step to the start of the PEB processing step deviates from a predetermined time, the exposure amount in the post-exposure step is corrected in accordance with the deviation of the cycle time.

Description

Substrate processing method, computer storage medium, and substrate processing system

(Cross-reference of related applications)
This application claims priority based on Japanese Patent Application No. 2014-216612 for which it applied to Japan on October 23, 2014, and uses the content here.

The present invention relates to a substrate processing method, a computer storage medium, and a substrate processing system.

In a photolithography process in a semiconductor device manufacturing process, for example, a resist film is formed as a photosensitive film on a substrate such as a semiconductor wafer (hereinafter referred to as a “wafer”), and then the resist film is subjected to an exposure process and a development process. Thus, a predetermined resist pattern is formed on the substrate. These series of processes are performed by a coating / development processing system, which is a substrate processing system equipped with various processing units for processing wafers and a transport mechanism for transporting wafers, and an exposure apparatus provided outside the coating / development processing system. Done.

By the way, in recent years, with further higher integration of semiconductor devices, miniaturization of resist patterns has been demanded. In order to realize a finer resist pattern, an exposure process using a KrF excimer laser or an ArF excimer laser has already been put into practical use.

With regard to such exposure processing, recently, exposure processing using EUV (Extreme Ultraviolet) light and EUV resist has been proposed in order to realize further pattern miniaturization (for example, Patent Document 1). reference).

Japanese Unexamined Patent Publication No. 2006-78744

By the way, since EUV light has a weaker energy than an ArF laser or the like, when EUV exposure is adopted, the exposure time becomes longer, resulting in a decrease in throughput. In order to improve the throughput, it is conceivable to install a plurality of exposure apparatuses using EUV light. However, since the exposure apparatus is very expensive, it is not preferable from the viewpoint of manufacturing cost.

Therefore, an electron beam exposure process has been proposed as an alternative exposure method for EUV resist. However, in the exposure process using an electron beam, since the electron beam is scanned on the wafer to draw a predetermined pattern, the exposure process still takes time. As a solution to this problem, it has been studied to provide a plurality of stages in the exposure apparatus and perform exposure processing on a plurality of wafers in parallel at each stage.

However, since wafers are usually transferred one by one between the coating and developing treatment system and the exposure apparatus, when a plurality of wafers are exposed simultaneously in the exposure apparatus, the exposure process is performed by the exposure processing apparatus. The tact time from when the process is completed to when the wafer is returned to the coating and developing treatment system may vary from wafer to wafer. On the other hand, the tact time until the wafer returned to the coating and developing system after the exposure process is subjected to the post-exposure baking process (hereinafter referred to as “PEB process”) is set uniformly among the wafers. Therefore, if the tact time is shifted in the exposure apparatus, the time from the exposure process to the PEB process is not constant, and as a result, there arises a problem that the line width of the resist pattern varies between wafers.

The present invention has been made in view of this point, and an object of the present invention is to make the line width of a resist pattern desired regardless of the time from the end of exposure processing to the start of PEB processing.

In order to achieve the above object, one aspect of the present invention is a substrate processing method for processing a substrate on which a resist film is formed, wherein an exposure step of exposing a pattern on the resist film on the substrate with an electron beam; A post-exposure step for performing post-exposure with UV light on the resist film on the substrate after the exposure of the pattern, a PEB treatment step for performing PEB treatment on the post-exposure substrate, and PEB treatment A development process step of developing a resist film on the substrate by developing a subsequent resist film, and when the tact time from the end of the exposure step to the start of the post-exposure step deviates from a predetermined time, The exposure amount in the post-exposure process is corrected according to the shift in tact time.

According to one embodiment of the present invention, after the pattern exposure is performed and before the PEB process, the resist film on the substrate is subjected to the post-exposure with the UV light. Energy can be input auxiliary by irradiation to decompose the acid generator in the resist film to generate an acid, or to promote the generation of a radical component. And, for example, when a plurality of wafers are subjected to exposure processing in parallel in the exposure apparatus, when it is assumed that the tact time from the end of the exposure process to the start of the PEB processing process deviates from a predetermined time, in other words, When the time from the end of the exposure process to the start of the post-exposure process deviates from a predetermined time, post-exposure is performed with an exposure amount corrected according to the deviation in the tact time, so that the amount of acid generated in the resist film and radicals The amount of components generated can be adjusted as appropriate. Therefore, even if the time from the end of the exposure process to the start of the post-exposure process deviates from a predetermined time, the tact time is the same as the predetermined time at the time when the PEB treatment process is started. It can be in the same state as the case. As a result, the line width of the resist pattern can be made desired regardless of the time from the end of the exposure process to the start of the PEB process.

According to another aspect, one aspect of the present invention is a readable program storing a program that operates on a computer of a control device that controls the substrate processing system so that the substrate processing method is executed by the substrate processing system. A computer storage medium.

According to still another aspect of the present invention, there is provided a substrate processing system for processing a substrate, a processing station provided with a plurality of processing apparatuses for performing PEB processing and development processing on the substrate, the substrate processing system, An exposure apparatus that is provided outside the substrate processing system and that exposes a pattern to the resist film on the substrate with an electron beam, an interface station that delivers the substrate to and from the exposure apparatus, and the exposure apparatus performs pattern exposure. A light irradiation device for performing post-exposure with UV light on the resist film on the substrate after the control, and a control device, the control device from the end of exposure in the exposure device to the PEB in the processing station If the tact time until the start of processing deviates from the specified time, post-exposure with the light irradiation device is performed according to the tact time deviation. It is configured to correct the exposure amount that.

According to the present invention, the line width of the resist pattern can be made desired regardless of the time from the end of the exposure process to the start of the PEB process.

1 is a plan view schematically showing an outline of a configuration of a coating and developing treatment system according to an embodiment. 1 is a front view schematically showing an outline of a configuration of a coating and developing treatment system according to an embodiment. 1 is a rear view schematically showing an outline of a configuration of a coating and developing treatment system according to an embodiment. FIG. It is the side view which showed the outline of the structure of the light irradiation apparatus typically. It is the top view which showed the outline of the structure of the light irradiation apparatus typically. It is a time chart from the exposure process of each wafer to PEB process. It is the top view which showed typically the outline of the structure of the light irradiation apparatus concerning other embodiment.

Hereinafter, embodiments of the present invention will be described. FIG. 1 is an explanatory view schematically showing an outline of a configuration of a coating and developing treatment system 1 as a substrate processing system according to the present embodiment. 2 and 3 are a front view and a rear view, respectively, schematically showing the outline of the internal configuration of the coating and developing treatment system 1.

As shown in FIG. 1, the coating and developing treatment system 1 includes a cassette station 10 in which a cassette C containing a plurality of wafers W is loaded and unloaded, and a processing station having a plurality of various processing devices for performing predetermined processing on the wafers W. 11, an interface station 12 provided adjacent to the processing station 11, a post-exposure station 13 for performing post-exposure on the wafer after pattern exposure, and an interface station 14 connected to the post-exposure station 13. ing. On the positive side in the Y direction of the interface station 14 of the coating and developing treatment system 1, an exposure device 15 that performs pattern exposure on the wafer W is provided adjacently. The interface station 14 delivers the wafer W to and from the exposure apparatus 15. The exposure apparatus 15 is provided with an exposure stage 15a that performs pattern exposure on a plurality of wafers W simultaneously by electron beams on the wafer W after resist formation. In the exposure apparatus 15 in the present embodiment, for example, four wafers W are simultaneously exposed.

The cassette station 10 is provided with a plurality of cassette mounting plates 21 on which a cassette C is placed and a wafer transfer device 23 that is movable on a transfer path 22 extending in the X direction. It has been. The wafer transfer device 23 is also movable in the vertical direction and the vertical axis (θ direction), and between the cassette C on each cassette mounting plate 21 and a transfer device of a transfer block G3 of the processing station 11 described later. Can transfer the wafer W.

The processing station 11 is provided with a plurality of, for example, four blocks G1, G2, G3, and G4 having various devices. For example, in the first block G1, as shown in FIG. 2, a plurality of liquid processing apparatuses, for example, a lower antireflection film that forms an antireflection film (hereinafter referred to as a “lower antireflection film”) below the resist film of the wafer W. Forming device 30, resist coating device 31 for applying a resist solution to wafer W to form a resist film, and upper antireflection film for forming an antireflection film (hereinafter referred to as "upper antireflection film") on the resist film of wafer W The film forming apparatus 32 and the development processing apparatus 33 for developing the wafer W are stacked in, for example, four stages from the bottom. For example, an EUV resist is used as the resist in the present embodiment.

Each of the devices 30 to 33 in the first block G1 has a plurality of cups F, for example, four cups F, for accommodating the wafers W during processing, and can process the plurality of wafers W in parallel.

For example, in the second block G2, as shown in FIG. 3, a heat treatment apparatus 40 for performing heat treatment of the wafer W, an adhesion apparatus 41 as a hydrophobic treatment apparatus for hydrophobizing the wafer W, and an outer peripheral portion of the wafer W are exposed. Peripheral exposure devices 42 are arranged side by side in the vertical and horizontal directions. The heat treatment apparatus 40 includes a hot plate for placing and heating the wafer W and a cooling plate for placing and cooling the wafer W, and can perform both heat treatment and cooling treatment. In the heat treatment apparatus 40, various heat treatments such as a pre-bake process performed before exposure and a PEB process performed after exposure are performed.

The delivery block G3 is provided with a plurality of

delivery devices

50, 51, 52, 53, 54, 55, 56 in order from the bottom. The delivery block G4 is provided with a plurality of

delivery devices

60, 61, 62 in order from the bottom.

As shown in FIG. 1, a wafer transfer mechanism 70 is provided next to the delivery block G3 on the positive side in the Y direction. The wafer transfer mechanism 70 has a transfer arm that is movable in the Y direction, the θ direction, and the vertical direction, for example.

Wafer inspection devices

71 and 72 are provided on both the X direction positive side and the negative direction side of the wafer transfer mechanism 70 with the wafer transfer mechanism 70 interposed therebetween.

On the positive side in the Y direction of the wafer transfer mechanism 70,

wafer placement units

73 and 74 for temporarily storing a plurality of wafers W are provided. The wafer placement unit 73 is disposed closer to the second block G2, and the wafer placement unit 74 is disposed closer to the first block G1. Then, the wafer transfer mechanism 70 moves up and down while supporting the wafer W, and moves the wafer W between the transfer devices, the

wafer inspection devices

71 and 72, and the

wafer placement units

73 and 74 in the transfer block G3. Can be transported. Note that the wafer inspection apparatus 71 in this embodiment measures, for example, the line width and sidewall angle of a pattern formed on the wafer W. The wafer inspection device 72 measures, for example, an overlay error between an already formed pattern and a pattern exposed thereafter.

As shown in FIG. 1, a wafer transfer area D is formed in an area between the first block G1 and the second block G2. In the wafer transfer area D, a plurality of wafer transfer mechanisms 80 are arranged. The wafer transfer mechanism 80 has a transfer arm that is movable in the Y direction, the X direction, the θ direction, and the vertical direction, for example. The wafer transfer mechanism 80 moves within the wafer transfer area D, and includes a predetermined transfer device and wafer mounting unit 73 in the transfer block G4 in the interface block 12 and the surrounding first block G1, the second block G2, and the like. The wafer W can be transferred to 74.

As described above, the interface station 12 includes the transfer block G4 having the

transfer devices

60, 61 and 62, and the wafer transfer mechanism 90 capable of transferring the wafer W to and from the plurality of

transfer devices

60, 61 and 62. Is provided. The wafer transfer mechanism 90 has an arm that is movable in the X direction, the Y direction, the θ direction, and the vertical direction, for example.

The post-exposure station 13 is provided with a load lock chamber 100 configured to be evacuated inside at a position accessible by the wafer transfer mechanism 90 of the interface station 12. In the post exposure station 13, a wafer transfer mechanism 101 is provided at a position where the load lock chamber 100 can be accessed. Further, a light irradiation device 102 is provided at a position accessible by the wafer transport mechanism 101 as a device for performing post exposure by irradiating the wafer after pattern exposure with UV light.

For example, as shown in FIGS. 4 and 5, the light irradiation device 102 includes a mounting table 103 on which the wafer W is mounted, and a light irradiation unit that irradiates the wafer W on the mounting table 103 with UV light having a predetermined wavelength. 104. The light irradiation unit 104 in the present embodiment is configured as a so-called batch exposure type apparatus that performs batch exposure on the entire surface of the resist film R formed on the wafer W. The light irradiation unit 104 includes a plurality of straight tube-shaped light sources 105 that are longer than the diameter of the wafer W, for example. The light sources 105 are arranged side by side without a gap so as to cover the entire upper surface of the wafer W, for example. Each light source 105 emits UV light toward the wafer W. The wavelength of the UV light is, for example, 220 to 280 nm, and various wavelength bands, for example, 222 nm, 248 nm, or 254 nm are used according to the sensitivity of the resist to be used. Note that the light irradiation unit 104 may employ, for example, a linear light source and move or rotate at least one of the wafer W or the light source so that the UV light scans on the wafer W. As long as it can uniformly irradiate the entire upper surface of the wafer W with UV light, it is not limited to the contents of the present embodiment. Further, as the light irradiation unit 104, a light irradiation device configured to perform post-exposure by irradiating UV light one shot at a time in accordance with the pattern exposure shot size in the exposure device 15 may be adopted.

The post-exposure station 13 is configured to be airtight, and can be depressurized to a predetermined degree of depressurization, for example, 10 ⁻⁴ Pa to 10 ⁻⁷ Pa by a decompression device (not shown). As a result, during UV light irradiation or movement in the post-exposure station 13, it is possible to suppress the deactivation of acids and radicals due to amine components and oxygen contained in a trace amount in the air. Further, since the post-exposure station 13 is configured to be airtight, the post-exposure station 13 is maintained in a low-oxygen atmosphere by sealing a non-oxidizing gas such as nitrogen instead of reducing the pressure. Also good.

The interface station 14 connected to the post exposure station 13 is also airtight. In the interface station 14, a delivery device 110 having a mounting table or the like is provided at a position accessible by the wafer transfer mechanism 101 of the post exposure station 13. Next to the transfer device 110, a wafer transfer mechanism 112 for transferring the wafer W of the transfer device 110 to and from a load lock chamber 111 configured to be evacuated inside is provided.

The load lock chamber 111 of the interface station 14 is connected to an exposure apparatus 15 that performs pattern exposure. The load lock chamber 111 is configured to accommodate a plurality of, for example, four wafers W, and the four wafers W are collectively delivered between the interface station 14 and the exposure apparatus 15. Here, “collectively delivered” refers to delivering a plurality of wafers W in one exhaust operation by exhausting the interior with a plurality of wafers W accommodated in the load lock chamber 111. It does not matter whether or not a plurality of wafers W are actually delivered to and from each load lock chamber 111 simultaneously in parallel. In the present embodiment, the wafer transfer mechanism 112 transfers, for example, wafers W to and from the load lock chamber 111 one by one. Therefore, when the wafers W are “collectively transferred”, for example, four wafers Of the wafers W, the wafer W that is first delivered by the load lock chamber 111 and the wafer W that is delivered second and later have different transfer timings.

In addition, the load lock chamber 100 described above can store four wafers W in the same manner as the load lock chamber 111, and can transfer the four wafers W to and from the interface station 12 at once. In the present embodiment, an example will be described in which the wafers W that have been post-exposed by the light irradiation device 102 are sequentially transferred to the interface station 12 side through the load lock chamber one by one.

In the exposure stage 15a, pattern exposure is performed on the resist on the wafer W by, for example, an electron beam. In such an exposure process, if there are gas molecules in the atmosphere, they are absorbed by the gas molecules and the electron beam energy is attenuated. Therefore, the exposure device 15 has a predetermined degree of reduced pressure, for example, 10 ⁻⁴ by a decompression device (not shown). The pressure is reduced to Pa to 10 ⁻⁷ Pa.

The above coating and developing treatment system 1 is provided with a control device 300 as shown in FIG. The control device 300 controls the operation of drive systems such as the above-described various processing devices and wafer transport mechanisms based on the processing recipe, and also the takt time for wafer processing in the various processing devices and the takt time for wafer transport by the respective wafer transport mechanisms. Time is managed and information regarding exposure of the wafer W is exchanged with the exposure apparatus 15.

The control device 300 is configured by a computer including, for example, a CPU, a memory, and the like. For example, by executing a program stored in the memory, the coating processing in the coating and developing processing system 1 can be realized. Various programs for realizing the coating process in the coating and developing system 1 are, for example, a computer-readable hard disk (HD), a flexible disk (FD), a compact disk (CD), a magnetic optical desk (MO), and a memory card. Or the like installed in the control device 300 from the storage medium H is used.

Next, a wafer W processing method performed in the coating and developing treatment system 1 configured as described above will be described together with a wafer processing process performed in the coating and developing processing system 1 as a whole.

In processing the wafer W, first, a cassette C containing a plurality of wafers W is placed on a predetermined cassette placement plate 21 of the cassette station 10. Thereafter, the wafers W in the cassette C are sequentially taken out by the wafer transfer device 23 and transferred to the delivery block G3 of the processing station 11.

Next, the wafer W is transferred to, for example, the wafer placement unit 73 by the wafer transfer mechanism 70. Next, the wafer W is transferred to the heat treatment apparatus 40 of the second block G2 by the wafer transfer mechanism 80, and the temperature is adjusted. Thereafter, the wafer W is transferred by the wafer transfer mechanism 80 to, for example, the lower antireflection film forming apparatus 30 of the first block G1, and a lower antireflection film is formed on the wafer W. Thereafter, the wafer W is transferred to the heat treatment apparatus 40 of the second block G2, and heat treatment is performed.

Thereafter, the wafer W is transferred to the adhesion device 41 of the second block G2 and subjected to a hydrophobic treatment. Thereafter, the wafer W is transferred to the resist coating device 31 by the wafer transfer mechanism 80, and a resist film is formed on the wafer W. In this case, the resist film formed on the wafer W is a so-called photosensitized resist for EUV exposure. Thereafter, the wafer W is transferred to the heat treatment apparatus 40 and pre-baked.

Next, the wafer W is transferred to the upper antireflection film forming apparatus 32, and an upper antireflection film is formed on the wafer W. Thereafter, the wafer W is transferred to the heat treatment apparatus 40, heated, and the temperature is adjusted. Thereafter, the wafer W is transferred to the peripheral exposure device 42 and subjected to peripheral exposure processing.

Next, the wafer W is transferred to the delivery block G 4 and transferred to the load lock chamber 100 of the post exposure station 13 by the wafer transfer mechanism 90 of the interface station 12. At this time, for example, subsequent wafers W that have been subjected to the peripheral exposure processing in the same lot are sequentially loaded into the load lock chamber 100. For example, after the four wafers W are accommodated in the load lock chamber 100, the interface station 14. The degree of vacuum is the same as that of the post exposure station 13. Next, each wafer W is sequentially transferred to the load lock chamber 111 by the wafer transfer mechanism 101 and the wafer transfer mechanism 112 of the interface station 14, and after the four wafers W are accommodated in the load lock chamber 111, the wafer W is generally exposed. The degree of vacuum is the same as that of the device 15. Thereafter, each wafer W is transported to the exposure device 15, placed on the exposure stage 15a, and the pattern is exposed to the wafers W simultaneously by an electron beam (exposure process). At this time, information on the start time and end time of pattern exposure is exchanged with the control device 300.

The four wafers W on which the pattern exposure has been completed are transferred to the load lock chamber 111, and after that, the pressure is reduced to the same level as the interface station 14 and the post exposure station 13, and then transferred to the transfer device 110 by the wafer transfer mechanism 112. It is conveyed sequentially. Next, the wafer W transferred to the delivery device 110 is transferred to the light irradiation device 102 by the wafer transfer mechanism 101.

In the light irradiation device 102, the wafer W that has been exposed to the pattern by the electron beam in the exposure device 15 is collectively exposed to UV light having a predetermined wavelength (post-exposure step). As a result, a final resist pattern before the development processing is formed on the wafer W. At this time, in the light irradiation apparatus 102, for example, the wafer W first unloaded from the load lock chamber 111 and the wafer W unloaded second and later are subjected to post exposure with different exposure amounts. The exposure amount in this post exposure will be described.

In order to make the line width of the resist pattern between the wafers W constant, it is important to make the acid concentration generated in the resist film by exposure constant for each wafer W at the time of development processing. According to the inventors, it has been confirmed that in order to make the acid concentration generated in the resist film constant, the time from the pattern exposure in the exposure device 15 to the PEB treatment should be made constant. In the present embodiment, since post exposure is performed with UV light, in order to make the time from pattern exposure in the exposure apparatus 15 to PEB processing constant, the process from the pattern exposure in the exposure apparatus 15 to the post exposure is performed. The time and the time from post-exposure to PEB processing may be made constant. In this case, naturally, it is assumed that the pattern exposure conditions in the exposure apparatus 15, the post-exposure conditions in the light irradiation apparatus 102, and the PEB processing conditions in the heat treatment apparatus 40 are constant between the wafers. .

However, as in the present embodiment, for example, the exposure apparatus 15 performs pattern exposure on the plurality of wafers W simultaneously in parallel, and the plurality of wafers W are collectively brought into the interface station 14 via the load lock chamber 111. When it is transferred to the side, it is considered that the time from the end of pattern exposure to the start of PEB processing is not constant between the wafers W. This will be specifically described below.

When pattern exposure is performed simultaneously on a plurality of wafers W by the exposure apparatus 15, the pattern exposure end time of each wafer W becomes the same time, for example, as shown in FIG. In FIG. 6, for example, among the four wafers W in the same lot, the wafer W processed first in the processing station 11 is “wafer W1”, and the second wafer W processed in the processing station 11 is “ In the following, numbers are assigned in the order of processing as “Wafer W2”.

When the exposure processing of the wafers W1 to W4 is performed in parallel, the wafers W1 to W4 are delivered to the load lock chamber 111 at once. Next, as described above, for example, the wafer W <b> 1 is transferred from the load lock chamber 111 to the transfer device 110 by the wafer transfer mechanism 112 of the interface station 14. Thereafter, the wafer is transferred to the light irradiation device 102 by the wafer transfer mechanism 101, and post exposure is performed by the light irradiation device 102. In FIG. 6, the transfer process of the wafer W1 by the wafer transfer mechanism 112 is described as “transfer A”, and the transfer process of the wafer W1 by the wafer transfer mechanism 101 is described as “transfer B”.

Next, the post-exposure wafer W1 is transferred in the order of the wafer transfer mechanism 101, the load lock chamber 100, the wafer transfer mechanism 90, the transfer block G4, the wafer transfer mechanism 80, and the heat treatment apparatus 40, and the heat treatment apparatus 40 performs the PEB process. Done. In FIG. 6, the transfer process from the light irradiation apparatus 102 to the heat treatment apparatus 40 is described as “transfer C”.

Then, after the transfer A of the wafer W1 is completed, the transfer A for the wafer W2 is performed. While the wafer transfer mechanism 112 performs the transfer A for the wafer W1, the wafer W2 is changed to “D1” in FIG. The load lock chamber 111 is in a standby state for the indicated time. Then, in the wafer W2, the time (tact time) from the end of the exposure process to the start of the PEB process is increased as compared with the wafer W1 at least by the time D1. For the same reason, the tact time of the wafers W3 and W4 is increased by the time D2 and D3. In this case, the acid concentration in the resist film is different between the wafer W1 and the subsequent wafers W2 to W4, and the line width of the resist pattern formed after the development processing varies.

Therefore, the present inventors set the acid concentration in the resist film at the time of starting the development processing to be constant between the wafers W1 to W4, and in order to obtain a desired resist pattern line width, The idea was to correct the exposure amount of UV light during exposure (product of irradiation time and irradiation intensity). That is, the acid concentration in the resist film is changed by increasing / decreasing the exposure amount of the UV light at the post-exposure according to the amount of deviation of the tauto time from the end of the pattern exposure to the start of the PEB process, and the line width of the resist pattern Adjust it.

As for the tact time from the end of the post exposure to the start of the PEB processing, as described above, the wafer W after the post exposure is sequentially transferred to the processing station 12 side through the load lock chamber 100, so that each wafer W1 to Since it can be made constant between W4, there is no deviation in the wafers W1 to W4 accompanying the transfer C. Therefore, in the present embodiment, the amount of shift in tact time from the end of pattern exposure to the start of post exposure may be treated as the same amount of shift in tauto time from the end of pattern exposure to the start of PEB processing.

Then, in the light irradiation device 102, post exposure is performed on the wafer W1 with a predetermined exposure amount set in advance. Further, in the post-exposure on the wafer W2, based on the information obtained from the exposure apparatus 15 by the control device 300, a time D1, which is a shift amount of the tact time from the end of pattern exposure to the start of post-exposure, is calculated and corresponds to the time D1. Thus, the exposure amount is corrected. Then, post-exposure S is performed on the wafer W2 with the corrected exposure amount. At this time, when calculating the time D1, the time until the wafer W is delivered to the light irradiation apparatus 102, for example, is actually measured based on the exposure start and end time information from the exposure apparatus 15 by the control apparatus 300. Alternatively, for example, the transfer time from the load lock chamber 111 to the light irradiation device 102 may be calculated by reading from the transfer schedule. Thereby, before the post-exposure is started by the light irradiation device 102, it is detected that the tact time from the end of the pattern exposure to the start of the PEB processing is shifted. Correction can be performed.

Thereafter, the post-exposure T and the post-exposure U are sequentially performed on the wafers W3 and W4 with the exposure amounts corrected corresponding to the times D2 and D3, respectively. As for the exposure correction value, for example, a correlation between the time from the end of pattern exposure to the end of post-exposure and the amount of exposure to be corrected in order to obtain the desired resist pattern line width is obtained in advance by a test performed in advance. In addition, it is determined based on the correlation. The correction of the exposure amount is realized by changing at least one of the irradiation time and the irradiation intensity of the UV light. However, when the irradiation time is changed, from the start of post exposure to the start of PEB processing between the wafers W1 to W4. Therefore, it is preferable to correct only the irradiation intensity. Moreover, when correcting irradiation time, it is preferable to determine a correction value in consideration of change of irradiation time.

Thereafter, each of the wafers W1 to W4 after the post exposure is sequentially transferred to the heat treatment apparatus 40 by the wafer transfer mechanism 80 and sequentially subjected to PEB (PEB processing step). Thereafter, each of the wafers W1 to W4 is transferred to, for example, the development processing device 33 and developed, and a resist pattern is formed on the wafer W. At this time, since the exposure amount of each of the wafers W2 to W4 is corrected in the post-exposure by the light irradiation apparatus 102, in the wafers W2 to W4 in which the tom time from the end of pattern exposure to the start of PEB processing is shifted from the wafer W1 In addition, the line width of the resist pattern can be made desired.

After the development process is completed, the wafers W1 to W4 are transferred to the heat treatment apparatus 40 and subjected to a post-bake process. Thereafter, the wafers W1 to W4 are transferred to the

wafer inspection apparatuses

71 and 72 via the

wafer mounting portions

73 and 74, respectively. In the wafer inspection apparatus 71, for example, the line width of the final pattern is measured, and the measurement result is output to the control apparatus 300. Further, the overlay error is measured for the wafer W transferred to the wafer inspection device 72, and the measurement result is output to the control device 300. In the control device 300, for example, based on the measurement result in the wafer inspection device 71, the processing parameters in the exposure device 15, the light irradiation device 102, the heat treatment device 40, and the like are corrected as necessary. Thereafter, each of the wafers W1 to W4 is transferred to the cassette C of the predetermined cassette mounting plate 21, and a series of photolithography processes is completed.

According to the above embodiment, the post-exposure by UV light is performed on the resist film on the wafer W after the pattern exposure is performed by the exposure apparatus 15 and before the PEB processing by the heat treatment apparatus 40. After the pattern exposure, energy can be input auxiliary by irradiation with UV light to decompose the acid generator in the resist film to generate an acid or promote the generation of a radical component. When the time from the end of pattern exposure to the start of post exposure deviates from a predetermined time, for example, when a plurality of wafers W1 to W4 are exposed simultaneously in the exposure apparatus 15, in other words, the pattern exposure ends. When the tact time from the start of PEB processing deviates from a predetermined time, post-exposure is performed with an exposure amount corrected according to the deviation of the tact time, so that the amount of acid generated in the resist film, The amount of radical components generated can be adjusted as appropriate. Therefore, even when the time from the end of pattern exposure to the start of post-exposure deviates from a predetermined time, the tact time is the same as the predetermined time in the state of the resist film at the time of starting the PEB processing step. It can be in the same state as the case. As a result, the line width of the resist pattern can be made desired regardless of the time from the end of pattern exposure to the start of PEB processing.

Further, by feeding back the inspection result of the developed wafer W to the parameters of the exposure apparatus 15, the light irradiation apparatus 102, and the heat treatment apparatus 40, a fine resist pattern can be formed with higher accuracy.

From the viewpoint of keeping the acid concentration in the resist film constant between the wafers W1 to W4 at the time of the development processing, for example, by changing the time required for the conveyance C in the wafers W2 to W4, the PEB can be changed from the end of the pattern exposure. It is also possible to make the time until the start of processing constant. However, if the transfer schedule at the processing station 11 is changed, the control becomes very complicated. Also, for example, the number of wafers W that can be subjected to pattern exposure simultaneously and in parallel by the exposure apparatus 15 can be simultaneously PEB processed on the processing station 11 side. When the number of wafers is larger than the number of wafers, a waiting time also occurs in the transfer C, and the tact times of the wafers W1 to W4 cannot be finally adjusted. In addition, it is not preferable to extend the time for the conveyance C from the viewpoint of wafer processing throughput. In this regard, if the exposure amount in the post-exposure in the light irradiation apparatus 102 is corrected as in this embodiment, the other conditions such as the wafer W transfer schedule and the heating conditions in the PEB process are not changed. It is easy to make the acid concentration in the resist film constant between the wafers W1 to W4 at the time of development processing.

In the above embodiment, as one cause of the deviation of the tact time from the end of pattern exposure to the start of PEB processing, the batch delivery of the wafer W to and from the exposure apparatus 15 via the load lock chamber 111 has been described. The cause of the shift amount is not limited to the contents of the present embodiment. For example, in the load lock chamber 100 as well as in the load lock chamber 111, when the wafers W1 to W4 are collectively delivered, for example, due to the configuration of the coating and developing treatment system 1, it is difficult to match the tact times in the transfer C. In such a case, a resist pattern having a desired line width can be formed by correcting the exposure amount in post-exposure in consideration of the time from the end of pattern exposure to the start of PEB processing, regardless of the cause of the difference in tact time. Can do. Note that if there is a deviation in the tom time due to an event after the post-exposure, specifically if the time required for the transfer C of each of the wafers W1 to W4 does not match, the deviation in the tom time will be reduced at the start of PEB processing. Even if it detects, since the post-exposure has already been completed, the exposure amount in the post-exposure cannot be corrected. In such a case, for example, before performing the post-exposure, the time required for “carrying C” from the light irradiation device 102 to the heat treatment device 40 is read from the carrying schedule. It is preferable to determine.

In the above-described embodiment, the case where the light irradiation apparatus 102 performs batch post-exposure on the entire surface of the wafer W has been described. However, post-exposure is not necessarily performed collectively. As shown in FIG. 7, a plurality of light sources 120 shorter than the diameter of the wafer W are arranged in a straight line from the one end side of the wafer W toward the other end side of the wafer W over a length equal to or larger than the diameter of the wafer W. The light irradiation unit 121 may be configured. In such a case, for example, a moving mechanism 122 that moves the light irradiation unit 121 relative to the wafer W in a direction orthogonal to the length direction of the light irradiation unit 121 is provided. In the wafer inspection apparatus 71, for example, inspection is performed over the entire surface of the wafer W, but when it is desired to adjust the line width only for a predetermined region, the light irradiation unit 121 is configured to increase or decrease the exposure output for each light source 120. Thus, it is possible to further adjust the exposure amount only for a predetermined region. In FIG. 7, the moving mechanism 122 that moves the light irradiation unit 121 relative to the wafer W is illustrated, but the light irradiation unit 121 is fixed, for example, and is moved to the mounting table 103. The wafer W may be moved relative to the light irradiation unit 121.

Further, when using the light irradiation device 102 that performs post exposure one shot at a time corresponding to the pattern exposure shot size in the exposure device 15, for example, the control device 300 receives information on the exposure order of each shot in the exposure device 15. Then, the post-exposure of each shot may be performed by the light irradiation device 102 in the same order as the exposure device 15 based on the information. In such a case, the exposure amount in the post-exposure may be corrected for each shot. By doing so, the tact time from the pattern exposure in the exposure apparatus 15 to the post exposure in the light irradiation apparatus 102 can be strictly managed in shot units. As a result, a resist pattern with higher accuracy can be formed on the wafer W. In such a case, a moving mechanism (not shown) that relatively moves the mounting table 103 and the light irradiation unit 121 in, for example, the XY direction may be provided in at least one of the mounting table 103 and the light irradiation unit 121.

In the above-described embodiment, the post exposure station 13 is configured as a section adjacent to the interface station 14, but the post exposure station 13 is of course integrated with the interface station 14 to form one post exposure. You may comprise as a station or an interface station.

In the above embodiment, the case where the exposure of the pattern is performed by the electron beam in the exposure apparatus 15 has been described as an example. However, the pattern exposure is not limited to the exposure by the electron beam, but EUV exposure, ArF exposure, KrF exposure. This can also be applied to the case where pattern exposure is performed by the above-mentioned method, and the case where pattern exposure is performed using i-line or g-line.

The preferred embodiments of the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to such examples. It is obvious for those skilled in the art that various changes or modifications can be conceived within the scope of the idea described in the claims, and these are naturally within the technical scope of the present invention. It is understood. The present invention is not limited to this example and can take various forms. In the above embodiment, the semiconductor wafer coating and developing processing system is an example. However, the present invention is applied to developing and developing other substrates such as FPDs (flat panel displays) other than semiconductor wafers and mask reticles for photomasks. It can also be applied to a processing system.

The present invention is useful when constructing a substrate processing system for performing EUV exposure processing.

DESCRIPTION OF SYMBOLS 1 Coating / development processing system 10 Cassette station 11

Processing station

12, 14 Interface station 13 Post exposure station 15 Exposure apparatus 20 Cassette mounting base 21 Cassette mounting plate 22 Transport path 23 Wafer transfer apparatus 30 Lower antireflection film forming apparatus 31 Resist coating apparatus 32 Upper antireflection film forming device 33 Development processing device 40 Heat treatment device 41 Adhesion device 42 Peripheral exposure device 70

Wafer transfer mechanism

71, 72 Wafer inspection device 80 Wafer transfer mechanism 90

Wafer transfer mechanism

100, 111 Load lock chamber 102 Light irradiation device 300 Controller W Wafer D Wafer transfer area C Cassette

Claims

A substrate processing method for processing a substrate on which a resist film is formed,
An exposure step of exposing the resist film on the substrate to an electron beam pattern;
A post-exposure step of performing post-exposure with UV light on the resist film on the substrate after the exposure of the pattern;
A PEB processing step for performing PEB processing on the post-exposure substrate;
Developing a resist film after PEB treatment to form a resist pattern on the substrate, and
When the tact time from the end of the exposure process to the start of the PEB processing process deviates from a predetermined time, the exposure amount in the post-exposure process is corrected according to the shift in the tact time.
The substrate processing method according to claim 1,
In the exposure step, pattern exposure is performed simultaneously on a plurality of substrates,
The time from the end of the post-exposure process to the start of the PEB process is the same for each substrate.
The substrate processing method according to claim 1,
The post exposure is
A substrate,
A plurality of light sources shorter than the diameter of the substrate are arranged in a straight line over a length equal to or larger than the diameter of the substrate from one end side of the substrate to the other end side of the substrate,
This is performed by relatively moving the light sources in a direction orthogonal to the direction in which the light sources are arranged.
The substrate processing method according to claim 2,
The post exposure is
A substrate,
A plurality of light sources shorter than the diameter of the substrate are arranged in a straight line over a length equal to or larger than the diameter of the substrate from one end side of the substrate to the other end side of the substrate,
This is performed by relatively moving the light sources in a direction orthogonal to the direction in which the light sources are arranged.
A substrate processing method for processing a substrate on which a resist film is formed,
A readable computer storage medium storing a program operating on a computer of a control device that controls the substrate processing system to be executed by the substrate processing system,
The substrate processing method includes:
An exposure step of exposing the resist film on the substrate to an electron beam pattern;
A post-exposure step of performing post-exposure with UV light on the resist film on the substrate after the exposure of the pattern;
A PEB processing step for performing PEB processing on the post-exposure substrate;
Developing a resist film after PEB treatment to form a resist pattern on the substrate, and
When the tact time from the end of the exposure process to the start of the PEB processing process deviates from a predetermined time, the exposure amount in the post-exposure process is corrected according to the shift in the tact time.
The readable computer storage medium of claim 5.
In the exposure step, pattern exposure is performed simultaneously on a plurality of substrates,
The time from the end of the post-exposure process to the start of the PEB process is the same for each substrate.
The readable computer storage medium of claim 5.
The post exposure is
A substrate,
A plurality of light sources shorter than the diameter of the substrate are arranged in a straight line over a length equal to or larger than the diameter of the substrate from one end side of the substrate to the other end side of the substrate,
This is performed by relatively moving the light sources in a direction orthogonal to the direction in which the light sources are arranged.
The readable computer storage medium of claim 7.
The post exposure is
A substrate,
A plurality of light sources shorter than the diameter of the substrate are arranged in a straight line over a length equal to or larger than the diameter of the substrate from one end side of the substrate to the other end side of the substrate,
This is performed by relatively moving the light sources in a direction orthogonal to the direction in which the light sources are arranged.
A substrate processing system for processing a substrate,
A processing station provided with a plurality of processing apparatuses for performing PEB processing and development processing on a substrate;
An interface station that delivers the substrate between the substrate processing system and an exposure apparatus that is provided outside the substrate processing system and exposes a pattern on the resist film on the substrate with an electron beam;
A light irradiation device that performs post-exposure with UV light on the resist film on the substrate after exposure of the pattern by the exposure device;
A control device,
When the tact time from the end of exposure in the exposure apparatus to the start of PEB processing in the processing station deviates from a specified time, the control device performs post-processing in the light irradiation apparatus according to the tact time deviation. The exposure amount in the exposure is corrected.
The substrate processing system according to claim 9, wherein
The exposure apparatus and the interface station are connected via a load lock chamber,
In the exposure apparatus, pattern exposure is simultaneously performed on a plurality of substrates,
A plurality of substrates are delivered at once between the load lock chamber and the exposure apparatus.
The substrate processing system according to claim 9, wherein
The light irradiation device is:
A plurality of light sources shorter than the diameter of the substrate, a light irradiation unit provided in a straight line over a length equal to or greater than the diameter of the substrate from one end of the substrate toward the other end of the substrate;
A moving mechanism that relatively moves the light irradiation unit and the substrate in a direction orthogonal to a direction in which the light sources are arranged.
The substrate processing system according to claim 10, wherein
The light irradiation device is:
A plurality of light sources shorter than the diameter of the substrate, a light irradiation unit provided in a straight line over a length equal to or greater than the diameter of the substrate from one end of the substrate toward the other end of the substrate;
A moving mechanism that relatively moves the light irradiation unit and the substrate in a direction orthogonal to a direction in which the light sources are arranged.