DE102004022329B3 - Dynamic dosage adaptation method in lithography projector, involves setting exposure amount for each light exposure area, based on difference between time set for exposing each exposure area and time set for stabilizing resist layer - Google Patents

Abstract

A resist layer (14) is formed on the surface of a semiconductor wafer (12) and the wafer surface is divided into several light exposure areas (22). The exposure amount is set for each exposure area based on the difference between the time set for exposing each exposure area and the time set for stabilizing the resist layer. The exposure and stabilization processes are performed at respective times. An independent claim is also included for lithography projector.

Description

The The present invention relates to a method for dynamic dose adjustment in a lithographic projection apparatus, in particular in the Exposure of a semiconductor wafer to a circuit pattern on the To produce semiconductor wafers. The invention also relates a projector.

at The production of integrated circuits are usually on semiconductor wafers provided with different electrical properties layers applied. The electrical layers are each lithographic structured. A lithographic patterning step can therein consist of a photosensitive resist on the front of the Apply semiconductor wafer, this with a desired Structure for to expose and develop the relevant level, and subsequently the thus resulting resist mask in the underlying layer in an etching step transferred to.

in the Due to the constantly decreasing structures in the production The demands on integrated circuits are also growing Resolving power at the lithographic projection. It is expected that the currently prevalent optical lithography will be replaced by other techniques in the future will be. Optical lithography currently uses wavelengths of 193 nm or 157 nm used, which contributed to the structure resolution limited lithography to about 60 to 100 nm. The limit the structure resolution depends on a coincidence that the limit of the just yet to be imaged smallest structure is proportional to the wavelength of the light. Furthermore will the quality The figure is increasingly limited by small process windows. So is z. B. the permissible Depth of field also proportional to the wavelength of the light.

Around in optical lithography to increase the process window were developed in recent years novel concepts such. B. phase masks or projection apparatus with oblique illumination. Furthermore enabled certain measures in the circuit design, such. B. the so-called OPC correction (Optical Proximity Correction), a further improvement of the process window. In particular, with a double exposure, by means of a alternating phase mask illuminates the critical circuit level and subsequently using a trim mask in a second Exposure step eliminates any phase conflicts that may occur be, a high structural resolution achieved at the same time improved process window. However, it is foresee that optical lithography, at least for very critical Circuit levels, in the next or next generation of manufacturing processes for integrated Circuits come to a limit becomes.

In The past has therefore become novel lithographic apparatuses which discussed both improved structure resolution as also have a greater depth of field. In addition to x-ray lithography Here is above all the electron beam or ion beam lithography to call. Electron or Ion beams can focused by means of electric and / or magnetic fields and be distracted. They are therefore suitable for both direct Writing on an electron beam sensitive resist layer, as well as for the application in an exposure device that has a projection optics having. When writing directly using a particle beam (Contact lithography or proximity lithography) can be used by Experiences are already assumed, which already in the mask production were developed. Exposure devices loaded with a beam Particles a projection lithography or perform proximity lithography, in particular structure resolutions smaller than 100 nm a very good picture quality and a very high process window.

With the ever increasing integration densities of integrated circuits increase also the requirements for dimensional accuracy and positional accuracy a structure to be projected onto the semiconductor substrate. Especially then, when transferring circuit levels with smallest structure resolutions Need to become ever stricter tolerance limits with respect to the orientation and the dimensional stability the current structure to be projected onto the substrate be to functional to ensure the circuit.

density Line-column patterns, such as those in the field of manufacture of Dynamic Random Access Memory (DARM), have, for example, structural elements in the region of the first circuit levels on, the smallest dimension of a line width of 110, 90 or 70 nm. The structures formed above these levels usually a coarser one structural resolution so that more relaxed overall requirements for the resolution of the Projection apparatus result. It goes without saying too circuit designs known in which the critical circuit levels in an upper Layer are located.

For the lithographic projection step of a dense line-and-column pattern in DRAM fabrication, a wafer scanner is commonly used for the first circuit levels having the smallest feature features has a higher resolution compared to a wafer stepper. In a wafer scanner, the exposure of the photosensitive resist along an exposure slot occurs. The semiconductor wafer is generally deposited on a substrate holder and moved to a corresponding position for exposure. Then, the circuit pattern arranged on a mask is successively transferred into individual exposure fields on the photosensitive resist. During the exposure of an exposure field, the substrate holder and the aperture defining the exposure slot are shifted relative to each other. Usually, the size of an exposure field is about 26 mm × 35 mm. The exposure of the individual exposure fields is usually carried out so that the upper surface of the semiconductor wafer is divided into a pattern of exposure fields in the form of a matrix or a grating, and exposed successively in accordance with an exposure sequence with the wafer scanner or the wafer stepper.

at modern technologies, for example in DRAM production, becomes the one required in the projection of structural elements Accuracy due to the decreasing resolutions continue to decline. Current and future Process lines are thus due to variations in dimensional accuracy in lithography sensitive. The clearest effect of course is the smallest dimensions also known as "cri tical dimensions "or CD be designated. In particular, resist coating systems that are advanced in Exposure systems operate at 193 nm or 157 nm exposure wavelength, prove to be very sensitive to the projection conditions.

In US 2004/0029027 A1 discloses a method for dynamic dose adjustment in a photolithographic projection system during exposure of a semiconductor wafer in which the exposure dose for each Exposure field based on the evaluation of a previously performed exposure series is determined.

In US 2003/0164932 A1 discloses a method for dynamic dose adjustment in a photolithographic projection system, in which an exposure dose based on the time difference between the application the resist layer and the exposure of the resist layer is determined.

It It is therefore an object of the invention to provide a method which has a improved uniformity having the smallest dimensions in the lithographic projection, or to provide a projection apparatus, which improved uniformity reached.

• – Bereitstellen eines Halbleiterwafers;
• – Bereitstellen eines Schaltungsmusters umfassend Strukturelemente;
• – Bereitstellen eines Projektionsapparats;
• – Aufbringen einer Resistschicht auf eine Vorderseite des Halbleiterwafers;
• – Aufteilen der Vorderseite des Halbleiterwafers in eine Mehrfachanordnung von Belichtungsfeldern;
• – Zuweisen einer Belichtungsabfolge an die Mehrfachanordnung von Belichtungsfeldern;
• – Bestimmen jeweils eines ersten Zeitpunkts für jedes Belichtungsfeld, wobei die Belichtung jedes Belichtungsfeldes jeweils zu dem ersten Zeitpunkt ausgeführt wird;
• – Bestimmen eines zweiten Zeitpunkts, bei dem ein die Resistschicht stabilisierender Prozess-Schritt durchgeführt wird;
• – Zuweisen jeweils einer Belichtungsdosis für jedes Belichtungsfeld, wobei die jeweilige Belichtungsdosis anhand der Zeitdifferenz zwischen dem zweiten Zeitpunkt und dem jeweiligen ersten Zeitpunkt bestimmt wird;
• – Sukzessives Projizieren des Schaltungsmusters auf die Resistschicht in die Belichtungsfelder entsprechend der Belichtungsabfolge zu den jeweiligen ersten Zeitpunkten; und
• – Durchführen des die Resistschicht stabilisierenden Prozess-Schritts zu dem zweiten Zeitpunkt.

This object is achieved according to the invention by a method for dynamic dose adjustment in a lithographic projection apparatus during the exposure of a semiconductor wafer in order to produce a circuit pattern on the semiconductor wafer, comprising the following steps:

• - Providing a semiconductor wafer;
• Providing a circuit pattern comprising structural elements;
• - Providing a projection apparatus;
• Applying a resist layer to a front side of the semiconductor wafer;
• - dividing the front side of the semiconductor wafer into a multiple arrangement of exposure fields;
• Assigning an exposure sequence to the array of exposure fields;
• Determining a respective first time for each exposure field, the exposure of each exposure field being carried out in each case at the first time;
• Determining a second time at which a resist layer stabilizing process step is performed;
• Assigning one exposure dose for each exposure field, the respective exposure dose being determined based on the time difference between the second time and the respective first time;
• Successively projecting the circuit pattern on the resist layer into the exposure fields in accordance with the exposure sequence at the respective first times; and
• - Performing the resist layer stabilizing process step at the second time.

One The basic idea of the invention is the variations of the smallest Dimensions of structural elements between the first and last exposed Compensate chip on a wafer by changing the variations of Time difference between the second time and the respective one first time is determined. This can be between the exposure and a resist layer stabilizing process step Variation of the service life by a dynamic control of the exposure dose compensate. Corresponding variations of the smallest dimensions structural elements have not been corrected in the previous process, but as part of the error budget of the smallest structural dimensions accepted. The invention is particularly suitable when using novel Paint systems (eg for an exposure wavelength of 157 nm), which may be as significantly more sensitive regarding Show lives as conventional in the UV range sensitive resist coatings.

In a preferred embodiment includes the step of performing of the resist layer stabilizing process step, developing the resist layer.

According to this embodiment can be variations between exposure of an exposure field and developing the resist layer by dynamic control compensate. After developing the resist layer, none occur time-dependent changes the structural dimensions.

In a further preferred embodiment includes the step of performing of the resist layer stabilizing process step, annealing the resist layer.

According to this Procedure will be a variation due to the lifetime between Exposure and a heating of the resist layer compensated. The Bakeout of the resist layer, also known as Post-Exposure Baking (PEB) known causes the resist layer until further processing, for example, developing, is stabilized. After baking the resist layer does not undergo variations in the structural dimensions more on with the smallest dimensions. The post-exposure Baking is often in The technique applied to the influence of standing waves caused by superposition of the incident and reflected from the surface of the semiconductor wafer Light arise, to eliminate. Post Exposure Baking serves about that in addition to the chemical activation of the exposed areas the resist layer. The according to this Embodiment performed step Thus, annealing the resist layer does not increase the process complexity.

In a further preferred embodiment includes the step of assigning the exposure dose for each Exposure box that the exposure dose based on a linear Function of the time difference between the second time and the respective one first time is determined.

According to this Approach can be achieved that location inaccuracies due to the time differences between the second time and compensate for the respective first time using a linear function their accuracy often eliminates the variations is sufficient.

In a further preferred embodiment, the linear function has the following form: Dose (i) = a / b * t (i) + c, where dose is (i) the exposure dose of the i-th exposure field, a a parameter of the time-dependent line width change, b a dose-dependent line width change parameter, c a constant exposure dose value, and t (i) the time difference between the second time and the first times of the ith Exposure field represent.

According to this The procedure will be two line width changes for compensation the smallest dimensions used. It is known in the art that a time-dependent Linewidth variation (proportional to the time difference between the second time and the respective first time), the proportionality constant represented here by the parameter a is. Furthermore, there is a line width change depending on the exposure dose, where as proportionality constant here the parameter b is used. Leave it the necessary dose compensation depending on the service life (time difference) for the Calculate i-th exposure time by equating both variations become. This results in a simple relationship between measured parameters the time-dependent and dose-dependent Linewidth variation and the desired stability of the smallest Dimensions in the photolithographic projection.

In a further preferred embodiment includes the step of assigning the exposure dose for each Exposure box that uses an exponential exposure dose Function of the time difference between the second time and the determined at each first time.

According to one another preferred embodiment the step of providing the projection apparatus comprises that the projection apparatus has a light source suitable is an exposure with a wavelength of 193 nm or 157 nm perform.

According to this Procedure is carried out a photolithographic projection, wherein a wavelength of 193 nm or 157 nm is used. Matching resist systems may indicate higher Variations in service life between exposure and development (or annealing). In these modern exposure systems is a dynamic Do sisanpassung accordingly the time difference between the first and the respective second Timing is particularly important.

According to one another preferred embodiment The step of providing the semiconductor wafer comprises the semiconductor wafer has a diameter of 200 mm or more.

Modern integrated circuit manufacturing processes often employ semiconductor wafers of 200 mm diameter or more. Since a plurality of exposure fields can be accommodated on a semiconductor wafer having this surface, the method for the dynamic dose adjustment is particularly useful.

In a further preferred embodiment The step of providing the circuit pattern comprises the circuit pattern has a first part, which is on a first reticle is provided, and a second part, which on a second reticle is provided.

at Modern manufacturing processes often undergo circuit patterns transfer the combination of two reticles to a resist layer of the semiconductor wafer. For example, in a double exposure with an alternating Phase mask often the first part of the circuit pattern accordingly the structural elements of the circuit formed, wherein below a second reticle is provided, which is a so-called trim mask , which serves, possible phase conflicts by a Nachbelichtung to be able to eliminate. The inventive method let yourself also for this Use technology, the line width critical Ab education the Representation of the first reticle on the resist layer.

• – Ersetzen des Reticles durch das zweite Reticle im Projektionsapparat; und
• – sukzessives Projizieren des zweiten Teils des Schaltungsmusters auf die Resistschicht in den Belichtungsfeldern entsprechend der Belichtungsabfolge.

According to a further preferred embodiment, the step of projecting the circuit pattern onto the resist layer comprises placing the first reticle in the projection apparatus and imaging the first part of the circuit pattern onto the resist layer, wherein the following steps are then carried out:

• Replacing the reticle with the second reticle in the projection apparatus; and
• Successively projecting the second part of the circuit pattern onto the resist layer in the exposure fields in accordance with the exposure sequence.

According to this The procedure can be used in a double exposure with intervening Reticle change can be used. This is especially important in the production of DRAM devices, since for the First critical layers of a DRAM device often use phase masks come, then by means of be exposed in a trim exposure. At the high volume Production of DRAM devices proves the method according to the invention as especially useful.

• – einen Substrathalter, der geeignet ist, einen Halbleiterwafers aufzunehmen, wobei der Halbleiterwafer eine Resistschicht auf einer Vorderseite aufweist;
• – ein Mittel, um ein Schaltungsmuster umfassend Strukturelemente bereitzustellen;
• – ein Mittel, um die Vorderseite des Halbleiterwafers in eine Mehrfachanordnung von Belichtungsfeldern aufzuteilen;
• – ein Mittel, um eine Belichtungsabfolge an die Mehrfachanordnung von Belichtungsfeldern zuzuweisen;
• – ein Mittel, um das Schaltungsmuster sukzessive auf die Resistschicht in die Belichtungsfelder entsprechend der Belichtungsabfolge jeweils zu einem ersten Zeitpunkt zu projizieren;
• – ein Mittel, um einen die Resistschicht stabilisierenden Prozess-Schritt zu einem zweiten Zeitpunkt durchzuführen; und
• – ein Mittel, um jeweils eine Belichtungsdosis für jedes Belichtungsfeld zuzuweisen, wobei sich die jeweilige Belichtungsdosis anhand der Zeitdifferenz zwischen dem zweiten Zeitpunkt und dem jeweiligen ersten Zeitpunkt bestimmt.

The object is also achieved by a projection apparatus comprising:

• A substrate holder adapted to receive a semiconductor wafer, the semiconductor wafer having a resist layer on a front side;
• A means for providing a circuit pattern comprising structural elements;
• - means for dividing the front side of the semiconductor wafer into a multiple array of exposure fields;
• Means for assigning an exposure sequence to the array of exposure fields;
• - means for successively projecting the circuit pattern onto the resist layer in the exposure fields corresponding to the exposure sequence at a first time;
• A means for performing a resist layer stabilizing process step at a second time; and
• A means for respectively allocating an exposure dose for each exposure field, wherein the respective exposure dose is determined based on the time difference between the second time and the respective first time.

advantageous Further developments of the invention are specified in the subclaims.

The The invention will now be described with reference to the accompanying drawings. In show the drawing:

1 schematically in a cross-sectional view of a projection apparatus, which is used for the application of the method according to the invention;

2 schematically a semiconductor wafer in a plan view, with different exposure fields and an exposure sequence are shown; and

3 the method steps of the inventive method according to an embodiment in a flow chart.

The inventive method and the projection apparatus according to the invention are below for the production of a resist structure on top of a semiconductor wafer explained. The Invention leaves but for himself use any lithographic structuring in which the time difference between exposing and a stabilizing one Process Step important for the dimensional stability of the imaged structures. As an example, here are the production of light optical disks or of TFT display devices.

In 1 is schematically an optical projection apparatus 5 shown, with reference to which the inventive method is explained. However, it should be emphasized once again that the method according to the invention also applies to other lithographic techniques, such as the X-ray or partial chenlithographie (electron or ion lithography) is applicable.

The projection apparatus 5 includes a substrate holder 10 on which a semiconductor wafer 12 is filed. The semiconductor wafer 12 is on a front side with a resist layer 14 provided, for example, previously applied by spin coating. Above the substrate holder is on the resist layer 14 facing side a light source 16 arranged. The light source is capable of emitting, for example, light having a wavelength of 193 nm or 157 nm. The light of the light source 16 is by means of a projection lens 18 on the front side of the semiconductor wafer 12 transfer. Between light source 16 and projection lens 18 is a reticle 20 arranged, whose upper side is provided with a circuit pattern.

The reticle 20 is provided on one side with absorbing elements, which for example consist of chromium and are structured according to a circuit pattern. The circuit pattern has the smallest dimensions, which may be 70 nm or less in the manufacture of DRAM devices, for example. To the individual circuit levels on the resist layer 14 to be able to transfer the front side of the semiconductor wafer 12 with a multiple arrangement of exposure fields 22 Mistake. This division of the front side of the semiconductor wafer 12 is in 2 shown.

The projection of the circuit pattern is performed by placing the semiconductor wafer on the substrate holder 10 is aligned accordingly. For this purpose, the semiconductor wafer 12 shifted so that, for example, in a first exposure step, an exposure field 22 is exposed, which is located in the lower left corner of the array. This exposure field 22 is in 2 denoted by the exposure time t1. In subsequent exposure steps, the semiconductor wafer is shifted so that, for example, along a first scan direction 24 the bottom line of the exposure fields is exposed to the exposure field t6. Subsequently, the scan direction changes in a second scan direction 24 ' and there is an exposure of the exposure fields at time t7 to t16. This process repeats meandering until time tn all the exposure fields on the front of the semiconductor wafer 12 on the resist structure 14 were pictured.

As in 2 often becomes an exposure field 22 into several subfields 26 divided, in this example 2 × 2 subfields in an exposure field 22 be formed. This can be in the production and photolithographic rule projection of a semiconductor wafer 12 several, if necessary, different circuits on the front side of a semiconductor wafer 12 depict. For this purpose, however, the exposure is only performed at those points where at least parts of the sub-fields can form a functional circuit. Circuits that in those subfields 26 ' lie across the edge of the semiconductor wafer 12 at least partially, are not functional later.

The method according to the invention is based on the fact that the exposure dose in each exposure field 22 according to the time difference between exposure of the exposure field and development or annealing of the semiconductor wafer 12 is determined. The exposure of each exposure field 22 is thus executed in each case at a first time (t1 to tn). Performing the resist layer 14 stabilizing process step takes place at a second time. Based on the time difference between the respective first time t1 to tn and the second time takes place a dynamic adjustment of the exposure dose. This is thus for each exposure field 22 individually adjusted.

The respective first times t1 to tn are for example by a prior test exposure known. But it is also possible that first times t1 to tn from the exposure sequence of the projection apparatus to calculate, since this is often provided with a control, the timing of exposing the exposure fields controlled. Thus would be for example, it is possible the respective first times t1 to tn from the system with the Read projection device.

Every resist layer 14 has a characteristic line width gradient as a function of the time to development or for heating and the exposure dose. This results in fluctuations in the time or dose corresponding line width changes.

The line width change as a function of the time difference between the second time and the respective first time, which is given below as t, thus follows the following equation: ΔCD TIME = a · t, where a is the time-dependent linewidth gradient, which indicates how much the linewidth per unit time t changes until a stabilizing process step, eg, develop or anneal.

At the same time, the line width change as a function of the dose follows the following equation: ΔCD DOSE = b · ΔDose, where b is the dose-dependent linewidth gradient , which indicates how much the line width changes with changes in the exposure dose ΔDosis.

Out This simple model is followed by the necessary dose combination for each Exposure field i with the waiting time t (i) by equating the both equations.

After dissolving after ΔDosis and adding a constant dose offset, the exposure dose is dose (i) of the ith exposure field: Dose (i) = a / b * t (i) + c, where t (i) represents the time remaining to develop or anneal the ith exposure field, and c represents the dose offset.

According to the invention each exposure field i gets an individual depending on t (i) Dose correction. In the time difference t (i) times such. B. Reticle changes in multiple exposures are considered. Besides, they are different dose offsets possible.

at The previous calculation of dose correction was from a linear Connection of temporal and dose-dependent line width changes went out. It is also provided within the scope of the invention, these relationships from a non-linear function (eg an exponential function) or derive from an empirically determined function. So is For example, it is also conceivable to record measured line width changes in tabular form and for to use the dose adjustment.

In 3 Method steps are summarized according to an embodiment in a flow chart.

In a first step 100 the provision of a semiconductor wafer takes place 12 , Subsequently, in step 102 a circuit pattern comprising structural elements provided with the smallest dimensions.

In step 104 the provision of a projection apparatus 5 , Subsequently, in step 106 a resist layer 14 on a front side of the semiconductor wafer 12 applied.

In step 108 becomes the front side of the semiconductor wafer 12 in a multiple array of exposure fields 22 split up and in step 110 an exposure sequence is assigned to the array of exposure fields.

Starting from this exposure sequence of the multiple arrangement of exposure fields is in step 112 in each case a first time for each exposure field 22 determined, wherein the exposure of each exposure field is carried out in each case at the first time.

Subsequently, in the step 114 determining a second time at which the resist layer 14 stabilizing process step is performed.

In step 116 is then each an exposure dose for each exposure field 22 assigned, wherein the respective exposure dose is determined based on the time difference between the second time and the respective first time.

Subsequently, in step 118 the circuit pattern successively on the resist layer 14 into the exposure fields 22 projected according to the exposure sequence.

Then in the step 120 performing a resist layer 14 stabilizing process step at the second time.

For automatic dose control in a projection apparatus 5 it is intended to extend this so that the parameters a, b and c are stored in the projection apparatus for each circuit level. The time t (i) may be from the projection apparatus 5 be measured directly, for example by a test exposure. In a high-volume manufacturing process, more than one semiconductor wafer is usually exposed, so that the values t (i) can be determined from a previous exposure.

Thereby an automatic dose adjustment takes place as a function of the time difference between the second time and the first time during the exposure of an exposure field.

5

projector

10

substrate holder

12

Semiconductor wafer

14

resist layer

16

light source

18

projection lens

20

reticle

22

exposure field

24 24 '

scanning direction

26 26 '

circuit part

100 - 120

steps

Claims (19)

A method of dynamic dose adjustment in a lithographic projection apparatus in the exposure of a semiconductor wafer to produce a circuit pattern on the semiconductor wafer, comprising the following steps: - providing a semiconductor wafer ( 12 ); Providing a circuit pattern comprising structural elements; - providing a projection apparatus ( 5 ); Application of a resist layer ( 14 ) on a front side of the semiconductor wafer ( 12 ); Dividing the front side of the semiconductor wafer ( 12 ) into a multiple arrangement of exposure fields ( 22 ); Assigning an exposure sequence to the array of exposure fields ( 22 ); Determining a first time for each exposure field ( 22 ), wherein the exposure of each exposure field is performed at the first time; Determining a second time at which the resist layer ( 14 ) stabilizing process step is performed; Assigning one exposure dose for each exposure field ( 22 ), wherein the respective exposure dose is determined based on the time difference between the second time and the respective first time; Successive projecting of the circuit pattern onto the resist layer ( 14 ) into the exposure fields ( 22 ) according to the exposure sequence at the respective first times; and - performing the resist layer ( 14 ) stabilizing process step at the second time. The method of claim 1, wherein the step of performing the resist layer (16) 14 ) stabilizing process step, developing the resist layer ( 14 ). The method of claim 1, wherein the step of performing the resist layer (16) 14 ) stabilizing process step, a heating of the resist layer ( 14 ). Method according to one of claims 1 to 3, wherein the step comprising assigning the exposure dose for each exposure field, that the exposure dose based on a linear function of the time difference between the second time and the first time is determined. Method according to Claim 4, in which the linear function has the form: Dose (i) = a / b * t (i) + c, where dose is (i) the exposure dose of the i-th exposure field, a a parameter of the time-dependent linewidth change, b a dose-dependent line width change parameter, c a constant exposure dose value, and t (i) the time difference between the second time and the first time of the i-th Exposure field ( 22 ). Method according to one of claims 1 to 3, wherein the step comprising assigning the exposure dose for each exposure field, that the exposure dose based on a non-linear function of Time difference between the second time and the respective one first time is determined. Method according to one of claims 1 to 3, wherein the step of assigning the exposure dose for each exposure field ( 22 ) comprises determining the exposure dose based on an exponential function of the time difference between the second time and the respective first time. Method according to one of claims 1 to 7, wherein the step of providing the projection apparatus comprises that the projection apparatus ( 5 ) a light source ( 16 ) capable of performing exposure at a wavelength of 193 nm or 157 nm. Method according to one of claims 1 to 7, wherein the step the provision of the projection apparatus includes that the projection apparatus suitable is, an x-ray lithography perform. Method according to one of claims 1 to 7, wherein the step the provision of the projection apparatus includes that the projection apparatus suitable is to perform an electron beam lithography. Method according to one of claims 1 to 7, wherein the step the provision of the projection apparatus includes that the projection apparatus suitable is to perform an ion beam lithography. Method according to one of claims 1 to 11, wherein the step of providing the semiconductor wafer comprises that the semiconductor wafer ( 12 ) has a diameter of 200 mm or more. Method according to one of claims 1 to 12, wherein the step of providing the circuit pattern comprises that the circuit pattern on a first reticle ( 20 ) provided. The method of claim 13, wherein the step of projecting the circuit pattern onto the resist layer (16) 14 ), that the first reticle enters the projection apparatus ( 5 ), in which case the following step is subsequently carried out: renewed successive projecting of the circuit pattern onto the resist layer ( 14 ) in the exposure fields ( 22 ) according to the exposure schedule follow, whereby the projection apparatus ( 5 ) is operated in a different exposure mode. Method according to one of claims 1 to 12, wherein the step the provision of the circuit pattern includes that the circuit pattern a first part, which is provided on a first reticle, and a second part provided on a second reticle becomes. The method of claim 15, wherein the step of projecting the circuit pattern onto the resist layer (16). 14 ), that the first reticle enters the projection apparatus ( 5 ) and that the first part of the circuit pattern on the resist layer ( 14 ), in which case the following steps are subsequently carried out: replacement of the first reticle by the second reticle in the projection apparatus; and successively projecting the second part of the circuit pattern onto the resist layer ( 14 ) in the exposure fields ( 22 ) according to the exposure sequence. Method according to Claim 5, in which the projection apparatus ( 5 ) has a memory device capable of storing the values of a, b and c for each circuit plane. The method according to claim 17, further comprising the projection apparatus ( 5 ) has a timing device adapted to measure the respective time difference for each exposure field. Projection apparatus, comprising: - a substrate holder ( 10 ), which is suitable for a semiconductor wafer ( 12 ), wherein the semiconductor wafer ( 12 ) a resist layer ( 14 ) on a front side; A means for providing a circuit pattern comprising structural elements; A means for covering the front side of the semiconductor wafer ( 12 ) into a multiple arrangement of exposure fields ( 22 ) to divide; Means for assigning an exposure sequence to the array of exposure fields; A means for successively applying the circuit pattern to the resist layer (US Pat. 14 ) into the exposure fields ( 22 ) according to the exposure sequence at a first time in each case; A means for obtaining a resist layer ( 14 ) perform a stabilizing process step at a second time; and - a means for each exposing dose for each exposure field ( 22 ), wherein the respective exposure dose is determined based on the time difference between the second time and the respective first time.