US20030164932A1 - Method and system for compensating exposure value for exposure process as well as exposure system and semiconductor manufacturing system - Google Patents

Method and system for compensating exposure value for exposure process as well as exposure system and semiconductor manufacturing system Download PDF

Info

Publication number
US20030164932A1
US20030164932A1 US10/387,389 US38738903A US2003164932A1 US 20030164932 A1 US20030164932 A1 US 20030164932A1 US 38738903 A US38738903 A US 38738903A US 2003164932 A1 US2003164932 A1 US 2003164932A1
Authority
US
United States
Prior art keywords
exposure
data
size
value
compensated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US10/387,389
Inventor
Masao Ikuno
Masahiko Kishi
Masaaki Yomo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to US10/387,389 priority Critical patent/US20030164932A1/en
Assigned to NEC ELECTRONICS CORPORATION reassignment NEC ELECTRONICS CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NEC CORPORATION
Publication of US20030164932A1 publication Critical patent/US20030164932A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70491Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
    • G03F7/70533Controlling abnormal operating mode, e.g. taking account of waiting time, decision to rework or rework flow
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/7055Exposure light control in all parts of the microlithographic apparatus, e.g. pulse length control or light interruption
    • G03F7/70558Dose control, i.e. achievement of a desired dose
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605Workpiece metrology
    • G03F7/70616Monitoring the printed patterns
    • G03F7/70625Dimensions, e.g. line width, critical dimension [CD], profile, sidewall angle or edge roughness

Definitions

  • the present invention relates to an exposure system and an exposure method for forming a semiconductor device, and more particularly to a method and a system for controlling an exposure value in an exposure system and an exposure method to reduce variation of a resist pattern size.
  • a lithography process is used for forming a semiconductor device.
  • a resist film is applied by an applicator onto a semiconductor wafer surface, and the resist film is then baked, before an exposure and a subsequent development are carried out. After the applied resist film is previously baked, it is actually needed to take a waiting time for starting the subsequent exposure process.
  • the word “waiting time” is defined to be a time duration after a pre-baking process for the applied resist film and until an exposure process is started. For this waiting time, the wafer is stoked between the applicator and the exposure system. This waiting time is variable for individual carrier units for matching the timings among the sequential processes.
  • FIG. 1 is a diagram illustrative of various sizes of a photo-resist pattern versus waiting time.
  • the size of the photo-resist pattern is variable. As the waiting time increases, an averaged size of the photo-resist pattern tends to increase. As the waiting time increases up to a time T 1 from zero, the rate of increase in the averaged size of the photo-resist pattern is rapid. As the waiting time further increases from the time T 1 and approaches a longer time T 5 , the rate of increase in the averaged size of the photo-resist pattern becomes gentle. As the waiting time becomes much longer, the variation in size of the photo-resist pattern becomes small.
  • the variation in waiting time of the wafer causes variation in size or dimension of the resist pattern after the exposure and development processes.
  • the waiting time may be different between different carrier units of the wafers.
  • the size or dimension of the resist pattern may be different between different carrier units of the wafers.
  • the variation in size of the resist pattern may depend on not only variation of the waiting time but also variation in the atmospheric pressure. If the atmospheric pressure is reduced, then the thickness of the resist is increased. The variation in the atmospheric pressure causes variation in the atmospheric density, which further varies the refractive index of an optical lens to an air, resulting in variation in the focusing point.
  • FIG. 2 is a schematic block diagram of a conventional semiconductor manufacturing system for photo-lithography processes and subsequent anisotropic etching process.
  • a system 201 includes a host 210 , a photo-resist applicator 202 , an exposure and development apparatus 203 , a first size-measuring device 205 , an etching apparatus 204 , and a second size-measuring device 206 .
  • the first size-measuring device 205 measures the size of the photo-resist pattern immediately after the development process.
  • the second size-measuring device 206 measures the size of the etched region of the wafer immediately after the etching process.
  • the size-measured results by the first and second size-measuring devices 205 and 206 are transmitted to the host 210 .
  • the host 210 changes, if any, resist application conditions for applying the resist film by the applicator 202 and also exposure conditions by the exposure and development apparatus 203 , and further etching conditions by the etching apparatus 204 .
  • the above conventional technique depends upon the past-measured pattern sizes manufactured in the past process, in order to set the conditions for the future wafers, namely, not responsible in real time to the variations in the waiting time and the atmospheric pressure. It is, therefore, difficult for the conventional technique to suppress the size variation of the wafer based on the variations in the waiting time and the atmospheric pressure.
  • Japanese laid-open patent publication No. 8-172046 discloses that various data about a pre-baking termination time, wafer not numbers, and the kinds of the wafer resist are transmitted from a storage device through a data transmitter to an exposure controller, so that the exposure controller calculates the waiting time of the wafers based on the transmitted data in order to set an appropriate exposure value based on the calculated waiting time.
  • This conventional technique avoids that the size of the resist patterns varies depending on the waiting time.
  • the above conventional technique of the above Japanese publication also depends upon the past-measured pattern sizes manufactured in the past process, in order to set the conditions for the future wafers, namely, not responsible in real time to the variations in the waiting time and the atmospheric pressure. It is, therefore, difficult for the conventional technique to suppress the size variation of the wafer based on the variations in the waiting time and the atmospheric pressure.
  • the above two conventional techniques determine the exposure value for the resist film based on the past waiting time of the past-processed wafers in the past processes, without considering the current waiting time of the current wafer to be processed from now.
  • the present invention provides a method of determining an exposure value for exposing a resist film, comprising the steps of estimating a size variation of a resist pattern from a predetermined target size based on a waiting time of a currently processing resist film to be patterned in subsequent sequential exposure and development processes and compensating a reference exposure value based on said size variation to obtain a compensated exposure value.
  • FIG. 1 is a diagram illustrative of various sizes of a photo-resist pattern versus waiting time.
  • FIG. 2 is a schematic block diagram of a conventional semiconductor manufacturing system for photo-lithography processes and subsequent anisotropic etching process.
  • FIG. 3 is a block diagram of a system for manufacturing a semiconductor device in a first embodiment in accordance with the present invention.
  • FIG. 4 is a view of individual processes in individual apparatuses included in the system of FIG. 3.
  • FIG. 5 is a flow chart of individual steps involved in the exposure process of FIG. 4.
  • a system 101 may include first, second and third resist-applicators 102 A, 102 B and 102 C, each of which applies a resist film on a semiconductor wafer and then pre-bakes the applied resist film.
  • the system 101 may also include first, second, and third exposure and development apparatuses 103 A, 103 B and 103 C, each of which carries out an exposure and subsequent development processes for patterning said resist film.
  • the exposure process may be carried out by using optionally selected one of beams of various types such as ultraviolet ray, X-ray and electron beam.
  • the system 101 may also include first, second, and third etching apparatuses 104 A, 104 B and 104 C for anisotropically etching said wafer with said resist pattern.
  • the system 101 may also include first, second, and third resist-pattern-size measuring apparatuses 105 A, 105 B and 105 C for measuring a size of the resist pattern over said wafer.
  • the first, second, and third resist-pattern-size measuring apparatuses 105 A, 105 B and 105 C may have follower positions to the first, second, and third exposure and development apparatuses 103 A, 103 B and 103 C.
  • the system 101 may also include first, second, and third wafer-pattern-size measuring apparatus 106 A, 106 B and 106 C for measuring a size of the wafer pattern defined by the etching process using the resist pattern.
  • the first, second, and third wafer-pattern-size measuring apparatus 106 A, 106 B and 106 C may have follower positions to the first, second, and third etching apparatuses 104 A, 104 B and 104 C.
  • a plurality of wafers may be carried by a single carrier for batch-processing plural wafers concurrently in a lot unit in the order of the resist-applicators 102 A, 102 B and 102 C, the exposure and development apparatuses 103 A, 103 B and 103 C, the resist-pattern-size measuring apparatuses 105 A, 105 B and 105 C, the etching apparatuses 104 A, 104 B and 104 C, the wafer-pattern-size measuring apparatus 106 A, 106 B and 106 C.
  • the system 101 may also include a bus line 110 which is connected in parallel to the resist-applicators 102 A, 102 B and 102 C, the exposure and development apparatuses 103 A, 103 B and 103 C, the resist-pattern-size measuring apparatuses 105 A, 105 B and 105 C, the etching apparatuses 104 A, 104 B and 104 C, the wafer-pattern-size measuring apparatus 106 A, 106 B and 106 C.
  • the bus line 110 may transfer data.
  • the bus line 110 may receive work history data from each of the resist-applicators 102 A, 102 B and 102 C, the exposure and development apparatuses 103 A, 103 B and 103 C, and the etching apparatuses 104 A, 104 B and 104 C after the individual process has been made.
  • the bus line 110 may receive measured data from each of the resist-pattern-size measuring apparatuses 105 A, 105 B and 105 C, and the wafer-pattern-size measuring apparatuses 106 A, 106 B and 106 C.
  • Each of the exposure and development apparatuses 103 A, 103 B and 103 C may receive the compensated exposure value, so that the exposure process is carried out based on the compensated exposure value.
  • the system 101 may also include a controller 111 , a data base 112 , a monitor 113 and an atmospheric pressure measuring apparatus 114 , which are connected in parallel to the bus line 110 .
  • the data base 112 stores work history data, size-measured data and read exposure values.
  • the work history data are transferred through the bus line 110 from each of the resist-applicators 102 A, 102 B and 102 C, the exposure and development apparatuses 103 A, 103 B and 103 C, and the etching apparatuses 104 A, 104 B and 104 C.
  • the resist pattern size measured data may be transferred through the bus line 110 from each of the resist-pattern-size measuring apparatuses 105 A, 105 B and 105 C.
  • the wafer pattern size measured data may be transferred through the bus line 110 from each of the wafer-pattern-size measuring apparatuses 106 A, 106 B and 106 C.
  • the controller 111 may fetch the work history data, the resist pattern size measured data and the wafer pattern size measured data through the bus line 110 from the data base 112 , so that the controller 111 calculates a compensated exposure value based on the fetched data.
  • the data of calculated compensated exposure values are transferred through the bus line 110 to the data base 112 for storing the data into the data base 112 .
  • the process for calculating the compensated exposure value will be described below.
  • the monitor 113 may monitor data about the compensated exposure values stored in the data base 112 for analysis for those data in below-mentioned processes, in order to verify whether the compensated exposure value is within a predetermined acceptable range. If the compensated exposure value is within the predetermined acceptable range, then the monitor 113 renders the compensated exposure value effective. If the compensated exposure value is not within the predetermined acceptable range, then the monitor 113 renders the compensated exposure value ineffective.
  • the atmospheric pressure measuring apparatus 114 may measure an atmospheric pressure at a position of the exposure and development apparatuses 103 A, 103 B and 103 C for transmitting data about the measured atmospheric pressures through the bus line 110 to the data base 112 for storing the data in the data base 112 .
  • the atmospheric pressure measuring apparatus 114 continuously measures the pressure and renews the atmospheric pressure data for every constant time periods.
  • the atmospheric pressure measuring apparatus 114 may optionally measure other positions of the other apparatus such as the applicators, the measuring apparatuses and the etching apparatus.
  • the wafers are parallel-processed by the above first, second and third manufacturing apparatuses.
  • the manufacturing processes by the above described system 101 will be described with reference to FIG. 4.
  • Each of the first, second and third resist applicators 102 A, 102 B and 102 C picks up a single wafer from the wafer carrier which contains plural wafers, and applies a resist film on the wafer surface, before pre-bakes the resist film.
  • the wafer with the pre-baked resist film is then contained in the wafer carrier.
  • the wafer carrier is carried toward the first, second and third exposure and development apparatuses 103 A, 103 B and 103 C.
  • the work history data may also be transferred through the bus line 110 to the data base 112 for storing the same, wherein the work history data may include a carrier data for indicating a carrier for carrying the wafers, a resist data for indicating the kind of the resist film, a process data for indicating the kind of processes, and an output time data for the output time when the carrier is outputted from the applicators 102 A, 102 B and 102 C.
  • the wafer is carried to the first, second and third exposure and development apparatuses 103 A, 103 B and 103 C.
  • the first, second and third exposure and development apparatuses 103 A, 103 B and 103 C may fetch various wafer-related data based on the carrier ID data from the data base 112 through the bus line 110 , prior to the exposure process, so that the first, second and third exposure and development apparatuses 103 A, 103 B and 103 C may receive selected ones or all of the available informations about the wafers to be processed before the exposure process.
  • Each of the first, second and third exposure and development apparatuses 103 A, 103 B and 103 C picks up a single wafer from the wafer carrier and carries out the compensated exposure value.
  • the exposure and development apparatus has been set to have a predetermined constant intensity of exposure beam, for which reason the exposure value may be controlled by controlling an exposure time period.
  • each of the first, second and third exposure and development apparatuses 103 A, 103 B and 103 C may set the exposure time period based on the compensated exposure value for carrying out the exposure process with the controlled exposure time period.
  • each of the first, second and third exposure and development apparatuses 103 A, 103 B and 103 C may carry out the development process to form a resist pattern over the wafer.
  • This processed wafer is then contained in the carrier.
  • the carrier is carried toward the resist-pattern-size measuring apparatuses 105 A, 105 B and 105 C.
  • the first, second and third exposure and development apparatuses 103 A, 103 B and 103 C output the work history data which include the carrier ID data for indicating the carrier of the processed wafers, an exposure and development apparatus indicating data for indicating operated one of the first, second and third exposure and development apparatuses 103 A, 103 B and 103 C, an exposure value data for the exposure value, an exposure time data for indicating when the exposure process is carried out.
  • the work history data are transferred through the bus line 110 to the data base 112 .
  • the wafer carrier is then carried to the first, second and third resist-pattern-size measuring apparatuses 105 A, 105 B and 105 C.
  • Each of the first, second and third resist-pattern-size measuring apparatuses 105 A, 105 B and 105 C picks up a single wafer for measuring a resist pattern size of the wafer.
  • the measured size data of the wafers are then transferred through the bus line 110 to the data base 112 .
  • the wafer carrier is further carried to the first, second and third etching apparatuses 104 A, 104 B and 104 C.
  • Each of the first, second and third etching apparatuses 104 A, 104 B and 104 C picks up a single wafer for etching the wafer by use of the resist pattern as a mask.
  • the carrier is carried toward the first, second, and third wafer-pattern-size measuring apparatus 106 A, 106 B and 106 C.
  • Each of the first, second, and third wafer-pattern-size measuring apparatus 106 A, 106 B and 106 C picks up a single wafer for measuring a size of the wafer pattern defined by the etching process using the resist pattern.
  • a step S 101 the carriers are carried to the first, second and third exposure and development apparatuses 103 A, 103 B and 103 C.
  • a step S 102 the controller 111 fetches the work history data stored in the data base 112 , wherein the work history data had already been given to the data base 112 from the first, second and third exposure and development apparatuses 103 A, 103 B and 103 C in the past exposure processes.
  • the controller 111 recognizes carrier ID data from the fetched data and also inquires a line system with the carrier ID to recognize process items of the carrier.
  • the controller 111 may retrieve, from the data base 112 , work history data when the currently processing carrier has been outputted from the resist applicator 102 and process data about the same and similar past items, so that the controller 111 may read data which indicate the kind of the resist film, data which indicates the type of process, and the carrying time, based on the retrieved data.
  • the controller 111 may calculate a compensated exposure value for processing the wafers in the currently processing wafer carrier based on those just obtained data and the data previously stored in the database 112 .
  • a step S 104 a the controller 111 calculates a compensating value for compensation to the reference exposure value.
  • the reference exposure value is defined to be an averaged value of past real exposure values which have been compensated based on the measured size of the resist pattern or the processed wafer pattern for making the resist pattern size correspond to the designed size.
  • the compensating value is a compensating time for adjusting the exposure time.
  • the compensating value may be calculated by the following equations.
  • Compensating value [ ⁇ (size average value) ⁇ (center standard value) ⁇ (exposure coefficient) ⁇ (adjustment coefficient)] ⁇ (waiting time size variation) ⁇ (exposure coefficient) ⁇
  • (a) size average value is an averaged value of the wafer pattern sizes of the past semiconductor wafers
  • center standard value is a target wafer pattern size of the semiconductor wafer
  • exposure coefficient is the exposure value when the resist pattern size is varied by 1 micrometers.
  • adjustment coefficient is the value designed based on a pattern size variation tendency which has been obtained experimentally from the kind of resist film, the kind of the exposure apparatus, and the characteristics of the exposure apparatus.
  • waiting time size variation is a time-dependent variation in size of the resist pattern, which depends on the waiting time.
  • the size average value, the center standard value, the exposure coefficient, the adjustment coefficient and the waiting time size variation may be obtained from the past processes for the semiconductor wafers, and also have been stored in the data base 112 .
  • the controller 111 read out, from the data base, the size average value, the center standard value, the exposure coefficient, the adjustment coefficient and the waiting time size variation. Further, the controller 111 calculates the waiting time from the work history data from the resist applicator 102 and the carrying time data for the time when the carrier is carried to the exposure and development apparatus. The waiting time size variation is obtained based on the waiting time. The exposure coefficient and the adjustment coefficient are respectively obtained based on the work history data and the exposure process data. The the size average value, the center standard value, the exposure coefficient, the adjustment coefficient and the waiting time size variation are incorporated into the above equation to obtain the compensating value.
  • the compensated exposure value is obtained by subtracting the compensating value from the reference exposure value.
  • compensated exposure value [(reference exposure value) ⁇ (compensating value)]
  • the reference exposure value is an averaged value of the real exposure values for past-processing the same and/or similar items.
  • a step S 105 the compensated exposure value is transferred through the bus line 110 to the data base 112 .
  • a step S 106 the exposure and development apparatus 103 carries out the exposure process at a controlled exposure time period which depending on the compensated exposure value.
  • This compensated exposure value was based on the data obtained immediately after the operations by the controller 111 . Namely, the compensated exposure value was based on the resist pattern size data of the prior semiconductor wafers measured by the resist-pattern-size measuring apparatuses 105 and also based on the wafer pattern size data of the prior semiconductor wafers measured by the wafer-pattern-size measuring apparatuses 106 .
  • the compensation to the exposure value may be realized by real time base.
  • All of the data outputted from the resist applicators 102 , the exposure and development apparatuses 103 , the etching apparatuses 104 , the resist-pattern-size measuring apparatuses 105 and the wafer-pattern-size measuring apparatuses 106 are stored in the data base 112 .
  • the controller 111 may calculate the compensated exposure value based on the updated data in the data base 112 in order to realize a real-time response to the size variation due to the variable waiting time. This allows a highly accurate pattern size of the semiconductor wafer. Particularly, if the exposure process is carried out immediately after the resist film is applied on the wafer surface, then the exposure process at the compensated exposure value may avoid the resist pattern size variation. It is unnecessary for reducing the resist pattern size variation to take a long waiting time for subsequent exposure process for the pre-baked wafer. This means it possible to increase the throughput.
  • the compensated exposure value may be calculated in further consideration of an atmospheric pressure data measured by the atmospheric pressure measuring apparatus 114 .
  • the measured atmospheric pressure is transferred through the bus line 110 to the data base 112 , and the atmospheric pressure data is stored therein.
  • the controller 111 may read out the current pressure data from the data base 112 for compensating the current pressure data to a reference pressure data to obtain a pressure difference between them.
  • the compensating value may be calculated in further reference to the pressure difference.
  • the drop of the pressure increases the thickness of the resist film.
  • Variation in pressure causes variation in refractive index of the optical system of the exposure apparatus, whereby a focusing position is varied. Those factors vary the resist pattern size.
  • the possible pattern size variation is estimated based on the variation of the atmospheric pressure and the compensating value to the reference exposure value is calculated based on not only the above variable factors but also the atmospheric pressure variation.
  • the monitor 113 continuously monitors the individual data stored in the data base 112 for analysis to the data.
  • the monitor 113 refers the past compensated exposure values for the same or similar items and processes to obtain an averaged compensated exposure value.
  • the monitor 113 verifies whether the currently calculated compensated exposure value is within a predetermined acceptable range, which has a center value corresponding to the averaged compensated exposure value.
  • the predetermined acceptable range may, for example, be ⁇ 10% to +10%.
  • the monitor 113 renders the currently calculated compensated exposure value ineffective for inhibiting the controller 111 to use the currently calculated compensated exposure value, and in place instructs the controller 111 to select the past-calculated compensated exposure value.
  • the exposure and development apparatus 103 carries out the exposure process at the past-calculated compensated exposure value.
  • the monitor 113 renders the currently calculated compensated exposure value effective for enabling the controller 111 to use the currently calculated compensated exposure value, whereby the exposure and development apparatus 103 carries out the exposure process at the currently calculated compensated exposure value.
  • the wafer carrier is an unit for the individual processes for batch-processing the plural wafers. It is, however, possible to apply the present invention to a single wafer process system, wherein the wafers are separately processed.
  • the compensating value for compensating the reference exposure value is obtained based on the last-updated data stored in the data base. This allows the resist pattern to have a highly accurate size.
  • the present invention is effective to avoid the pattern size variation.
  • the system includes the unitary formed exposure and development apparatus which carry out both sequential exposure and development processes. It is, of course, possible to apply the present invention to another system which includes an exposure apparatus and a development apparatus separately.

Abstract

A method of determining an exposure value for exposing a resist film, comprises the steps of: estimating a size variation of a resist pattern from a predetermined target size based on a waiting time of a currently processing resist film to be patterned in subsequent sequential exposure and development processes; and compensating a reference exposure value based on said size variation to obtain a compensated exposure value.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • The present invention relates to an exposure system and an exposure method for forming a semiconductor device, and more particularly to a method and a system for controlling an exposure value in an exposure system and an exposure method to reduce variation of a resist pattern size. [0002]
  • 2. Description of the Related Art [0003]
  • A lithography process is used for forming a semiconductor device. A resist film is applied by an applicator onto a semiconductor wafer surface, and the resist film is then baked, before an exposure and a subsequent development are carried out. After the applied resist film is previously baked, it is actually needed to take a waiting time for starting the subsequent exposure process. In this application, the word “waiting time” is defined to be a time duration after a pre-baking process for the applied resist film and until an exposure process is started. For this waiting time, the wafer is stoked between the applicator and the exposure system. This waiting time is variable for individual carrier units for matching the timings among the sequential processes. [0004]
  • It has been know that variation in waiting time of the wafer causes variation in size or dimension of the resist pattern after the exposure and development processes. FIG. 1 is a diagram illustrative of various sizes of a photo-resist pattern versus waiting time. The size of the photo-resist pattern is variable. As the waiting time increases, an averaged size of the photo-resist pattern tends to increase. As the waiting time increases up to a time T[0005] 1 from zero, the rate of increase in the averaged size of the photo-resist pattern is rapid. As the waiting time further increases from the time T1 and approaches a longer time T5, the rate of increase in the averaged size of the photo-resist pattern becomes gentle. As the waiting time becomes much longer, the variation in size of the photo-resist pattern becomes small.
  • As may be seen from FIG. 1, the variation in waiting time of the wafer causes variation in size or dimension of the resist pattern after the exposure and development processes. The waiting time may be different between different carrier units of the wafers. Thus, the size or dimension of the resist pattern may be different between different carrier units of the wafers. [0006]
  • An excessive increase of the waiting time is effective in order to reduce the variation in size or dimension of the resist pattern, but also reduces the throughput of the wafer. For this reason, the excessive increase of the waiting time is undesirable practically. [0007]
  • It has also been known that the variation in size of the resist pattern may depend on not only variation of the waiting time but also variation in the atmospheric pressure. If the atmospheric pressure is reduced, then the thickness of the resist is increased. The variation in the atmospheric pressure causes variation in the atmospheric density, which further varies the refractive index of an optical lens to an air, resulting in variation in the focusing point. [0008]
  • FIG. 2 is a schematic block diagram of a conventional semiconductor manufacturing system for photo-lithography processes and subsequent anisotropic etching process. A system [0009] 201 includes a host 210, a photo-resist applicator 202, an exposure and development apparatus 203, a first size-measuring device 205, an etching apparatus 204, and a second size-measuring device 206. The first size-measuring device 205 measures the size of the photo-resist pattern immediately after the development process. The second size-measuring device 206 measures the size of the etched region of the wafer immediately after the etching process.
  • The size-measured results by the first and second size-[0010] measuring devices 205 and 206 are transmitted to the host 210. The host 210 changes, if any, resist application conditions for applying the resist film by the applicator 202 and also exposure conditions by the exposure and development apparatus 203, and further etching conditions by the etching apparatus 204.
  • The above conventional technique depends upon the past-measured pattern sizes manufactured in the past process, in order to set the conditions for the future wafers, namely, not responsible in real time to the variations in the waiting time and the atmospheric pressure. It is, therefore, difficult for the conventional technique to suppress the size variation of the wafer based on the variations in the waiting time and the atmospheric pressure. [0011]
  • Japanese laid-open patent publication No. 8-172046 discloses that various data about a pre-baking termination time, wafer not numbers, and the kinds of the wafer resist are transmitted from a storage device through a data transmitter to an exposure controller, so that the exposure controller calculates the waiting time of the wafers based on the transmitted data in order to set an appropriate exposure value based on the calculated waiting time. This conventional technique avoids that the size of the resist patterns varies depending on the waiting time. [0012]
  • The above conventional technique of the above Japanese publication also depends upon the past-measured pattern sizes manufactured in the past process, in order to set the conditions for the future wafers, namely, not responsible in real time to the variations in the waiting time and the atmospheric pressure. It is, therefore, difficult for the conventional technique to suppress the size variation of the wafer based on the variations in the waiting time and the atmospheric pressure. [0013]
  • Consequently, the above two conventional techniques determine the exposure value for the resist film based on the past waiting time of the past-processed wafers in the past processes, without considering the current waiting time of the current wafer to be processed from now. [0014]
  • In the above circumstances, the development of a novel exposure system and exposure method free from the above problems is desirable. [0015]
  • SUMMARY OF THE INVENTION
  • Accordingly, it is an object of the present invention to provide a novel exposure system free from the above problems. [0016]
  • It is a further object of the present invention to provide a novel method of determining an exposure value free from the above problems. [0017]
  • The present invention provides a method of determining an exposure value for exposing a resist film, comprising the steps of estimating a size variation of a resist pattern from a predetermined target size based on a waiting time of a currently processing resist film to be patterned in subsequent sequential exposure and development processes and compensating a reference exposure value based on said size variation to obtain a compensated exposure value. [0018]
  • The above and other objects, features and advantages of the present invention will be apparent from the following descriptions.[0019]
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • Preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings. [0020]
  • FIG. 1 is a diagram illustrative of various sizes of a photo-resist pattern versus waiting time. [0021]
  • FIG. 2 is a schematic block diagram of a conventional semiconductor manufacturing system for photo-lithography processes and subsequent anisotropic etching process. [0022]
  • FIG. 3 is a block diagram of a system for manufacturing a semiconductor device in a first embodiment in accordance with the present invention. [0023]
  • FIG. 4 is a view of individual processes in individual apparatuses included in the system of FIG. 3. [0024]
  • FIG. 5 is a flow chart of individual steps involved in the exposure process of FIG. 4.[0025]
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • A first embodiment according to the present invention will be described in detail with reference to FIG. 3. A [0026] system 101 may include first, second and third resist-applicators 102A, 102B and 102C, each of which applies a resist film on a semiconductor wafer and then pre-bakes the applied resist film. The system 101 may also include first, second, and third exposure and development apparatuses 103A, 103B and 103C, each of which carries out an exposure and subsequent development processes for patterning said resist film. The exposure process may be carried out by using optionally selected one of beams of various types such as ultraviolet ray, X-ray and electron beam.
  • The [0027] system 101 may also include first, second, and third etching apparatuses 104A, 104B and 104C for anisotropically etching said wafer with said resist pattern. The system 101 may also include first, second, and third resist-pattern-size measuring apparatuses 105A, 105B and 105C for measuring a size of the resist pattern over said wafer. The first, second, and third resist-pattern-size measuring apparatuses 105A, 105B and 105C may have follower positions to the first, second, and third exposure and development apparatuses 103A, 103B and 103C. The system 101 may also include first, second, and third wafer-pattern-size measuring apparatus 106A, 106B and 106C for measuring a size of the wafer pattern defined by the etching process using the resist pattern. The first, second, and third wafer-pattern-size measuring apparatus 106A, 106B and 106C may have follower positions to the first, second, and third etching apparatuses 104A, 104B and 104C.
  • A plurality of wafers may be carried by a single carrier for batch-processing plural wafers concurrently in a lot unit in the order of the resist-[0028] applicators 102A, 102B and 102C, the exposure and development apparatuses 103A, 103B and 103C, the resist-pattern-size measuring apparatuses 105A, 105B and 105C, the etching apparatuses 104A, 104B and 104C, the wafer-pattern-size measuring apparatus 106A, 106B and 106C.
  • The [0029] system 101 may also include a bus line 110 which is connected in parallel to the resist-applicators 102A, 102B and 102C, the exposure and development apparatuses 103A, 103B and 103C, the resist-pattern-size measuring apparatuses 105A, 105B and 105C, the etching apparatuses 104A, 104B and 104C, the wafer-pattern-size measuring apparatus 106A, 106B and 106C. The bus line 110 may transfer data. The bus line 110 may receive work history data from each of the resist-applicators 102A, 102B and 102C, the exposure and development apparatuses 103A, 103B and 103C, and the etching apparatuses 104A, 104B and 104C after the individual process has been made. The bus line 110 may receive measured data from each of the resist-pattern- size measuring apparatuses 105A, 105B and 105C, and the wafer-pattern-size measuring apparatuses 106A, 106B and 106C. Each of the exposure and development apparatuses 103A, 103B and 103C may receive the compensated exposure value, so that the exposure process is carried out based on the compensated exposure value.
  • The [0030] system 101 may also include a controller 111, a data base 112, a monitor 113 and an atmospheric pressure measuring apparatus 114, which are connected in parallel to the bus line 110. The data base 112 stores work history data, size-measured data and read exposure values. The work history data are transferred through the bus line 110 from each of the resist-applicators 102A, 102B and 102C, the exposure and development apparatuses 103A, 103B and 103C, and the etching apparatuses 104A, 104B and 104C. The resist pattern size measured data may be transferred through the bus line 110 from each of the resist-pattern- size measuring apparatuses 105A, 105B and 105C. The wafer pattern size measured data may be transferred through the bus line 110 from each of the wafer-pattern-size measuring apparatuses 106A, 106B and 106C.
  • The [0031] controller 111 may fetch the work history data, the resist pattern size measured data and the wafer pattern size measured data through the bus line 110 from the data base 112, so that the controller 111 calculates a compensated exposure value based on the fetched data. The data of calculated compensated exposure values are transferred through the bus line 110 to the data base 112 for storing the data into the data base 112. The process for calculating the compensated exposure value will be described below.
  • The [0032] monitor 113 may monitor data about the compensated exposure values stored in the data base 112 for analysis for those data in below-mentioned processes, in order to verify whether the compensated exposure value is within a predetermined acceptable range. If the compensated exposure value is within the predetermined acceptable range, then the monitor 113 renders the compensated exposure value effective. If the compensated exposure value is not within the predetermined acceptable range, then the monitor 113 renders the compensated exposure value ineffective.
  • The atmospheric [0033] pressure measuring apparatus 114 may measure an atmospheric pressure at a position of the exposure and development apparatuses 103A, 103B and 103C for transmitting data about the measured atmospheric pressures through the bus line 110 to the data base 112 for storing the data in the data base 112. The atmospheric pressure measuring apparatus 114 continuously measures the pressure and renews the atmospheric pressure data for every constant time periods. The atmospheric pressure measuring apparatus 114 may optionally measure other positions of the other apparatus such as the applicators, the measuring apparatuses and the etching apparatus.
  • The wafers are parallel-processed by the above first, second and third manufacturing apparatuses. The manufacturing processes by the above described [0034] system 101 will be described with reference to FIG. 4. Each of the first, second and third resist applicators 102A, 102B and 102C picks up a single wafer from the wafer carrier which contains plural wafers, and applies a resist film on the wafer surface, before pre-bakes the resist film. The wafer with the pre-baked resist film is then contained in the wafer carrier. After all of the wafers in the wafer carrier have been processed by the first, second and third resist applicators 102A, 102B and 102C, then the wafer carrier is carried toward the first, second and third exposure and development apparatuses 103A, 103B and 103C. At the same time, the work history data may also be transferred through the bus line 110 to the data base 112 for storing the same, wherein the work history data may include a carrier data for indicating a carrier for carrying the wafers, a resist data for indicating the kind of the resist film, a process data for indicating the kind of processes, and an output time data for the output time when the carrier is outputted from the applicators 102A, 102B and 102C.
  • The wafer is carried to the first, second and third exposure and [0035] development apparatuses 103A, 103B and 103C. The first, second and third exposure and development apparatuses 103A, 103B and 103C may fetch various wafer-related data based on the carrier ID data from the data base 112 through the bus line 110, prior to the exposure process, so that the first, second and third exposure and development apparatuses 103A, 103B and 103C may receive selected ones or all of the available informations about the wafers to be processed before the exposure process.
  • Each of the first, second and third exposure and [0036] development apparatuses 103A, 103B and 103C picks up a single wafer from the wafer carrier and carries out the compensated exposure value. Usually, the exposure and development apparatus has been set to have a predetermined constant intensity of exposure beam, for which reason the exposure value may be controlled by controlling an exposure time period. Namely, each of the first, second and third exposure and development apparatuses 103A, 103B and 103C may set the exposure time period based on the compensated exposure value for carrying out the exposure process with the controlled exposure time period.
  • Subsequently, each of the first, second and third exposure and [0037] development apparatuses 103A, 103B and 103C may carry out the development process to form a resist pattern over the wafer. This processed wafer is then contained in the carrier. After all of the wafers in the carrier have been processed, then the carrier is carried toward the resist-pattern- size measuring apparatuses 105A, 105B and 105C. At the same time, the first, second and third exposure and development apparatuses 103A, 103B and 103C output the work history data which include the carrier ID data for indicating the carrier of the processed wafers, an exposure and development apparatus indicating data for indicating operated one of the first, second and third exposure and development apparatuses 103A, 103B and 103C, an exposure value data for the exposure value, an exposure time data for indicating when the exposure process is carried out. The work history data are transferred through the bus line 110 to the data base 112.
  • The wafer carrier is then carried to the first, second and third resist-pattern-[0038] size measuring apparatuses 105A, 105B and 105C. Each of the first, second and third resist-pattern- size measuring apparatuses 105A, 105B and 105C picks up a single wafer for measuring a resist pattern size of the wafer. The measured size data of the wafers are then transferred through the bus line 110 to the data base 112.
  • The wafer carrier is further carried to the first, second and [0039] third etching apparatuses 104A, 104B and 104C. Each of the first, second and third etching apparatuses 104A, 104B and 104C picks up a single wafer for etching the wafer by use of the resist pattern as a mask.
  • After all of the wafers in the carrier are etched, then the carrier is carried toward the first, second, and third wafer-pattern-[0040] size measuring apparatus 106A, 106B and 106C. Each of the first, second, and third wafer-pattern-size measuring apparatus 106A, 106B and 106C picks up a single wafer for measuring a size of the wafer pattern defined by the etching process using the resist pattern.
  • The above exposure process by the first, second and third exposure and [0041] development apparatuses 103A, 103B and 103C will be described in detail with reference to FIG. 5.
  • In a step S[0042] 101, the carriers are carried to the first, second and third exposure and development apparatuses 103A, 103B and 103C.
  • In a step S[0043] 102, the controller 111 fetches the work history data stored in the data base 112, wherein the work history data had already been given to the data base 112 from the first, second and third exposure and development apparatuses 103A, 103B and 103C in the past exposure processes. The controller 111 recognizes carrier ID data from the fetched data and also inquires a line system with the carrier ID to recognize process items of the carrier.
  • In a step S[0044] 103, the controller 111 may retrieve, from the data base 112, work history data when the currently processing carrier has been outputted from the resist applicator 102 and process data about the same and similar past items, so that the controller 111 may read data which indicate the kind of the resist film, data which indicates the type of process, and the carrying time, based on the retrieved data.
  • In a step S[0045] 104, the controller 111 may calculate a compensated exposure value for processing the wafers in the currently processing wafer carrier based on those just obtained data and the data previously stored in the database 112.
  • Operations of calculating the compensated exposure value will be described in detail. [0046]
  • In a step S[0047] 104 a, the controller 111 calculates a compensating value for compensation to the reference exposure value. The reference exposure value is defined to be an averaged value of past real exposure values which have been compensated based on the measured size of the resist pattern or the processed wafer pattern for making the resist pattern size correspond to the designed size. The compensating value is a compensating time for adjusting the exposure time.
  • The compensating value may be calculated by the following equations. [0048]
  • Compensating value=[{(size average value)−(center standard value)}×(exposure coefficient)×(adjustment coefficient)]−{(waiting time size variation)×(exposure coefficient)}[0049]
  • (a) size average value is an averaged value of the wafer pattern sizes of the past semiconductor wafers; [0050]
  • (b) center standard value is a target wafer pattern size of the semiconductor wafer; [0051]
  • (c) exposure coefficient is the exposure value when the resist pattern size is varied by 1 micrometers. [0052]
  • (d) adjustment coefficient is the value designed based on a pattern size variation tendency which has been obtained experimentally from the kind of resist film, the kind of the exposure apparatus, and the characteristics of the exposure apparatus. [0053]
  • (e) waiting time size variation is a time-dependent variation in size of the resist pattern, which depends on the waiting time. [0054]
  • The size average value, the center standard value, the exposure coefficient, the adjustment coefficient and the waiting time size variation may be obtained from the past processes for the semiconductor wafers, and also have been stored in the [0055] data base 112.
  • The [0056] controller 111 read out, from the data base, the size average value, the center standard value, the exposure coefficient, the adjustment coefficient and the waiting time size variation. Further, the controller 111 calculates the waiting time from the work history data from the resist applicator 102 and the carrying time data for the time when the carrier is carried to the exposure and development apparatus. The waiting time size variation is obtained based on the waiting time. The exposure coefficient and the adjustment coefficient are respectively obtained based on the work history data and the exposure process data. The the size average value, the center standard value, the exposure coefficient, the adjustment coefficient and the waiting time size variation are incorporated into the above equation to obtain the compensating value.
  • In a step S[0057] 104 b, the compensated exposure value is obtained by subtracting the compensating value from the reference exposure value.
  • compensated exposure value=[(reference exposure value)−(compensating value)][0058]
  • The reference exposure value is an averaged value of the real exposure values for past-processing the same and/or similar items. [0059]
  • In a step S[0060] 105, the compensated exposure value is transferred through the bus line 110 to the data base 112.
  • In a step S[0061] 106, the exposure and development apparatus 103 carries out the exposure process at a controlled exposure time period which depending on the compensated exposure value.
  • This compensated exposure value was based on the data obtained immediately after the operations by the [0062] controller 111. Namely, the compensated exposure value was based on the resist pattern size data of the prior semiconductor wafers measured by the resist-pattern-size measuring apparatuses 105 and also based on the wafer pattern size data of the prior semiconductor wafers measured by the wafer-pattern-size measuring apparatuses 106. The compensation to the exposure value may be realized by real time base.
  • The above sequential steps S[0063] 105 and S106 are repeated for processing all of the wafer carriers.
  • All of the data outputted from the resist [0064] applicators 102, the exposure and development apparatuses 103, the etching apparatuses 104, the resist-pattern-size measuring apparatuses 105 and the wafer-pattern-size measuring apparatuses 106 are stored in the data base 112. The controller 111 may calculate the compensated exposure value based on the updated data in the data base 112 in order to realize a real-time response to the size variation due to the variable waiting time. This allows a highly accurate pattern size of the semiconductor wafer. Particularly, if the exposure process is carried out immediately after the resist film is applied on the wafer surface, then the exposure process at the compensated exposure value may avoid the resist pattern size variation. It is unnecessary for reducing the resist pattern size variation to take a long waiting time for subsequent exposure process for the pre-baked wafer. This means it possible to increase the throughput.
  • Optionally, it is possible that the compensated exposure value may be calculated in further consideration of an atmospheric pressure data measured by the atmospheric [0065] pressure measuring apparatus 114. The measured atmospheric pressure is transferred through the bus line 110 to the data base 112, and the atmospheric pressure data is stored therein. The controller 111 may read out the current pressure data from the data base 112 for compensating the current pressure data to a reference pressure data to obtain a pressure difference between them. The compensating value may be calculated in further reference to the pressure difference. The drop of the pressure increases the thickness of the resist film.
  • Variation in pressure causes variation in refractive index of the optical system of the exposure apparatus, whereby a focusing position is varied. Those factors vary the resist pattern size. The possible pattern size variation is estimated based on the variation of the atmospheric pressure and the compensating value to the reference exposure value is calculated based on not only the above variable factors but also the atmospheric pressure variation. [0066]
  • The [0067] monitor 113 continuously monitors the individual data stored in the data base 112 for analysis to the data. The monitor 113 refers the past compensated exposure values for the same or similar items and processes to obtain an averaged compensated exposure value. The monitor 113 verifies whether the currently calculated compensated exposure value is within a predetermined acceptable range, which has a center value corresponding to the averaged compensated exposure value. The predetermined acceptable range may, for example, be −10% to +10%.
  • If the currently calculated compensated exposure value is not within the predetermined acceptable range, then the [0068] monitor 113 renders the currently calculated compensated exposure value ineffective for inhibiting the controller 111 to use the currently calculated compensated exposure value, and in place instructs the controller 111 to select the past-calculated compensated exposure value. The exposure and development apparatus 103 carries out the exposure process at the past-calculated compensated exposure value.
  • If the currently calculated compensated exposure value is not within the predetermined acceptable range, then the [0069] monitor 113 renders the currently calculated compensated exposure value effective for enabling the controller 111 to use the currently calculated compensated exposure value, whereby the exposure and development apparatus 103 carries out the exposure process at the currently calculated compensated exposure value.
  • In the above-described embodiment, the wafer carrier is an unit for the individual processes for batch-processing the plural wafers. It is, however, possible to apply the present invention to a single wafer process system, wherein the wafers are separately processed. In this case, the compensating value for compensating the reference exposure value is obtained based on the last-updated data stored in the data base. This allows the resist pattern to have a highly accurate size. [0070]
  • In the in-line system for flow processes, if a part of the in-line system has a fault and the sequential processes are temporally discontinued, the waiting time is unexpectedly long. In this case, the present invention is effective to avoid the pattern size variation. [0071]
  • In the above-described embodiment, the system includes the unitary formed exposure and development apparatus which carry out both sequential exposure and development processes. It is, of course, possible to apply the present invention to another system which includes an exposure apparatus and a development apparatus separately. [0072]
  • Although the invention has been described above in connection with several preferred embodiments therefor, it will be appreciated that those embodiments have been provided solely for illustrating the invention, and not in a limiting sense. Numerous modifications and substitutions of equivalent materials and techniques will be readily apparent to those skilled in the art after reading the present application, and all such modifications and substitutions are expressly understood to fall within the true scope and spirit of the appended claims. [0073]

Claims (28)

What is claimed is:
1. A system for determining an exposure value for exposing a resist film, said system comprising:
means for estimating a size variation of a resist pattern from a predetermined target size with reference to a waiting time of a currently processing resist film to be patterned in subsequent exposure process; and
means for compensating a reference exposure value based on said size variation to obtain a compensated exposure value.
2. The system as claimed in claim 1, wherein said compensating means determines said reference exposure value based on an averaged value of past real exposure values for selected wafers having same or similar item to said currently processing wafer.
3. The system as claimed in claim 1, wherein said estimating means estimates said size variation of said resist pattern with further reference to a measured pattern size average value of past-processed wafers, and said predetermined target size.
4. The system as claimed in claim 3, wherein said estimating means estimates said size variation of said resist pattern with further more reference to an exposure coefficient and an adjustment coefficient.
5. The system as claimed in claim 4, wherein said estimating means estimates said size variation of said resist pattern with further more reference to a currently measured atmospheric pressure.
6. The system as claimed in claim 1, wherein said estimating means determines said waiting time to be a time between an output time of a currently processing wafer with said currently processing resist film from a resist film applicator and an input time of said currently processing wafer into an exposure and development apparatus.
7. The system as claimed in claim 1, further comprising:
means for verifying whether said compensated exposure value is within a predetermined acceptable range having a center value which corresponds to an averaged value of past real exposure values for selected wafers having same or similar item to said currently processing wafer; and
means for rendering said compensated exposure value effective if said compensated exposure value is within said predetermined acceptable range, and rendering said compensated exposure value ineffective and determining to use a past-real used one of compensated exposure values if said compensated exposure value is not within said predetermined acceptable range.
8. A computer-readable program for determining an exposure value for exposing a resist film, said program comprising the steps of:
estimating a size variation of a resist pattern from a predetermined target size based on a waiting time of a currently processing resist film to be patterned in subsequent exposure process; and
compensating a reference exposure value based on said size variation to obtain a compensated exposure value.
9. The program as claimed in claim 8, wherein said reference exposure value is determined based on an averaged value of past real exposure values for selected wafers having same or similar item to said currently processing wafer.
10. The program as claimed in claim 8, wherein said size variation of said resist pattern is estimated with further reference to a measured pattern size average value of past-processed wafers, and said predetermined target size.
11. The program as claimed in claim 10, wherein said size variation of said resist pattern is estimated with further more reference to an exposure coefficient and an adjustment coefficient.
12. The program as claimed in claim 11, wherein said size variation of said resist pattern is estimated with further more reference to a currently measured atmospheric pressure.
13. The program as claimed in claim 8, wherein said waiting time is determined between an output time of a currently processing wafer with said currently processing resist film from a resist film applicator and an input time of said currently processing wafer into an exposure and development apparatus.
14. The program as claimed in claim 8, further comprising steps of:
verifying whether said compensated exposure value is within a predetermined acceptable range having a center value which corresponds to an averaged value of past real exposure values for selected wafers having same or similar item to said currently processing wafer;
rendering said compensated exposure value effective if said compensated exposure value is within said predetermined acceptable range; and
rendering said compensated exposure value ineffective and determining to use a past-real used one of compensated exposure values if said compensated exposure value is not within said predetermined acceptable range.
15. A semiconductor manufacturing system comprising:
a data base for storing any data;
a data transfer line connected to said data base for transferring data to said data base;
at least a resist applicator for applying a resist film on a semiconductor wafer, and said resist applicator being connected to said data transfer line for supplying a first work history data set to said data base through said data transfer line;
at least an exposure apparatus for carrying out an exposure processes to said resist film on said semiconductor wafer, and said exposure apparatus being connected to said data transfer line for supplying a second work history data set to said data base through said data transfer line;
at least a resist pattern size measuring apparatus for measuring a resist pattern size of said semiconductor wafer, and said resist pattern size measuring apparatus being connected to said data transfer line for supplying a resist pattern size data to said data base through said data transfer line;
at least an etching apparatus for etching said semiconductor wafer with said resist pattern;
at least a wafer pattern size measuring apparatus for measuring a wafer pattern size of said semiconductor wafer, and said wafer pattern size measuring apparatus being connected to said data transfer line for supplying a wafer pattern size data to said data base through said data transfer line; and
a controller being connected to said data transfer line for receiving said first and second work history data sets, said resist pattern size data and said wafer pattern size data from said data base, and said controller calculating a compensated exposure value based on said first and second work history data sets, said resist pattern size data and said wafer pattern size data and supplying said compensated exposure value to said exposure apparatus through said data transfer line.
16. The system as claimed in claim 15, wherein said controller further supplies said compensated exposure value to said data base through said data transfer line.
17. The system as claimed in claim 15, wherein said exposure apparatus comprises an exposure and development apparatus for carrying out sequential exposure and development processes to obtain said resist pattern.
18. The system as claimed in claim 15, further comprising a development apparatus separately from said exposure apparatus, and said development apparatus carrying out a development of exposed resist film to obtain said resist pattern.
19. The system as claimed in claim 15, wherein said controller estimates a size variation of a resist pattern from a predetermined target size based on a waiting time of a currently processing resist film to be patterned in subsequent sequential exposure and development processes, and said controller compensates a reference exposure time period based on said size variation to obtain a compensated exposure time period.
20. The system as claimed in claim 15, wherein said controller estimates a size variation of a resist pattern from a predetermined target size based on a waiting time of a currently processing resist film to be patterned in subsequent exposure process, and said controller compensates a reference exposure value based on said size variation to obtain a compensated exposure value.
21. The system as claimed in claim 15, further comprising a monitor being connected to said data transfer line for monitoring updated data stored in said data base, and said monitor further verifying whether said compensated exposure value is within a predetermined acceptable range having a center value which corresponds to an averaged value of past real exposure values for selected wafers having same or similar item to said currently processing wafer, and said monitor rendering said compensated exposure value effective if said compensated exposure value is within said predetermined acceptable range; and said monitor rendering said compensated exposure value ineffective and determining to use a past-real used one of compensated exposure values if said compensated exposure value is not within said predetermined acceptable range.
22. The system as claimed in claim 15, further comprising an atmospheric pressure measuring apparatus for measuring an atmospheric pressure, and said atmospheric pressure measuring apparatus being connected to said data transfer line for supplying a measured atmospheric pressure data to said data base through said data transfer line.
23. An exposure system comprising:
a data base for storing any data;
a data transfer line connected to said data base for transferring data to said data base;
at least an exposure apparatus for carrying out an exposure processes to said resist film on said semiconductor wafer, and said exposure apparatus being connected to said data transfer line for supplying a work history data set to said data base through said data transfer line; and
a controller being connected to said data transfer line for receiving said work history data set and a past-exposure value data set from said data base, and said controller calculating a compensated exposure value based on said work history data set and said past-exposure value data set.
24. The system as claimed in claim 23, wherein said controller further supplies said compensated exposure value to said data base through said data transfer line.
25. The system as claimed in claim 23, wherein said exposure apparatus comprises an exposure and development apparatus for carrying out sequential exposure and development processes to obtain said resist pattern.
26. The system as claimed in claim 23, said exposure apparatus is separated from a development apparatus for carrying out a development of exposed resist film to obtain said resist pattern.
27. The system as claimed in claim 23, wherein said controller estimates a size variation of a resist pattern from a predetermined target size based on a waiting time of a currently processing resist film to be patterned in subsequent sequential exposure and development processes, and said controller compensates a reference exposure time period based on said size variation to obtain a compensated exposure time period.
28. The system as claimed in claim 23, wherein said controller estimates a size variation of a resist pattern from a predetermined target size based on a waiting time of a currently processing resist film to be patterned in subsequent exposure process, and said controller compensates a reference exposure value based on said size variation to obtain a compensated exposure value.
US10/387,389 2000-05-30 2003-03-14 Method and system for compensating exposure value for exposure process as well as exposure system and semiconductor manufacturing system Abandoned US20030164932A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/387,389 US20030164932A1 (en) 2000-05-30 2003-03-14 Method and system for compensating exposure value for exposure process as well as exposure system and semiconductor manufacturing system

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2000-159933 2000-05-30
JP2000159933A JP2001338865A (en) 2000-05-30 2000-05-30 Semiconductor exposure method and semiconductor manufacturing apparatus
US09/866,617 US6599670B2 (en) 2000-05-30 2001-05-30 Method for compensating exposure value for exposure process in semiconductor manufacturing system
US10/387,389 US20030164932A1 (en) 2000-05-30 2003-03-14 Method and system for compensating exposure value for exposure process as well as exposure system and semiconductor manufacturing system

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US09/866,617 Division US6599670B2 (en) 2000-05-30 2001-05-30 Method for compensating exposure value for exposure process in semiconductor manufacturing system

Publications (1)

Publication Number Publication Date
US20030164932A1 true US20030164932A1 (en) 2003-09-04

Family

ID=18664198

Family Applications (2)

Application Number Title Priority Date Filing Date
US09/866,617 Expired - Fee Related US6599670B2 (en) 2000-05-30 2001-05-30 Method for compensating exposure value for exposure process in semiconductor manufacturing system
US10/387,389 Abandoned US20030164932A1 (en) 2000-05-30 2003-03-14 Method and system for compensating exposure value for exposure process as well as exposure system and semiconductor manufacturing system

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US09/866,617 Expired - Fee Related US6599670B2 (en) 2000-05-30 2001-05-30 Method for compensating exposure value for exposure process in semiconductor manufacturing system

Country Status (3)

Country Link
US (2) US6599670B2 (en)
JP (1) JP2001338865A (en)
KR (1) KR20010109486A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040008329A1 (en) * 2002-07-12 2004-01-15 Mitsubishi Denki Kabushiki Kaisha Exposure condition determination system
US20050177263A1 (en) * 2004-02-09 2005-08-11 Macronix International Co., Ltd. System and method for monitoring wafer furnace production efficiency
DE102004022329B3 (en) * 2004-05-06 2005-12-29 Infineon Technologies Ag Dynamic dosage adaptation method in lithography projector, involves setting exposure amount for each light exposure area, based on difference between time set for exposing each exposure area and time set for stabilizing resist layer
CN107533955A (en) * 2015-04-16 2018-01-02 东京毅力科创株式会社 Substrate processing method using same, base plate processing system and substrate board treatment
CN108288579A (en) * 2017-01-10 2018-07-17 中芯国际集成电路制造(上海)有限公司 A kind of patterning method of photoresist layer and the production method of semiconductor devices

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW503479B (en) * 2001-08-16 2002-09-21 Mosel Vitelic Inc Exposure time determination method of wafer photolithography process
JP4249139B2 (en) 2003-04-23 2009-04-02 富士通マイクロエレクトロニクス株式会社 Semiconductor device manufacturing method and semiconductor device manufacturing system
JP4209373B2 (en) * 2003-10-13 2009-01-14 エーエスエムエル ネザーランズ ビー.ブイ. Lithographic apparatus or method of operating a lithographic processing cell, lithographic apparatus and lithographic processing cell
US7218983B2 (en) * 2003-11-06 2007-05-15 Applied Materials, Inc. Method and apparatus for integrating large and small lot electronic device fabrication facilities
US20050209721A1 (en) * 2003-11-06 2005-09-22 Applied Materials, Inc. Methods and apparatus for enhanced operation of substrate carrier handlers
US7720557B2 (en) 2003-11-06 2010-05-18 Applied Materials, Inc. Methods and apparatus for enhanced operation of substrate carrier handlers
JP2005197362A (en) * 2004-01-05 2005-07-21 Toshiba Corp System and method for exposure processing
JP4682734B2 (en) * 2005-07-29 2011-05-11 凸版印刷株式会社 Photomask pattern drawing method
US7194328B1 (en) * 2006-04-04 2007-03-20 Advanced Micro Devices, Inc. Method and apparatus for tracking reticle history
US8050793B1 (en) 2006-04-04 2011-11-01 Advanced Micro Devices, Inc. Method and apparatus for linking reticle manufacturing data
JP4683163B2 (en) * 2010-10-29 2011-05-11 凸版印刷株式会社 Photomask pattern drawing method
TWI551205B (en) * 2013-06-20 2016-09-21 欣興電子股份有限公司 Method for compensating an exposure image
KR20230124759A (en) * 2015-04-16 2023-08-25 도쿄엘렉트론가부시키가이샤 Substrate processing method, substrate processing system and substrate processing apparatus
JP7117366B2 (en) * 2018-02-16 2022-08-12 東京エレクトロン株式会社 Substrate processing equipment
CN110794656A (en) * 2018-08-03 2020-02-14 夏普株式会社 Method for manufacturing substrate having resist film formed thereon and process control system therefor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5409538A (en) * 1990-04-13 1995-04-25 Hitachi, Ltd. Controlling method of forming thin film, system for said controlling method, exposure method and system for said exposure method
US6570643B1 (en) * 2000-01-28 2003-05-27 Mitsubishi Denki Kabushiki Kaisha Semiconductor device, manufacturing method thereof and semiconductor manufacturing system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08172046A (en) 1994-12-16 1996-07-02 Nippon Steel Corp Semiconductor production device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5409538A (en) * 1990-04-13 1995-04-25 Hitachi, Ltd. Controlling method of forming thin film, system for said controlling method, exposure method and system for said exposure method
US6570643B1 (en) * 2000-01-28 2003-05-27 Mitsubishi Denki Kabushiki Kaisha Semiconductor device, manufacturing method thereof and semiconductor manufacturing system

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040008329A1 (en) * 2002-07-12 2004-01-15 Mitsubishi Denki Kabushiki Kaisha Exposure condition determination system
US6801297B2 (en) * 2002-07-12 2004-10-05 Renesas Technology Corp. Exposure condition determination system
US20050177263A1 (en) * 2004-02-09 2005-08-11 Macronix International Co., Ltd. System and method for monitoring wafer furnace production efficiency
US7151975B2 (en) * 2004-02-09 2006-12-19 Macronix International Co., Ltd. System and method for monitoring wafer furnace production efficiency
DE102004022329B3 (en) * 2004-05-06 2005-12-29 Infineon Technologies Ag Dynamic dosage adaptation method in lithography projector, involves setting exposure amount for each light exposure area, based on difference between time set for exposing each exposure area and time set for stabilizing resist layer
CN107533955A (en) * 2015-04-16 2018-01-02 东京毅力科创株式会社 Substrate processing method using same, base plate processing system and substrate board treatment
US10520831B2 (en) 2015-04-16 2019-12-31 Tokyo Electron Limited Substrate processing method, substrate processing system and substrate processing apparatus
CN108288579A (en) * 2017-01-10 2018-07-17 中芯国际集成电路制造(上海)有限公司 A kind of patterning method of photoresist layer and the production method of semiconductor devices
CN108288579B (en) * 2017-01-10 2021-02-23 中芯国际集成电路制造(上海)有限公司 Patterning method of photoresist layer and manufacturing method of semiconductor device

Also Published As

Publication number Publication date
KR20010109486A (en) 2001-12-10
JP2001338865A (en) 2001-12-07
US6599670B2 (en) 2003-07-29
US20020009657A1 (en) 2002-01-24

Similar Documents

Publication Publication Date Title
US6599670B2 (en) Method for compensating exposure value for exposure process in semiconductor manufacturing system
TWI281722B (en) Method and apparatus for embedded process control framework in tool systems
US5661669A (en) Method for controlling semiconductor wafer processing
JPH04305913A (en) Lithographic information management system
KR100337600B1 (en) System For Photo-Exposure Time Control
JP4088588B2 (en) Photolithographic short dimension control using reticle measurements
US6895295B1 (en) Method and apparatus for controlling a multi-chamber processing tool
KR100383499B1 (en) Semiconductor device, manufacturing method of the same, and semiconductor manufacturing system
US7006195B2 (en) Method and system for improving exposure uniformity in a step and repeat process
JP2004524637A (en) Method for adjusting processing parameters of at least one plate-like object in a processing tool
JP2002050562A (en) Apparatus for manufacturing semiconductor, method for manufacturing semiconductor device and the semiconductor device
US7414713B2 (en) Method of measuring focal point, instrument used therefor, and method of fabricating semiconductor device
JP2006108474A (en) Exposure device and display manufacturing method using the same
JP2004079681A (en) Exposure method of substrate and substrate processing apparatus
US7630052B2 (en) Exposure processing system, exposure processing method and method for manufacturing a semiconductor device
JP2004207611A (en) Printed wiring board manufacturing device and printed wiring board manufacturing method
US5858590A (en) Method for forming photoresist patterns
JP3272815B2 (en) Resist sensitivity adjustment apparatus and method
KR20010058692A (en) Method for correcting an overlay parameters of a semiconductor wafer
KR100801844B1 (en) Hot plate and method for improving critical diameter uniformity using the same
US6816230B2 (en) Exposure control apparatus in a lithography system and method thereof
JP6381180B2 (en) Exposure apparatus, information management apparatus, exposure system, and device manufacturing method
KR19980068739A (en) Exposure Time Control Method in Semiconductor Manufacturing Process
KR20020089595A (en) Method for amending image in process for manufacturing semiconductor device
KR19980067203A (en) Spacer Formation Method of Semiconductor Device

Legal Events

Date Code Title Description
AS Assignment

Owner name: NEC ELECTRONICS CORPORATION, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:NEC CORPORATION;REEL/FRAME:013700/0267

Effective date: 20030520

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION