WO2016030195A1 - Verfahren zur herstellung eines mehrschichtsubstrats und mehrschichtsubstrat - Google Patents
Verfahren zur herstellung eines mehrschichtsubstrats und mehrschichtsubstrat Download PDFInfo
- Publication number
- WO2016030195A1 WO2016030195A1 PCT/EP2015/068572 EP2015068572W WO2016030195A1 WO 2016030195 A1 WO2016030195 A1 WO 2016030195A1 EP 2015068572 W EP2015068572 W EP 2015068572W WO 2016030195 A1 WO2016030195 A1 WO 2016030195A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- contact
- hole
- connection
- metal
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
- H05K3/247—Finish coating of conductors by using conductive pastes, inks or powders
- H05K3/248—Finish coating of conductors by using conductive pastes, inks or powders fired compositions for inorganic substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
- H05K3/4605—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated made from inorganic insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
Definitions
- a ceramic multilayer substrate is specified.
- the multi-layer substrate serves as a carrier for components, in particular for electrical components.
- the multilayer substrate has a via (via), which, for example, for contacting a component with a
- Pads are produced by depositing a metal on the ceramic substrate.
- a base body having several ceramic layers is provided. At least one of the layers, in particular an outermost layer of the
- Main body has a hole.
- the hole is filled with a metal by depositing the metal from a solution.
- a via can be produced by at least one layer.
- the ceramic composite is produced in LTCC or HTCC technology.
- Layer stack is provided with a hole.
- the hole is introduced, for example, by means of a laser or by punching.
- the layer stack is sintered.
- the hole is filled after sintering by depositing a metal from a solution.
- the hole is completely filled.
- the metal contains or is, for example, copper.
- the surface becomes the cathode, where the metal separates from the solution.
- a seed layer can be applied to the surface which facilitates the deposition of the metal or even makes it possible for the first time
- Through-hole can be used.
- Multilayer substrate specified wherein the multi-layer substrate has a base body with a plurality of ceramic layers
- At least one of the layers has a
- the hole and, correspondingly, the via formed by deposition of the metal pass through only part of the ceramic layers.
- the plated through hole only passes through the outermost ceramic layer.
- Embodiment performs the hole and accordingly through the Deposition formed through hole through several ceramic layers.
- the via can also pass through the entire layer stack.
- the multilayer substrate has a further contact, which is arranged in the interior of the base body and is connected to the through-connection. In one embodiment, this differs
- the via has, for example, copper.
- the further contact has the same material as the via.
- both the further contacting and the plated-through hole comprise copper or consist essentially of copper.
- the further contacting has an inner layer which is arranged on a ceramic layer in the interior of the main body.
- the inner layer is For example, realized a passive component or a wiring structure.
- the inner layer is
- the further contacting can have a further through-connection, which passes through
- the further via leads the via formed by deposition into the interior of the
- a terminal contact is also connected to connect the metal
- connection contact is arranged, for example, from a view of the outside from above the via.
- the connection contact may be formed as a connection surface.
- the pad for example, has a greater width than the via.
- the terminal contact is preferably made in the same process as the via.
- the terminal contact preferably has the same material as the
- connection contact can for
- Training a flat, solderable and bondable surface additionally be provided with a cover layer.
- the capping layer may contain a metal that is de-energized or deposited with the connection of an external power source. For example, it is about
- Nickel, palladium, gold, silver and / or tin are deposited by deposition
- Connection contact can be generated a particularly flat surface of the terminal. This allows it
- the terminal contact is in the form of a bump or a pillar.
- connection contact is off the main body.
- a component can be set at a distance from the surface of the body.
- Solder balls required for attachment of the device Such a configuration of the connection contact allows a further increase in the packing density of the components.
- a multilayer substrate is provided, wherein the
- Multi-layer substrate a basic body with several
- the multilayer substrate has a via and an associated one
- the further contact has a different material than the via and / or is produced with a different manufacturing method than the via.
- the further contacting comprises silver and the plated-through hole comprises copper.
- the further contacting comprises silver and the plated-through hole comprises copper.
- the through-connection is produced, for example, only after the sintering of the main body, in particular by depositing a metal from a solution.
- a multilayer substrate has a base body with a plurality of ceramic layers, wherein the base body is made in HTCC technology and has an electrical contact, which leads through at least one of the layers, wherein the
- Through-hole copper contains.
- the plated-through hole is introduced, for example, by depositing a metal from a solution after sintering of the base body.
- HTCC technology uses tungsten or molybdenum as the materials for via.
- a through-hole made of copper allows among other things a cost saving and a better thermal and electrical conductivity.
- FIG. 2A is a cross-sectional view of a further embodiment of a multilayer substrate
- FIG. 2B shows in a cross section a further embodiment of a multilayer substrate
- FIGS. 3A to 3D method steps in a method for
- FIG. 1 shows, in a cross-section, a multilayer substrate 1 with a main body 26, which has several, one above the other
- Multilayer substrate 1 has an electrical contact 3, which has a through-connection 4 and a connection contact 5.
- the connection contact 5 is designed as a connection surface.
- the electrical contact 3 is in particular for contacting a component, for example one Chips (not shown) formed on the multilayer substrate.
- the component is an LED, a sensor, a SAW filter or a fluidic reactor. In particular, it may be an electrical component.
- Multilayer substrate serves, for example, as a carrier for the component and / or as an encapsulation, in particular in the form of a so-called package.
- a carrier for the component and / or as an encapsulation, in particular in the form of a so-called package.
- the component connected by a bonding wire to the terminal contact 5.
- the component can also be connected to the connection contact 5 by solder balls.
- connection contact 5 can also be used as a mechanical and / or electrical connection of a cover or a further substrate, for example for the formation of a
- Package-on-package systems serve.
- the further component is soldered or glued onto the connection contact 5.
- the via 4 leads from an outer side 6 of the
- Multilayer substrate 1 through an outermost ceramic layer 7, for example, the uppermost layer of the layer stack, therethrough.
- the plated-through hole 4 extends from the terminal contact 5 into the interior of the substrate 1
- Through-hole 4 is designed as a so-called blind via, that is, it does not pass completely through the substrate.
- the connection contact 5 is arranged on the outer side 6 of the main body 26, in particular on an outermost layer 7.
- the connection contact 5 is formed integrally with the feedthrough 4.
- the connection contact 5 is formed integrally with the feedthrough 4.
- Through-hole 4 and the terminal contact 5 are formed from the same material and are produced in the same process.
- the via 4 and the terminal 5 copper on and are by
- the via 4 has, for example, a width of 80 ym.
- the connection contact 5 in the form of a
- Terminal surface is much wider than that
- the pad has a width of 250 ym and a height of 20 ym.
- FIGS. 2A and 2B show in each case a cross-section of a multilayer substrate 1, in which the connection contact 5 is additionally provided with a cover layer 8.
- Covering layer 8 is applied to a base layer 9, which is formed like the connection contact 5 in FIG. Through the cover layer 8 receives the connection contact 5 a
- Cover 8 may also provide protection against corrosion.
- the cover layer 8 may be formed in multiple layers.
- the cover layer 8 has a nickel and a silver layer, the nickel layer acting as a solder barrier.
- the cover layer 8 for example, a nickel and a gold layer.
- a palladium layer may be applied to the nickel layer.
- the cover layer 8 is constructed, for example, with Ni-Au or Ni-Pd-Au multilayer.
- Terminal contact 5 has an open edge 10.
- the base layer 9 for example, after the Applying the cover layer 8 structured, as will be explained below to Figures 3A to 3D.
- Covering layer 8 also the lateral areas of the base layer 9, so that the base layer 9 is completely covered by the cover layer 8.
- the base layer 9 is patterned, for example, even before the application of the cover layer 8, as will be explained below with reference to FIGS. 3A to 3D.
- FIGS. 3A to 3D show method steps for
- FIG. 3A shows a base body 26 for a multilayer substrate.
- main body 26 for a multilayer substrate.
- the green sheet which later forms the outermost ceramic layer 7, is provided with a hole 27.
- the hole becomes
- the green sheets contain, for example, a ceramic powder, a binder and a glass fraction as a sintering aid.
- a ceramic powder for example, alumina is used as the ceramic powder
- the LTCC (low
- temperature cofired ceramics technology
- HTCC high temperature cofired ceramics
- very high temperature for example in the range of 1600 ° C sintered.
- the green sheets here contain no glass content.
- the surface of the ceramic is pretreated, so that a deposition of a metal to form the electrical contact is facilitated or only possible.
- FIG. 3B shows schematically the step for pretreatment of the surface.
- a seed layer is created within the hole 27 and on the outside of the main body 26.
- the seed layer is for example 100 nm - 500 nm thick.
- the surface within the hole 27 and on the outside 6 of the body 26 is chemically activated. Upon activation, the surface becomes
- Example of a palladium chloride solution treated In the process, palladium atoms are deposited on the surface, which catalyze the further metallization.
- the seed layer can also be applied by sputtering or by means of a PVD (Physical Vapor Deposition) method.
- the seed layer has, for example, titanium, copper and / or chromium.
- FIG. 3C shows the multilayer substrate 1, in which a metallization 28 is deposited in the hole 27 and on the outside 6. The hole 27 is completely filled with the metal.
- copper is deposited. This can be done in two Stages are carried out, initially a relatively thin
- connection contact 5 Copper layer is deposited electrolessly and then galvanically reinforced. Subsequently, the metallization 28 is structured to form the connection contact 5. For this purpose, for example, a photoresist mask on the metallization 28 at the
- connection contact 5 Applied outside 6 of the layer stack, exposed and developed according to a desired pattern. There are now not provided for the connection contact 5
- Figure 3D shows the multilayer substrate with the now
- the plated-through hole 4 and the terminal contact 5 do not have a sintered metal paste. This allows an increase in the packing density of the components.
- the plated-through hole 4 and the terminal contact 5 do not have a sintered metal paste. This allows an increase in the packing density of the components.
- Terminal contact 5 are structured in the described method with a better resolution than is possible in a printing with a paste by screen printing.
- connection contacts 5 for example with a gap of 30 ym, can be generated. Furthermore, a connection contact 5 with a particularly flat
- Base 26 be formed very thin, since this
- Layers 7, 16 in the green state no longer have to have a mechanical stability required for applying or introducing a paste.
- the via 4 in the interior of the substrate is followed by a further contact, which has a sintered paste.
- a paste is applied on a green sheet or within a hole in a green sheet, which is then baked with the layer stack. In particular, it is a thick-film paste.
- a metallization 28 is first generated after the activation, as described above. On the metallization 28, a photoresist layer is applied, exposed and
- connection contact 5 areas remain free. In these uncovered areas is now on the metallization 28 under connection of a power source or with an electroless method
- Etching step performed until the metallization 28 is removed on the previously covered by the photoresist mask areas to the substrate. After the etching of the photoresist mask, for example, an open sandwiched Cu-Ni-Ag edge 10 is obtained, as can be seen in FIG. 2A.
- the cover layer is applied only after the structuring of the base metallization.
- the topcoat is in a chemical
- the cover layer 8 also covers the lateral regions of the base layer 9, as can be seen in FIG. 2B.
- the structuring of the base metallization may take place in the manner described above
- subtractive methods also take place in an additive process. For this purpose, for example, after the activation of the surface, a photoresist mask is applied.
- Photoresist mask is attached to the connector
- the lacquer layer is removed at the exposed areas, so that at least one
- Figure 4 shows a multilayer substrate 1, the two by
- Connection contacts 5 has.
- the two vias 4 have, for example, a distance of 400 ym to 500 ym. But it can also be smaller distances, for example, in the range of 100 ym are generated.
- the plated-through holes 4 are each connected to a further contact 11 in the interior of the substrate 1.
- Through hole 12 which continues the through-hole 4 produced by deposition into the interior of the substrate 1 inside.
- the further via 12 leads through two further ceramic layers 2.
- the further via 12 is formed from a baked paste. These are in the green films for the
- the paste is sintered together with the green sheets.
- the via 12 may also comprise copper.
- the via 12 may also comprise copper.
- a plurality of metallic inner layers 13 are provided between ceramic layers 2, wherein one of the
- Inner layers 13 is electrically connected to the other vias 12.
- the inner layers 13 for example, passive components and interconnection structures are realized.
- the inner layers 13 are formed by a baked paste. For this, the green sheets are printed with the paste, laminated and sintered.
- FIG. 5 shows a further embodiment of a
- Multilayer substrate 1 Here, electrical contacts 3, 17 produced by deposition are provided on both a bottom side 15 and an upper side 14.
- Contacts 3, 17 each have vias 4, 18 on.
- the plated-through holes 4, 18 each pass only through the outermost layer 7, 16 of the substrate 1.
- the contact 3 on the underside 15 has a through-connection 4 produced by deposition, which is connected directly to an inner layer 13.
- the inner layer 13 is formed by a baked paste.
- the contacting 17 on the upper side 14 has a through-connection 18 produced by deposition, which is connected to a further through-connection 12.
- the further through-connection 12 is formed by a baked-on paste and leads through several ceramic layers 2 into the interior of the substrate 1.
- the contact 17 on the top 14 has a
- Terminal contact 19 in the form of a bump.
- Terminal contact 19 is formed like the connection area shown in the preceding figures for contacting a component.
- the bump is integral with the feedthrough 18
- FIG. 6 shows a further embodiment for a metal from a solution.
- a metal for example, it is a Cu-bump.
- the terminal 19 may be provided with a coating, such as a tin coating, thereby enabling Cu-Sn diffusion bonding. But it is also possible Cu-Cu bonding.
- FIG. 6 shows a further embodiment for a
- Multi-layer substrate 1 The individual ceramic layers are not shown for reasons of clarity. There are several generated by deposition Through contacts 4, 20, 21 formed. A via 4 passes only through the outermost layer 7 and is connected to a further contact 11 formed by a baked paste.
- a via 21 is not connected to any further contact.
- the other via 20 is connected to a
- FIG. 7 shows a further embodiment of a
- Multi-layer substrate 1 in which the connection contacts 22 are formed in a columnar shape. These are so-called pillars, which are used in particular in power amplifiers.
- a component 23 is attached on the multi-layer substrate 1.
- connection contacts 22 are produced by deposition of a metal from a solution and connected to plated-through holes 4.
- the connection contacts 22 can be generated together with the plated-through holes 4.
- a solder layer 24 On the connection contacts 22 is a solder layer 24 for
- the component 23 also has columnar connection contacts 25 which are placed on the terminal contacts 22 of the substrate 1 and connected thereto by the solder layer 24.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP15750994.4A EP3187029A1 (de) | 2014-08-28 | 2015-08-12 | Verfahren zur herstellung eines mehrschichtsubstrats und mehrschichtsubstrat |
JP2016570822A JP2017523598A (ja) | 2014-08-28 | 2015-08-12 | 多層基板を製造するための方法および多層基板 |
CN201580052339.9A CN106688311A (zh) | 2014-08-28 | 2015-08-12 | 用来制造多层基底的方法以及多层基底 |
US15/315,359 US20170311455A1 (en) | 2014-08-28 | 2015-08-12 | Method for Producing a Multi-Layer Substrate and Multi-Layer Substrate |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102014112365.4 | 2014-08-28 | ||
DE102014112365.4A DE102014112365A1 (de) | 2014-08-28 | 2014-08-28 | Verfahren zur Herstellung eines Mehrschichtsubstrats und Mehrschichtsubstrat |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2016030195A1 true WO2016030195A1 (de) | 2016-03-03 |
Family
ID=53879501
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2015/068572 WO2016030195A1 (de) | 2014-08-28 | 2015-08-12 | Verfahren zur herstellung eines mehrschichtsubstrats und mehrschichtsubstrat |
Country Status (6)
Country | Link |
---|---|
US (1) | US20170311455A1 (de) |
EP (1) | EP3187029A1 (de) |
JP (1) | JP2017523598A (de) |
CN (1) | CN106688311A (de) |
DE (1) | DE102014112365A1 (de) |
WO (1) | WO2016030195A1 (de) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115172176B (zh) * | 2022-09-06 | 2023-09-22 | 合肥圣达电子科技实业有限公司 | 陶瓷基板及其制备方法、微波器件及其封装外壳结构 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0245770A2 (de) * | 1986-05-14 | 1987-11-19 | Sumitomo Metal Ceramics Inc. | Mehrschichtiges keramisches Substrat mit gedruckten Leiterbahnen und sein Herstellungsverfahren |
US5682589A (en) * | 1994-12-21 | 1997-10-28 | International Business Machines Corporation | Aluminum nitride body having graded metallurgy |
US20090139759A1 (en) * | 2004-12-20 | 2009-06-04 | Murata Manufacturing Co., Ltd. | Laminated ceramic electronic component and manufacturing method therefor |
US20100059255A1 (en) * | 2008-09-08 | 2010-03-11 | Schwanke Dieter | Ltcc substrate structure and method for the production thereof |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3070364B2 (ja) * | 1992-11-25 | 2000-07-31 | 松下電器産業株式会社 | セラミック電子部品の製造方法 |
DE102004030800B4 (de) | 2004-06-25 | 2017-05-18 | Epcos Ag | Verfahren zur Herstellung einer keramischen Leiterplatte |
JP2007250996A (ja) * | 2006-03-17 | 2007-09-27 | Kyocera Corp | 配線基板、並びにその配線基板を備えた電子装置およびプローブカード |
JP2010109068A (ja) * | 2008-10-29 | 2010-05-13 | Kyocera Corp | 配線基板および配線基板の製造方法 |
JP2013089702A (ja) * | 2011-10-17 | 2013-05-13 | Panasonic Corp | 多層基板、及び多層基板の製造方法 |
-
2014
- 2014-08-28 DE DE102014112365.4A patent/DE102014112365A1/de not_active Withdrawn
-
2015
- 2015-08-12 WO PCT/EP2015/068572 patent/WO2016030195A1/de active Application Filing
- 2015-08-12 JP JP2016570822A patent/JP2017523598A/ja active Pending
- 2015-08-12 EP EP15750994.4A patent/EP3187029A1/de not_active Withdrawn
- 2015-08-12 CN CN201580052339.9A patent/CN106688311A/zh active Pending
- 2015-08-12 US US15/315,359 patent/US20170311455A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0245770A2 (de) * | 1986-05-14 | 1987-11-19 | Sumitomo Metal Ceramics Inc. | Mehrschichtiges keramisches Substrat mit gedruckten Leiterbahnen und sein Herstellungsverfahren |
US5682589A (en) * | 1994-12-21 | 1997-10-28 | International Business Machines Corporation | Aluminum nitride body having graded metallurgy |
US20090139759A1 (en) * | 2004-12-20 | 2009-06-04 | Murata Manufacturing Co., Ltd. | Laminated ceramic electronic component and manufacturing method therefor |
US20100059255A1 (en) * | 2008-09-08 | 2010-03-11 | Schwanke Dieter | Ltcc substrate structure and method for the production thereof |
Also Published As
Publication number | Publication date |
---|---|
US20170311455A1 (en) | 2017-10-26 |
CN106688311A (zh) | 2017-05-17 |
DE102014112365A1 (de) | 2016-03-03 |
JP2017523598A (ja) | 2017-08-17 |
EP3187029A1 (de) | 2017-07-05 |
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