WO2015188419A1 - 阵列基板及曲面显示装置 - Google Patents
阵列基板及曲面显示装置 Download PDFInfo
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- WO2015188419A1 WO2015188419A1 PCT/CN2014/081599 CN2014081599W WO2015188419A1 WO 2015188419 A1 WO2015188419 A1 WO 2015188419A1 CN 2014081599 W CN2014081599 W CN 2014081599W WO 2015188419 A1 WO2015188419 A1 WO 2015188419A1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/137—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering
- G02F1/139—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering based on orientation effects in which the liquid crystal remains transparent
Definitions
- the present invention relates to the field of display technology, and in particular to an array substrate and a curved display device. Do not
- the curved display device has a curved display screen, which is more competitive with the traditional flat panel display device because it can achieve the same distance from each pixel of the screen to the human eye and more realistically restore the true visual experience of the human eye. .
- the manufacturing process of the curved display device is to separately manufacture a planar array substrate and a color film substrate, and then pair the array substrate and the color filter substrate to form a flat-shaped liquid crystal panel, and then bend the planar liquid crystal panel.
- a concave curved liquid crystal panel is formed.
- the array substrate is provided with a plurality of vertical and horizontal grid lines and data lines, and sub-pixel units separated by a meander line and a data line:
- a color matrix substrate is provided with a grid-like black matrix, and is separated by a black matrix a sub-pixel unit.
- the black matrix on the color filter substrate corresponds to the positions of the gate lines and the data lines on the array substrate, so that the black matrix blocks the gate lines and the data lines.
- the sub-pixel area on the color filter substrate corresponds to the position of the sub-pixel area on the array substrate, and serves as an opening area of the curved display device.
- the array substrate and the color filter substrate form two curved surfaces having the same shape, and between the color film substrate and the array substrate on both sides of the curved liquid crystal panel Misplaced.
- the black matrix on both sides of the array is misaligned with the longitudinal data lines on the array substrate, and the data lines are partially exposed outside the black matrix, and block the sub-pixel regions on the color filter substrate. The aperture ratio of this portion is lowered, causing dark groups on both sides of the curved display device.
- An object of the present invention is to provide an array substrate to solve the problem that dark groups may appear on both sides of a conventional curved display device.
- the present invention provides an array substrate including a plurality of sub-pixel units arranged in an array, each of the sub-pixel units including a main sub-pixel, a sub-sub-pixel, and a voltage dividing capacitor;
- the array substrate is divided into a compensation region and a non-compensation region, and a capacitance value of the voltage dividing capacitor located in the sub-pixel unit of the compensation region is smaller than a capacitance value of the voltage dividing capacitor in the sub-pixel unit of the non-compensation region .
- the compensation regions are located at both side portions of the array substrate.
- the compensation area is elliptical.
- the array substrate further includes a first epipolar line, a second meander line, and a common electrode line disposed corresponding to each of the rows of the sub-pixel units, and a data line corresponding to each of the columns of the sub-pixel unit.
- each of the sub-pixel units is provided with a voltage dividing electrode, and an overlapping portion of the voltage dividing electrode and the common electrode line forms the voltage dividing capacitor.
- the area of the voltage dividing electrode in the sub-pixel unit of the compensation area is smaller than the area of the voltage dividing electrode in the sub-pixel unit of the non-compensation area.
- each of the sub-pixel units is further provided with a first switch tube, a second switch tube, a third switch tube, a main pixel electrode located in the main sub-pixel, and a sub-pixel electrode located in the second sub-pixel;
- a gate of the first switching transistor is connected to the first gate line, a source is connected to the data line, and a drain is connected to the main pixel electrode;
- the pole of the second switch tube is connected to the first pole line, the source is connected to the data line, and the drain is connected to the sub-pixel electrode;
- the pole of the third switching transistor is connected to the second pole line, the source is connected to the sub-pixel electrode, and the drain is connected to the voltage dividing electrode.
- the first bypass transistor, the second bypass transistor and the third bypass transistor are thin film transistors.
- the invention also provides a curved display device comprising a color film substrate and the above array substrate.
- the curved display device is a vertically arranged curved display device.
- the compensation region of the array substrate provided by the present invention is an array substrate and A misaligned region between the color filter substrates, that is, a region where the aperture ratio is lowered, and a region where the remaining aperture ratio is normal is a non-compensation region.
- the main sub-pixel and the sub-sub-pixel in each sub-pixel unit on the array substrate are first charged with an equal data voltage, and then the voltage dividing capacitor divides a part of the data voltage in the sub-sub-pixel to reduce the data of the sub-sub-pixel.
- the voltage while the data voltage of the main sub-pixel remains unchanged, causes the sub-subpixel to display a lower brightness than the main sub-pixel.
- the capacitance value of the voltage dividing capacitor of the sub-pixel unit in the compensation region is smaller than that of the non-compensation region, so the voltage voltage of the voltage dividing capacitor divided from the sub-subpixel is less, and then The remaining data voltage of the sub-pixel is higher, the brightness of the sub-pixel display is also higher, and the brightness of the overall display of the sub-pixel unit is also higher. Therefore, with the array substrate provided by the present invention, the sub-pixel unit of the compensation area (the area where the aperture ratio is lowered) can display a higher luminance than the non-compensation area (the area where the aperture ratio is normal), so that the brightness of the compensation area can be approximated.
- the non-compensation area solves the technical problem that dark groups appear on both sides of the existing curved display device.
- FIG. 1 is a partial schematic view of an array substrate according to a first embodiment of the present invention for a more detailed description of the technical solutions in the embodiments of the present invention
- FIG. 2 is an equivalent circuit diagram of a pixel unit in an array substrate according to Embodiment 1 of the present invention
- FIG. 3 is a schematic diagram of an array substrate according to Embodiment 1 of the present invention.
- the present invention provides an array substrate comprising a plurality of sub-pixel units arranged in an array, each sub-pixel unit comprising a main sub-pixel, a sub-sub-pixel and a voltage dividing capacitor.
- the array substrate is divided into a compensation area and a non-compensation area, located at The capacitance value of the voltage dividing capacitor in the sub-pixel unit of the compensation region is smaller than the capacitance value of the voltage dividing capacitor in the sub-pixel unit of the non-compensation region.
- the compensation area of the array substrate provided by the embodiment of the invention is a region where the array substrate and the color filter substrate are misaligned, that is, a region where the aperture ratio is reduced, and the remaining regions with normal aperture ratio are non-compensation regions.
- the main sub-pixel and the sub-sub-pixel in each sub-pixel unit on the array substrate are first charged with an equal data voltage, and then the voltage dividing capacitor divides a part of the data voltage in the sub-sub-pixel to reduce the data of the sub-sub-pixel.
- the voltage while the data voltage of the main sub-pixel remains unchanged, causes the sub-subpixel to display a lower brightness than the main sub-pixel.
- the capacitance value of the voltage dividing capacitor of the sub-pixel unit in the compensation region is smaller than that of the non-compensation region, so the voltage voltage of the voltage dividing capacitor divided from the second sub-pixel is less.
- the remaining data voltage of the second sub-pixel is higher, the brightness of the sub-subpixel display is also higher, and the brightness of the overall display of the sub-pixel unit is also higher. Therefore, with the array substrate provided by the embodiment of the present invention, the brightness of the sub-pixel unit of the compensation area (the area where the aperture ratio is reduced) can be higher than that of the non-compensation area (the area with the normal aperture ratio), so that the brightness of the compensation area can be approximated. In the non-compensated area, the plexus solves the technical problem that dark groups appear on both sides of the existing curved display device.
- Embodiment 1 The array substrate provided by the embodiment of the invention includes thousands of sub-pixel units arranged in an array. As shown in FIGS.
- each sub-pixel unit includes a main sub-pixel 1, a sub-sub-pixel 2, and a voltage dividing capacitor (CstO) 3.
- the array substrate is divided into a compensation area 00 and a non-compensation area 200.
- the capacitance value of the voltage dividing capacitor 3 located in the sub-pixel unit of the compensation area 100 is smaller than the capacitance value of the voltage dividing capacitor 3 located in the sub-pixel unit of the non-compensation area 200 .
- the compensation area 00 is a region where the array substrate and the color filter substrate are misaligned, that is, a region where the aperture ratio is lowered, and the remaining region where the aperture ratio is normal is the non-compensation region 200.
- the displacement between the array substrate and the color filter substrate is generated on both sides of the curved liquid crystal panel, so that the area with reduced aperture ratio is also located on the curved liquid crystal panel. Both sides. Since the edges of the array substrate and the color filter substrate are fixed to each other by the sealant, the portion near the edge of the curved liquid crystal panel is less likely to be misaligned, and the region where the aperture ratio is lowered is ffi-circular. Therefore, in this embodiment, the compensation regions 100 are also located on both sides of the array substrate, and are «circular; the remaining regions are non-compensation regions 200, including the middle portion and the edge portion of the array substrate. As shown in FIG. 1 and FIG.
- the array substrate provided by the present invention further includes a first gate line (Gatel) 41, a second gate line (Gate2) 42 and a common electrode line disposed corresponding to each row of sub-pixel units. (Com) 5 , and a data line (Data) 6 corresponding to each column of sub-pixel unit settings.
- Each of the sub-pixel units is provided with a voltage dividing electrode 30, and a piezoelectric transformer The overlapping portion of the pole 30 and the common electrode line 5 forms a voltage dividing capacitor Cst0.
- the first squall line 41, the second sate line 42 and the common electrode line 5 are located in the same layer, and can be formed synchronously in the same patterning process; the data line 6 and the voltage dividing electrode 30 are located on the same layer, or may be the same Synchronous formation in the sub-patterning process.
- the area of the voltage dividing electrode 30 located in the sub-pixel unit of the compensation area 100 is smaller than the area of the voltage dividing electrode 30 located in the sub-pixel unit of the non-compensation area 200, so that the sub-pixel located in the compensation area 100 is obtained.
- CstO in the cell has a smaller capacitance value.
- each of the sub-pixel units is further provided with a first switch tube T!, a second switch tube ⁇ 2, a third switch tube ⁇ 3, a main pixel electrode 0 located in the main sub-pixel, and a second sub-pixel 2
- the main pixel electrode 0 may form a main liquid crystal capacitor Cicl with a common electrode (not shown) on the color filter substrate, and an overlapping portion of the main pixel electrode 10 and the common electrode line 5 forms a main storage capacitor Cst.
- the sub-pixel electrode 20 may form a sub-liquid crystal capacitance CIc2 with a common electrode on the color filter substrate, and an overlapping portion of the sub-pixel electrode 20 and the common electrode line 5 forms a secondary storage capacitor Cst2.
- the gate of T1 is connected to the first gate line 41, the source is connected to the data line 6, and the drain is connected to the main pixel electrode 10.
- the pole of T2 is connected to the first gate line 41, the source is connected to the data line 6, and the drain is connected to the sub-pixel electrode 20.
- the gate of T3 is connected to the second gate line 42, the source is connected to the sub-pixel electrode 20, and the drain is connected to the voltage dividing electrode 30.
- the first machine line 41 is first turned on, the second machine line 42 is turned off, T1 and T2 are turned on, T3 is turned off, and the data line 6 passes through T1 and T2 to the main pixel electrode 10 and the sub-pixel electrode 20, respectively.
- the first pole line 41 is turned off, the second twist line 42 is opened, T1 and T2 are turned off, T3 is turned on, and CstO divides a part of the data voltage on the sub-pixel electrode 20 through T3, thereby lowering the sub-pixel electrode 20.
- the data voltage causes the voltages of Cic2 and Cst2 to decrease, while the voltages of Cicl and Cstl remain unchanged.
- the voltage of Cic2 is lower than the voltage of Cicl, so the brightness of the sub-subpixel 2 is lower than that of the main sub-pixel 1, and the liquid crystals of the main sub-pixel 1 and the sub-sub-pixel 2 have different deflection angles, so that the viewing angle can be increased. Effect.
- the capacitance value of the CstO of the sub-pixel unit in the compensation region 00 is smaller than that of the non-compensation region 200, so the data voltage dropped by the CstO from the sub-pixel electrode 20 is less. Then, the remaining voltage of Ck2 is higher, the brightness of the second sub-pixel 2 is also higher, and the brightness of the overall display of the sub-pixel unit is also higher.
- the brightness of the sub-pixel unit of the compensation region 100 (the region where the mouth opening rate is lowered) can be higher than the non-compensation region 200 (the region with the normal aperture ratio), so that the compensation region 100
- the brightness of the curved display device can be close to the non-compensation area 200, thereby solving the darkness of the two sides of the existing curved display device.
- the amount of change in the corresponding nip rate of the compensation region 100 can be calculated according to the offset of the misalignment between the array substrate and the color filter substrate, and then the compensation region 100 needs to be increased.
- the brightness is thereby obtained to obtain the area required for the voltage dividing electrode 30 in the sub-pixel unit of the compensation region 100.
- the array substrate designed and manufactured can well compensate for the adverse effect of the reduction of the mouth-opening rate caused by the misalignment between the array substrate and the color filter substrate, so that the curved display devices are respectively
- the brightness at the place can be equal.
- Embodiment 2 - The present invention also provides a curved display device, which may be a curved television, a curved display, or the like.
- the curved display device comprises a color filter substrate and the array substrate provided in the first embodiment.
- the curved surface display device provided by the embodiment of the present invention has the same technical features as the array substrate provided in the first embodiment, so that the same technical problem can be solved and the same technical effect can be achieved.
- the curved display device is a Vertical Alignment (VA) curved display device.
- VA Vertical Alignment
- the viewing angle of the curved display device can be increased.
- the liquid crystal capacitance in the second sub-pixel does not want to wait, so the liquid crystal in the second sub-pixel also has two different deflection angles, thereby further increasing the surface display device. Perspective.
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Abstract
一种阵列基板及曲面显示装置,属于显示技术领域,该阵列基板,包括呈阵列式设置的若干个子像素单元,每个所述子像素单元包括主子像素(1)、次子像素(2)和分压电容(3);所述阵列基板分为补偿区域(100)和非补偿区域(200),位于所述补偿区域(100)的子像素单元中的分压电容(3)的电容值,小于位于所述非补偿区域(200)的子像素单元中的分压电容(3)的电容值。该阵列基板可用于曲面电视机、曲面显示器等曲面显示装置,解决了现有的曲面显示装置的两侧部会出现暗团的技术问题。
Description
阵列基板及曲面显示装置 本申请要求享有 2014年 6月 9日提交的名称为 "阵列基板及曲面显示装置" 的中国 专利申请 CN201410252392 0的优先权, 其全部内容通过引用并入本文中。
本发明涉及显示技术领域, 具体地说, 涉及一种阵列基板及曲面显示装置。 不
曲面显示装置具有曲面形的显示屏, 由于能够实现屏幕各个像素点到达人眼的距离 相等, 更能逼真还原人眼真实视觉感受, 所以使其与传统平板显示装置相比具有更强的 竞争力。
曲面显示装置的制造过程是, 先分别制造平面形的阵列基板和彩膜基板, 然后将阵 列基板和彩膜基板进行对盒, 形成平靣形的液晶面板, 再将平面形的液晶面板弯折形成 内凹形的曲面液晶面板。 其中, 阵列基板上设置有若千纵横交错的栅线和数据线, 以及 由榲线和数据线分隔成的子像素单元: 彩膜基板上设置有网格状的黑矩阵, 以及由黑矩 阵分隔成的子像素单元。 在阵列基板和彩膜基板对盒形成的平面形的液晶面板中, 彩膜 基板上的黑矩阵与阵列基板上的栅线和数据线的位置相对应, 使黑矩阵遮挡住栅线和数 据线: 彩膜基板上的子像素区域与阵列基板上的子像素区域的位置相对应, 作为曲面显 示装置的开口区域。
但是, 平面形的液晶靣板经过弯折形成曲面液晶面板之后, 阵列基板和彩膜基板会 形成两个形状相同的曲面, 在曲面液晶面板的两侧部, 彩膜基板与阵列基板之间会产生 错位。 彩膜基板上, 位于两侧部的黑矩阵就会与阵列基板上纵向的数据线错位, 这些数 据线会有部分露在黑矩阵之外, 且遮挡住彩膜基板上的子像素区域, 使这一部分的开口 率降低, 导致曲靣显示装置的两侧部出现暗团。
发明內容
本发明的目的在于提供一种阵列基板, 以解决现有的曲面显示装置的两侧部会出现 暗团的技术 题。
本发明提供一种阵列基板, 包括呈阵列式设置的若干个子像素单元, 每个所述子像 素单元包括主子像素、 次子像素和分压电容;
所述阵列基板分为补偿区域和非补偿区域, 位于所述补偿区域的子像素单元中的分 压电容的电容值, 小于位于所述非补偿区域的子像素单元中的分压电容的电容值。
进一步, 所述补偿区域位于所述阵列基板的两侧部。
优选的, 所述补偿区域呈椭圆形。
进一步, 该阵列基板还包括对应于每行所述子像素单元设置的第一極线、 第二樋线 和公共电极线, 以及对应于每列所述子像素单元设置的数据线。
进一歩, 每个所述子像素单元中设置有分压电极, 所述分压电极与所述公共电极线 的重叠部分形成所述分压电容。
进一歩, 位于所述补偿区域的子像素单元中的分压电极的面积, 小亍位于所述非补 偿区域的子像素单元中的分压电极的面积。
进一步, 每个所述子像素单元中还设置有第一开关管、 第二开关管、 第三开关管、 位于主子像素中的主像素电极、 位于次子像素中的次像素电极;
所述第一开关管的栅极连接所述第一栅线, 源极连接所述数据线, 漏极连接所述主 像素电极;
所述第二开关管的極极连接所述第一極线, 源极连接所述数据线, 漏极连接所述次 像素电极;
所述第三开关管的極极连接所述第二極线, 源极连接所述次像素电极, 漏极连接所 述分压电极。
优选的, 所述第一幵关管、 所述第二幵关管和所述第三幵关管均为薄膜晶体管。 本发明还提供一种曲面显示装置, 包括彩膜基板和上述的阵列基板。
优选的, 所述曲面显示装置为垂直排列型曲面显示装置。
本发明带来了以下有益效果: 本发明提供的阵列基板的补偿区域, 即是阵列基板与
彩膜基板之间产生错位的区域, 也就是开口率降低的区域, 其余开口率正常的区域为非 补偿区域。 在显示过程中, 阵列基板上每个子像素单元中的主子像素和次子像素先充入 相等的数据电压, 然后分压电容分掉次子像素中的一部分数据电压, 以降低次子像素的 数据电压, 而主子像素的数据电压保持不变, 使次子像素显示的亮度低于主子像素。 本发明提供的阵列基板中, 相比于非补偿区域, 补偿区域中的子像素单元的分压电 容的电容值较小, 所以分压电容从次子像素分掉的数据电压较少, 则次子像素剩余的数 据电压就较高, 次子像素显示的亮度也较高, 子像素单元整体显示的亮度也较高。 因 此, 利用本发明提供的阵列基板, 能够使补偿区域(开口率降低的区域)的子像素单元显 示的亮度高于非补偿区域(幵口率正常的区域), 使补偿区域的亮度能够接近于非补偿区 域, 从而解决了现有的曲面显示装置的两侧部会出现暗团的技术问题。 本发明的其它特征和优点将在随后的说明书中阐述, 并且, 部分地从说明书中变得 显而易见, 或者通过实施本发明而了解。 本发明的目的和其他优点可通过在说明书、 权 利要求书以及 »图中所特别指出的结构来实现和获得。
附图说明 为了更清楚地说明本发明实施例中的技术方案, 下面将对实施例描述中所需要的附 图做简单的介绍: 图 I是本发明实施例一提供的阵列基板的局部示意图;
图 2是本发明实施例一提供的阵列基板中像素单元的等效电路图; 图 3是本发明实施例一提供的阵列基板的示意图。
具体实施方式 以下将结合附图及实施例来详细说明本发明的实施方式, 借此对本发明如何应用技 术手段来解决技术问题, 并达成技术效果的实现过程能充分理解并据以实施。 需要说明 的是, 只要不构成冲突, 本发明中的各个实施例以及各实施例中的各个特征可以相互结 合, 所形成的技术方案均在本发明的保护范围之内。 本发明提供一种阵列基板, 包括呈阵列式设置的若干个子像素单元, 每个子像素单 元包括主子像素、 次子像素和分压电容。 该阵列基板分为补偿区域和非补偿区域, 位于
补偿区域的子像素单元中的分压电容的电容值, 小于位于非补偿区域的子像素单元中的 分压电容的电容值。 本发明实施例提供的阵列基板的补偿区域, 即是阵列基板与彩膜基板之间产生错位 的区域, 也就是开口率降低的区域, 其余开口率正常的区域为非补偿区域。 在显示过程 中, 阵列基板上每个子像素单元中的主子像素和次子像素先充入相等的数据电压, 然后 分压电容分掉次子像素中的一部分数据电压, 以降低次子像素的数据电压, 而主子像素 的数据电压保持不变, 使次子像素显示的亮度低于主子像素。 本发明实施例提供的阵列基板中, 相比于非补偿区域, 补偿区域中的子像素单元的 分压电容的电容值较小, 所以分压电容从次子像素分掉的数据电压较少, 则次子像素剩 余的数据电压就较高, 次子像素显示的亮度也较高, 子像素单元整体显示的亮度也较 高。 因此, 利用本发明实施例提供的阵列基板, 能够使补偿区域(开口率降低的区域)的 子像素单元显示的亮度高于非补偿区域(开口率正常的区域), 使补偿区域的亮度能够接 近于非补偿区域, 丛而解决了现有的曲面显示装置的两侧部会出现暗团的技术问题。 实施例一: 本发明实施例提供的阵列基板, 包括呈阵列式设置的若千个子像素单元。 如图 1 和 图 2所示, 每个子像素单元包括主子像素 1、 次子像素 2和分压电容 ( CstO) 3。 阵列基 板分为补偿区域 00和非补偿区域 200, 位于补偿区域 100的子像素单元中的分压电容 3 的电容值, 小于位于非补偿区域 200的子像素单元中的分压电容 3的电容值。 如图 3所示, 本实施例中, 补偿区域】 00即是阵列基板与彩膜基板之间产生错位的 区域, 也就是开口率降低的区域, 其余开口率正常的区域为非补偿区域 200。 阵列基板 与彩膜基板对盒并弯折形成曲面液晶面板之后, 阵列基板与彩膜基板之间的错位会产生 在曲面液晶面板的两侧部, 所以开口率降低的区域也位于曲面液晶面板的两侧部。 因为 在阵列基板和彩膜基板的边缘通过框胶相互固定, 所以在靠近曲面液晶面板边缘的部分 不易产生错位, 使开口率降低的区域呈 ffi圆形。 因此, 本实施例中, 补偿区域 100 也相 应的位于阵列基板的两侧部, 且呈 «圆形; 其余区域为非补偿区域 200, 包括阵列基板 的中部以及边缘部分。 如图 1 和图 2所示, 本发明实施 ί到提供的阵列基板还包括对应于每行子像素单元设 置的第一栅线 (Gatel ) 41、 第二栅线 (Gate2 ) 42和公共电极线 (Com) 5 , 以及对应于 每列子像素单元设置的数据线 (Data) 6。 每个子像素单元中设置有分压电极 30, 分压电
极 30与公共电极线 5的重叠部分形成分压电容 Cst0。 其中, 第一樋线 41、 第二栅线 42 和公共电极线 5位于同一图层, 可以在同一次构图工艺中同步形成; 数据线 6和分压电 极 30位于同一图层, 也可以在同一次构图工艺中同步形成。
本实施例中, 位于补偿区域 100的子像素单元中的分压电极 30的面积, 小于位于非 补偿区域 200的子像素单元中的分压电极 30的面积, 从而使位于补偿区域 100的子像素 单元中的 CstO具有较小的电容值。
进一步, 本实施例中, 每个子像素单元中还设置有第一开关管 T!、 第二开关管 Τ2、 第三开关管 Τ3、 位于主子像素 〗 中的主像素电极 0、 位于次子像素 2 中的次像素电极 20, 其中, Tl、 Τ2、 Τ3均优选为薄膜晶体管(TFT)。 主像素电极 0可以与彩膜基板上 的公共电极(图中未示出) 形成主液晶电容 Cicl , 主像素电极 10与公共电极线 5的重叠 部分形成主存储电容 Cst】。 次像素电极 20可以与彩膜基板上的公共电极形成次液晶电容 CIc2, 次像素电极 20与公共电极线 5的重叠部分形成次存储电容 Cst2。
如图 1和图 2所示, T1的栅极连接第一栅线 41 , 源极连接数据线 6, 漏极连接主像 素电极 10。 T2的極极连接第一栅线 41, 源极连接数据线 6, 漏极连接次像素电极 20。 T3 的栅极连接第二栅线 42, 源极连接次像素电极 20, 漏极连接分压电极 30。
在显示过程中, 先打开第一機线 41, 关闭第二機线 42, 使 T1和 T2导通, T3关闭, 同时由数据线 6通过 T1和 T2分别向主像素电极 10和次像素电极 20充入相等的数据电 压, 使 Clcl、 Cstl、 Clc2和 Cst2具有相等的电压。 然后关闭第一極线 41 , 打幵第二搠线 42, 使 T1和 T2关闭, T3导通, CstO就会通过 T3分掉次像素电极 20上的一部分数据电 压, 降低了次像素电极 20上的数据电压, 使 Cic2和 Cst2的电压降低, 而 Cicl和 Cstl 的电压保持不变。 此时, Cic2的电压低于 Cicl的电压, 所以次子像素 2显示的亮度会低 于主子像素 1, 并 主子像素 1与次子像素 2中的液晶具有不同的偏转角度, 可达到增大 视角的效果。
因为本发明实施例提供的阵列基板中, 相比于非补偿区域 200, 补偿区域】 00中的子 像素单元的 CstO的电容值较小, 所以 CstO从次像素电极 20分掉的数据电压较少, 则 Ck2 剩余的电压就较高, 次子像素 2 显示的亮度也较高, 子像素单元整体显示的亮度也较 高。 因此, 利用本发明实施例提供的阵列基板, 能够使补偿区域 100 (幵口率降低的区 域)的子像素单元显示的亮度高亍非补偿区域 200 (开口率正常的区域), 使补偿区域 100 的亮度能够接近于非补偿区域 200, 从而解决了现有的曲面显示装置的两侧部会出现暗
团的技术问题。
在阵列基板的设计和制造中, 可以根据阵列基板与彩膜基板之间发生错位的偏移 量, 计算补偿区域 100相应的幵口率的变化量, 再以此得出补偿区域 100需要增加的亮 度, 从而得出补偿区域 100的子像素单元中分压电极 30所需的面积。 根据所得到的分压 电极 30的面积, 设计并制造的阵列基板, 就可以很好的补偿由于阵列基板与彩膜基板之 间的错位造成的幵口率降低的不良影响, 使曲面显示装置各处的亮度能够相等。
实施例二- 本发明还提供一种曲面显示装置, 可以是曲靣电视机、 曲面显示器等。 该曲面显示 装置包括彩膜基板和上述实施例一提供的阵列基板。
本发明实施例提供的曲面显示装置, 与实施例一提供的阵列基板具有相同的技术特 征, 所以也能解决相同的技术问题, 达到相同的技术效果。
作为一个优选方案, 曲面显示装置为垂直排列型 (Vertical Alignment, 筒称 VA) 曲 面显示装置。 在 VA 曲面显示装置中, 通过将每个子像素单元分为主子像素和次子像 素, 并且主子像素和次子像素中的液晶具有不同的偏转角度, 能够增大曲面显示装置的 视角。
本实施例中, 在补偿区域与非补偿区域中, 次子像素中的液晶电容也不想等, 所以 次子像素中的液晶也具有两种不同的偏转角度, 从而能够进一步增大曲面显示装置的视 角.
虽然本发明所公开的实施方式如上, 但所述的内容只是为了便于理解本发明而采用 的实施方式, 并非用以限定本发明。 任何本发明所属技术领域内的技术人员, 在不脱离 本发明所公幵的精神和范围的前提不, 可以在实施的形式上及细节上作任何的修改与变 化, 但本发明的专利保护范围, 仍须以所險的权利要求书所界定的范围为准。
Claims
1、 一种阵列基板, 包括呈阵列式设置的若干个子像素单元, 每个所述子像素单元包 括主子像素、 次子像素和分压电容;
所述阵列基板分为补偿区域和非补偿区域, 位于所述补偿区域的子像素单元中的分 压电容的电容值, 小于位于所述非补偿区域的子像素单元中的分压电容的电容值。
2、 如权利要求 1所述的阵列基板, 其中所述补偿区域位于所述阵列基板的两侧部。
3、 如权利要求 2所述的阵列基板, 其中, 所述补偿区域呈椭圆形。
4、 如权利要求 1所述的阵列基板, 其中, 还包括对应于每行所述子像素单元设置的 第一搠线、 第二機线和公共电极线, 以及对应亍每列所述子像素单元设置的数据线。
5、 如权利要求 4所述的阵列基板, 其中, 每个所述子像素单元中设置有分压电极, 所述分压电极与所述公共电极线的重叠部分形成所述分压电容。
6、 如权利要求 5所述的阵列基板, 其中, 位于所述补偿区域的子像素单元中的分压 电极的面积, 小于位于所述非补偿区域的子像素单元中的分压电极的靣积。
7、 如权利要求 5所述的阵列基板, 其中, 每个所述子像素单元中还设置有第一开关 管、 第二开关管、 第三开关管、 位于主子像素中的主像素电极、 位于次子像素中的次像 素电极;
所述第一开关管的機极连接所述第一機线, 源极连接所述数据线, 漏极连接所述主 像素电极;
所述第二开关管的 »极连接所述第一 »线, 源极连接所述数据线, 漏极连接所述次 像素电极;
所述第三幵关管的栅极连接所述第二栅线, 源极连接所述次像素电极, 漏极连接所 述分压电极。
8、 如权利要求 7所述的阵列基板, 其中, 所述第一开关管、 所述第二开关管和所述 第 开关管均为薄膜晶体管。
9、 一种曲面显示装置, 包括彩膜基板和阵列基板;
所述阵列基板包括呈阵列式设置的若千个子像素单元, 每个所述子像素单元包括主 子像素、 次子像素和分压电容;
所述阵列基板分为补偿区域和非补偿区域, 位于所述补偿区域的子像素单元中的分 压电容的电容值, 小于位于所述非补偿区域的子像素单元中的分压电容的电容值。
10、 如权利要求 9 所述的曲面显示装置, 其中所述补偿区域位于所述阵列基板的两 侧部。
11、 如权利要求! 0所述的曲面显示装置, 其中, 所述补偿区域呈橢圆形。
12、 如权利要求 9 所述的曲面显示装置, 其中, 还包括对应于每行所述子像素单元 设置的第一 «线、 第二栅线和公共电极线, 以及对应亍每列所述子像素单元设置的数据
13、 如权利要求 12所述的曲面显示装置, 其中, 每个所述子像素单元中设置有分压 电极, 所述分压电极与所述公共电极线的重叠部分形成所述分压电容。
14、 如权利要求 13所述的曲面显示装置, 其中, 位于所述补偿区域的子像素单元中 的分压电极的面积, 小于位于所述非 偿区域的子像素单元中的分压电极的面积。
15、 如权利要求 13所述的曲面显示装置, 其中, 每个所述子像素单元中还设置有第 一开关管、 第二开关管、 第三开关管、 位亍主子像素中的主像素电极、 位于次子像素中 的次像素电极;
所述第一开关管的栅极连接所述第一栅线, 源极连接所述数据线, 漏极连接所述主 像素电极;
所述第二开关管的極极连接所述第一極线, 源极连接所述数据线, 漏极连接所述次 像素电极;
所述第三开关管的極极连接所述第二極线, 源极连接所述次像素电极, 漏极连接所 述分压电极。
16、 如权利要求 15所述的曲面显示装置, 其中, 所述第一开关管、 所述第二开关管 和所述第三幵关管均为薄膜晶体管。
17、 如权利要求 9 所述的曲面显示装置, 其中, 所述曲面显示装置为垂直排列型曲 面显示装置。
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