WO2015186167A1 - Cellule solaire, procédé de fabrication de cellule solaire, et système à cellule solaire - Google Patents

Cellule solaire, procédé de fabrication de cellule solaire, et système à cellule solaire Download PDF

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Publication number
WO2015186167A1
WO2015186167A1 PCT/JP2014/064580 JP2014064580W WO2015186167A1 WO 2015186167 A1 WO2015186167 A1 WO 2015186167A1 JP 2014064580 W JP2014064580 W JP 2014064580W WO 2015186167 A1 WO2015186167 A1 WO 2015186167A1
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polarity
layer
buffer layer
emitter layer
crystalline
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PCT/JP2014/064580
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English (en)
Japanese (ja)
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敬司 渡邉
和樹 谷
裕紀 若菜
長部　太郎
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株式会社日立製作所
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Priority to PCT/JP2014/064580 priority Critical patent/WO2015186167A1/fr
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a solar battery cell, a solar battery cell manufacturing method, and a solar battery system.
  • Sunlight is composed of light in a wide wavelength range, and light that can be absorbed by the solar battery cell is light having energy equal to or higher than the band gap of the semiconductor material of the power generation layer. Electron-hole pairs are generated by the energy of the absorbed light, and electrons and holes are collected in separate electrodes, creating a potential difference between the electrodes and generating power. This is the operation principle of the battery cell.
  • surplus energy exceeding the band gap hereinafter referred to as Eg is dissipated as heat in a general solar battery cell.
  • multi-exciton generation is a phenomenon in which electron-hole pairs are further generated by surplus energy when the surplus energy is twice or more Eg (hereinafter referred to as 2Eg).
  • Patent Document 1 discloses a method of using multi-exciton generation in a crystalline silicon (hereinafter referred to as crystalline Si) solar battery cell.
  • crystalline Si crystalline silicon
  • the internal quantum efficiency is More than 1 phenomenon was observed.
  • the internal quantum efficiency represents the number of electrons and holes generated from one photon absorbed inside the solar battery cell and collected by the electrode. Therefore, an internal quantum efficiency exceeding 1 indicates that multi-exciton generation occurs inside the solar battery cell.
  • multi-exciton generation is a phenomenon that occurs due to high-energy light.
  • high-energy light is absorbed near the surface of a solar battery cell.
  • a high-quality surface passivation film is necessary for use.
  • a low-quality surface passivation film that is, when there are many recombination levels at the interface between the surface passivation film and the power generation layer, electrons and holes generated by multi-exciton generation are collected at the electrode. There is a high probability of disappearing by recombination before being done.
  • a SiO 2 film formed by a thermal oxidation method is used as a high-quality passivation film.
  • Non-Patent Document 1 describes a mixed crystal of Si and Ge (hereinafter referred to as crystalline Si 1-x Ge x .
  • x is a composition ratio of Ge and takes a value of 0 ⁇ x ⁇ 1.
  • the calculation results of ⁇ and Eg are described in FIG. According to this, both ⁇ ⁇ and Eg monotonously decrease with respect to x, and furthermore, the value of ⁇ ⁇ -2Eg monotonously decreases with respect to x.
  • x ⁇ 0.68 in ⁇ ⁇ -2Eg> is 0, x> in 0.68 ⁇ ⁇ -2Eg ⁇ 0.
  • a typical object of the present invention is to use multi-exciton production and, as a result, to realize a highly efficient solar cell.
  • the solar cell includes a first polarity substrate, a second polarity emitter layer formed of crystalline Si on the surface of the first polarity substrate, and a crystal on the surface of the second polarity emitter layer.
  • a buffer layer formed of Si 1-x Ge x ; and a passivation layer formed of an insulating material on the surface of the buffer layer. The thickness of the buffer layer is smaller than the thickness of the emitter layer having the second polarity.
  • a method for manufacturing a solar cell includes a first step of forming a second polarity emitter layer with crystalline Si on the surface of a first polarity substrate, and a buffer layer on the surface of the second polarity emitter layer.
  • a second step of forming with crystalline Si 1-x Ge x and a third step of forming a passivation layer with an insulating material on the surface of the buffer layer are included.
  • the thickness of the buffer layer is made smaller than the thickness of the emitter layer having the second polarity.
  • the solar cell system includes a solar cell panel in which a plurality of solar cells are arranged, a power conditioner that converts electric power generated by the solar cell panel from direct current to alternating current, and alternating current power converted by the power conditioner.
  • the solar cell includes a first polarity substrate, a second polarity emitter layer formed of crystalline Si on the surface of the first polarity substrate, and a crystal Si 1 on the surface of the second polarity emitter layer.
  • a buffer layer formed of -x Ge x , and a passivation layer formed of an insulating material on the surface of the buffer layer. The thickness of the buffer layer is smaller than the thickness of the emitter layer having the second polarity.
  • FIG. 1 It is a top view which shows the photovoltaic cell which concerns on Embodiment 1 of this invention. It is sectional drawing which shows the photovoltaic cell which concerns on Embodiment 1 of this invention. It is explanatory drawing which shows the energy band along the AB line
  • FIG. 3C It is a top view which shows the manufacturing method of a photovoltaic cell following FIG. 3C. It is sectional drawing which shows the manufacturing method of the photovoltaic cell following FIG. 3D. It is a top view which shows the manufacturing method of the photovoltaic cell following FIG. 3E. It is sectional drawing which shows the manufacturing method of a photovoltaic cell following FIG. 3F. It is a top view which shows the manufacturing method of the photovoltaic cell following FIG. 3G. It is sectional drawing which shows the manufacturing method of a photovoltaic cell following FIG. 3H. It is a top view which shows the manufacturing method of the photovoltaic cell following FIG. 3I. It is sectional drawing which shows the manufacturing method of the photovoltaic cell following FIG. 3J.
  • FIG. 4B is an explanatory diagram showing energy bands along the line CD in FIG. 4B. It is a top view which shows the manufacturing method of the photovoltaic cell concerning Embodiment 2 of this invention. It is sectional drawing which shows the manufacturing method of the photovoltaic cell concerning Embodiment 2 of this invention. It is a top view which shows the manufacturing method of a photovoltaic cell following FIG. 6A. It is sectional drawing which shows the manufacturing method of a photovoltaic cell following FIG. 6B.
  • FIG. 6C It is a top view which shows the manufacturing method of the photovoltaic cell following FIG. 6C. It is sectional drawing which shows the manufacturing method of the photovoltaic cell following FIG. 6D. It is a top view which shows the manufacturing method of the photovoltaic cell following FIG. 6E. It is sectional drawing which shows the manufacturing method of a photovoltaic cell following FIG. 6F. It is a top view which shows the manufacturing method of the photovoltaic cell following FIG. 6G. It is sectional drawing which shows the manufacturing method of a photovoltaic cell following FIG. 6H. It is a block diagram which shows the solar cell system using the photovoltaic cell which concerns on Embodiment 3 of this invention.
  • the constituent elements are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say.
  • the shape, positional relationship, etc., of components, etc. when referring to the shape, positional relationship, etc., of components, etc., unless otherwise specified, and in principle, it is considered that this is not clearly the case, it is substantially the same. Including those that are approximate or similar to the shape. The same applies to the above numerical values and ranges.
  • the solar cell of the embodiment includes a first polarity substrate (substrate 11) and a second polarity emitter layer (emitter layer 12) formed of crystalline Si on the surface of the first polarity substrate.
  • a buffer layer high conductivity buffer layer 13, low conductivity buffer layer 14 formed of crystalline Si 1-x Ge x on the surface of the second polarity emitter layer, and insulation on the surface of the buffer layer
  • a passivation layer passivation layer 15 formed of a material.
  • the thickness of the buffer layer is smaller than the thickness of the emitter layer having the second polarity.
  • a first step (FIGS. 3A, 3B, 6A, and 6C) of forming a second polarity emitter layer with crystalline Si on the surface of a first polarity substrate 6B), a second step (FIGS. 3C, 3D, 6C, and 6D) of forming a buffer layer of crystalline Si 1-x Ge x on the surface of the emitter layer of the second polarity, And a third step (FIGS. 3E, 3F, 6E, and 6F) of forming a passivation layer on the surface with an insulating material.
  • the thickness of the buffer layer is made smaller than the thickness of the emitter layer having the second polarity.
  • the solar cell system of the embodiment includes a solar cell panel (solar cell panel 41) in which a plurality of solar cells are arranged, and a power conditioner (power) that converts electric power generated by the solar cell panel from direct current to alternating current.
  • the solar cell includes a first polarity substrate, a second polarity emitter layer formed of crystalline Si on the surface of the first polarity substrate, and a crystal Si 1 on the surface of the second polarity emitter layer.
  • a buffer layer formed of -x Ge x , and a passivation layer formed of an insulating material on the surface of the buffer layer. The thickness of the buffer layer is smaller than the thickness of the emitter layer having the second polarity.
  • hatching may be omitted even in a cross-sectional view for easy understanding of the drawings. Further, even a top view may be hatched to make the drawing easy to see.
  • Patent Document 1 In addition to Patent Document 1, there are Non-Patent Document 1, Non-Patent Document 2, and Patent Document 2 as comparative techniques for the present invention. The difference between these structures and the structure of the present invention will be described below.
  • Non-Patent Document 1 discloses a solar cell structure having a crystalline Si 1-x Ge x pn junction. According to this, by using crystalline Si 1-x Ge x as the power generation layer, it becomes possible to reduce the value of ⁇ ⁇ -2Eg compared to the case of using crystalline Si, and the utilization efficiency of multi-exciton generation is improved. Be expected. However, a solar cell having a pn junction of crystalline Si 1-x Ge x has a problem that it is difficult to form a high-quality surface passivation film.
  • Non-Patent Document 2 discloses a method of using amorphous Si as a surface passivation film of a crystalline Ge solar battery cell. According to this document, it is described that amorphous Si exhibits excellent characteristics as a surface passivation film of crystalline Ge, more generally crystalline Si 1-x Ge x . However, unlike the SiO 2 film, the amorphous Si film absorbs light in the wavelength region used for multi-exciton generation. Therefore, a high-efficiency solar cell using multi-exciton generation is obtained by the method of Non-Patent Document 2. It is difficult to realize.
  • Patent Document 2 discloses a solar cell structure having a crystalline Si pn junction and a crystalline Si / crystalline Si 1-x Ge x quantum well inserted at the pn junction interface. According to it, as a result of the Eg of crystalline Si 1-x Ge x being smaller than that of crystalline Si, compared to a crystalline Si solar cell without a crystalline Si / crystalline Si 1-x Ge x quantum well. It is described that it becomes possible to use light in a long wavelength region.
  • the n-type crystalline Si layer present on the surface side of the crystalline Si 1-x Ge x quantum well plays a role as an emitter layer. For the following two reasons, The layer needs to be a relatively thick layer.
  • the first reason is that in solar cell operation, it is necessary to reduce the sheet resistance when electrons are conducted laterally through the n-type crystalline Si layer.
  • the second reason is that in the band profile of the pn junction, band bending occurs in the vicinity of the junction surface. Therefore, in order to prevent a reduction in the open-circuit voltage of the solar battery cell, a thick n-type crystal Si layer is formed and a flat band is formed. It is necessary to secure the area.
  • the n-type crystalline Si layer is formed thick, and typically, the n-type crystalline Si is larger than the thickness of the crystalline Si / crystalline Si 1-x Ge x quantum well.
  • the layer thickness is larger.
  • the present invention has been made in view of such circumstances, and an object thereof is to use multi-exciton generation and, as a result, to realize a highly efficient solar battery cell.
  • An embodiment of the present invention will be described below.
  • Embodiment 1 of the present invention will be described with reference to FIGS.
  • FIGSolar cell structure> 1A and 1B are a top view and a cross-sectional view showing a solar battery cell according to the first embodiment.
  • 1A is a top view
  • FIG. 1B is a cross-sectional view.
  • the top view of FIG. 1A is given the same hatching as the cross-sectional view for easy understanding of the correspondence with the cross-sectional view of FIG. 1B (the same applies to the following top views).
  • the solar battery cell according to the first embodiment is a solar battery cell in which an emitter layer 12, a highly conductive buffer layer 13, and a passivation layer 15 are formed on a substrate 11, and a front electrode 21 and a back electrode are used as electrodes. 22.
  • FIG. 1A and 1B show a structure in the case where the surface electrode 21 is formed in a straight line when viewed from above, as in a general solar battery cell, but the surface electrode 21 is different. It may have a top shape. Further, like the general solar battery cell, the passivation layer 15 is patterned, and in the structure of the first embodiment, the surface electrode 21 and the highly conductive buffer layer are formed in the opening 15a where the passivation layer 15 does not exist. 13 is connected.
  • the shape of the upper surface of the opening 15a where the passivation layer 15 is not present is arbitrary, and may be linear when viewed from the upper surface, or there may be a plurality of circular openings when viewed from the upper surface (see FIG. 1A). In the example, the opening 15a is linear as shown by the dashed line).
  • a so-called selective emitter structure in which the conductivity of the region connected to the surface electrode 21 in the highly conductive buffer layer 13 is higher than the conductivity of the region not connected to the surface electrode 21 may be used.
  • the substrate 11 and the back electrode 22 are connected, but a back surface field (BSF) is formed at the interface between the substrate 11 and the back electrode 22 as in a general solar battery cell.
  • a layer may be provided, or a backside passivation film may be further added to form a point contact structure.
  • the material which comprises the photovoltaic cell of this Embodiment 1 is described.
  • the material of the substrate 11, the emitter layer 12, and the highly conductive buffer layer 13 is a semiconductor such as Si, CdTe, CuInGaSe, InP, GaAs, or Ge, or a compound of these semiconductors. It can take various structures such as microcrystals and amorphous.
  • the material of the passivation layer 15 is an insulator such as SiO 2 , SiN (silicon nitride), amorphous Si, SiC (silicon carbide), CdS, or a laminated structure of these insulators.
  • the material of the front electrode 21 and the back electrode 22 is a metal such as Ag, Al, Ti, Pd, Ni, or Cu, or a laminated structure of these metals.
  • the following two conditions must be satisfied particularly when selecting the materials for the emitter layer 12, the highly conductive buffer layer 13, and the passivation layer 15.
  • the material of the emitter layer 12 has a higher utilization efficiency of multi-exciton generation compared to the material of the highly conductive buffer layer 13.
  • the interface recombination is suppressed at the interface between the highly conductive buffer layer 13 and the passivation layer 15 as compared with the interface between the emitter layer 12 and the passivation layer 15.
  • the substrate 11 has a first polarity crystal Si
  • the emitter layer 12 has a second polarity crystal Si 1-x Ge x
  • the high-conductivity buffer layer 13 has a second polarity crystal Si.
  • SiO 2 is used as the passivation layer 15.
  • locations where multi-exciton generation can occur are the highly conductive buffer layer 13, the emitter layer 12, and the substrate 11.
  • the material of the highly conductive buffer layer 13 and the substrate 11 is crystalline Si
  • the material of the emitter layer 12 is crystalline Si 1-x Ge x .
  • it is effective to reduce the value of ⁇ ⁇ -2Eg in the band structure, and in the crystalline Si 1-x Ge x , ⁇ ⁇ -2Eg The value of decreases monotonically with respect to x.
  • the emitter layer 12 made of crystalline Si 1-x Ge x is used as a main generation layer for multi-exciton generation, so that multi-exciton generation can be achieved as compared with the crystalline Si solar cell. Utilization efficiency can be improved.
  • the main generation layer for multi-exciton generation it is necessary to absorb as much light having an energy of 2 Eg or more of crystalline Si 1-x Ge x as possible inside the emitter layer 12, As will be described later, this can be achieved by appropriately selecting the film thicknesses of the emitter layer 12 and the highly conductive buffer layer 13 and the Ge composition x in the emitter layer 12.
  • the crystalline Si 1-x Ge x / SiO 2 interface state density is higher than the crystalline Si / SiO 2 interface state density, and as a result, the crystalline Si 1-x Ge x solar cell has There is a problem that it is difficult to form a high-quality surface passivation film.
  • a highly conductive buffer layer 13 made of crystalline Si exists between the passivation layer 15 and the emitter layer 12 made of crystalline Si 1-x Ge x . For this reason, surface passivation is performed at the crystalline Si / SiO 2 interface, and a high-quality surface passivation film can be formed.
  • FIG. 2 is an explanatory diagram showing energy bands along the line AB in FIG. 1B.
  • the moving directions of the electrons 31 and the holes 32 generated in the emitter layer 12 are schematically drawn by arrows.
  • the electrons 31 first move from the emitter layer 12 to the highly conductive buffer layer 13. This moving direction can be realized, for example, by setting the n-type impurity concentration of the highly conductive buffer layer 13 to a value higher than the n-type impurity concentration of the emitter layer 12. Next, the electrons 31 reach the interface between the highly conductive buffer layer 13 and the passivation layer 15, but the electrons 31 cannot move into the passivation layer 15 due to the energy barrier formed by the passivation layer 15. Instead, it is driven back into the highly conductive buffer layer 13. At this time, since high-quality passivation is realized at the interface between the passivation layer 15 and the highly conductive buffer layer 13, interface recombination is suppressed. Although not shown in FIG. 2, the electrons 31 are finally collected by the surface electrode 21 via the highly conductive buffer layer 13.
  • the holes 32 move from the emitter layer 12 to the substrate 11 and are finally collected by the back electrode 22.
  • an energy barrier may be generated at the interface between the emitter layer 12 and the substrate 11 as shown in FIG. 2 due to the energy difference at the valence band edge between the crystalline Si 1-x Ge x and the crystalline Si. .
  • the holes 32 overcome the energy barrier by tunnel conduction or the like and reach the substrate 11.
  • the solar cell of the first embodiment can improve the utilization efficiency of multi-exciton generation, and as a result, a highly efficient solar cell can be realized.
  • the first parameter is the Ge composition x of crystalline Si 1-x Ge x in the emitter layer 12.
  • x it is necessary to consider two points: improvement in utilization efficiency of multi-exciton generation and conditions for forming the emitter layer 12 on the substrate 11.
  • the value of ⁇ ⁇ -2Eg is 0 or more and as small as possible.
  • the value of x is preferably in the range of 0 ⁇ x ⁇ 0.68, and in particular, the value of x is preferably as large as possible within the above range.
  • the value of x is preferably in the range of 0 ⁇ x ⁇ 0.68 in terms of solar cell characteristics.
  • the value of x is preferably as large as possible within the above range. Specifically, it is necessary to determine the value of x in consideration of the formation conditions.
  • the second parameter is the film thickness of the emitter layer 12.
  • the thickness of the emitter layer 12 necessary for this is estimated to be 2.5 ⁇ m from the light absorption coefficient of the crystalline Si 1-x Ge x .
  • the thickness of the emitter layer 12 is small.
  • the thickness of the emitter layer 12 is large, there is a method in which a buffer layer is appropriately provided during the formation of the emitter layer 12, or the value of x inside the emitter layer 12 is inclined in the thickness direction. Conceivable.
  • the film thickness of the emitter layer 12 is preferably 2.5 ⁇ m or less in terms of solar cell characteristics.
  • the film thickness of the emitter layer 12 is preferably as large as possible within the above range. Specifically, it is necessary to determine the thickness of the emitter layer 12 in consideration of the formation conditions.
  • the third parameter is the film thickness of the highly conductive buffer layer 13. In determining the film thickness of the highly conductive buffer layer 13, it is necessary to consider two points, light absorption by the emitter layer 12 and diffusion of Ge from the emitter layer 12.
  • the film thickness of the highly conductive buffer layer 13 is smaller than the film thickness of the emitter layer 12 for the purpose of light absorption.
  • Ge diffusion from the emitter layer 12 will be described.
  • Ge is diffused from the emitter layer 12 in the step of performing high-temperature heat treatment on the sample after the formation of the emitter layer 12.
  • a SiO 2 film formed by a thermal oxidation method is used as the passivation layer 15 for forming a high-quality surface passivation film, the diffusion of Ge from the emitter layer 12 during the thermal oxidation. Need to be considered.
  • the film thickness of the highly conductive buffer layer 13 By setting the film thickness of the highly conductive buffer layer 13 to 7 nm or more, a high-quality surface passivation film can be formed. From the above, it is desirable that the film thickness of the high conductivity buffer layer 13 be 7 nm or more, and it is particularly desirable that the film thickness of the high conductivity buffer layer 13 be as small as possible within the above range.
  • 3A to 3L are a top view and a cross-sectional view showing the method for manufacturing the solar battery cell according to the first embodiment.
  • each process of the manufacturing method of the photovoltaic cell of this Embodiment 1 is demonstrated based on FIG. 3A-FIG. 3L.
  • the emitter layer 12 is formed on the surface of the substrate 11.
  • a top view of the structure after formation is shown in FIG. 3A, and a cross-sectional view is shown in FIG. 3B.
  • the emitter layer 12 is formed by a film formation method such as an epitaxial growth method or a CVD method.
  • a film formation method such as an epitaxial growth method or a CVD method.
  • the position of the boundary surface between crystalline Si / crystalline Si 1-x Ge x is However, it is not necessarily the same as the position of the pn junction interface.
  • a p-type crystal Si 1-x Ge x may be formed in a relatively surface region of the substrate 11 and an n-type crystal Si 1-x Ge x may be formed on the surface thereof.
  • Impurity introduction in the formation of the emitter layer 12 may be performed at the time of the film formation, or may be performed by a method such as ion implantation, vapor phase diffusion, or solid phase diffusion after the film formation.
  • a highly conductive buffer layer 13 is formed on the surface of the emitter layer 12.
  • a top view of the structure after formation is shown in FIG. 3C, and a cross-sectional view is shown in FIG. 3D.
  • the highly conductive buffer layer 13 is formed by a film formation method such as an epitaxial growth method or a CVD method, similarly to the formation of the emitter layer 12.
  • Impurity introduction in the formation of the highly conductive buffer layer 13 is the same as the formation of the emitter layer 12, and may be performed during the film formation, or after the film formation, ion implantation, gas phase diffusion, or solid phase. Impurity implantation may be performed by a method such as diffusion.
  • the impurity concentration of the high conductivity buffer layer 13 will be described.
  • the impurity concentration of the high conductivity buffer layer 13 As the impurity concentration of the high conductivity buffer layer 13 is higher, the interface recombination between the surface electrode 21 and the high conductivity buffer layer 13 can be suppressed. In addition, the contact resistance between the surface electrode 21 and the highly conductive buffer layer 13 can be reduced. However, on the other hand, the higher the impurity concentration of the high-conductivity buffer layer 13, the more recombination within the high-conductivity buffer layer 13 increases.
  • a passivation layer 15 is formed.
  • a top view of the structure after formation is shown in FIG. 3E, and a cross-sectional view is shown in FIG. 3F.
  • the passivation layer 15 is formed by a thermal oxidation method, a plasma oxidation method, a CVD method, or the like.
  • a thermal oxidation method in order to form a high-quality surface passivation film, it is desirable to form the passivation layer 15 by a thermal oxidation method.
  • the case where the passivation layer 15 is formed is shown.
  • the passivation layer 15 is not formed on the back side of the substrate 11.
  • FIG. 3G A top view of the structure after removal is shown in FIG. 3G, and a cross-sectional view is shown in FIG. 3H.
  • the removal is performed by a wet etching method using a boiling acid solution or a dry etching method.
  • the back electrode 22 is formed on the back side of the substrate 11.
  • a top view of the structure after formation is shown in FIG. 3I, and a cross-sectional view is shown in FIG. 3J.
  • the back electrode 22 is formed by a film forming method such as a printing method, a vapor deposition method, a plating method, a sputtering method, or a CVD method.
  • the surface electrode 21 is formed.
  • a top view of the structure after formation is shown in FIG. 3K, and a cross-sectional view is shown in FIG. 3L.
  • the surface electrode 21 is formed by a film forming method such as a printing method, a vapor deposition method, a plating method, a sputtering method, or a CVD method.
  • the surface electrode 21 and the highly conductive buffer layer 13 are connected to each other in the opening 15a where the passivation layer 15 does not exist.
  • the opening 15a may be formed in the passivation layer 15 by a patterning method using lithography and etching, or a patterning method using an etching paste. Or you may carry out by the method using what is called fire through which performs baking after formation of the surface electrode 21, and electrically connects the surface electrode 21 and the highly conductive buffer layer 13.
  • FIG. 1 A top view of the structure after formation is shown in FIG. 3K, and a cross-sectional view is shown in FIG. 3L.
  • the shape seen from the upper surface of the opening of the passivation layer 15 is the same as the shape seen from the upper surface of the surface electrode 21.
  • the contact area between the surface electrode 21 and the highly conductive buffer layer 13 can be reduced. Although it is known that a reduction in contact area between the surface electrode 21 and the highly conductive buffer layer 13 has an effect of suppressing recombination, on the other hand, an increase in contact resistance is caused. It is necessary to optimize the contact area in consideration of the points.
  • the above is the method for manufacturing the solar battery cell of the first embodiment.
  • heat treatment, plasma treatment, etc. may be added as appropriate to improve the crystallinity and film quality of each film or to improve the quality of the interface with the adjacent film.
  • 4A and 4B are a top view and a cross-sectional view showing the solar battery cell according to the second embodiment.
  • 4A is a top view
  • FIG. 4B is a cross-sectional view.
  • the solar battery cell according to the second embodiment is a solar battery cell in which an emitter layer 12, a low-conductivity buffer layer 14, and a passivation layer 15 are formed on a substrate 11, and a front electrode 21 and a back electrode are used as electrodes. 22.
  • the first point is that the high conductivity buffer layer 13 in the structure of the first embodiment is replaced with the low conductivity buffer layer 14 in the structure of the second embodiment.
  • the second point is that in the structure of the first embodiment, the high conductivity buffer layer 13 exists over the entire surface, whereas in the structure of the second embodiment, the low conductivity buffer layer 14. Is patterned, and the surface electrode 21 and the emitter layer 12 are connected in the opening 14a where the low-conductivity buffer layer 14 does not exist.
  • 4A and 4B show a structure in which the width of the opening 14a where the low-conductivity buffer layer 14 does not exist is the same as the width of the opening 15a where the passivation layer 15 does not exist.
  • the widths of may be different.
  • the solar cell of the second embodiment it is possible to suppress the deterioration of the solar cell characteristics even when the quality of the passivation film is lower than in the case of the first embodiment. .
  • this effect will be described.
  • FIG. 5 is an explanatory diagram showing an energy band along the line CD in FIG. 4B.
  • the low-conductivity buffer layer 14 has higher conduction band edge energy than the emitter layer 12.
  • the electrons 31 generated in the emitter layer 12 cannot reach the inside of the low-conductivity buffer layer 14 after reaching the interface between the low-conductivity buffer layer 14 and the emitter layer 12. Will be driven back into the interior.
  • the holes 32 generated in the emitter layer 12 move from the emitter layer 12 to the substrate 11 as in the structure of the first embodiment.
  • the electrons 31 and the holes 32 are generated. Since neither reaches the interface, the deterioration of the solar cell characteristics is suppressed as compared with the case of the first embodiment.
  • the electrons 31 and the holes 32 do not move into the low-conductivity buffer layer 14.
  • the Eg of the 14 material needs to be larger than the Eg of the material of the emitter layer 12. For this reason, as in the first embodiment, for example, it is conceivable to use crystalline Si as the low-conductivity buffer layer 14 and crystalline Si 1-x Ge x as the emitter layer 12.
  • the n-type impurity concentration of the low-conductivity buffer layer 14 is set lower than the n-type impurity concentration of the emitter layer 12, or Since the low-conductivity buffer layer 14 is an i layer, the conduction band edge energy of the low-conductivity buffer layer 14 needs to be higher than the conduction band edge energy of the emitter layer 12.
  • the low-conductivity buffer layer 14 As a result of setting the n-type impurity concentration of the low-conductivity buffer layer 14 to a value lower than the n-type impurity concentration of the emitter layer 12 or making the low-conductivity buffer layer 14 i-layer, the low-conductivity buffer layer 14 There are concerns about an increase in resistance when the layer 14 is used as an electron movement path and an increase in recombination at the contact interface when the low-conductivity buffer layer 14 and the surface electrode 21 are brought into contact with each other. For this reason, in the structure of the second embodiment, the low-conductivity buffer layer 14 is patterned in the same manner as the passivation layer 15, and the electrons 31 generated in the emitter layer 12 do not pass through the low-conductivity buffer layer 14. , Collected directly from the emitter layer 12 to the surface electrode 21.
  • the quality of the passivation film may be low.
  • an SiO 2 film formed by a plasma CVD method may be used as the passivation layer 15.
  • the Ge diffusion distance to the low-conductivity buffer layer 14 in the structure of the second embodiment is made shorter than the Ge diffusion distance to the high-conductivity buffer layer 13 in the structure of the first embodiment. be able to. Therefore, the film thickness of the low-conductivity buffer layer 14 in the structure of the second embodiment can be made smaller than the film thickness of the high-conductivity buffer layer 13 in the structure of the first embodiment. As a result, the light absorption amount in the emitter layer 12 can be increased by the structure of the second embodiment as compared with the structure of the first embodiment.
  • ⁇ Solar cell manufacturing method> 6A to 6J are a top view and a cross-sectional view showing a method for manufacturing a solar battery cell according to the second embodiment.
  • each process of the manufacturing method of the photovoltaic cell of this Embodiment 2 is demonstrated based on FIG. 6A-FIG. 6J.
  • the emitter layer 12 is formed on the surface of the substrate 11.
  • a top view of the structure after formation is shown in FIG. 6A, and a cross-sectional view is shown in FIG. 6B.
  • a low-conductivity buffer layer 14 is formed on the surface of the emitter layer 12.
  • a top view of the structure after formation is shown in FIG. 6C, and a cross-sectional view is shown in FIG. 6D.
  • the formation method of the low conductivity buffer layer 14 is the same as the formation method of the high conductivity buffer layer 13 in the structure of the first embodiment.
  • a passivation layer 15 is formed.
  • a top view of the structure after formation is shown in FIG. 6E, and a cross-sectional view is shown in FIG. 6F.
  • the SiO 2 film formed by the plasma CVD method may be used as the passivation layer 15 in the second embodiment, the formation of the passivation layer 15 by the plasma CVD method is assumed in FIG. 6F.
  • the structure in the case where the passivation layer 15 is not formed on the back side of the substrate 11 is shown.
  • the back electrode 22 is formed on the back side of the substrate 11.
  • a top view of the structure after formation is shown in FIG. 6G, and a cross-sectional view is shown in FIG. 6H.
  • FIG. 6I A top view of the structure after formation is shown in FIG. 6I, and a cross-sectional view is shown in FIG. 6J.
  • the opening 14a is formed by a patterning method or a method using a fire-through similarly to the formation of the opening 15a of the passivation layer 15 in the first embodiment.
  • the solar battery cell of the second embodiment can be manufactured.
  • FIG. 3 A third embodiment of the present invention will be described with reference to FIG.
  • the third embodiment is an example of a solar battery system using the solar battery cells described in the first and second embodiments.
  • FIG. 7 is a configuration diagram showing a solar battery system using the solar battery cells according to the third embodiment.
  • the third embodiment is a solar battery system using the solar battery cells of the first and second embodiments.
  • the solar cell system includes a solar cell panel 41, a connection box 42, a current collection box 43, a power conditioner 44, and a transformer 45.
  • Solar cell panel 41 is a solar cell panel in which a plurality of solar cells described in the first and second embodiments are arranged.
  • the solar cell panel 41 is a panel that generates electric power by sunlight.
  • the connection box 42 is a connection box that transmits the electric power generated by the solar cell panel 41 to the current collection box 43.
  • the current collection box 43 is a current collection box that collects the electric power transmitted from the connection box 42 and transmits it to the power conditioner 44.
  • the power conditioner 44 is a converter that converts the electric power transmitted from the current collection box 43 from direct current to alternating current and transmits the electric power to the transformer 45.
  • the transformer 45 is a transformer that transforms the voltage of the AC power transmitted from the power conditioner 44 and transmits it to the commercial power system 46.
  • three power conditioners 44 and a current collection box 43 are connected to one transformer 45 connected to the commercial power system 46. Further, a three-system connection box 42 and a solar cell panel 41 are connected to each one-system power conditioner 44 and current collection box 43.
  • the electric power generated by the solar cell panel 41 is transmitted to the connection box 42 and collected in the current collection box 43. Thereafter, the power conditioner 44 converts the voltage from direct current to alternating current, collectively transforms the voltage with the transformer 45, and connects to the commercial power system 46.
  • the said structure is a structural example of the mega solar system with many panel numbers especially in a solar cell system. In the case of a residential system with a relatively small number of panels, it is directly connected to the power conditioner 44 from the connection box 42.
  • the solar cell system of Embodiment 3 can be realized.
  • the solar cell system according to the third embodiment it is possible to increase the efficiency of solar power generation by taking advantage of the effect of the solar cell structure.

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  • Engineering & Computer Science (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Energy (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

La présente invention concerne une cellule solaire qui, selon un mode de réalisation, comprend : un substrat (11) qui possède une première polarité ; une couche émettrice (12), qui est formée de Si cristallin sur une surface du substrat (11) qui possède la première polarité, ladite couche émettrice possédant une seconde polarité ; une couche tampon hautement conductrice (13), qui est formée de Si1-xGex cristallin sur une surface de la couche émettrice (12) qui possède la seconde polarité ; et une couche à passivation (15) qui est formée d'un matériau isolant sur une surface de la couche tampon hautement conductrice (13). L'épaisseur de film de la couche tampon hautement conductrice (13) est inférieure à celle de la couche émettrice (12) qui possède la seconde polarité. Avec une telle structure de la cellule solaire, une multiple génération d'excitons est utilisée, et en conséquence, une cellule solaire très efficace peut être obtenue.
PCT/JP2014/064580 2014-06-02 2014-06-02 Cellule solaire, procédé de fabrication de cellule solaire, et système à cellule solaire WO2015186167A1 (fr)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006073833A (ja) * 2004-09-02 2006-03-16 Sharp Corp 太陽電池セルおよびその製造方法
WO2007105675A1 (fr) * 2006-03-13 2007-09-20 Shin-Etsu Chemical Co., Ltd. Procede de fabrication de substrat pour element de conversion photoelectrique
US20110120538A1 (en) * 2009-10-23 2011-05-26 Amberwave, Inc. Silicon germanium solar cell
WO2011077735A1 (fr) * 2009-12-25 2011-06-30 住友化学株式会社 Substrat semi-conducteur, procédé de fabrication de substrat semi-conducteur, et procédé de fabrication de dispositif de conversion photoélectrique

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006073833A (ja) * 2004-09-02 2006-03-16 Sharp Corp 太陽電池セルおよびその製造方法
WO2007105675A1 (fr) * 2006-03-13 2007-09-20 Shin-Etsu Chemical Co., Ltd. Procede de fabrication de substrat pour element de conversion photoelectrique
US20110120538A1 (en) * 2009-10-23 2011-05-26 Amberwave, Inc. Silicon germanium solar cell
WO2011077735A1 (fr) * 2009-12-25 2011-06-30 住友化学株式会社 Substrat semi-conducteur, procédé de fabrication de substrat semi-conducteur, et procédé de fabrication de dispositif de conversion photoélectrique

Non-Patent Citations (1)

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Title
M.WOLF: "Solar cell efficiency and carrier multiplication in Si1-xGex alloys", JOURNAL OF APPLIED PHYSICS, vol. 83, no. 8, 1998, pages 4213 - 4221, XP012045017, ISSN: 0021-8979 *

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