WO2017009960A1 - Cellule de batterie solaire et son procédé de fabrication - Google Patents

Cellule de batterie solaire et son procédé de fabrication Download PDF

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WO2017009960A1
WO2017009960A1 PCT/JP2015/070194 JP2015070194W WO2017009960A1 WO 2017009960 A1 WO2017009960 A1 WO 2017009960A1 JP 2015070194 W JP2015070194 W JP 2015070194W WO 2017009960 A1 WO2017009960 A1 WO 2017009960A1
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layer
crystalline
crystal
solar cell
type
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PCT/JP2015/070194
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Japanese (ja)
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敬司 渡邉
峰　利之
克矢 小田
真 三浦
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株式会社日立製作所
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a solar battery cell and a manufacturing method thereof, and more particularly, to a solar battery cell capable of generating multi-exciton and a manufacturing method thereof.
  • Multi-exciton production occurs when the surplus energy exceeding the band gap energy (energy difference between the conduction band and the valence band, hereinafter referred to as Eg) is equal to or greater than twice Eg (hereinafter referred to as 2Eg). This is a phenomenon in which electron-hole pairs are further generated by surplus energy.
  • Eg energy difference between the conduction band and the valence band
  • 2Eg twice Eg
  • Patent Document 1 discloses an example of a solar battery cell that uses multi-exciton generation.
  • a solar cell having a pn junction of single crystal Si and a SiO 2 film formed by a thermal oxidation method on the solar light receiving surface (hereinafter referred to as a surface) side an internal quantum exceeding 1 The point that efficiency is confirmed is disclosed.
  • solar cells that use a crystalline SiGe layer as a power generation layer have been studied as those that can be expected to have higher conversion efficiency than single crystal Si solar cells.
  • the crystalline SiGe layer can be expected to improve the light utilization efficiency as compared with the case where single crystal Si is used as the power generation layer, but on the other hand, the crystal defect density (hereinafter referred to as dislocation density) compared to single crystal Si. It is easy to increase. For this reason, there is a concern about the occurrence of so-called recombination in which electron-hole pairs (hereinafter referred to as carriers) once generated in the power generation layer are recombined.
  • carriers electron-hole pairs
  • the dislocation density decreases as the thickness of the underlying layer formed thereunder increases, and carrier recombination tends to be suppressed.
  • the thickness of the underlying layer of the crystalline SiGe layer is increased, the probability that carrier recombination occurs in the underlying layer increases.
  • an object of the present invention is to provide a solar battery cell that is excellent in light utilization efficiency and suppresses carrier recombination loss, and a method for manufacturing the solar battery cell.
  • a back electrode formed of an alloy of Ge and another metal element, and a first crystalline Si having a first polarity formed on the main surface of the back electrode.
  • a Ge layer mainly composed of Ge is formed on a crystalline Si substrate, and a first crystal having a first polarity is formed on the Ge layer.
  • a Si 1-x Ge x layer is formed, a second crystalline Si 1-y Ge y layer having a second polarity is formed on the first crystalline Si 1-x Ge x layer, and another layer is formed on the Ge layer.
  • the back electrode is formed by introducing a metal element.
  • the present invention it is possible to realize a solar battery cell that is excellent in light utilization efficiency and suppresses carrier recombination loss and a method for manufacturing the solar battery cell.
  • FIG. 1 is a diagram showing a solar battery cell according to Example 1.
  • FIG. 2 is a diagram illustrating a method for manufacturing a solar battery cell according to Example 1.
  • FIG. 2 is a diagram illustrating a method for manufacturing a solar battery cell according to Example 1.
  • FIG. 2 is a diagram illustrating a method for manufacturing a solar battery cell according to Example 1.
  • FIG. 2 is a diagram illustrating a method for manufacturing a solar battery cell according to Example 1.
  • FIG. 2 is a diagram illustrating a method for manufacturing a solar battery cell according to Example 1.
  • FIG. 2 is a diagram illustrating a method for manufacturing a solar battery cell according to Example 1.
  • FIG. 2 is a diagram illustrating a method for manufacturing a solar battery cell according to Example 1.
  • FIG. 2 is a diagram illustrating a method for manufacturing a solar battery cell according to Example 1.
  • FIG. 2 is a diagram illustrating a method for manufacturing a solar battery cell according to Example 1.
  • FIG. The crystal Si 1-x Ge x layer and the crystalline Ge layer is a diagram showing an example of a conventional solar cell having a power generation layer.
  • 1 is a configuration diagram illustrating a solar battery system using a solar battery cell according to Example 1.
  • FIG. 1 A solar battery cell according to Example 1 of the present invention will be described with reference to FIG.
  • (a) is a top view showing the solar battery cell
  • (b) is a cross-sectional view of the solar battery cell.
  • the solar battery cell has a back electrode 22 formed on the main surface of the crystalline Si substrate 11.
  • a laminated body 25 in which a P-type crystalline Si 1-x Ge x layer 15, an N-type crystalline Si 1-y Ge y layer 16, and an N-type crystalline Si layer 17 are laminated in this order. A plurality of are formed.
  • each of the crystal Si 1-x Ge x and the crystal Si 1-y Ge y is a mixed crystal of Si and Ge, and x and y are values of 0 ⁇ x ⁇ 1 and 0 ⁇ y ⁇ 1, respectively.
  • the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16 are simply referred to as a P-type crystal SiGe layer 15 and an N-type crystal SiGe layer 16, respectively.
  • Each laminate 25 is provided on the back electrode 22 so as to be adjacent to each other with the opening 24 interposed therebetween, and on the main surface of the crystalline Si layer 17 and the side facing the opening 24 of each laminate 25, A passivation layer 18 is formed.
  • the surface electrode 21 is provided on the opening formed in the passivation layer 18 on the crystalline Si layer 17.
  • the surface electrode 21 is electrically connected to the crystalline Si layer 17 by being in contact with the crystalline Si layer 17 at the opening of the passivation layer 18.
  • the crystalline Si substrate 11, the P-type crystalline Si 1-x Ge x layer 15, the N-type crystalline Si 1-y Ge y layer 16, and the crystalline Si layer 17 have crystal structures such as single crystal, polycrystal, and microcrystal. It can be used.
  • an insulating material such as SiO 2 , SiN (silicon nitride), amorphous Si, SiC (silicon carbide), or CdS can be used.
  • the passivation layer 18 may be formed of a single layer using these insulating materials, or may be formed of a stacked structure in which two or more insulating materials selected from these layers are stacked. Among these, it is desirable to form the passivation layer 18 using SiO 2 . The reason is that the interface between the SiO 2 and crystal Si is compared to the interface between the SiO 2 and crystalline Si 1-x Ge x, because the interface recombination is suppressed.
  • Multi-exciton production is a phenomenon caused by high energy light.
  • a high-quality passivation layer 18 is preferably provided on the surface of the solar battery cell in order to increase the generation efficiency of multi-excitons.
  • the low-quality passivation layer 18 is provided, that is, when there are many recombination levels at the interface between the passivation layer 18 and the power generation layer, the electrons and holes generated by the multi-exciton generation are collected by the electrodes. The probability of disappearing by recombination is high. For this reason, as the passivation layer 18, it is desirable to provide a SiO 2 film formed by a thermal oxidation method as the high-quality passivation layer 18.
  • a metal material generally used as an electrode material of a solar cell for example, a metal material containing at least one element selected from the group consisting of Ag, Al, Ti, Pd, Ni, and Cu is used. it can.
  • the surface electrode 21 may be formed of any one of the above metal elements, or may be formed including two or more of these metal elements. In addition, a plurality of layers containing different metal elements may be stacked.
  • an alloy containing germanium hereinafter simply referred to as Ge
  • another metal element can be used.
  • the metal element to be mixed with Ge at least one element selected from the group consisting of a metal material generally used as an electrode material of a solar cell, for example, Ag, Al, Ti, Pd, Ni, and Cu can be used.
  • the metal element to be mixed with Ge it is desirable to use a metal element having a higher solid solubility of Ge in the metal element than the solid solubility of Si in the metal element.
  • a metal element having a higher solid solubility of Ge in the metal element than the solid solubility of Si in the metal element.
  • an alloy of Ge and a metal element as the back electrode 22, it is possible to reduce the recombination loss of carriers in the solar battery cell for the reason described later.
  • the composition ratio of the alloy obtained by heat treatment depends on the solid solubility of one component forming the alloy in the other component (see Non-Patent Document 3).
  • the back electrode 22 preferably contains 50% or more of a metal element other than Ge.
  • FIG. 1B shows an example in which the power generation layer is laminated on the back electrode 22 in the order of the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16.
  • these layers may be laminated on the back surface electrode 22 in the order of the N-type crystalline Si 1-y Ge y layer 16 and the P-type crystalline Si 1-x Ge x layer 15. Good.
  • the solar battery cell of the present invention is not necessarily limited to such a configuration. That is, when the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16 are laminated in this order on the back electrode 22, the conductivity of the crystal Si layer 17 on the P-type crystal Si 1-x Ge x layer 16 is laminated. In the case where the type is N-type and the N-type crystal Si 1-y Ge y layer 16 and the P-type crystal Si 1-x Ge x layer 15 are laminated on the back electrode 22 in this order, The conductivity type of the Si layer 17 is P type.
  • a stacked body of a P-type crystalline Si 1-x Ge x layer 15, an N-type crystalline Si 1-y Ge y layer 16 and a crystalline Si layer 17, a passivation layer 18, and a surface electrode 21 are formed on the surface electrode 21.
  • the patterning shape is not necessarily limited to the form shown in FIG.
  • each layer may be patterned into a shape having a curve such as a circle.
  • the conductivity of the region connected to the surface electrode 21 in the crystalline Si layer 17 is higher than the conductivity of the region not connected to the surface electrode 21 in the same manner as a general solar cell.
  • a so-called selective emitter structure may be employed.
  • a back surface field (BSF) layer is provided at the interface between the P-type crystalline Si 1-x Ge x layer 15 and the back electrode 22 as in the case of a general solar battery cell. Also good.
  • BSF back surface field
  • the solar battery cell of Example 1 has the P-type crystalline Si 1-x Ge x layer 15 and the power generation layer on the back electrode 22 formed of an alloy of Ge and another metal element.
  • the N-type crystalline Si 1-y Ge y layer 16 is formed, a solar cell with high power generation efficiency can be realized by improving both the generation efficiency of multi-excitons and reducing the recombination loss of carriers. can do. The reason will be described below.
  • the P-type crystalline Si 1-x Ge x layer 15 and the N-type crystalline Si 1-y Ge y layer 16 are provided as the power generation layer, for example, the crystalline Si layer is used as the power generation layer.
  • the crystalline Si layer is used as the power generation layer.
  • regions where multi-excitons can be generated are a P-type crystalline Si 1-x Ge x layer 15, an N-type crystalline Si 1-y Ge y layer 16, and a crystalline Si layer 17, Among them, the values of ⁇ ⁇ -2Eg of the P-type crystalline Si 1-x Ge x layer 15 and the N-type crystalline Si 1-y Ge y layer 16 are monotonously as the values of x and y are increased, as will be described later. Decrease.
  • the value of ⁇ ⁇ -2Eg of the band structure is obtained. It is possible to reduce and improve the utilization efficiency of light having energy of 2 Eg or more.
  • the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16 absorb more light having an energy of 2 Eg or more to increase the generation efficiency of multi-excitons.
  • the P-type crystal Si 1-x Adjustment of the thicknesses of the Ge x layer 15, the N-type crystalline Si 1-y Ge y layer 16, and the crystalline Si layer 17 is also effective.
  • the P-type crystal Si 1-x Ge x layer 15 as the power generation layer is formed on the back electrode 22 formed of an alloy of Ge and another metal element.
  • FIG. 10 shows an example of a conventional solar battery cell having a crystalline Si 1-x Ge x layer and a crystalline Ge layer as power generation layers.
  • (A) is the top view
  • (b) is a sectional view.
  • a Ge buffer layer 52, a crystalline Ge layer 53, a crystalline Si 1-x Ge x layer 54, a crystalline Si layer 57, and a passivation are formed on a crystalline Si substrate 51 formed on the back electrode 62.
  • the layers 58 are laminated in this order, and the surface electrode 61 is formed in the opening provided in the passivation layer 58.
  • the crystalline Ge layer 53 and the crystalline Si 1-x Ge x layer 54 are power generation layers.
  • the Ge buffer layer 52 is a layer provided for forming the crystalline Ge layer 52 on the crystalline Si substrate 51. Specifically, the Ge buffer layer 52 is first formed on the crystalline Si substrate 51, and the Ge buffer layer 52 is lattice-relaxed by applying heat treatment. Thereafter, a crystalline Ge layer 53 is formed on the Ge buffer layer 52. As the thickness of the crystalline Ge layer 53 formed in this way increases, the dislocation density on the outermost surface decreases (see Non-Patent Document 2). As a result, the crystal formed on the crystalline Ge layer 53 The dislocation density of the Si 1-x Ge x layer 54 is reduced.
  • the recombination loss (first recombination loss) in the crystalline Ge layer 53 and the crystalline Si layer 53 is a problem.
  • the crystalline Ge layer 53 In order to reduce the second recombination loss, it is necessary to increase the film thickness of the crystalline Ge layer 53. For this reason, in the conventional solar cell using the SiGe layer, there is a trade-off of the film thickness adjustment of the crystalline Ge layer with respect to the suppression of these two types of recombination loss.
  • the back electrode 22 is formed by an alloying reaction between the Ge buffer layer 12 and the crystalline Ge layer 13 and the metal layer 23 as described in detail in the description of the manufacturing method later. (See FIG. 7).
  • the Ge buffer layer 12 and the crystalline Ge layer 13 in the manufacturing process of the solar battery cell of Example 1 correspond to the Ge buffer layer 52 and the crystalline Ge layer 53 shown in FIG.
  • the P-type crystalline Si 1-x Ge x layer 15 and the N-type crystalline Si 1-y Ge y layer 16 of the solar battery cell of Example 1 are formed on the crystalline Si 1-x Ge x layer 54 shown in FIG. Consider correspondingly.
  • the crystalline Ge layer 53 that is the first recombination loss occurrence location in the conventional configuration corresponds to the back electrode 22 of the solar battery cell of Example 1, and the second recombination loss occurrence location in the conventional configuration.
  • a certain crystal Si 1-x Ge x layer 54 corresponds to the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16 of the first embodiment.
  • the back electrode 22 that is the underlayer of the P-type crystalline Si 1-x Ge x layer 15 is formed of an alloy of Ge and another metal element, and the back electrode 22 is Compared with the case where it is formed without containing a metal element other than Ge, the reflectance with respect to light incident from the surface electrode 22 side is high.
  • the back electrode 22 tends to have a higher surface reflectance as the composition ratio of the metal elements other than Ge increases.
  • the crystalline Ge layer 13 (see FIG. 5) is alloyed with the metal layer 23 together with the Ge buffer layer 12 to form the back electrode 22, and in the solar cell of Example 1, There is no crystalline Ge layer 13 and there is no recombination loss in the crystalline Ge layer 13.
  • Recombination suppression of P-type crystal Si 1-x Ge x layer 15 Next, suppression of recombination loss in the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16 will be described.
  • the back electrode 22 is unlikely to absorb light, and recombination loss is suppressed regardless of its thickness.
  • the thickness of the back surface electrode 22 can be arbitrarily increased without worrying about an increase in recombination loss in the back surface electrode 22. Therefore, when a P-type crystalline Si 1-x Ge x layer 15 described later is formed, the underlying crystalline Ge layer 13 (see FIG. 2B) can be thickened. By reducing the dislocation density on the surface, the dislocation densities of the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16 can be reduced. Thereby, recombination loss in the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16 can be suppressed.
  • the first parameter is x and y indicating the Ge composition of the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16.
  • the x value of the P-type crystalline Si 1-x Ge x layer 15 and the y value of the N-type crystalline Si 1-y Ge y layer 15 are the multi-exciton production efficiency and the P-type crystalline Si 1-x Ge x layer, respectively. It is desirable to determine in consideration of two points of the formation conditions of the 15 and N-type crystalline Si 1-y Ge y layer 16. In the following, the case of P-type crystal Si 1-x Ge x will be described as an example, but the same can be said for N-type crystal Si 1-y Ge y , and the description thereof will be omitted.
  • the Ge composition x of the P-type crystalline Si 1-x Ge x layer 15 and the Ge composition y of the N-type crystalline Si 1-y Ge y layer 16 may be the same or different from each other. Also good. Further, the Ge composition may be changed inside each layer.
  • ⁇ ⁇ -2Eg As described above, from the viewpoint of improving the generation efficiency of multi-excitons, it is desirable to reduce the value of ⁇ ⁇ -2Eg in order to increase the light utilization efficiency.
  • ⁇ ⁇ -2Eg when ⁇ ⁇ -2Eg ⁇ 0, electrons and holes generated by light absorption at the ⁇ point cannot generate multi-excitons. Therefore, in order to efficiently generate multi-excitons, it is desirable that the value of ⁇ ⁇ -2Eg is 0 or more and is as small as possible.
  • both ⁇ ⁇ and Eg in the crystalline Si 1-x Ge x monotonously decrease with respect to x, and the value of ⁇ ⁇ -2Eg also monotonously decreases with respect to x.
  • the value of x is preferably in the range of 0 ⁇ x ⁇ 0.68.
  • the value of x is as large as possible within the above range. desirable.
  • the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16 are formed on the crystal Ge layer 13 by, for example, epitaxial growth. Therefore, from the viewpoint of the formation conditions of the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16, the lattice constant of the crystal Ge layer 13 and the P-type crystal Si 1-x The difference between the lattice constants of the Ge x layer 15 and the N-type crystalline Si 1-y Ge y layer 16 is preferably small.
  • the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16 are formed on the crystal Ge layer 13 by, for example, epitaxial growth. It can be done easily.
  • the value of x in the P-type crystalline Si 1-x Ge x layer 15 is in the range of 0 ⁇ x ⁇ 0.68.
  • a larger value is desirable within the range of 0 ⁇ x ⁇ 0.68.
  • the value of y is preferably in the range of 0 ⁇ y ⁇ 0.68, and particularly in the range of 0 ⁇ y ⁇ 0.68. A larger value is desirable.
  • the second parameter is the total value of the film thickness of the P-type crystal Si 1-x Ge x layer 15 and the film thickness of the N-type crystal Si 1-y Ge y layer 16.
  • the total value of the film thickness of the P-type crystal Si 1-x Ge x layer 15 and the film thickness of the N-type crystal Si 1-y Ge y layer 16 is the same as the P-type crystal Si 1-x Ge x layer 15 and the N - type crystal Si 1-x Ge x layer 15. considering the light absorption in a crystalline Si 1-y Ge y layer 16, the two points of suppression of recombination losses in the P-type crystalline Si 1-x Ge x layer 15 and the N-type crystalline Si 1-y Ge y layer 16 It is desirable to decide.
  • the film thickness of the P-type crystalline Si 1-x Ge x layer 15 and the N-type crystalline Si 1-y Ge required for absorption by the 1-x Ge x layer 15 and the N-type crystalline Si 1-y Ge y layer 16 The total value of the film thickness of the y layer 16 is estimated to be approximately 2 ⁇ m from the light absorption coefficient.
  • the P-type crystal Si 1-x Ge x layer The total value of the film thickness of 15 and the film thickness of the N-type crystal Si 1-y Ge y layer 16 is preferably smaller.
  • the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16 are formed by, for example, an epitaxial growth method, the P-type crystal is used from the viewpoint of the formation conditions and the formation time.
  • the total value of the film thickness of the Si 1-x Ge x layer 15 and the film thickness of the N-type crystal Si 1-y Ge y layer 16 is preferably smaller.
  • the total value of the film thickness of the P-type crystal Si 1-x Ge x layer 15 and the film thickness of the N-type crystal Si 1-y Ge y layer 16 is improved light absorption in these layers, From the viewpoint of achieving both suppression of recombination loss, it is desirable that the range is 2 ⁇ m or less. More desirably, the value is larger within the range of 2 ⁇ m or less.
  • the third parameter is the film thickness of the crystalline Si layer 17.
  • the film thickness of the crystalline Si layer 17 is such that the light absorption in the P-type crystalline Si 1-x Ge x layer 15 and the N-type crystalline Si 1-y Ge y layer 16, the P-type crystalline Si 1-x Ge x layer 15 and It is desirable to determine in consideration of two points: suppression of diffusion of Ge from the N-type crystal Si 1-y Ge y layer 16.
  • the film thickness of the crystalline Si layer 17 is preferably smaller than the total value of the film thickness of the P-type crystal Si 1-x Ge x layer 15 and the film thickness of the N-type crystal Si 1-y Ge y layer 16. .
  • the crystalline Si layer 17 has a thickness capable of suppressing the diffusion of Ge from the P-type crystalline Si 1-x Ge x layer 15 and the N-type crystalline Si 1-y Ge y layer 16 during the manufacturing process described later. It is desirable to have.
  • a SiO 2 film is formed as a high-quality passivation layer 18 by thermal oxidation after forming the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16
  • P The stacked body of the type crystal Si 1-x Ge x layer 15 and the N type crystal Si 1-y Ge y layer 16 is heat-treated at a high temperature.
  • the P type crystal Si 1-x Ge x layer 15 and the N type crystal Si 1-x Ge x layer 15 Ge diffusion occurs from the crystalline Si 1-y Ge y layer 16.
  • the film thickness of the crystalline Si layer 17 By setting the film thickness of the crystalline Si layer 17 to 7 nm or more, the diffusion of Ge into the passivation layer 18 can be suppressed, and the high-quality passivation layer 18 can be formed.
  • the film thickness of the crystal Si layer 17 is 7 nm or more. Is desirable. In particular, it is smaller in the range of 7 nm or more from the viewpoint of achieving both suppression of Ge diffusion and light absorption in the P-type crystalline Si 1-x Ge x layer 15 and the N-type crystalline Si 1-y Ge y layer 16. It is desirable to use a film thickness.
  • ⁇ Solar cell manufacturing method> 2 to 9 are diagrams showing a method for manufacturing a solar battery cell according to Example 1.
  • FIG. 2 to 9, (a) shows a top view and (b) shows a cross-sectional view.
  • each step of the solar cell manufacturing method according to Example 1 will be described with reference to FIGS.
  • a Ge buffer layer 12 a crystalline Ge layer 13, a P-type crystalline Si 1-x Ge x layer 15, an N-type crystalline Si 1-y Ge y layer 16, and a crystalline Si layer 17 are formed on the surface of the crystalline Si substrate 11. Are formed in this order.
  • the structure after the formation of each layer is shown in FIG.
  • the method of forming the Ge buffer layer 12, the crystalline Ge layer 13, the P-type crystalline Si 1-x Ge x layer 15, the N-type crystalline Si 1-y Ge y layer 16, and the crystalline Si layer 17 is for reducing crystal defects. It is desirable to carry out by an epitaxial growth method. However, a part of the layers described above may be performed by another film formation method such as a CVD method.
  • Impurity doping of the P-type crystalline Si 1-x Ge x layer 15, the N-type crystalline Si 1-y Ge y layer 16, and the crystalline Si layer 17 may be performed at the time of forming each of the above-described layers. After film formation, ion implantation, vapor phase diffusion, or solid phase diffusion may be used.
  • the stacked body of the P-type crystalline Si 1-x Ge x layer 15, the N-type crystalline Si 1-y Ge y layer 16, and the crystalline Si layer 17 is patterned to form an opening 24.
  • the opening 24 By forming the opening 24, the stacked body 25 is formed on the crystalline Ge layer 13.
  • the structure after the opening 24 is formed is shown in FIG.
  • the opening 24 may be formed by a patterning method using lithography and etching, or by a patterning method using an etching paste.
  • at least a part of the crystalline Ge layer 13 at the bottom of the opening 24 is also etched.
  • the openings 24 are formed by appropriately adjusting the pitch between the adjacent openings 24 and the width of the openings 24.
  • an alloying reaction between the Ge buffer layer 12 and the crystalline Ge layer 13 and the metal layer 23, which will be described later, is performed on the entire Ge buffer layer 12 and the crystalline Ge layer 13. It can be easily advanced over the area. Therefore, it is desirable to reduce the pitch between the adjacent openings 24.
  • the P-type crystalline Si 1-x Ge x layer 15 and the N-type crystalline Si 1-y Ge y layer 16 absorb more high-energy light. It is desirable to do. For this reason, from the viewpoint of improving the light absorption in the P-type crystal Si 1-x Ge x layer 15 and the N-type crystal Si 1-y Ge y layer 16, it is desirable that the area occupied by the opening 24 be smaller. The width of the portion 24 is preferably smaller.
  • the width of the opening 24 is small, the aspect ratio of the opening 24 becomes high, and it is difficult to fill the opening 24 with the metal layer 23 when forming the metal layer 23 described later (see FIG. 6). Thus, voids in which the metal layer 23 does not exist are likely to occur inside the opening 24. For this reason, it is desirable that the width of the opening 24 be made smaller as long as the opening 24 is sufficiently filled with the metal layer 23.
  • a passivation layer 18 is formed.
  • the passivation layer 18 is formed so as to be in contact with the entire exposed surface of the stacked body 25.
  • the structure after forming the passivation layer 18 is shown in FIG.
  • the passivation layer 18 can be formed by a thermal oxidation method, a plasma oxidation method, a CVD method, or the like. Among these, as described above, by using the thermal oxidation method, a high-quality passivation layer with few recombination levels existing at the interface with the power generation layer can be formed. If a thermal oxidation method is used when forming the passivation layer 18, the surface of the stacked body 18 of the P-type crystalline Si 1-x Ge x layer 15, the N-type crystalline Si 1-y Ge y layer 16, and the crystalline Si layer 17 is used. In addition, a passivation layer 18 is also formed on the back side of the crystalline Si substrate 11. On the other hand, for example, when the plasma CVD method is used, the passivation layer 18 is not formed on the back side of the crystalline Si substrate 11.
  • both the surface electrode 21 and the back electrode 22 are formed on the surface side of the crystalline Si substrate 11 (the formation surface side of the stacked body 25), and the power generation layer
  • the carriers formed in (1) do not pass through the back side of the crystalline Si substrate 11.
  • the passivation layer 18 may exist on the back side of the crystalline Si substrate 11.
  • the region in contact with the crystalline Ge layer 13 in the passivation layer 18 is removed.
  • the structure after removal of the crystalline Ge layer 13 is shown in FIG.
  • the passivation layer 18 the crystalline Ge layer 13 is exposed in the region of the opening 24.
  • the region of the passivation layer 18 that is in contact with the crystalline Ge layer 13 may be removed by a patterning method using lithography and etching, or by a patterning method using an etching paste.
  • the regions in contact with the side walls of the P-type crystalline Si 1-x Ge x layer 15 and the N-type crystalline Si 1-y Ge y layer 16 are not removed, and the regions on the crystalline Ge layer 13 are not removed.
  • the passivation layer 18 is removed.
  • the metal layer 23 is formed.
  • the structure after the metal layer 23 is formed is shown in FIG.
  • the metal layer 23 can be formed using a film forming method such as a printing method, a vapor deposition method, a plating method, a sputtering method, or a CVD method. As described above, the metal layer 23 is formed so as to fill the opening 24 with a metal material containing a metal element other than Ge. Thereby, the metal layer 23 in contact with the crystalline Ge layer 13 exposed in the opening is formed.
  • a film forming method such as a printing method, a vapor deposition method, a plating method, a sputtering method, or a CVD method.
  • the metal material composing the metal layer 23 it is desirable to use a material having a solid solubility of Ge in the metal material higher than that of Si in the metal material.
  • a metal material containing at least one element selected from the group consisting of Ag, Al, Ti, Pd, Ni, and Cu can be used as the metal material constituting the metal layer 23, for example.
  • the composition ratio of Ge to the metal element contained in the metal layer 23 is It is determined by the solid solubility of Ge in this metal element.
  • the composition ratio between Ge and the metal element of the metal layer 23 in the back electrode 22 is lower than a value determined by the solid solubility of Ge in the metal element.
  • the surface reflectance of the back electrode 22 is high. For this reason, the composition ratio of the metal elements of the metal layer 23 in the back electrode 22 Is higher. For this reason, it is desirable to form the metal layer 23 sufficiently thick so that the supply amount of the metal element of the metal layer 23 to the crystalline Ge layer 13 or the Ge buffer layer 12 is not insufficient. Specifically, as shown in FIG. 6, it is desirable that the metal layer 23 be formed so as to cover the entire laminated body 25.
  • the back electrode 22 is formed by alloying the Ge buffer layer 12 and the crystalline Ge layer 13 with the metal layer 23.
  • the structure after the back electrode 22 is formed is shown in FIG.
  • the alloying reaction between the Ge buffer layer 12 and the crystalline Ge layer 13 and the metal layer 23 is performed by heat treatment at a high temperature.
  • the higher the heat treatment temperature the higher the speed of the alloying reaction between the Ge buffer layer 12 and the crystalline Ge layer 13 and the metal layer 23.
  • the metal layer 23 and the P-type crystalline Si 1-x Ge There is concern over the progress of the alloying reaction with the x layer 15 and the N-type crystalline Si 1-y Ge y layer 16.
  • the heat treatment temperature is higher than the eutectic point of the metal layer 23 and Ge
  • the alloying reaction between the Ge buffer layer 12 and the crystalline Ge layer 13 and the metal layer 23 is remarkably accelerated. For this reason, for example, it is higher than the eutectic point of the metal element of the metal layer 23 and Ge and lower than the eutectic point of the metal element of the metal layer 23 and Si 1-x Ge x (Si 1-y Ge y ). It is desirable to perform heat treatment at temperature.
  • the Ge buffer layer 12 and the crystalline Ge layer 13 are alloyed in a short time, and the P-type crystalline Si 1-x Ge x layer 15, the N-type crystalline Si 1-y Ge y layer 16, and the metal layer 23 are combined. The alloying reaction can be suppressed.
  • the metal layer 23 formed on the crystalline Ge layer 13 is removed.
  • the structure after removing the metal layer 23 is shown in FIG.
  • the metal layer 23 is removed by wet etching or the like.
  • the wet etching resistance of an alloy of a metal and a semiconductor is different from the wet etching resistance of a single metal, for example, by appropriately selecting a chemical solution used for etching, the metal layer is suppressed while suppressing etching on the back electrode 22. 23 can be removed by etching.
  • the surface electrode 21 is formed.
  • the structure after the surface electrode 21 is formed is shown in FIG.
  • the surface electrode 21 is formed by a film forming method such as a printing method, a vapor deposition method, a plating method, a sputtering method, or a CVD method.
  • the surface electrode 21 is formed, for example, by previously forming an opening in the passivation layer 18 and then contacting the crystalline Si layer 17 exposed in the opening, thereby electrically connecting the surface electrode 21 to the crystalline Si layer 17. It can be made conductive.
  • the surface electrode 21 is electrically connected to the crystalline Si layer 17 by performing so-called fire-through after forming the surface electrode 21 on the passivation layer 18 without forming the opening and then firing. be able to.
  • the shape of the opening of the passivation layer 18 viewed from the upper surface side is the same as the shape viewed from the upper surface side of the surface electrode 21.
  • the surface electrode 21 is formed in the opening previously formed in the passivation layer 18, it is possible to reduce the contact area between the surface electrode 21 and the crystalline Si layer 17 as compared with the case of using the fire-through. is there.
  • the solar cell shown in FIG. 1 can be manufactured.
  • heat treatment or plasma treatment may be added as appropriate for the purpose of improving the crystallinity and film quality of each film, or improving the quality of the interface with the adjacent film.
  • FIG. 11 is a configuration diagram illustrating a solar battery system using the solar battery cells according to the first embodiment.
  • the solar cell system includes a solar cell panel 31, a connection box 32, a current collection box 33, a power conditioner 34, and a transformer 35.
  • the solar battery panel 31 is a solar battery panel in which a plurality of solar battery cells described in the first embodiment are arranged.
  • the solar cell panel 31 is a panel that generates electric power from sunlight.
  • the connection box 32 is a connection box that transmits the electric power generated by the solar cell panel 31 to the current collection box 33.
  • the current collection box 33 is a current collection box that collects the electric power transmitted from the connection box 32 and transmits it to the power conditioner 34.
  • the power conditioner 34 is a converter that converts electric power transmitted from the current collection box 33 from direct current to alternating current and transmits the electric power to the transformer 35.
  • the transformer 35 is a transformer that transforms the voltage of the AC power transmitted from the power conditioner 34 and transmits it to the commercial power system 36.
  • three power conditioners 34 and a current collection box 33 are connected to one transformer 35 connected to the commercial power system 36. Further, a three-system connection box 32 and a solar cell panel 31 are connected to each one-system power conditioner 34 and current collection box 33.
  • the electric power generated by the solar cell panel 31 is transmitted to the connection box 32 and collected in the current collection box 33. Thereafter, the power conditioner 34 converts the current from direct current to alternating current, collectively transforms the voltage with the transformer 35, and connects to the commercial power system 36.
  • the said structure is a structural example of the mega solar system with many panel numbers especially in a solar cell system. For example, in the case of a residential system with a relatively small number of panels, it is directly connected to the power conditioner 34 from the connection box 32.
  • Example 1 As described above, a solar battery system using the solar battery cell of Example 1 can be realized. In the solar cell system shown in FIG. 11, highly efficient solar power generation utilizing the characteristics of the solar cell described in Example 1 is possible.

Abstract

L'invention concerne une cellule de batterie solaire qui présente un excellent rendement d'utilisation de lumière et pour laquelle des pertes par recombinaison de porteurs sont supprimées. La cellule de batterie solaire comprend une électrode de surface arrière (22) formée à partir d'un alliage de Ge et d'autres éléments métalliques, une première couche de Si1-xGex cristallin (15) d'une première polarité formée sur une surface primaire de l'électrode de surface arrière (22), et une seconde couche de Si1-yGey cristallin (16) d'une seconde polarité formée sur une surface primaire de la première couche de Si1-xGex cristallin (15).
PCT/JP2015/070194 2015-07-14 2015-07-14 Cellule de batterie solaire et son procédé de fabrication WO2017009960A1 (fr)

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JP2017528063A JPWO2017009960A1 (ja) 2015-07-14 2015-07-14 太陽電池セル及びその製造方法

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09509282A (ja) * 1993-11-25 1997-09-16 マックス−プランク−ゲゼルシャフト・ツール・フェルデルンク・デア・ビッセンシャフテン・エー・ファー 光起電装置
US20110120538A1 (en) * 2009-10-23 2011-05-26 Amberwave, Inc. Silicon germanium solar cell
JP2012518289A (ja) * 2009-02-19 2012-08-09 アイキューイー シリコン コンパウンズ リミテッド 光電池
JP2014053545A (ja) * 2012-09-10 2014-03-20 National Institute Of Advanced Industrial & Technology 単結晶ＳｉＧｅ層の製造方法及びそれを用いた太陽電池

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09509282A (ja) * 1993-11-25 1997-09-16 マックス−プランク−ゲゼルシャフト・ツール・フェルデルンク・デア・ビッセンシャフテン・エー・ファー 光起電装置
JP2012518289A (ja) * 2009-02-19 2012-08-09 アイキューイー シリコン コンパウンズ リミテッド 光電池
US20110120538A1 (en) * 2009-10-23 2011-05-26 Amberwave, Inc. Silicon germanium solar cell
JP2014053545A (ja) * 2012-09-10 2014-03-20 National Institute Of Advanced Industrial & Technology 単結晶ＳｉＧｅ層の製造方法及びそれを用いた太陽電池

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