WO2015154574A1 - 功放处理方法及装置 - Google Patents

功放处理方法及装置 Download PDF

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Publication number
WO2015154574A1
WO2015154574A1 PCT/CN2015/071666 CN2015071666W WO2015154574A1 WO 2015154574 A1 WO2015154574 A1 WO 2015154574A1 CN 2015071666 W CN2015071666 W CN 2015071666W WO 2015154574 A1 WO2015154574 A1 WO 2015154574A1
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Prior art keywords
power amplifier
power
gate voltage
processing
baseband signal
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PCT/CN2015/071666
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English (en)
French (fr)
Inventor
王许旭
鲁永安
宋微微
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中兴通讯股份有限公司
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Priority to JP2017512028A priority Critical patent/JP2017526303A/ja
Publication of WO2015154574A1 publication Critical patent/WO2015154574A1/zh

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0261Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0261Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
    • H03F1/0272Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A by using a signal derived from the output signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/105A non-specified detector of the power of a signal being used in an amplifying circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/18Indexing scheme relating to amplifiers the bias of the gate of a FET being controlled by a control signal

Definitions

  • the present invention relates to the field of communications, and in particular to a power amplifier processing method and apparatus.
  • the third generation mobile communication system (Third Generation, 3G) network has been globalized.
  • the fourth-generation mobile communication system (Fourth Generation, referred to as 4G) long-term evolution of the mobile communication system (Long Term Evolution, LTE for short) network technology is also constantly updated.
  • Network communication quality and network coverage have become the main indicators of competition among major operators.
  • the energy consumption, volume and reliability of networked base stations have become a key factor in cost competition among major operators.
  • the transmitter technology is becoming more and more mature, and the efficiency requirements of the power amplifier are getting higher and higher.
  • the grid voltage of the power amplifier (or power amplifier grid voltage) is commonly adjusted to adjust the efficiency and performance of the power amplifier.
  • the power amplifier module has a built-in single-chip microcomputer, and controls the gate voltage of the power amplifier to a fixed value. For different types of signals, the actual optimum gate voltage is different in practice. If the gate voltage is fixed, the performance of a particular signal cannot be optimized.
  • the invention provides a power amplifier processing method and device, so as to at least solve the related art, the power amplifier is fixed by using a fixed gate voltage for different types of signals, and there is a problem of low power amplifier efficiency and low performance.
  • a power amplifier processing method includes: detecting a power of a baseband signal; determining a power amplifier gate voltage according to the detected power; converting the baseband signal according to the determined power amplifier gate voltage pair The processed radio frequency is processed by the power amplifier.
  • detecting said power of said baseband signal comprises: determining a period of said power for detecting said baseband signal; detecting said power of said baseband signal in accordance with said determined period.
  • determining the power amplifier gate voltage according to the detected power comprises: determining a correspondence relationship between a power level and a power grid voltage; determining the power amplifier according to the determined correspondence, and the detected power Gate voltage.
  • performing power amplifier processing on the radio frequency signal converted by the baseband signal according to the determined power amplifier gate voltage comprises: performing digital-to-analog conversion, up-conversion, amplification, and filtering processing on the baseband signal to generate a radio frequency signal;
  • the determined power amplifier gate voltage performs power amplifier processing on the generated radio frequency signal.
  • performing power amplifier processing on the generated radio frequency signal according to the determined power amplifier gate voltage comprises: determining a delay for synchronizing the radio frequency signal and the power amplifier gate voltage; generating according to the determined delay pair The radio frequency signal is processed by a power amplifier.
  • a power amplifier processing apparatus includes: a detecting module configured to detect power of a baseband signal; a first determining module configured to determine a power amplifier gate voltage according to the detected power; and a processing module And configured to perform power amplifier processing on the radio frequency signal converted by the baseband signal according to the determined power amplifier gate voltage.
  • the detecting module comprises: a first determining unit configured to determine a period of the power for detecting the baseband signal; and a detecting unit configured to detect the baseband signal according to the determined period power.
  • the first determining module includes: a second determining unit configured to determine a correspondence between a power level and a power amplifier gate voltage; a third determining unit configured to determine the corresponding relationship according to the determined relationship, and the detected The power determines the power grid voltage.
  • the processing module includes: a generating unit configured to perform a digital-to-analog conversion, up-conversion, amplification, and filtering processing on the baseband signal to generate a radio frequency signal; and the processing unit is configured to generate the power amplifier gate pressure pair according to the determined
  • the radio frequency signal is processed by a power amplifier.
  • the processing unit includes: a determining subunit configured to determine a delay for synchronizing the radio frequency signal and the power amplifier gate voltage; and a processing subunit configured to generate the generated location according to the determined delay pair
  • the radio frequency signal is processed by a power amplifier.
  • the power of the baseband signal is detected; the power amplifier gate voltage is determined according to the detected power; and the power amplifier is processed according to the determined power amplifier gate voltage to perform power amplifier processing on the RF signal converted by the baseband signal, thereby solving the correlation
  • a fixed gate voltage is used for different types of signals for power amplifiers, and there are power amplifier efficiencies and properties. The problem can be lowered, and the power grid dynamics is adjusted in real time according to the power dynamics of the baseband signal, thereby effectively improving the efficiency and performance of the power.
  • FIG. 1 is a flow chart of a power amplifier processing method according to an embodiment of the present invention.
  • FIG. 2 is a block diagram showing the structure of a power amplifier processing apparatus according to an embodiment of the present invention
  • FIG. 3 is a block diagram showing a preferred structure of a detecting module 22 in a power amplifier processing apparatus according to an embodiment of the present invention
  • FIG. 4 is a block diagram showing a preferred structure of a first determining module 24 in a power amplifier processing apparatus according to an embodiment of the present invention
  • FIG. 5 is a block diagram showing a preferred structure of a processing module 26 in a power amplifier processing apparatus according to an embodiment of the present invention
  • FIG. 6 is a block diagram showing a preferred structure of a processing unit 54 in the processing module 26 in the power amplifier processing apparatus according to an embodiment of the present invention
  • FIG. 7 is a schematic structural diagram of a power amplifier processing apparatus according to a preferred embodiment of the present invention.
  • FIG. 8 is a schematic structural diagram of a signal prediction module 72 in a power amplifier processing apparatus according to an embodiment of the present invention.
  • FIG. 9 is a schematic diagram of a correspondence table and a voltage output switch of a voltage unit 86 power and a gate voltage according to an embodiment of the present invention.
  • Figure 10 is a flow diagram of a power amplifier process in accordance with a preferred embodiment of the present invention.
  • FIG. 1 is a flowchart of a power amplifier processing method according to an embodiment of the present invention. As shown in FIG. 1 , the flow includes the following steps:
  • Step S102 detecting the power of the baseband signal
  • Step S104 determining a power amplifier gate voltage according to the detected power
  • Step S106 performing power amplifier processing on the radio frequency signal converted by the baseband signal according to the determined power amplifier gate voltage.
  • the power amplifier gate voltage of the baseband signal is determined according to the baseband signal, and the power amplifier processing is performed according to the determined power amplifier gate voltage.
  • the fixed gate voltage is used to process the signal, which not only advantageously solves the related technology.
  • the fixed grid voltage is used for the power amplifier, and there is a problem of low power amplifier efficiency and low performance, thereby realizing the real-time adjustment of the power grid voltage according to the power dynamics of the baseband signal, thereby effectively improving the efficiency and performance of the power. .
  • different periods may be used for detecting different signals, that is, the period for detecting the power of the baseband signal is first determined; and the power of the baseband signal is detected according to the determined period.
  • the power When determining the power grid voltage according to the detected power, the power may be first graded, and then the correspondence between the power level and the power grid voltage is determined; and the power grid is determined according to the determined correspondence and the detected power. Pressure. Through such processing, the appropriate power grid voltage corresponding to the detected power can be quickly determined according to the power level.
  • the baseband signal may be subjected to digital-to-analog conversion, up-conversion, amplification, and filtering to generate a radio frequency signal; and the determined power amplifier grid is determined according to the determined power amplifier grid.
  • the power amplifier is processed by the generated RF signal.
  • the delay for synchronizing the RF signal and the power amplifier gate voltage may be determined first; and the generated RF signal is subjected to power amplifier processing according to the determined delay.
  • a power amplifier processing device is also provided, which is used to implement the foregoing embodiments and preferred embodiments, and has not been described again.
  • the term "module” may implement a combination of software and/or hardware of a predetermined function.
  • the apparatus described in the following embodiments is preferably implemented in software, hardware, or a combination of software and hardware, is also possible and contemplated.
  • FIG. 2 is a block diagram showing the structure of a power amplifier processing apparatus according to an embodiment of the present invention. As shown in FIG. 2, the apparatus includes a detecting module 22, a first determining module 24, and a processing module 26. The apparatus will be described below.
  • the detecting module 22 is configured to detect the power of the baseband signal; the first determining module 24 is connected to the detecting module 22, and is configured to determine the power grid voltage according to the detected power; the processing module 26 is connected to the first determining mode Block 24 is configured to perform power amplifier processing on the radio frequency signal converted by the baseband signal according to the determined power amplifier gate voltage.
  • FIG. 3 is a block diagram showing a preferred structure of the detecting module 22 in the power amplifier processing apparatus according to the embodiment of the present invention.
  • the detecting module 22 includes a first determining unit 32 and a detecting unit 34, and the detecting module 22 is performed below. Description.
  • the first determining unit 32 is configured to determine a period for detecting the power of the baseband signal; the detecting unit 34 is connected to the first determining unit 32, and is configured to detect the power of the baseband signal according to the determined period.
  • FIG. 4 is a block diagram showing a preferred structure of the first determining module 24 in the power amplifier processing apparatus according to the embodiment of the present invention.
  • the first determining module 24 includes: a second determining unit 42 and a third determining unit 44. The first determination module 24 is described.
  • the second determining unit 42 is configured to determine a correspondence between the power level and the power grid voltage; the third determining unit 44 is connected to the second determining unit 42 and configured to determine according to the determined correspondence and the detected power.
  • the above power amplifier grid pressure is configured to determine a correspondence between the power level and the power grid voltage; the third determining unit 44 is connected to the second determining unit 42 and configured to determine according to the determined correspondence and the detected power.
  • FIG. 5 is a block diagram showing a preferred structure of the processing module 26 in the power amplifier processing apparatus according to the embodiment of the present invention. As shown in FIG. 5, the processing module 26 includes: a generating unit 52 and a processing unit 54, and the processing module 26 is described below. .
  • the generating unit 52 is configured to perform a digital-to-analog conversion, up-conversion, amplification, and filtering process on the baseband signal to generate a radio frequency signal.
  • the processing unit 54 is coupled to the generating unit 52, and configured to perform the radio frequency signal generated according to the determined power amplifier gate voltage. Amplifier processing.
  • FIG. 6 is a block diagram showing a preferred structure of a processing unit 54 in the processing module 26 in the power amplifier processing apparatus according to an embodiment of the present invention.
  • the processing unit 54 includes a determining subunit 62 and a processing subunit 64. Processing unit 54 will be described.
  • the determining subunit 62 is configured to determine a delay for synchronizing the radio frequency signal and the power amplifier gate voltage; the processing subunit 64 is coupled to the determining subunit 62, and configured to perform power amplifier processing on the generated radio frequency signal according to the determined delay.
  • a power amplifier processing method by which a gate voltage (or referred to as a power amplifier gate voltage) can be dynamically adjusted in real time according to a transmission signal in real time.
  • FIG. 7 is a schematic structural diagram of a power amplifier processing apparatus according to a preferred embodiment of the present invention.
  • the apparatus includes: a signal prediction module 72 (functioning with the above-described detection module 22 and first determination module 24), and a signal processing module 74. (The function is the same as the above-described generating unit 52) and the power amplifier module 76 (the function is the same as the above-described processing module 26), and the device will be described below.
  • the signal prediction module 72 is configured to detect the power of the baseband signal, select an appropriate gate voltage to output to the power amplifier module according to the detected power level, and simultaneously synchronize the gate voltage with the time when the signal reaches the power amplifier by using the delay module; the signal processing module 74 sets The baseband digital signal is subjected to digital-to-analog conversion, up-conversion, amplification, filtering, etc. to generate a radio frequency signal for transmission to the power amplifier module; the power amplifier module 76 is set to amplify the analog RF signal and output.
  • FIG. 8 is a schematic structural diagram of a signal prediction module 72 in a power amplifier processing apparatus according to an embodiment of the present invention.
  • the signal prediction module 72 includes a delay unit 82 (functioning with the determining subunit 62 described above) and a power detecting unit. 84 and voltage unit 86, the signal prediction module 72 is described below.
  • the power detecting unit 84 is configured to calculate the baseband signal power in a unit time and transmit it to the voltage unit 86.
  • the voltage unit 86 is configured to select an appropriate voltage output to the power amplifier module 76 according to a preset correspondence table of power and gate voltage.
  • the delay unit 82 is set to be based on the same principle that the total time from the power calculation unit 84 to the output voltage of the voltage unit 86 to the power amplifier module 76 and the total time that the baseband signal passes through the delay unit 82 and the signal processing module 74 reaches the power amplifier module 76.
  • the baseband signal is set to pass the delay of the signal prediction module 72 to achieve synchronization of the power amplifier gate voltage and the data signal.
  • FIG. 9 is a schematic diagram of a correspondence table and a voltage output switch of a voltage unit 86 power and a gate voltage according to an embodiment of the present invention. As shown in FIG. 9, according to the power detection unit 84, the transmitted power information table is obtained as a corresponding voltage. The output of the module.
  • the signal of the transmitter is used to input the delay from the baseband input to the power amplifier output, and the power of the baseband signal is quickly calculated to achieve the method of setting the power amplifier gate voltage in advance, thereby overcoming the related art that the power amplifier grid voltage can not be fixed online. Adjustment, resulting in low efficiency and performance of the amplifier.
  • FIG. 10 is a flowchart of power amplifier processing according to a preferred embodiment of the present invention. As shown in FIG. 10, the flow includes the following steps:
  • Step S1002 the initialization delay unit delay is ⁇ t, and the voltage unit output is Pm;
  • Step S1004 the power detecting unit calculates the signal power Pi within 0.5 ms in each sub-frame
  • the fixed delay time is set in the delay unit 82 in the signal prediction module 72 according to the debug value; the voltage unit 86 initializes the output voltage to be Pm.
  • the power detecting unit 84 detects the baseband power every 0.5 ms, and the voltage unit 86 selects a corresponding voltage output to supply the power amplifier gate voltage according to a preset power voltage relationship.
  • the baseband signal to be transmitted is required to enter the signal prediction module 72, and the signal prediction module 72 delays the transparent transmission of the baseband signal, and sends the signal to the signal processing module 74 for processing, and the signal processing module 74 performs the baseband digital signal.
  • Digital-to-analog conversion, up-conversion, amplification, filtering, etc. generate RF signals, which are sent to the power amplifier module 76 for further amplification and output.
  • the power detecting unit 84 inside the signal prediction module 72 selects the corresponding voltage output to the power amplifier module 76 as the gate voltage according to the power of the real-time baseband signal, thereby achieving the purpose of adjusting the gate voltage in real time.
  • the delay time setting principle of the delay unit 84 in the signal prediction module 72 is:
  • Ts + ⁇ t Te, the time of the baseband signal passing through the delay unit is ⁇ t; the time when the baseband signal reaches the power amplifier module 76 through the signal processing module 74 is Ts; the processing time and voltage unit 86 of the power detecting unit 84 inside the signal prediction module 72 The time at which the output voltage reaches the power amplifier module 76 is Te.
  • the period of detecting the signal by the power detecting module 72 can be differently set according to the specific signal.
  • the length of each radio frame is also 10 ms, and each radio frame is composed of two lengths.
  • a 5ms half-frame consists of five equal-sized sub-frames, each of which has two slots of 0.5 ms in length.
  • the period detected by the power detecting module 72 may be 0.5 ms.
  • modules or steps of the present invention described above can be implemented by a general-purpose computing device that can be centralized on a single computing device or distributed across a network of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device such that they may be stored in the storage device by the computing device and, in some cases, may be different from the order herein.
  • the steps shown or described are performed, or they are separately fabricated into individual integrated circuit modules, or a plurality of modules or steps thereof are fabricated as a single integrated circuit module.
  • the invention is not limited to any specific combination of hardware and software.
  • the related art has solved the problem that the power amplifier has a fixed grid voltage for different types of signals, and there is a problem of low power amplifier efficiency and low performance, thereby realizing real-time adjustment of the power grid voltage according to the power dynamics of the baseband signal. In addition, the efficiency and performance of the power are effectively improved.

Abstract

一种功放处理方法及装置,其中,该方法包括:检测基带信号的功率(S102);依据检测到的功率确定功放栅压(S104);依据确定的栅压对由基带信号转换处理后的射频信号进行功放处理(S106),解决了对于不同类型的信号采用固定栅压进行功放,存在功放效率以及性能低下的问题,进而达到了依据基带信号的功率动态实时调整栅压,进而有效地提高了功率的效率及性能的效果。

Description

功放处理方法及装置 技术领域
本发明涉及通信领域,具体而言,涉及一种功放处理方法及装置。
背景技术
随着通讯技术的发展,在无线通讯中,各种制式的通讯网络不断更新,为了满足人们对网络日益俱增的需求,第三代移动通讯系统(Third Generation,简称为3G)网络已在全球商用,第四代移动通讯系统(Fourth Generation,简称为4G)的长期演进移动通讯系统(Long Term Evolution,简称为LTE)网络的技术也在不断更新迭进。网络通讯质量和网络覆盖率已成为各大运营商运营竞争的主要指标。同时,布网基站的能耗、体积及可靠性能也成为各大运营商之间成本竞争的关键因素。
发信机技术日趋成熟,对其中功率放大器的效率要求也愈来愈高。其中,常用调节功放的栅压(或称为功放栅压)来调整功放的效率和性能。在相关技术中,功放模块内部自带单片机,将功放的栅压控制为固定值。对于不同类型的信号,实际中对应的最佳栅压是不同的,如果固定栅压,对于特定信号的性能不能达到最佳。
因此,在相关技术中,对于不同类型的信号采用固定栅压进行功放,存在功放效率以及性能低下的问题。
发明内容
本发明提供了一种功放处理方法及装置,以至少解决相关技术中,对于不同类型的信号采用固定栅压进行功放,存在功放效率以及性能低下的问题。
根据本发明的一个方面,提供了一种功放处理方法,包括:检测基带信号的功率;依据检测到的所述功率确定功放栅压;依据确定的所述功放栅压对由所述基带信号转换处理后的射频进行功放处理。
优选地,检测所述基带信号的所述功率包括:确定用于检测所述基带信号的所述功率的周期;依据确定的所述周期检测所述基带信号的所述功率。
优选地,依据检测到的所述功率确定所述功放栅压包括:确定功率等级与功放栅压之间的对应关系;依据确定的所述对应关系,以及检测到的所述功率确定所述功放栅压。
优选地,依据确定的所述功放栅压对由所述基带信号转换处理后的射频信号进行功放处理包括:将所述基带信号经过数模转换、上变频、放大、滤波处理生成射频信号;依据确定的所述功放栅压对生成的所述射频信号进行功放处理。
优选地,依据确定的所述功放栅压对生成的所述射频信号进行功放处理包括:确定用于同步所述射频信号和所述功放栅压的时延;依据确定的所述时延对生成的所述射频信号进行功放处理。
根据本发明的另一方面,提供了一种功放处理装置,包括:检测模块,设置为检测基带信号的功率;第一确定模块,设置为依据检测到的所述功率确定功放栅压;处理模块,设置为依据确定的所述功放栅压对由所述基带信号转换处理后的射频信号进行功放处理。
优选地,所述检测模块包括:第一确定单元,设置为确定用于检测所述基带信号的所述功率的周期;检测单元,设置为依据确定的所述周期检测所述基带信号的所述功率。
优选地,所述第一确定模块包括:第二确定单元,设置为确定功率等级与功放栅压之间的对应关系;第三确定单元,设置为依据确定的所述对应关系,以及检测到的所述功率确定所述功放栅压。
优选地,所述处理模块包括:生成单元,设置为将所述基带信号经过数模转换、上变频、放大、滤波处理生成射频信号;处理单元,设置为依据确定的所述功放栅压对生成的所述射频信号进行功放处理。
优选地,所述处理单元包括:确定子单元,设置为确定用于同步所述射频信号和所述功放栅压的时延;处理子单元,设置为依据确定的所述时延对生成的所述射频信号进行功放处理。
通过本发明,采用检测基带信号的功率;依据检测到的所述功率确定功放栅压;依据确定的所述功放栅压对由所述基带信号转换处理后的射频信号进行功放处理,解决了相关技术中,对于不同类型的信号采用固定栅压进行功放,存在功放效率以及性 能低下的问题,进而达到了依据基带信号的功率动态实时调整功放栅压,进而有效地提高了功率的效率及性能的效果。
附图说明
此处所说明的附图用来提供对本发明的进一步理解,构成本申请的一部分,本发明的示意性实施例及其说明用于解释本发明,并不构成对本发明的不当限定。在附图中:
图1是根据本发明实施例的功放处理方法的流程图;
图2是根据本发明实施例的功放处理装置的结构框图;
图3是根据本发明实施例的功放处理装置中检测模块22的优选结构框图;
图4是根据本发明实施例的功放处理装置中第一确定模块24的优选结构框图;
图5是根据本发明实施例的功放处理装置中处理模块26的优选结构框图;
图6是根据本发明实施例的功放处理装置中处理模块26中处理单元54的优选结构框图;
图7是根据本发明优选实施例的功放处理装置的结构示意图;
图8是根据本发明实施例的功放处理装置中信号预测模块72的结构示意图;
图9是根据本发明实施例的电压单元86功率和栅压的对应表和电压输出开关的示意图;
图10是根据本发明优选实施例的功放处理流程图。
具体实施方式
下文中将参考附图并结合实施例来详细说明本发明。需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互组合。
在本实施例中提供了一种功放处理方法,图1是根据本发明实施例的功放处理方法的流程图,如图1所示,该流程包括如下步骤:
步骤S102,检测基带信号的功率;
步骤S104,依据检测到的功率确定功放栅压;
步骤S106,依据确定的功放栅压对由基带信号转换处理后的射频信号进行功放处理。
通过上述步骤,依据基带信号确定该基带信号的功放栅压,依据确定的功放栅压进行功放处理,相对于相关技术中采用固定的栅压对信号进行处理而言,不仅有利地解决了相关技术中,对于不同类型的信号采用固定栅压进行功放,存在功放效率以及性能低下的问题,进而达到了依据基带信号的功率动态实时调整功放栅压,进而有效地提高了功率的效率及性能的效果。
检测基带信号的功率时,针对不同的信号可以采用不同的周期进行检测,即先确定用于检测基带信号的功率的周期;依据确定的周期检测基带信号的功率。
在依据检测到的功率确定上述功放栅压时,可以先对功率划分等级,之后,确定功率等级与功放栅压之间的对应关系;依据确定的对应关系,以及检测到的功率确定该功放栅压。通过这样的处理,可以依据功率等级快速地确定检测到的功率所对应的合适的功放栅压。
优选地,依据确定的功放栅压对由基带信号转换处理后的射频信号进行功放处理时,可以包括将基带信号经过数模转换、上变频、放大、滤波处理生成射频信号;依据确定的功放栅压对生成的射频信号进行功放处理。
另外,在依据确定的功放栅压对生成的射频信号进行功放处理时,由于不同的信号需要采用不同的功放栅压,因此,在采用不同的功放栅压对信号进行功放时,可能存在射频信号与功放栅压不同步的问题。对此,可以先确定用于同步射频信号和功放栅压的时延;依据确定的时延对生成的射频信号进行功放处理。
在本实施例中还提供了一种功放处理装置,该装置用于实现上述实施例及优选实施方式,已经进行过说明的不再赘述。如以下所使用的,术语“模块”可以实现预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置较佳地以软件来实现,但是硬件,或者软件和硬件的组合的实现也是可能并被构想的。
图2是根据本发明实施例的功放处理装置的结构框图,如图2所示,该装置包括检测模块22、第一确定模块24和处理模块26,下面对该装置进行说明。
检测模块22,设置为检测基带信号的功率;第一确定模块24,连接至上述检测模块22,设置为依据检测到的功率确定功放栅压;处理模块26,连接至上述第一确定模 块24,设置为依据确定的功放栅压对由基带信号转换处理后的射频信号进行功放处理。
图3是根据本发明实施例的功放处理装置中检测模块22的优选结构框图,如图3所示,该检测模块22包括第一确定单元32和检测单元34,下面对该检测模块22进行说明。
第一确定单元32,设置为确定用于检测基带信号的功率的周期;检测单元34,连接至上述第一确定单元32,设置为依据确定的周期检测基带信号的功率。
图4是根据本发明实施例的功放处理装置中第一确定模块24的优选结构框图,如图4所示,该第一确定模块24包括:第二确定单元42和第三确定单元44,下面对该第一确定模块24进行说明。
第二确定单元42,设置为确定功率等级与功放栅压之间的对应关系;第三确定单元44,连接至上述第二确定单元42,设置为依据确定的对应关系,以及检测到的功率确定上述功放栅压。
图5是根据本发明实施例的功放处理装置中处理模块26的优选结构框图,如图5所示,该处理模块26包括:生成单元52和处理单元54,下面对该处理模块26进行说明。
生成单元52,设置为将基带信号经过数模转换、上变频、放大、滤波处理生成射频信号;处理单元54,连接至上述生成单元52,设置为依据确定的功放栅压对生成的射频信号进行功放处理。
图6是根据本发明实施例的功放处理装置中处理模块26中处理单元54的优选结构框图,如图6所示,该处理单元54包括确定子单元62和处理子单元64,下面对该处理单元54进行说明。
确定子单元62,设置为确定用于同步射频信号和功放栅压的时延;处理子单元64,连接至上述确定子单元62,设置为依据确定的时延对生成的射频信号进行功放处理。
基于相关技术中的上述问题,在本实施例中,提供了一种功放处理方法,通过该方法可以在线实时根据发射信号实时动态调整栅压(或称为上述的功放栅压)。
下面通过附图对本发明优选实施方式进行说明。
图7是根据本发明优选实施例的功放处理装置的结构示意图,如图7所示,该装置包括:信号预测模块72(功能同上述检测模块22和第一确定模块24)、信号处理模块74(功能同上述生成单元52)和功放模块76(功能同上述处理模块26),下面对该装置进行说明。
信号预测模块72,设置为对基带信号功率检测,根据检测功率等级选择合适的栅压电压输出给功放模块,同时利用时延模块使栅压与信号到达功放的时间同步;信号处理模块74,设置为将基带数字信号经过数模转换,上变频,放大,滤波等处理后生成射频信号输送给功放模块;功放模块76,设置为对模拟射频信号进行放大后输出。
图8是根据本发明实施例的功放处理装置中信号预测模块72的结构示意图,如图8所示,该信号预测模块72包括时延单元82(功能同上述确定子单元62)、功率检测单元84和电压单元86,下面对该信号预测模块72进行说明。
功率检测单元84,设置为计算单位时间内基带信号功率并传递给电压单元86;电压单元86,设置为根据预设的功率和栅压的对应表,选择合适的电压输出给功放模块76;时延单元82,设置为根据从功率检测单元84计算功率到电压单元86输出电压到功放模块76的总时间和基带信号经过时延单元82、信号处理模块74到达功放模块76的总时间相同的原则,设置基带信号通过该信号预测模块72的时延,达到功放栅压和数据信号的同步。
图9是根据本发明实施例的电压单元86功率和栅压的对应表和电压输出开关的示意图,如图9所示,根据功率检测单元84,传递的功率信息查表得到相应的电压作为该模块的输出。
通过上述实施例及优选实施方式,利用发射机的信号从基带输入到功放输出存在时延,通过快速计算基带信号功率达到提前设置功放栅压的方法,克服相关技术中功放栅压固定不能在线动态调整,导致功放效率及性能不高的问题。
图10是根据本发明优选实施例的功放处理流程图,如图10所示,该流程包括如下步骤:
步骤S1002,初始化时延单元时延为Δt,电压单元输出为Pm;
步骤S1004,功率检测单元计算每个子帧内0.5ms内信号功率Pi;
步骤S1006,查表对应Pi所对应Vi,使电压单元输出为Vo=Vi。
需要说明的是,在初始化时,根据调试值设置固定延迟时间到信号预测模块72内的延迟单元82内;电压单元86初始化输出电压为Pm。功率检测单元84检测每0.5ms内基带功率,电压单元86根据预先设定的功率电压关系选择相对应的电压输出供给功放栅压。
另外,在上述处理流程中,需要发射的基带信号,进入信号预测模块72,信号预测模块72对基带信号进行延迟透传,输送给信号处理模块74进行处理,信号处理模块74将基带数字信号进行数模转换,上变频,放大,滤波等处理后生成射频信号,输送给功放模块76进行进一步放大后输出。与此同时,信号预测模块72内部的功率检测单元84会根据实时的基带信号的功率,选择相应的电压输出给功放模块76作为栅压,达到实时调节栅压的目的。
其中,信号预测模块72内的延迟单元84的延迟时间设置原则为:
Ts+Δt=Te,基带信号通过时延单元的时间为Δt;基带信号通过信号处理模块74到达功放模块76的时间为Ts;信号预测模块72内部的功率检测单元84的处理时间和电压单元86输出的电压到达功放模块76的时间为Te。
功率检测模块72检测信号的周期可以依据具体信号的不同而进行不同设置,例如,对于LTE信号而言,每个无线帧(radio frame)的长度也为10ms,每个无线帧由两个长度为5ms的半帧(half-frame)组成,每个半帧由五个长度相等的子帧(sub-frame)组成,每个子帧又有两个长度为0.5ms的时隙(slot)构成。这里功率检测模块72检测的周期可以为0.5ms。
显然,本领域的技术人员应该明白,上述的本发明的各模块或各步骤可以用通用的计算装置来实现,它们可以集中在单个的计算装置上,或者分布在多个计算装置所组成的网络上,可选地,它们可以用计算装置可执行的程序代码来实现,从而,可以将它们存储在存储装置中由计算装置来执行,并且在某些情况下,可以以不同于此处的顺序执行所示出或描述的步骤,或者将它们分别制作成各个集成电路模块,或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。这样,本发明不限制于任何特定的硬件和软件结合。
以上所述仅为本发明的优选实施例而已,并不用于限制本发明,对于本领域的技术人员来说,本发明可以有各种更改和变化。凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。
工业实用性
通过上述实施例及优选实施方式,解决了相关技术中,对于不同类型的信号采用固定栅压进行功放,存在功放效率以及性能低下的问题,进而达到了依据基带信号的功率动态实时调整功放栅压,进而有效地提高了功率的效率及性能的效果。

Claims (10)

  1. 一种功放处理方法,包括:
    检测基带信号的功率;
    依据检测到的所述功率确定功放栅压;
    依据确定的所述功放栅压对由所述基带信号转换处理后的射频信号进行功放处理。
  2. 根据权利要求1所述的方法,其中,检测所述基带信号的所述功率包括:
    确定用于检测所述基带信号的所述功率的周期;
    依据确定的所述周期检测所述基带信号的所述功率。
  3. 根据权利要求1所述的方法,其中,依据检测到的所述功率确定所述功放栅压包括:
    确定功率等级与功放栅压之间的对应关系;
    依据确定的所述对应关系,以及检测到的所述功率确定所述功放栅压。
  4. 根据权利要求1所述的方法,其中,依据确定的所述功放栅压对由所述基带信号转换处理后的射频信号进行功放处理包括:
    将所述基带信号经过数模转换、上变频、放大、滤波处理生成射频信号;
    依据确定的所述功放栅压对生成的所述射频信号进行功放处理。
  5. 根据权利要求4所述的方法,其中,依据确定的所述功放栅压对生成的所述射频信号进行功放处理包括:
    确定用于同步所述射频信号和所述功放栅压的时延;
    依据确定的所述时延对生成的所述射频信号进行功放处理。
  6. 一种功放处理装置,包括:
    检测模块,设置为检测基带信号的功率;
    第一确定模块,设置为依据检测到的所述功率确定功放栅压;
    处理模块,设置为依据确定的所述功放栅压对由所述基带信号转换处理后的射频信号进行功放处理。
  7. 根据权利要求6所述的装置,其中,所述检测模块包括:
    第一确定单元,设置为确定用于检测所述基带信号的所述功率的周期;
    检测单元,设置为依据确定的所述周期检测所述基带信号的所述功率。
  8. 根据权利要求6所述的装置,其中,所述第一确定模块包括:
    第二确定单元,设置为确定功率等级与功放栅压之间的对应关系;
    第三确定单元,设置为依据确定的所述对应关系,以及检测到的所述功率确定所述功放栅压。
  9. 根据权利要求6所述的装置,其中,所述处理模块包括:
    生成单元,设置为将所述基带信号经过数模转换、上变频、放大、滤波处理生成射频信号;
    处理单元,设置为依据确定的所述功放栅压对生成的所述射频信号进行功放处理。
  10. 根据权利要求9所述的装置,其中,所述处理单元包括:
    确定子单元,设置为确定用于同步所述射频信号和所述功放栅压的时延;
    处理子单元,设置为依据确定的所述时延对生成的所述射频信号进行功放处理。
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110880918A (zh) * 2018-09-06 2020-03-13 力同科技股份有限公司 一种功放电路及其对讲机
CN112235009A (zh) * 2019-06-29 2021-01-15 华为技术有限公司 一种通信方法及系统

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110545576B (zh) * 2019-09-24 2024-02-23 京信网络系统股份有限公司 一种功放模块、功率调整方法及射频拉远单元

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101316128A (zh) * 2008-06-30 2008-12-03 华为技术有限公司 一种改善发射机效率的方法和发射机
CN101640516A (zh) * 2009-08-21 2010-02-03 京信通信系统(中国)有限公司 一种数字预失真功率放大器及其处理信号的方法
CN102685858A (zh) * 2011-03-18 2012-09-19 鼎桥通信技术有限公司 射频单元功耗控制方法及基站系统

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008155819A1 (ja) * 2007-06-19 2008-12-24 Fujitsu Limited 電力増幅制御装置
JP5677324B2 (ja) * 2010-01-12 2015-02-25 レノボ・イノベーションズ・リミテッド(香港) Ofdm変調波送信装置、ofdm変調波送信方法、及びプログラム
TWI435541B (zh) * 2010-09-07 2014-04-21 Realtek Semiconductor Corp 功率放大器及控制功率放大器的方法
JP2012199716A (ja) * 2011-03-18 2012-10-18 Fujitsu Ltd 増幅器、送信装置およびゲート電圧決定方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101316128A (zh) * 2008-06-30 2008-12-03 华为技术有限公司 一种改善发射机效率的方法和发射机
CN101640516A (zh) * 2009-08-21 2010-02-03 京信通信系统(中国)有限公司 一种数字预失真功率放大器及其处理信号的方法
CN102685858A (zh) * 2011-03-18 2012-09-19 鼎桥通信技术有限公司 射频单元功耗控制方法及基站系统

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110880918A (zh) * 2018-09-06 2020-03-13 力同科技股份有限公司 一种功放电路及其对讲机
CN110880918B (zh) * 2018-09-06 2023-08-18 力同科技股份有限公司 一种功放电路及其对讲机
CN112235009A (zh) * 2019-06-29 2021-01-15 华为技术有限公司 一种通信方法及系统

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