WO2015127745A1 - 覆晶式led芯片 - Google Patents

覆晶式led芯片 Download PDF

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Publication number
WO2015127745A1
WO2015127745A1 PCT/CN2014/082515 CN2014082515W WO2015127745A1 WO 2015127745 A1 WO2015127745 A1 WO 2015127745A1 CN 2014082515 W CN2014082515 W CN 2014082515W WO 2015127745 A1 WO2015127745 A1 WO 2015127745A1
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Prior art keywords
layer
conductive
electrode
led chip
conductive layer
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PCT/CN2014/082515
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English (en)
French (fr)
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庞晓东
王瑞庆
刘镇
陈浩明
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深圳市兆明芯科技控股有限公司
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Publication of WO2015127745A1 publication Critical patent/WO2015127745A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0364—Manufacture or treatment of packages of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/83—Electrodes
    • H10H20/831—Electrodes characterised by their shape
    • H10H20/8312—Electrodes characterised by their shape extending at least partially through the bodies

Definitions

  • the present invention relates to the field of light emitting devices, and in particular, to a flip chip type LED chip.
  • flip-chip LEDs Light Emitting Diode, light-emitting diodes
  • Flip chip The chip-based package of LEDs (hereinafter referred to as flip-chip LEDs) has a simple solid crystal form and a higher degree of reliability, which makes the mass production feasibility greatly improved, and has a shorter process time and high yield for high-temperature baking.
  • the advantages of good thermal conductivity and high light output have become the technology that the industry is striving to carry out.
  • the illumination of the LED is completed by the current of the positive electrode reaching the negative electrode, and the current reaches the negative electrode from the positive electrode with the minimum resistance route.
  • the positive isolation between the positive electrode region and the negative electrode region must be ensured to prevent positive
  • the negative electrode is electrically conductive.
  • the lead is routed between different positive or negative electrodes by way of routing on the side of the chip.
  • the lead method has the possibility of leakage, resulting in a decrease in the yield of the product.
  • the technical problem to be solved by the present invention is to provide a flip chip type LED chip.
  • a technical solution adopted by the present invention is to provide a flip chip type LED chip including a substrate, and a first conductive type semiconductor layer, a light emitting layer, and a first layer are sequentially stacked from the front side of the substrate.
  • a second conductive semiconductor layer, a conductive layer and a reflective layer further comprising at least one first electrode hole and at least one second electrode hole, the first electrode hole penetrating from the reflective layer to the light emitting layer and exposing the first conductive type a semiconductor layer, the second electrode hole penetrating the reflective layer and exposing the conductive layer, the hole wall of the first electrode hole is coated with an insulating layer; the first electrode hole is provided with a first electrode, and one end of the first electrode The front surface of the reflective layer is electrically contacted with the first conductive semiconductor layer; the second electrode is provided with a second electrode, and one end of the second electrode is located on the front side of the reflective layer, and the other end is electrically connected to the conductive layer.
  • a front surface of the reflective layer is provided with a first conductive layer, wherein the first conductive layer is electrically connected to the first electrode and the second electrode respectively to form a first electrode region and a second electrode region, the first conductive layer Storm a first electrode and a second electrode;
  • a front surface of the first conductive layer is provided with an isolation layer covering the top surface of the flip chip type LED chip and the side surfaces of the first conductive type semiconductor layer and the second conductive type semiconductor layer Part or all, the isolation layer is provided with a first conductive hole exposing the first electrode region and a second conductive hole exposing the second electrode region;
  • a front surface of the isolation layer is provided with a second conductive layer, and the second conductive layer is used for The first electrode region and the second electrode region are electrically connected to the conductive metal electrodes respectively disposed in the first conductive via and the second conductive via, respectively.
  • the insulating layer and the reflective layer are made of the same high reflectivity insulating material.
  • the high reflectivity insulating material comprises a distributed Bragg reflector DBR or SiO2, SiNx, AlN.
  • the material of the first electrode, the second electrode and the first conductive layer is one of titanium, chromium, aluminum and silver.
  • the first conductive layer has a thickness of 50 ⁇ to 50,000 ⁇ .
  • the material of the second conductive layer and the conductive metal electrode is one or more of gold, silver, platinum, titanium, chromium, nickel, copper and aluminum.
  • the second conductive layer has a thickness of 50 ⁇ to 200,000 ⁇ .
  • the length of the isolation layer exposed between the second conductive layers in the horizontal direction of the top surface of the flip-chip LED chip is one-fifth to one-half of the overall size.
  • the material of the conductive layer is a transparent conductive material or tin-doped indium oxide ITO.
  • the material of the isolation layer is silicon dioxide or a distributed Bragg reflector DBR.
  • the invention has the beneficial effects that by providing two conductive layers and one isolation layer on the front surface of the flip-chip LED chip, leakage of the LED chip can be effectively prevented, and the product yield is remarkably improved.
  • FIG. 1 is a cross-sectional view showing a first embodiment of a flip chip type LED chip of the present invention
  • FIG. 2 is a plan view of a first embodiment of a flip-chip LED chip of the present invention at a first conductive layer;
  • FIG 3 is a plan view of a first embodiment of a flip chip type LED chip of the present invention.
  • a substrate 20, a first conductive semiconductor layer; 30, a light-emitting layer; 40, a second conductive semiconductor layer; 50, a conductive layer; 60, a reflective layer; 61, an insulating layer; 70, a first electrode hole; 71, a first electrode; 72, a first electrode region; 80, a second electrode hole; 81, a second electrode; 82, a second electrode region; 90, a first conductive layer; 100, an isolation layer; a hole; 102, a second conductive hole; 110, a second conductive layer; 120, a conductive metal electrode.
  • a first embodiment of the present invention is a flip-chip LED chip including a substrate 10 , and a first conductive semiconductor layer 20 , a light emitting layer 30 , and a light emitting layer 30 are sequentially stacked from the front surface of the substrate 10 .
  • the second conductive type semiconductor layer 40, the conductive layer 50, and the reflective layer 60 are sequentially stacked from the front surface of the substrate 10 .
  • the method further includes three first electrode holes 70 etched and a plurality of second electrode holes 80 surrounding the first electrode holes 70.
  • the first electrode holes 70 are penetrated by the reflective layer 60 to the luminescent layer 30 and exposed first.
  • the second electrode hole 80 penetrates the reflective layer 60 and exposes the conductive layer 50, and the hole wall of the first electrode hole 70 is coated with an insulating layer 61.
  • a first electrode 71 is disposed in the first electrode hole 70.
  • One end of the first electrode 71 is located on the front surface of the reflective layer 60, and the other end is in electrical contact with the first conductive semiconductor layer 20;
  • One end of the electrode 81 and the second electrode 81 are located on the front surface of the reflective layer, and the other end is in electrical contact with the conductive layer 50.
  • the first electrode may be a positive electrode
  • the second electrode may be a negative electrode, or vice versa
  • the first electrode may be a negative electrode
  • the second electrode may be a positive electrode, which does not affect the embodiment. Implementation Effect.
  • the front surface of the reflective layer 60 is provided with a first conductive layer 90.
  • the first conductive layer 90 is electrically connected to the three first electrodes 71 and electrically connected to the second.
  • the electrode 81 forms a first electrode region 72 including three first electrodes 71 and a second electrode region 82 including a plurality of second electrodes 81, and the first electrode 71 is exposed through the etched via holes on the first conductive layer 90 and The second electrode 81.
  • the front surface of the first conductive layer 90 is provided with an isolation layer 100.
  • the isolation layer 100 is composed of an insulating material, and the isolation layer 100 covers the top surface of the flip chip type LED chip and the first conductive type semiconductor layer 20 and the second conductive type semiconductor layer 40. Part or all of the side surface, the isolation layer 100 is provided with a first conductive via 101 exposing the first electrode region 72 and a second conductive via 102 exposing the second electrode region 82.
  • the front surface of the isolation layer 100 is provided with a second conductive layer 110, and the second conductive layer 110 is respectively disposed in the first conductive via 101 and the second conductive via 102.
  • the conductive metal electrode 120 (the conductive metal electrode 120 covering the second conductive layer 110 is indicated by a broken line in FIG. 3) is electrically connected to the first electrode region 72 and the second electrode region 82, respectively.
  • the second conductive layer 110 is used in a subsequent process to be combined with a solder paste process.
  • the two conductive metal electrodes 120 on the conductive layer are respectively disposed on two sides of the isolation layer 100, and may be set to have the same size according to the solder paste process and actual requirements.
  • the two conductive metal electrodes 120 function to electrically connect the second conductive layer 110 located at the uppermost layer and the first electrode region 72 and the second electrode region 82 under the isolation layer 100.
  • the ratio of the length of the isolation layer 100 exposed between the second conductive layers in the horizontal direction of the top surface of the flip-chip LED chip in the overall size is generally one-fifth to one-half, and the present embodiment The proportion in the middle is one third. Since the second conductive layer 110 is used as an electrode in the subsequent packaging process, the second conductive layer 110 on both sides must have a suitable conductive area and spacing, otherwise the conductive metal may overflow, and the ratio is one-fifth to two. The interval of one part not only makes the second conductive layer 110 have the most ideal conductive area, but also prevents the conductive metal from overflowing, further improving the yield of the product.
  • the number of the first electrode holes and the first electrodes is set to three.
  • different numbers of first electrode holes may be disposed according to the requirements of the unused products.
  • the insulating layer 61 and the reflective layer 60 are made of the same high reflectivity insulating material.
  • the high reflectivity insulating materials described herein include materials including, but not limited to, distributed Bragg mirrors DBR or SiO2, SiNx, AlN, and the like.
  • the first electrode 71, the second electrode 81 and the first conductive layer 90 are made of one of titanium, chromium, aluminum and silver, and the thickness of the first conductive layer is 50 ⁇ 50000 ⁇ . If the material of the first conductive layer 90 is silver, the most ideal reflectance can be achieved.
  • the second conductive layer 110 and the conductive metal electrode 120 are made of one or more of gold, silver, platinum, titanium, chromium, nickel, copper, and aluminum, and The thickness of the two conductive layers 110 is 50 ⁇ to 200,000 ⁇ .
  • the conductive layer 50 is made of a transparent conductive material or tin-doped indium oxide ITO.
  • the spacer layer 100 is made of silicon dioxide or a distributed Bragg reflector DBR.

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Abstract

一种覆晶式LED芯片，其反射层（60）的正面设有第一导电层（90），第一导电层（90）用于分别连接第一电极（71）和第二电极（81）以形成第一电极区（72）和第二电极区（82），第一导电层（90）的正面设有隔离层（100），隔离层（100）覆盖该覆晶式LED芯片的顶面和第一导电型半导体层（20）的侧面，隔离层（100）的正面设有第二导电层（110），第二导电层（110）用于分别通过设于第一导电孔（101）和第二导电孔（102）中的导电金属电极（120）分别电性连接第一电极区（72）和第二电极区（82）。有益效果在于：通过在覆晶式LED芯片的正面设置两层导电层和一层隔离层，可以有效防止LED芯片漏电，显著提高产品良率。

Description

覆晶式LED芯片
技术领域
本发明涉及发光元件技术领域，尤其涉及一种覆晶式LED芯片。
背景技术
随着LED（Light Emitting Diode，发光二极管）照明技术的日益发展，LED在人们日常生活中的应用也越来越广泛。采用覆晶（Flip Chip）方式进行封装的LED（以下称覆晶式LED）的固晶方式简略，拥有更高的信赖度，使得量产可行性大幅晋升，且兼具缩短高温烘烤的制程时间、高良率、导热效果佳、高出光量等优势，遂成为业界竭力开展的技术。
LED的发光是利用正极的电流到达负极所完成，电流会以最小的电阻路线由正极到达负极，在覆晶式LED芯片的封装中，必须保证正电极区与负电极区的可靠隔离，防止正负电极电性导通，为此，现有技术中一般采用在芯片侧边走线的方式在不同的正电极或负电极之间进行引线。但在经过长期的使用后发现，该引线方法存在漏电的可能，导致产品的良率下降。
发明内容
本发明主要解决的技术问题是提供一种覆晶式LED芯片。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种覆晶式LED芯片，包括衬底，由衬底的正面向上依次层叠地设有第一导电型半导体层、发光层、第二导电型半导体层、导电层和反射层；还包括至少一个第一电极孔和至少一个第二电极孔，所述第一电极孔由所述反射层贯穿至发光层并暴露出第一导电型半导体层，所述第二电极孔贯穿反射层并暴露出导电层，第一电极孔的孔壁上涂覆有绝缘层；第一电极孔内设有第一电极，所述第一电极的一端位于反射层的正面、另一端与第一导电型半导体层电性接触；第二电极孔内设有第二电极，所述第二电极的一端位于反射层的正面、另一端与导电层电性接触；所述反射层的正面设有第一导电层，所述第一导电层用于分别电性连接第一电极和第二电极以形成第一电极区和第二电极区，第一导电层上暴露第一电极和第二电极；第一导电层的正面设有隔离层，所述隔离层覆盖该覆晶式LED芯片的顶面和第一导电型半导体层和第二导电型半导体层的侧面的部分或者全部，隔离层上设有暴露第一电极区的第一导电孔和暴露第二电极区的第二导电孔；隔离层的正面设有第二导电层，所述第二导电层用于分别通过设于第一导电孔和第二导电孔中的导电金属电极分别电性连接第一电极区和第二电极区。
其中，所述绝缘层和反射层由相同的高反射率绝缘材料制成。
其中，所述高反射率绝缘材料包括分布式布拉格反射镜DBR或SiO2、SiNx、AlN。
其中，所述第一电极、第二电极和第一导电层的材质为钛、铬、铝和银中的一种。
其中，所述第一导电层的厚度为50Å~50000Å。
其中，所述第二导电层和导电金属电极的材质为金、银、铂、钛、铬、镍、铜和铝中的一种或多种。
其中，所述第二导电层的厚度为50Å~200000Å。
其中，所述隔离层在该覆晶式LED芯片的顶面的水平方向上暴露于第二导电层之间的长度在整体尺寸中的占比为五分之一至二分之一。
其中，所述导电层的材质为透明导电材料或掺锡氧化铟ITO。
其中，所述隔离层的材质为二氧化硅或分布式布拉格反射镜DBR。
本发明的有益效果是：通过在覆晶式LED芯片的正面设置两层导电层和一层隔离层，可以有效防止LED芯片漏电，显著提高产品良率。
附图说明
图1是本发明的覆晶式LED芯片的第一实施方式的剖面视图；
图2是本发明的覆晶式LED芯片的第一实施方式在第一导电层处的俯视图；
图3是本发明的覆晶式LED芯片的第一实施方式的俯视图。
主要元件符号说明：
10、衬底；20、第一导电型半导体层；30、发光层；40、第二导电型半导体层；50、导电层；60、反射层；61、绝缘层；70、第一电极孔；71、第一电极；72、第一电极区；80、第二电极孔；81、第二电极；82、第二电极区；90、第一导电层；100、隔离层；101、第一导电孔；102、第二导电孔；110、第二导电层；120、导电金属电极。
具体实施方式
为详细说明本发明的技术内容、构造特征、所实现目的及效果，以下结合实施方式并配合附图详予说明。
请参阅图1，本发明的第一实施方式为一种覆晶式LED芯片，包括衬底10，由衬底10的正面向上依次层叠地设有第一导电型半导体层20、发光层30、第二导电型半导体层40、导电层50和反射层60。
其中，还包括蚀刻的三个第一电极孔70和多个围绕在第一电极孔70周围的第二电极孔80，第一电极孔70由反射层60贯穿至发光层30并暴露出第一导电型半导体层20，第二电极孔80贯穿反射层60并暴露出导电层50，第一电极孔70的孔壁上涂覆有绝缘层61。
第一电极孔70内设有第一电极71，第一电极71的一端位于反射层60的正面、另一端与第一导电型半导体层20电性接触；第二电极孔80内设有第二电极81，第二电极81的一端位于反射层的正面、另一端与导电层50电性接触。在该实施方式中可将第一电极设为正电极，第二电极设为负电极，或反之，将第一电极设为负电极，第二电极设为正电极，都不影响本实施方式的实施效果。
在图1的基础上一并参阅图2，反射层60的正面设有第一导电层90，第一导电层90用于分别电性连接三个第一电极71和电性连接多个第二电极81以形成包含三个第一电极71的第一电极区72和包含多个第二电极81的第二电极区82，第一导电层90上通过蚀刻的通孔暴露出第一电极71和第二电极81。
第一导电层90的正面设有隔离层100，隔离层100由绝缘材料组成，隔离层100覆盖该覆晶式LED芯片的顶面和第一导电型半导体层20和第二导电型半导体层40的侧面的部分或者全部，隔离层100上设有一个暴露第一电极区72的第一导电孔101和一个暴露第二电极区82的第二导电孔102。
在图1和图2的基础上一并参阅图3，隔离层100的正面设有第二导电层110，第二导电层110分别通过设于第一导电孔101和第二导电孔102中的导电金属电极120（图3中以虚线表示覆盖在第二导电层110下的导电金属电极120）分别电性连接第一电极区72和第二电极区82。该第二导电层110用于后续工序中与锡膏制程结合，该导电层上的两个导电金属电极120分别设于隔离层100的两边，根据锡膏制程以及实际需求可设置为大小一致或不一致，两个导电金属电极120的作用在于电性连接位于最上层的第二导电层110以及位于隔离层100之下的第一电极区72和第二电极区82。隔离层100在该覆晶式LED芯片的顶面的水平方向上暴露于第二导电层之间的长度在整体尺寸中的占比为一般为五分之一至二分之一，本实施方式中的占比为三分之一。由于第二导电层110作为后续封装工艺时的电极使用，两侧的第二导电层110必须具有合适导电面积和间隔，否则可能出现导电金属溢出的现象，而占比为五分之一至二分之一的间隔不仅使第二导电层110具有最理想的导电面积，也可防止导电金属溢出，进一步提高产品的良率。
该实施方式通过在覆晶式LED芯片的正面设置两层导电层和一层隔离层，可以有效防止LED芯片漏电，显著提高产品良率。对于该实施方式中将第一电极孔及第一电极的数量设置为三个，仅为方便说明本发明的技术方案，在实际制造中可依据不用的产品要求设置不同数量的第一电极孔及第一电极。
在本发明的一个优选实施方式中，所述绝缘层61和反射层60由相同的高反射率绝缘材料制成。具体地，此处所述的高反射率绝缘材料包括包括但不限于分布式布拉格反射镜DBR或SiO2、SiNx、AlN等材料。
在本发明的一个优选实施方式中，所述第一电极71、第二电极81和第一导电层90的材质为钛、铬、铝和银中的一种，并且第一导电层的厚度为50Å~50000Å。第一导电层90的材质若为银，则可达到最理想的反射率。
在本发明的一个优选实施方式中，所述第二导电层110和导电金属电极120的材质为金、银、铂、钛、铬、镍、铜和铝中的一种或多种，并且第二导电层110的厚度为50Å~200000Å。
在本发明的一个优选实施方式中，所述导电层50的材质为透明导电材料或掺锡氧化铟ITO。
在本发明的一个优选实施方式中，所述隔离层100的材质为二氧化硅或分布式布拉格反射镜DBR。
以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关技术领域，均同理包括在本发明专利保护范围内。

Claims (10)

  1. 一种覆晶式 LED 芯片，包括衬底，由衬底的正面向上依次层叠地设有第一导电型半导体层、发光层、第二导电型半导体层、导电层和反射层；
    还包括至少一个第一电极孔和至少一个第二电极孔，所述第一电极孔由所述反射层贯穿至发光层并暴露出第一导电型半导体层，所述第二电极孔贯穿反射层并暴露出导电层，第一电极孔的孔壁上涂覆有绝缘层；
    第一电极孔内设有第一电极，所述第一电极的一端位于反射层的正面、另一端与第一导电型半导体层电性接触；第二电极孔内设有第二电极，所述第二电极的一端位于反射层的正面、另一端与导电层电性接触；
    其特征在于，所述反射层的正面设有第一导电层，所述第一导电层用于分别电性连接第一电极和第二电极以形成第一电极区和第二电极区，第一导电层上暴露第一电极和第二电极；
    第一导电层的正面设有隔离层，所述隔离层覆盖该覆晶式 LED 芯片的顶面和第一导电型半导体层和第二导电型半导体层的侧面的部分或者全部，隔离层上设有暴露第一电极区的第一导电孔和暴露第二电极区的第二导电孔；
    隔离层的正面设有第二导电层，所述第二导电层用于分别通过设于第一导电孔和第二导电孔中的导电金属电极分别电性连接第一电极区和第二电极区。
  2. 根据权利要求1所述的覆晶式LED芯片，其特征在于，所述绝缘层和反射层由相同的高反射率绝缘材料制成。
  3. 根据权利要求2所述的覆晶式LED芯片，其特征在于，所述高反射率绝缘材料包括分布式布拉格反射镜DBR或SiO2、SiNx、AlN。
  4. 根据权利要求1所述的覆晶式LED芯片，其特征在于，所述第一电极、第二电极和第一导电层的材质为钛、铬、铝和银中的一种。
  5. 根据权利要求4所述的覆晶式LED芯片，其特征在于，所述第一导电层的厚度为50Å~50000Å。
  6. 根据权利要求1所述的覆晶式LED芯片，其特征在于，所述第二导电层和导电金属电极的材质为金、银、铂、钛、铬、镍、铜和铝中的一种或多种。
  7. 根据权利要求6所述的覆晶式LED芯片，其特征在于，所述第二导电层的厚度为50Å~200000Å。
  8. 根据权利要求1所述的覆晶式LED芯片，其特征在于，所述隔离层在该覆晶式LED芯片的顶面的水平方向上暴露于第二导电层之间的长度在整体尺寸中的占比为五分之一至二分之一。
  9. 根据权利要求1所述的覆晶式LED芯片，其特征在于，所述导电层的材质为透明导电材料或掺锡氧化铟ITO。
  10. 根据权利要求1所述的覆晶式LED芯片，其特征在于，所述隔离层的材质为二氧化硅或分布式布拉格反射镜DBR。
PCT/CN2014/082515 2014-02-25 2014-07-18 覆晶式led芯片 WO2015127745A1 (zh)

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