WO2015120706A1 - 正弦波生成装置和方法 - Google Patents
正弦波生成装置和方法 Download PDFInfo
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- WO2015120706A1 WO2015120706A1 PCT/CN2014/084421 CN2014084421W WO2015120706A1 WO 2015120706 A1 WO2015120706 A1 WO 2015120706A1 CN 2014084421 W CN2014084421 W CN 2014084421W WO 2015120706 A1 WO2015120706 A1 WO 2015120706A1
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- 238000000034 method Methods 0.000 title claims abstract description 68
- 238000009825 accumulation Methods 0.000 claims abstract description 16
- 230000001186 cumulative effect Effects 0.000 claims 1
- 230000008569 process Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 5
- 238000005070 sampling Methods 0.000 description 5
- 238000004088 simulation Methods 0.000 description 4
- 230000009467 reduction Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/03—Digital function generators working, at least partly, by table look-up
- G06F1/0321—Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/022—Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/03—Digital function generators working, at least partly, by table look-up
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/03—Digital function generators working, at least partly, by table look-up
- G06F1/0321—Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers
- G06F1/0328—Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers in which the phase increment is adjustable, e.g. by using an adder-accumulator
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/03—Digital function generators working, at least partly, by table look-up
- G06F1/035—Reduction of table size
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B28/00—Generation of oscillations by methods not covered by groups H03B5/00 - H03B27/00, including modification of the waveform to produce sinusoidal oscillations
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/012—Modifications of generator to improve response time or to decrease power consumption
Definitions
- the present invention relates to the field of digital circuit technologies, and in particular, to a sine wave generating apparatus and method. Background technique
- the present invention aims to solve at least one of the technical problems in the related art to some extent.
- a first object of the present invention is to provide a sine wave generating apparatus which can generate a sine wave having a richer frequency and more precision by using a digital circuit having a smaller area.
- a second object of the present invention is to propose a sine wave generation method.
- the first aspect of the present invention provides a sine wave generating apparatus, including: a phase accumulating module, configured to acquire configuration information of a sine wave, and generate the sine wave according to the configuration information of the sine wave Address information, where the address information of the sine wave includes integer address information and decimal address information; the value checking module is configured to search for the first data information and the second data information of the sine wave according to the integer address information; An interpolation module, configured to perform interpolation between the first data information of the sine wave and the second data information according to a bit width of the decimal address information, and acquire the sine wave according to the decimal address information Interpolating the original data information; a random intercepting module, configured to interpolate the original number of the sine wave according to the bit width size of the decimal address information and the pseudo random sequence output value Performing a truncation process to obtain final interpolated data information of the sine wave; and a sine wave generating module for generating image information of the sine wave according to the final interpolated data information
- the sine wave generating apparatus calculates the third data information based on the two pieces of data information in the look-up table by using the interpolation method, thereby equivalently expanding the capacity of the look-up table, thereby achieving the reduced number
- the purpose of the circuit area of the circuit is used to round the original data of the interpolation, and then the generated random single-bit data is added to the integer part of the original data, thereby avoiding the distortion of the sine wave at certain frequency points.
- the sine wave generating device of the embodiment of the present invention can generate a sine wave with more abundant frequency and precision by using a digital circuit with a smaller area, and pass the sine wave data information generated by the related technology and the present invention, respectively, through MATLAB.
- the sine wave generated by the sine wave generating device of the embodiment of the present invention has better effects in both the time domain and the frequency domain. From the time domain, the sine wave generated by the sine wave generating device of the embodiment of the present invention is smoother and more regular; from the frequency domain, the sine wave generating device generated by the sine wave generating device of the embodiment of the present invention has a smaller harmonic energy.
- a second aspect of the present invention provides a sine wave generating method, including: acquiring configuration information of a sine wave, and generating address information of the sine wave according to the configuration information of the sine wave, where
- the address information of the sine wave includes integer address information and fractional address information; searching for the first data information and the second data information of the sine wave according to the integer address information; according to the bit width of the decimal address information Interpolating between the first data information of the sine wave and the second data information, and acquiring the interpolated original data information of the sine wave according to the decimal address information; according to the bit width size and the pseudo of the decimal address information
- the random sequence output value performs a truncation process on the interpolated original data of the sine wave to obtain final interpolated data information of the sine wave; and generates image information of the sine wave according to the final interpolated data information of the sine wave.
- the sine wave generating method of the embodiment of the present invention calculates the third data information according to the two pieces of data information in the look-up table by using interpolation, so that the capacity of the look-up table is enlarged, thereby achieving the reduction of the number.
- the purpose of the circuit area of the circuit And through the random truncation method, the interpolation original data is rounded, and then the generated random single-bit data is added to the integer part of the original data, thereby preventing the distortion of the sine wave at certain frequency points.
- the sine wave generating method of the embodiment of the present invention can generate a sine wave with more abundant frequency and precision by using a digital circuit with a smaller area, and pass the sine wave data information generated by the related technology and the present invention, respectively, through MATLAB.
- FIGS. 4 and 5 it can be clearly observed that the sine wave generated by the sine wave generating method according to the embodiment of the present invention has a better effect in both the time domain and the frequency domain. From the perspective of the time domain, according to the present invention
- the sine wave generated by the sine wave generation method of the embodiment is smoother and more regular; from the frequency domain, the sine wave generation method according to the embodiment of the present invention generates a sinusoidal harmonic energy smaller.
- FIG. 1 is a schematic structural view of a sine wave generating device according to an embodiment of the present invention.
- FIG. 2 is a schematic structural diagram of a random intercept module 400 according to an embodiment of the present invention.
- FIG. 3 is a schematic structural diagram of a pseudo random sequence generator according to an embodiment of the present invention.
- FIG. 4 is a schematic diagram showing a comparison of a sine wave time domain waveform of a sine wave generated by a sine wave generating device according to an embodiment of the present invention
- FIG. 5 is a schematic diagram showing a sine wave frequency comparison of a sine wave generated by a sine wave generating device according to an embodiment of the present invention
- FIG. 6 is a flow chart showing a method of generating a sine wave according to an embodiment of the present invention.
- FIG. 7 is a flow chart of a sine wave generation method according to an embodiment of the present invention.
- Figure 8 is a flow chart showing a method of generating a sine wave according to another embodiment of the present invention.
- Figure 9 is a flow chart showing a method of generating a sine wave according to still another embodiment of the present invention. detailed description
- Fig. 1 is a view showing the configuration of a sine wave generating apparatus according to an embodiment of the present invention.
- the sine wave generating device includes: a phase accumulating module 100, a value checking module 200, an interpolation module 300, a random intercept module 400, a sine wave generating module 500, and a rounding module 600, wherein the phase accumulating module 100 includes The storage unit 110 and the counting unit 120, the random intercept module 400 includes a pseudo random sequence generating unit 410.
- the phase accumulation module 100 is configured to acquire configuration information of the sine wave, and generate address information of the sine wave according to the configuration information of the sine wave, wherein the address information of the sine wave includes integer address information and decimal address information.
- the phase accumulation module 100 includes a storage unit 110 for storing configuration information of a sine wave.
- the phase accumulation module 100 can receive configuration information of a sine wave input by a user through a sine wave configuration module, wherein the configuration information of the sine wave includes an initial phase and a frequency of the sine wave.
- the sine wave configuration module is an interface module between the phase accumulation module 100 and the user, and the initial phase and frequency received by the sine wave configuration module change as the user input changes.
- the phase accumulation module 100 may store the initial phase and frequency of the sine wave input by the user in the storage unit 110 after acquiring the configuration information of the sine wave.
- the phase accumulating module 100 further includes a counting unit 120 for accumulating the phase accumulating module 100 according to a clock pulse.
- the initial value of the counting unit 120 may be the initial phase of the sine wave
- the length of the counting may be the frequency of the sine wave.
- the bit width of the counting unit 120 may include an integer portion and a fractional portion, the bit width of the integer portion is located at a high bit of the bit width of the counting unit 120, and the bit width of the decimal portion is located at a low bit of the bit width of the counting unit 120.
- the phase accumulating module 100 can accumulate the count by the external clock pulse by the counting unit 120, and each clock counting unit 120 generates a new data signal.
- Interest, and the data information is the address information of the sine wave.
- the external clock pulse can be set by the user according to his own needs.
- the signal input by the phase accumulation module 100 is the configuration information of the sine wave (the initial phase and frequency of the sine wave), and the output signal is the address information of the sine wave, wherein the address information is integer address information and decimal when it is not an integer.
- the address information consists of two parts.
- the lookup module 200 is configured to find the first data information and the second data information of the sine wave according to the integer address information.
- the sine wave generating device further includes a rounding module 600, and the rounding module 600 is configured to perform rounding processing on the address information of the sine wave to obtain integer address information of the sine wave.
- the address information of the sine wave obtained by the phase accumulation module 100 includes the integer address information and the decimal address information
- the address information of the sine wave acquired by the phase accumulation module 100 can be rounded down by the rounding module 600.
- gp only retains the integer part of the address information, discarding the fractional part of the address information.
- the signal input by the rounding module 600 is the address information of the sine wave
- the output signal is the integer part of the address information.
- the address information of the sine wave includes an 8-bit integer part and a 3-digit fraction part
- the rounding module 600 rounds down the address information of the sine wave to output an 8-bit integer part.
- the value-checking module 200 can search for the data information of the corresponding sine wave in the look-up table by using the integer address information in the sine wave address information acquired by the phase accumulation module 100.
- the signal input by the lookup module 200 is integer address information
- the output signal is the first data information and the second data information of the sine wave.
- data information of one cycle of the sine wave obtained by sampling may be stored, and the data information may be solidified into the circuit or dynamically configured by the user.
- the address information of each sine wave in the lookup table corresponds to one piece of data information, and the value checking module 200 can only receive the integer address information in the address information of the sine wave.
- the rounding module 600 first needs to round down the address information of the sine wave, and output the obtained integer address information to the value checking module 200. Then, the value-checking module 200 performs a value-checking in the look-up table according to the input integer address information, and outputs the first data information corresponding to the integer address information, and outputs the first data information and the first data information adjacent to the look-up table.
- One piece of data information that is, the second piece of data information.
- the data information output by the lookup module 200 according to the integer address information should be the first data information, and the second data information is the additional data information output for the interpolation.
- the first lookup table and the second lookup table are stored in the lookup module 200, wherein the lookup module 200 further includes a random access memory or a read only memory, a first lookup table and The second lookup table is stored in a random access memory or a read only memory.
- the first lookup table stores one of the sine wave data information corresponding to the odd address information/even address information in the integer address information
- the second lookup table stores The other of the sine wave data information corresponding to the odd address information/even address information in the integer address information.
- the first lookup table stores data information of a sine wave corresponding to an odd integer address
- the second lookup table stores an even number
- the value-checking module 200 is further configured to perform value check in the first look-up table/second look-up table according to the integer address information to obtain first data information corresponding to the integer address information, and according to The next integer address information adjacent to the integer address information is compared in the second lookup table to obtain the second data information corresponding to the next integer address information. Therefore, after the value-checking module 200 receives the integer address information output by the rounding module 600, the value-checking module 200 can simultaneously output two pieces of data information, and the two pieces of data information are adjacent in the sampling data of the sine wave. .
- the interpolation module 300 is configured to perform interpolation between the first data information and the second data information of the sine wave according to the bit width size of the decimal address information, and acquire the interpolated original data information of the sine wave according to the decimal address information. Specifically, the interpolation module 300 may calculate a plurality of interpolation data information between the first data information and the second data information according to the first data information, the second data information, and the decimal address information, and then the interpolation module 300 according to the decimal address information. And selecting one of the first data information, the second data information, and the plurality of interpolated data information as the interpolated original data information of the sine wave.
- the 7 interpolation points are evenly distributed between the first data information v m and the second data information, and 7
- the values of the interpolation points are v m + v d /8, v m + 2v d /8, v m + 3v d /8, v m + 4v d /8, v m + 5v d /8, v m + 6v d /8, v m + 7v d /8.
- a value is selected between the first data information v m and the inserted 7 points, and the specific correspondence is as shown in Table 1.
- Table 1 is a schematic diagram of the correspondence between the decimal address information ⁇ and the interpolation original data.
- the symbol " ⁇ " represents a left shift operation.
- the decimal address information fa is ' ⁇ 01"
- it corresponds to the lookup module 200.
- the first selected data and second information data v m of the first interpolation point between v p the interpolation point value v m + v d / 8, i.e. (8v m + v d) / 8 , that is, ( v m " 3 + v d ) /8, where (v m " 3 + v d ) is the interpolated raw data information.
- bit width of the integer portion of the bit width of the counting unit 120 is determined by the depth of the lookup table. The greater the depth of the lookup table, the larger the bit width of the integer portion.
- the bit width of the fractional part of the counting unit 120 is determined by the precision of the interpolation. The higher the precision required for interpolation, the larger the bit width of the fractional part should be. For example, if the depth of the lookup table is 256, the bit width of the integer portion of the bit width of the counter unit 120 should be 8 bits.
- the random intercept module 400 is configured to perform a truncation process on the interpolated original data of the sine wave according to the bit width size of the decimal address information and the pseudo random sequence output value, to obtain the final interpolated data information of the sine wave. Specifically, the random intercept module 400 can divide the interpolated raw data by the 8 operation. Further, in the digital circuit, the interpolated original data can be directly shifted to the right by 3 bits to implement the divide by 8. However, since the interpolation original data is not necessarily divisible by 8, in the embodiment of the present invention, the random intercept module 400 performs a rounding process on the data after the interpolation original data is divided by 8 by using a random truncation method.
- Bit[2] represents the third bit of the interpolated original data, that is, the highest bit that is discarded
- r is the pseudo-random sequence output value
- bit width of the pseudo-random sequence output value is 1 bit.
- the interpolation raw data is V
- the final interpolated data information is V » 3 + r , where the symbol ">>” is a right shift operation, and "v >> 3 " means that the interpolated original data V is shifted to the right by 3 bits. , equivalent to the interpolation of the original data divided by 8.
- the random intercept module 400 includes a pseudo random sequence generating unit 410 for outputting a pseudo random sequence output value according to a preset bit width.
- the pseudo-random sequence generating unit 410 may be, for example, a pseudo-random sequence generator, and the pseudo-random sequence output value r may be output by a pseudo-random sequence generator that can perform internal operations according to Bit[2].
- the pseudo random sequence output value r is output.
- 3 is a schematic structural diagram of a pseudo random sequence generating unit 410 according to an embodiment of the present invention. As shown in FIG. 3, in the internal circuit structure of the pseudo random sequence generating unit 410, the bit width of the pseudo random sequence generator is 8 bits.
- the sine wave generation module 500 is configured to generate image information of a sine wave based on the final interpolation data information of the sine wave.
- the sine wave generating apparatus calculates the third data information based on the two pieces of data information in the look-up table by using the interpolation method, thereby equivalently expanding the capacity of the look-up table, thereby achieving the reduced number
- the purpose of the circuit area of the circuit is used to round the original data of the interpolation, and then the generated random single-bit data is added to the integer part of the original data, thereby avoiding the distortion of the sine wave at certain frequency points.
- the sine wave generating device of the embodiment of the present invention can generate a sine wave with more abundant frequency and precision by using a digital circuit with a smaller area, and pass the sine wave data information generated by the related technology and the present invention, respectively, through MATLAB.
- the sine wave generated by the sine wave generating device of the embodiment of the present invention has better effects in both the time domain and the frequency domain. From the time domain, the sine wave generated by the sine wave generating device of the embodiment of the present invention is smoother and more regular; from the frequency domain, the sine wave generating device generated by the sine wave generating device of the embodiment of the present invention has a smaller harmonic energy.
- the present invention also proposes a sine wave generation method.
- FIG. 6 is a flow chart of a sine wave generation method according to an embodiment of the present invention
- FIG. 7 is a flow chart of a sine wave generation method according to an embodiment of the present invention.
- the sine wave generation method includes:
- the data information of the corresponding sine wave can be found in the look-up table by using the integer address information in the acquired sine wave address information.
- data information of one cycle of the sine wave obtained by sampling may be stored, and the data information may be solidified into the circuit or dynamically configured by the user.
- the address information of the sine wave includes the fractional part
- the integer address information needs to be obtained, and then the value is checked in the lookup table according to the integer address information, and the first data information corresponding to the integer address information is output, and the first and the A data information is adjacent to the next data information in the lookup table, that is, the second data information.
- the data information output based on the integer address information should be the first data information, and the second data information is the additional data information outputted for the interpolation.
- S12 specifically includes:
- the first lookup table and the second lookup table are stored in a random access memory or a read only memory.
- the first lookup table stores one of the sine wave data information corresponding to the odd address information/even address information in the integer address information
- the second lookup table stores the sine wave corresponding to the odd address information/even address information in the integer address information.
- the first lookup table stores data information of a sine wave corresponding to an odd integer address
- the second lookup table stores an even number
- the plurality of interpolated data information between the first data information and the second data information may be calculated according to the first data information, the second data information, and the decimal address information, and then the interpolation module 300 is first according to the decimal address information.
- the seven interpolation points are evenly distributed between the first data information ⁇ second data information v p , and the values of the seven interpolation points are v m + v d /8, v m + 2v d /8, respectively.
- Table 1 is a schematic diagram of the correspondence between the decimal address information ⁇ and the interpolated original data.
- the symbol " ⁇ " represents a left shift operation.
- the data information is advise 1 and the second data information is the first interpolation point between Vp , and the value of the interpolation point is v m + v d /8, g ⁇ (8v m + v d ) /8, that is ( v m "3 + v d ) /8, where (v m « 3 + v d ) is the interpolated raw data information.
- the interpolation original data can be divided by 8 operation. Further, in the digital circuit, the interpolation original data can be directly shifted to the right by 3 bits to realize the division operation. However, since the interpolation original data is not necessarily divisible by 8, in the embodiment of the present invention, the data after the interpolation original data is divided by 8 is also subjected to rounding processing by a random truncation method.
- the sine wave generating method of the embodiment of the present invention calculates the third data information according to the two pieces of data information in the lookup table by using interpolation, so that the capacity of the lookup table is expanded, thereby achieving the reduction of the number.
- the randomized truncation method is used to round the original data of the interpolation, and then the generated random single-bit data is added to the integer part of the original data, thereby avoiding the distortion of the sine wave at certain frequency points.
- the sine wave generating method of the embodiment of the present invention can generate a sine wave with more abundant frequency and precision by using a digital circuit with a smaller area, and pass the sine wave data information generated by the related technology and the present invention, respectively, through MATLAB.
- the sine wave generated by the sine wave generating method according to the embodiment of the present invention has a better effect in both the time domain and the frequency domain. From the time domain, the sine wave generated by the sine wave generating method according to the embodiment of the present invention is smoother and more regular; from the frequency domain, the sine wave generating energy generated by the sine wave generating method according to the embodiment of the present invention is more small.
- Figure 8 is a flow chart showing a method of generating a sine wave according to another embodiment of the present invention.
- the sine wave generation method includes:
- the address information of the obtained sine wave includes the integer address information and the decimal address information
- the address information of the acquired sine wave may be rounded down, gp, only the integer part of the address information is reserved, and the address information is discarded.
- the fractional part For example, if the address information of the sine wave contains an 8-bit integer part and a 3-digit fractional part, the address information of the sine wave is rounded down to output an 8-bit integer part.
- the pseudo-random sequence output value may be output by a pseudo-random sequence generator that may output a pseudo-random sequence output value according to an internal operation according to Bit[2].
- the pseudo-random sequence generator has a bit width of 8 bits, and its initialized value is associated with Bit[2], and the specific settings may be set to different values according to different application scenarios.
- the symbol " ⁇ " represents a left shift operation.
- the address information of the sine wave can be performed by The next rounding process is performed to obtain the integer address information of the sine wave.
- Figure 9 is a flow chart showing a method of generating a sine wave according to still another embodiment of the present invention.
- the sine wave generation method includes:
- configuration information of a sine wave input by a user may be received, wherein the configuration information of the sine wave includes an initial phase and a frequency of the sine wave.
- the initial phase and frequency of the reception change as the user input changes.
- the initial phase and frequency of the sine wave input by the user can be stored.
- the counting is performed in accordance with a clock pulse. Further, the accumulated count can be performed under the action of an external clock pulse, and each clock pulse generates a new data information, which is the address information of the sine wave. Among them, the external clock pulse can be set by the user according to his own needs. S34. Perform rounding down the address information of the sine wave to obtain integer address information of the sine wave.
- the sine wave generating method of the embodiment of the present invention can generate a clock pulse according to the initial phase and frequency of the sine wave by storing the initial phase and frequency of the sine wave.
- portions of the invention may be implemented in hardware, software, firmware or a combination thereof.
- a plurality of steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system.
- a suitable instruction execution system For example, if implemented in hardware, as in another embodiment, it can be implemented with any one or combination of the following techniques well known in the art: having logic gates for implementing logic functions on data signals Discrete logic circuit, application specific integrated circuit with suitable combination logic gate, programmable gate array (PGA), field programmable gate array (FPGA)
- PGA programmable gate array
- FPGA field programmable gate array
- the third data information is derived from the two pieces of data information in the lookup table, so that the capacity of the lookup table is expanded, thereby achieving the reduction of the number.
- the interpolation original data is rounded, and then the generated random single-bit data is added to the integer part of the original data, thereby preventing the distortion of the sine wave at certain frequency points.
- the sine wave generating device of the embodiment of the present invention can generate a more abundant and accurate frequency by using a digital circuit with a smaller area.
- the sine wave, through the sine wave data information generated by the related technology and the present invention, respectively, is simulated by MATLAB, and the generated sine wave has better effects in both the time domain and the frequency domain. From the time domain, the sine wave generated by the sine wave generating device of the embodiment of the present invention is smoother and more regular; from the frequency domain, the sinusoidal wave generating device of the embodiment of the present invention generates a smaller sinusoidal harmonic energy.
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EP14882585.4A EP3082255B1 (en) | 2014-02-13 | 2014-08-14 | Device and method for generating sine wave |
KR1020167018346A KR101901502B1 (ko) | 2014-02-13 | 2014-08-14 | 정현파 생성 장치 및 방법 |
US15/230,484 US10013018B2 (en) | 2014-02-13 | 2016-08-08 | Sine wave generating apparatus and method |
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CN201410050499.7A CN103795345B (zh) | 2014-02-13 | 2014-02-13 | 正弦波生成装置和方法 |
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Citations (6)
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CN103795345B (zh) | 2016-08-17 |
US10013018B2 (en) | 2018-07-03 |
EP3082255A4 (en) | 2017-09-20 |
KR20160097292A (ko) | 2016-08-17 |
EP3082255A1 (en) | 2016-10-19 |
EP3082255B1 (en) | 2020-06-03 |
KR101901502B1 (ko) | 2018-09-21 |
CN103795345A (zh) | 2014-05-14 |
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