WO2015096250A1 - 液晶面板及其驱动方法、液晶显示器 - Google Patents

液晶面板及其驱动方法、液晶显示器 Download PDF

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Publication number
WO2015096250A1
WO2015096250A1 PCT/CN2014/071031 CN2014071031W WO2015096250A1 WO 2015096250 A1 WO2015096250 A1 WO 2015096250A1 CN 2014071031 W CN2014071031 W CN 2014071031W WO 2015096250 A1 WO2015096250 A1 WO 2015096250A1
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WIPO (PCT)
Prior art keywords
liquid crystal
signal
pixels
gate line
charge
Prior art date
Application number
PCT/CN2014/071031
Other languages
English (en)
French (fr)
Inventor
陈政鸿
张天豪
黄世帅
Original Assignee
深圳市华星光电技术有限公司
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Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US14/346,963 priority Critical patent/US20150294632A1/en
Priority to GB1610377.2A priority patent/GB2535933B/en
Priority to JP2016541057A priority patent/JP6219526B2/ja
Priority to DE112014006045.3T priority patent/DE112014006045T5/de
Priority to RU2016124645A priority patent/RU2636266C1/ru
Priority to KR1020167016378A priority patent/KR101813829B1/ko
Publication of WO2015096250A1 publication Critical patent/WO2015096250A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134336—Matrix
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G—PHYSICS
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G09G3/001—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background
    • G09G3/003—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background to produce spatial visual effects
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/30—Image reproducers
    • H04N13/332—Displays for viewing with the aid of special glasses or head-mounted displays [HMD]
    • H04N13/341—Displays for viewing with the aid of special glasses or head-mounted displays [HMD] using temporal multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/30—Image reproducers
    • H04N13/356—Image reproducers having separate monoscopic and stereoscopic modes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/30—Image reproducers
    • H04N13/356—Image reproducers having separate monoscopic and stereoscopic modes
    • H04N13/359—Switching between monoscopic and stereoscopic modes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/30—Image reproducers
    • H04N13/398—Synchronisation thereof; Control thereof
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0443—Pixel structures with several sub-pixels for the same colour in a pixel, not specifically used to display gradations
    • G09G2300/0447—Pixel structures with several sub-pixels for the same colour in a pixel, not specifically used to display gradations for multi-domain technique to improve the viewing angle in a liquid crystal display, such as multi-vertical alignment [MVA]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0205—Simultaneous scanning of several lines in flat panels
    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G2310/0224—Details of interlacing
    • G09G2310/0227—Details of interlacing related to multiple interlacing, i.e. involving more fields than just one odd field and one even field
    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G2310/0237—Switching ON and OFF the backlight within one frame
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
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    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0248—Precharge or discharge of column electrodes before or after applying exact column voltages
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
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    • G09G2310/0289—Details of voltage level shifters arranged for use in a driving circuit
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    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/067—Special waveforms for scanning, where no circuit details of the gate driver are given
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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    • G09G2320/043—Preventing or counteracting the effects of ageing
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Definitions

  • the invention belongs to the field of liquid crystal display; more specifically, it relates to a liquid crystal panel and a driving method thereof, and a liquid crystal display.
  • the current 3D display device generally refers to a display device that can realize 2D/3D switching, which is displayed in a 2D display mode when the 3D display mode is not turned on; and in a 3D display mode after the 3D display mode is turned on.
  • the display panel when in the state of 2D display mode, in order to increase the viewing angle and reduce the color shift, the display panel usually performs a low color shift design, which is usually a pixel increase (Pixel). Domain (Domain). Wherein, one pixel can be generally divided into four domains. If one pixel is divided into a Main area and a Sub area, one pixel can be increased to eight domains, thereby improving the viewing angle of the display panel and improving the color shift of the display panel.
  • . 1 is an equivalent circuit diagram of a pixel in a low color shift display panel of the prior art. As shown in FIG.
  • TFT Thin Film Transistor
  • the method for resolving the IS residual image is to change the one-frame inversion driving mode to the two-frame inversion driving mode, so that the average value of the positive and negative polarities of the voltage stored in the pixel is the same. .
  • the capacitor Cb due to the presence of the capacitor Cb (refer to FIG.
  • the pixel charging inconsistency occurs when the positive and negative polarities of the voltage stored in the pixel change, thereby causing the screen to enter the left and right eyes.
  • the brightness is inconsistent.
  • each row of pixels is driven by the independent charge charging gate line CL and the charge sharing gate line SL. Therefore, when the display panel is displayed, the display panel is made to have a low color shift by controlling the on or off of the charge charging gate line CL and the charge sharing gate line SL, respectively.
  • the prior art also provides a driving design of another low color-shifted display panel, which is a charge-sharing gate line before the gate line CL is opened by the charge that is turned on later. SL. As shown in FIG. 3, for example, the Nth charge-sharing gate line SL can be turned on by turning on the N+2th charge charge gate line CL.
  • this driving design cannot independently control the on or off of the charge sharing gate line SL, so the low color shift of the display panel cannot be turned off by turning off the charge sharing gate line SL, and the IS residual image appears in the 3D display. And the brightness of the left and right eyes is poor.
  • an object of the present invention is to provide a liquid crystal panel including a plurality of pixels, a plurality of charge charging gate lines, and a plurality of charge sharing gate lines, wherein A plurality of pixels are arranged in an array, each row of pixels is electrically coupled to a charge charging gate line and a charge sharing gate line, and the nth row of pixels electrically coupled to the charge sharing gate line and the n+th
  • the m-row pixel electrically coupled charge is charged into the gate line; when the liquid crystal panel performs 2D display, the charge-charged gate line electrically coupled to each row of pixels is turned into the first driving signal; when the liquid crystal When the panel performs 3D display, the charge-charged gate line electrically coupled to each row of pixels is supplied with the second driving signal.
  • the on signal of the second driving signal lasts for at least m times the duration of the on signal of the first driving signal.
  • the second driving signal is a interval type driving signal, wherein the interval type driving signal includes an alternating current signal and an off signal. Further, the conduction signal and the turn-off signal last for the same time as the on-signal of the first driving signal.
  • Another object of the present invention is to provide a driving method of a liquid crystal panel, the liquid crystal panel including a plurality of pixels, a plurality of charge charging gate lines, and a plurality of charge sharing gate lines, wherein the plurality of pixels Arranged in an array manner, each row of pixels is electrically coupled to a charge-filled gate line and a charge-sharing gate line, and the n-th row of pixels electrically coupled to the charge-sharing gate line and the n+m-th row of pixels The electrically coupled charge is charged into the gate line, wherein the driving method includes: when the liquid crystal panel performs 2D display, the charge-charged gate line electrically coupled to each row of pixels is input to the first driving signal When the liquid crystal panel performs 3D display, a charge-charged gate line electrically coupled to each row of pixels is supplied with a second driving signal.
  • the on signal of the second driving signal lasts for at least m times the duration of the on signal of the first driving signal.
  • the second driving signal is a interval type driving signal, wherein the interval type driving signal includes an alternating current signal and an off signal. Further, the conduction signal and the turn-off signal last for the same time as the on-signal of the first driving signal.
  • Still another object of the present invention is to provide a liquid crystal display including a liquid crystal panel and a backlight module disposed opposite to the liquid crystal panel, the backlight module providing a display light source to the liquid crystal panel to display the liquid crystal panel An image, wherein the liquid crystal panel includes a plurality of pixels, a plurality of charge charging gate lines, and a plurality of charge sharing gate lines, wherein the plurality of pixels are arranged in an array, and each row of pixels is electrically coupled To a charge charge gate line and a charge share gate line, and the charge shared gate line electrically coupled to the nth row of pixels and the charge electrically coupled to the n+mth row of pixels are charged into the gate line;
  • the liquid crystal panel performs 2D display
  • the charge-charged gate line electrically coupled to each row of pixels is supplied with the first driving signal
  • the liquid crystal panel performs 3D display the charge is electrically coupled to each row of pixels.
  • the input gate line is supplied with a second driving signal. Further, the on signal of the second
  • the second driving signal is a interval type driving signal, wherein the interval type driving The signal includes alternating on and off signals. Further, the conduction signal and the turn-off signal last for the same time as the on-signal of the first driving signal.
  • FIG. 1 is an equivalent circuit diagram of a pixel in a low color shift display panel of the prior art.
  • 2a and 2b are schematic views of a prior art low color shift display panel when performing 3D display.
  • 3 is a schematic diagram of a prior art driving low color shift display panel.
  • 4 is a schematic structural view showing a liquid crystal panel according to an embodiment of the present invention.
  • FIG. 5 is a schematic view showing driving of the liquid crystal panel shown in FIG. 4 for 2D display.
  • Fig. 6 is a schematic view showing driving of the liquid crystal panel shown in Fig.
  • Fig. 8 is a schematic structural view of a liquid crystal display having the liquid crystal panel shown in Fig. 4. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT OF THE INVENTION The present invention will be described in detail with reference to the embodiments of the invention. In the following description, unnecessary details of well-known structures and/or functions may be omitted in order to avoid obscuring the inventive concept of the present invention. 4 is a schematic structural view showing a liquid crystal panel according to an embodiment of the present invention. Referring to FIG.
  • a liquid crystal panel 1 is used in a liquid crystal display, and is disposed opposite to a backlight module in a liquid crystal display.
  • the backlight module provides a display light source to the liquid crystal panel 1 to cause the liquid crystal panel 1 to display an image.
  • the liquid crystal panel 1 includes a display area 100, a timing controller 200, a gate driver 300, and a data driver 400.
  • the display area 100 includes a plurality of pixels P, and the plurality of pixels P are arranged in an array on the display area 100. In order to reduce the color shift of the liquid crystal panel 1 of the present embodiment, each pixel P is divided into Main area 110 and Sub area 120.
  • Each pixel P includes three Thin Film Transistors (TFTs), a shared capacitor 132, a liquid crystal capacitor 112 and a storage capacitor 113 for the Main region 110, and a liquid crystal capacitor 122 and a storage capacitor 123 for the Sub region 120.
  • the three TFTs are respectively a shared TFT 131, a TFT 111 for the main region 110, and a TFT 121 for the Sub region 120.
  • the gate of the TFT 111 and the gate of the TFT 121 are electrically coupled to the charge charging gate line 140, and the TFT 111
  • the drain and the drain of the TFT 121 are electrically coupled to the data line 160.
  • the source of the TFT 111 is electrically coupled to the liquid crystal capacitor 112 and the storage capacitor 113.
  • the source of the TFT 121 is electrically coupled to the liquid crystal capacitor 122 and the storage capacitor 123.
  • the gate is electrically coupled to the charge-sharing gate line 150.
  • the drain of the TFT 131 is electrically coupled to the source of the TFT 121.
  • the source of the TFT 131 is electrically coupled to the shared capacitor 132.
  • the timing controller 200 rearranges the digital video data received from the system board (not shown) by the display panel 1, and supplies the rearranged data video data to the data driver 400.
  • the timing controller 200 receives, for example, a vertical sync signal, a horizontal sync signal, a data enable signal, and a clock from the system board, and generates a timing control signal for controlling the operation timing of the data driver 400 and the scan driver 300.
  • the data driver 400 latches the digital video data RGB under the control of the timing controller 200 and converts the latched digital video data RGB, thereby generating a positive data voltage and a negative data voltage, and then the data driver 400 proceeds to each data line. 160 provides a positive data voltage and a negative data voltage.
  • the scan driver 300 sequentially supplies each of the charge charge gate lines 140 with a turn-on signal having a width of about one horizontal period (about one frame time) under the control of the timing controller 200. For example, when a sufficiently large positive voltage is applied to a certain charge charge gate line 140, the gates of all the TFTs connected to the charge charge gate line 140 are turned on.
  • the drains of all the TFTs charged on the gate line 140 are connected to all of the data lines 160, and the charge is rushed in via the data voltage (positive data voltage or negative data voltage) on each of the data lines 160. All of the pixels P corresponding to the gate lines 140 are charged to an appropriate voltage. Then, a sufficient negative voltage is applied to the gate line 140, and the gate of all the TFTs connected to the gate line 140 is turned off until the next time it is re-opened, so that the charge is preserved. On the liquid crystal capacitor 112 and the liquid crystal capacitor 122; at this time, the next charge is started to enter the gate line 140, and the next pixel charged into the gate line 140 is charged.
  • FIG. 5 is a view A schematic diagram of driving the liquid crystal panel shown in FIG. 4 to perform 2D display.
  • Fig. 6 is a schematic view showing driving of the liquid crystal panel shown in Fig. 4 for 3D display. It should be noted that the driving signals used in the liquid crystal panel 1 of the embodiment of the present invention when performing 2D display and 3D display are different, as follows. Referring to FIGS.
  • the liquid crystal panel 1 of the embodiment of the present invention includes a plurality of pixels P, a plurality of charge charging gate lines 140, and a plurality of charge sharing gate lines 150.
  • a plurality of pixels P are arranged in an array, each row of pixels P is electrically coupled to a charge-filled gate line 140 and a charge-sharing gate line 150, and the n-th row of pixels P is electrically coupled to the charge-sharing gate.
  • the charge electrically coupled between the line 150 and the n+mth row of pixels P is charged into the gate line 140, where m and n are both positive integers.
  • the charge charging gate line 140 is turned into the first driving signal 170, the charge sharing gate line 150 electrically coupled to the nth row of pixels P and the charge charging electrically coupled to the n+mth row of pixels P are charged.
  • the gate lines 140 are electrically coupled together, so that the charge sharing gate line 150 electrically coupled to the nth row of pixels P is passed into the first driving signal 170, such that the Sub region 120 is discharged to the shared capacitor 132, thereby making Vm >Vsub, the liquid crystal panel 1 realizes low color shift display when performing 2D display.
  • the ON signal (or high level) of the first driving signal 170 lasts for T.
  • the charge charging gate line 140 electrically coupled to the nth row of pixels is turned into the second driving signal 180, and the ON signal of the second driving signal 180 ( Or a high level), the charge charging gate line 140 electrically coupled to the n+1th row pixel P to the n+mth row pixel P, respectively, is guided to the second driving signal 180.
  • An ON signal (or a high level), at this time, a charge-sharing gate line 150 electrically coupled to the n-th row of pixels P and a charge-filling gate electrically coupled to the n+m-th row of pixels P
  • the pole lines 140 are electrically coupled together, so the charge sharing gate line 150 electrically coupled to the nth row of pixels P is also turned on (ON) by the second driving signal 180 (or high level).
  • V 132 is charged voltage of the capacitor 132 is shared; charge in the n-th row of pixels m of P + is electrically coupled to the gate line 140 is charged into the second driving signal 180
  • ON ON
  • the charge sharing row pixels P electrically coupled to n-th gate line 150 is also passed into the second drive
  • the 3D display is low, the color shift is invalid, and the IS residual image and the difference in brightness between the left and right eyes do not occur.
  • the ON signal (or high level) of the second driving signal 180 lasts for at least the ON signal (or high level) of the first driving signal 170. m times the time, that is, the ON signal (or high level) of the second driving signal 180 lasts for at least mT.
  • the second driving signal 180 may be converted into a spacing type driving signal 190, and the interval type driving signal 190 includes the first driving signal 170.
  • the ON time (or high level) duration T is the pulse width (ie, duration) of the ON signal or the OFF pulse sequence, and the interval type drive
  • the signal 190 lasts for at least m times the duration of the ON signal (or high level) of the first drive signal 170, i.e., the interval drive signal 190 lasts for at least mT.
  • the spaced drive signal 190 is easier to control its duration than the continuously open second drive signal 180 and does not produce flicker. Referring to FIG. 4, FIG. 5 and FIG. 7, in the driving process of the liquid crystal panel 1, when the liquid crystal panel 1 performs 2D display, the charge charging gate line 140 electrically coupled to the pixel n of the nth row is turned on.
  • the charge-filled gate line 140 electrically coupled to the m-th row pixel P is turned into the first driving signal 170, the charge-sharing gate line 150 and the n+m-th row pixel are electrically coupled to the n-th row of pixels P.
  • the P-charged charge-filled gate line 140 is electrically coupled together, so that the charge-sharing gate line 150 electrically coupled to the n-th row of pixels P is passed into the first driving signal 170, such that the Sub-region 120 is
  • the shared capacitor 132 is discharged, thereby making Vm>Vsub, and the liquid crystal panel 1 realizes low color shift display when performing 2D display.
  • the ON signal (or high level) of the first driving signal 170 lasts for T.
  • the charge-charged gate line 140 electrically coupled to the n-th row of pixel electrodes is turned on (ON) by the interval type driving signal 190, and is electrically connected to the n-th row of pixels P.
  • the coupled charge is charged into the gate line 140 by the interval-type drive signal 190 that is passed for the duration of time, with the n+2th row of pixels?
  • the n + 4 rows of pixels P, ..., the n + m rows of pixels P respectively electrically coupled charge charge gate line 140 are turned into the on-type drive signal 190 conduction (ON) signal, at this time, Due to the pixel P with the nth line
  • the electrically coupled charge sharing gate line 150 and the charge charging gate line 140 electrically coupled to the n+mth row of pixels P are electrically coupled together, and thus the charge sharing gate electrically coupled to the nth row of pixels P
  • the charge charging gate line 140 When the charge charging gate line 140 is turned on the ON signal of the interval type driving signal 190, the charge sharing gate line 150 electrically coupled to the nth row of pixels P is also turned into the interval type driving signal 190.
  • the liquid crystal panel 1 according to the embodiment of the present invention is generally used in a liquid crystal display. Referring to FIG.
  • the liquid crystal panel 1 and the backlight module 2 are relatively fixedly arranged according to an embodiment of the present invention to form a liquid crystal display and a backlight module.
  • a display light source is provided to the liquid crystal panel 1 to cause the liquid crystal panel 1 to display an image.

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Abstract

一种液晶面板，其包括多个像素、多条电荷充入栅极线（140）和多条电荷共享栅极线（150），多个像素以阵列的方式排布，每行像素电耦接至一条电荷充入栅极线（140）和一条电荷共享栅极线（150），且第n行像素电耦接的电荷共享栅极线（150）与第n+m行像素电耦接的电荷充入栅极线（140）电耦接在一起。当液晶面板进行2D显示时，与每行像素电耦接的电荷充入栅极线被通入第一驱动信号，当液晶面板进行3D显示时，与每行像素电耦接的电荷充入栅极线被通入第二驱动信号。该液晶面板3D显示时不会出现IS残影及左右眼亮度差。

Description

说 明 书 液晶面板及其驱动方法、 液晶显示器 技术领域
本发明属于液晶显示领域；更具体地讲，涉及一种液晶面板及其驱动方法、 液晶显示器。
背景技术 随着显示技术不断的发展进步， 己开发出使观看者产生立体视觉的 3D (Three Dimension)显示技术， 其利用左眼和右眼分别接收不同的画面， 然后 经过大脑对画面信息进行叠加重生， 构成一个具有前一后、 上一下、 左一右、 远一近等立体方向效果的画面。
目前的 3D显示装置通常指的是可实现 2D/3D切换的显示装置， 其在不开 启 3D显示模式时， 以 2D显示模式来显示的； 在开启 3D显示模式后， 以 3D 显示模式来显示。
在大尺寸的 3D显示装置中， 当处于 2D显示模式的状态时， 为了提高视 角并降低色偏， 显示面板通常会做低色偏（Low color shift)的设计， 其通常是 增加像素（Pixel)的畴（Domain)。其中， 一个像素一般可以分成 4个 domain, 如果将一个像素分为 Main 区和 Sub 区， 那么一个像素就可以增加到 8 个 domain, 这样就可以提高显示面板的视角， 并且改善显示面板的色偏。 图 1是 现有技术的一种低色偏显示面板中像素的等效电路图。如图 1所示， 其将一个 像素分为 Main区 11和 Sub区 12， 在电荷充入栅极线 （Charge Line) CL打开 时， 通过 Main区 11的薄膜场效应晶体管 （Thin Film Transistor, TFT) MT和 Sub区 12的薄膜场效应晶体管 （Thin Film Transistor, TFT) ST将电荷分别送 至像素的 Main区和 Sub 区； 当电荷充入栅极线 CL关闭， 且电荷共享栅极线 (Share Line) SL打开时，电耦接至电荷共享栅极线 SL的 SLT会将像素的 Sub 区 12中的部分电荷释放到电容 Cb中。 这样像素的 Main区 11和 Sub区 12就 会出现电位差， 以达到降低色偏的目的。
当处于 3D显示模式的状态时， 如图 2a所示， 在采用一帧（one frame)反 转驱动方式的情况下， 由于像素所储存的电压的正负极性的平均值不能相互抵 消， 将导致显示面板出现影像残留， 即 IS残影。 如图 2b所示， 解决 IS残影的 方法是可以通过将一帧反转驱动方式改变为两帧 （two frame) 反转驱动方式， 使像素所储存的电压的正负极性的平均值一致。 但是在改变为 two frame反转 驱动方式后， 由于电容 Cb (参照图 1 ) 的存在， 会在像素所储存的电压的正负 极性改变的时候出现像素充电不一致， 从而导致画面进入左右眼时的亮度不一 致。 此外， 在显示面板的像素的驱动设计中， 每一行像素是由独立的电荷充入 栅极线 CL和电荷共享栅极线 SL驱动的。 因此， 在显示面板显示时， 通过分 别控制电荷充入栅极线 CL和电荷共享栅极线 SL的导通或关闭来使显示面板 实现低色偏。 在需要关闭显示面板的低色偏时， 只需将电荷共享栅极线 SL关 闭即可， 但是在这种电荷充入栅极线 CL和电荷共享栅极线 SL分别独立的设 计中， 需要使用数量多一倍的 COF (Chip on Film, 膜片上芯片封装） 来为电 荷充入栅极线 CL和电荷共享栅极线 SL提供信号。 为了减少 COF的使用量， 降低成本， 现有技术还提供了另一种低色偏的 显示面板的驱动设计， 其是通过后开启的电荷充入栅极线 CL打开之前的电荷 共享栅极线 SL。 如图 3所示， 例如可通过开启第 N+2条电荷充入栅极线 CL 来打开第 N条电荷共享栅极线 SL。 但是这种驱动设计无法独立地控制电荷共 享栅极线 SL的导通或关闭， 因此无法通过关闭电荷共享栅极线 SL来关闭显 示面板的低色偏， 在 3D显示时就会出现 IS残影及左右眼亮度差。 发明内容 为了解决上述现有技术存在的问题， 本发明的目的在于提供一种液晶面 板， 其包括多个像素、 多条电荷充入栅极线和多条电荷共享栅极线， 其中， 所 述多个像素以阵列的方式排布，每行像素电耦接至一条电荷充入栅极线和一条 电荷共享栅极线， 且第 n行像素电耦接的电荷共享栅极线与第 n+m行像素电 耦接的电荷充入栅极线； 当所述液晶面板进行 2D显示时， 与每行像素电耦接 的电荷充入栅极线被通入第一驱动信号； 当所述液晶面板进行 3D显示时， 与 每行像素电耦接的电荷充入栅极线被通入第二驱动信号。 进一步地， 所述第二驱动信号的导通信号持续的时间至少为所述第一驱动 信号的导通信号持续的时间的 m倍。 进一步地， 所述第二驱动信号为间隔型驱动信号， 其中， 所述间隔型驱动 信号包括交替排列的导通信号和关断信号。 进一步地， 所述导通信号和所述关断信号持续的时间均与所述第一驱动信 号的导通信号持续的时间相同。 本发明的另一目的还在于提供一种液晶面板的驱动方法， 所述液晶面板包 括多个像素、 多条电荷充入栅极线和多条电荷共享栅极线， 其中， 所述多个像 素以阵列的方式排布，每行像素电耦接至一条电荷充入栅极线和一条电荷共享 栅极线， 且第 n行像素电耦接的电荷共享栅极线与第 n+m行像素电耦接的电 荷充入栅极线， 其中， 所述驱动方法包括： 在所述液晶面板进行 2D显示时， 与每行像素电耦接的电荷充入栅极线被通入第一驱动信号； 在所述液晶面板进 行 3D显示时， 与每行像素电耦接的电荷充入栅极线被通入第二驱动信号。 进一步地， 所述第二驱动信号的导通信号持续的时间至少为所述第一驱动 信号的导通信号持续的时间的 m倍。 进一步地， 所述第二驱动信号为间隔型驱动信号， 其中， 所述间隔型驱动 信号包括交替排列的导通信号和关断信号。 进一步地， 所述导通信号和所述关断信号持续的时间均与所述第一驱动信 号的导通信号持续的时间相同。 本发明的又一目的还在于提供一种液晶显示器， 其包括液晶面板以及与所 述液晶面板相对设置的背光模组， 所述背光模组向液晶面板提供显示光源， 以 使所述液晶面板显示影像， 其中， 所述液晶面板包括多个像素、 多条电荷充入 栅极线和多条电荷共享栅极线， 其中， 所述多个像素以阵列的方式排布， 每行 像素电耦接至一条电荷充入栅极线和一条电荷共享栅极线， 且第 n行像素电耦 接的电荷共享栅极线与第 n+m行像素电耦接的电荷充入栅极线； 当所述液晶 面板进行 2D显示时， 与每行像素电耦接的电荷充入栅极线被通入第一驱动信 号； 当所述液晶面板进行 3D显示时， 与每行像素电耦接的电荷充入栅极线被 通入第二驱动信号。 进一步地， 所述第二驱动信号的导通信号持续的时间至少为所述第一驱动 信号的导通信号持续的时间的 m倍。
进一步地， 所述第二驱动信号为间隔型驱动信号， 其中， 所述间隔型驱动 信号包括交替排列的导通信号和关断信号。 进一步地， 所述导通信号和所述关断信号持续的时间均与所述第一驱动信 号的导通信号持续的时间相同。
本发明的液晶面板及其驱动方法、 液晶显示器， 在 3D显示时就不会出现 IS残影及左右眼亮度差。 附图说明 图 1是现有技术的一种低色偏显示面板中像素的等效电路图。 图 2a和图 2b分别是现有技术的低色偏显示面板进行 3D显示时的示意图。 图 3是现有技术的一种驱动低色偏显示面板的示意图。 图 4是示出根据本发明的实施例的液晶面板的结构示意图。 图 5是示出驱动图 4所示的液晶面板进行 2D显示的示意图。 图 6是示出驱动图 4所示的液晶面板进行 3D显示的示意图。 图 7是示出另一种驱动图 4所示的液晶面板进行 3D显示的示意图。 图 8是具有图 4所示的液晶面板的液晶显示器的结构示意图。 具体实施方式 现在对本发明的实施例进行详细的描述以解释本发明， 其示例表示在附图 中， 其中， 相同的标号始终表示相同部件。 在下面的描述中， 为了避免公知结 构和 /或功能的不必要的详细描述所导致的本发明构思的混淆，可省略公知结构 和 /或功能的不必要的详细描述。 图 4是示出根据本发明的实施例的液晶面板的结构示意图。 参照图 4， 根据本发明的实施例的液晶面板 1用于液晶显示器中， 并且在 液晶显示器中与背光模组相对设置， 背光模组向液晶面板 1提供显示光源， 以 使液晶面板 1显示影像。其中，液晶面板 1包括显示区域 100、时序控制器 200、 栅极驱动器 300、 数据驱动器 400。 显示区域 100包括多个像素 P, 并且该多个像素 P在显示区域 100上以阵 列的方式排布。 为了降低本实施例的液晶面板 1 的色偏， 每个像素 P被分为 Main区 110和 Sub区 120。每个像素 P包括三个薄膜场效应晶体管（Thin Film Transistor, TFT), 共享电容 132、 用于 Main区 110的液晶电容 112和储存电 容 113以及用于 Sub区 120的液晶电容 122和储存电容 123; 其中， 三个 TFT 分别为共享 TFT131、 用于 Main 区 110 的 TFTlll 以及用于 Sub 区 120 的 TFT121 o TFTlll 的栅极和 TFT121 的栅极均电耦接至电荷充入栅极线 140， TFTlll的漏极和 TFT121的漏极均电耦接至数据线 160， TFTlll的源极电耦 接至液晶电容 112和储存电容 113， TFT121的源极电耦接至液晶电容 122和储 存电容 123; TFT131的栅极电耦接至电荷共享栅极线 150， TFT131的漏极电 耦接至 TFT121的源极， TFT131的源极电耦接至共享电容 132。 时序控制器 200对显示面板 1从系统板（未示出）接收到的数字视频数据 重新布置， 并且将重新布置的数据视频数据提供给数据驱动器 400。 时序控制 器 200从系统板接收例如垂直同步信号、水平同步信号、数据使能信号和时钟， 并生成用于控制数据驱动器 400和扫描驱动器 300 的操作时序的时序控制信 号。 数据驱动器 400在时序控制器 200的控制下锁存数字视频数据 RGB并将 锁存的数字视频数据 RGB进行转换， 由此， 生成正数据电压和负数据电压， 然后数据驱动器 400向各条数据线 160提供正数据电压和负数据电压。扫描驱 动器 300在时序控制器 200的控制下顺序地向每条电荷充入栅极线 140提供具 有约一个水平周期 （约一帧时间） 的宽度的导通信号。 例如， 当在某一条电荷 充入栅极线 140 上施加足够大的正电压时， 则连接在这一条电荷充入栅极线 140上所有的 TFT的栅极皆会被打开，此时该条电荷充入栅极线 140上的所有 的 TFT的漏极会与所有的数据线 160连接，进而经由各条数据线 160上的数据 电压（正数据电压或负数据电压）对该条电荷冲入栅极线 140对应的所有像素 P进行充电至适当的电压。 接着在该条电荷冲入栅极线 140上施加足够大的负 电压，关闭连接在该条电荷冲入栅极线 140上所有的 TFT的栅极，直到下次再 重新打开， 期间使得电荷保存在液晶电容 112和液晶电容 122上； 此时再启动 下一条电荷冲入栅极线 140， 对下一条电荷冲入栅极线 140上的各个像素 P进 行充电。 如此依序将整个画面的视频数据写入， 再重新自第一条电荷冲入栅极 线 140重新开始 （此重复的频率为一帧时间的倒数）。 下面将对本发明的实施例的液晶面板的驱动进行详细的说明。 图 5是示出 驱动图 4所示的液晶面板进行 2D显示的示意图。 图 6是示出驱动图 4所示的 液晶面板进行 3D显示的示意图。 需要说明的是， 本发明的实施例的液晶面板 1在进行 2D显示和 3D显示时所利用的驱动信号是不同的， 具体如下。 参照图 4、 图 5和图 6， 如上所示， 本发明的实施例的液晶面板 1包括多 个像素 P、 多条电荷充入栅极线 140和多条电荷共享栅极线 150。 多个像素 P 以阵列的方式排布，每行像素 P电耦接至一条电荷充入栅极线 140和一条电荷 共享栅极线 150，且第 n行像素 P电耦接的电荷共享栅极线 150与第 n+m行像 素 P电耦接的电荷充入栅极线 140， 其中， m和 n均为正整数。 如上所述， 在液晶面板 1的驱动过程中， 当液晶面板 1进行 2D显示时， 与第 n行像素 P电耦接的电荷充入栅极线 140被通入第一驱动信号 170， Main 区 110和 Sub区 120均被充满电， 且 Vm=Vsub， 其中 Vm为充入 Main区 110 的电压， Vsub为充入 Sub区 120的电压； 而在与第 n+m行像素 P电耦接的电 荷充入栅极线 140被通入第一驱动信号 170时， 由于与第 n行像素 P电耦接的 电荷共享栅极线 150和与第 n+m行像素 P电耦接的电荷充入栅极线 140电耦 接在一起， 因此与第 n行像素 P电耦接的电荷共享栅极线 150被通入第一驱动 信号 170， 这样使得 Sub区 120向共享电容 132放电， 进而使得 Vm>Vsub， 液晶面板 1在进行 2D显示时实现低色偏显示。 其中， 第一驱动信号 170的导 通 （ON) 信号 （或称高电平） 持续的时间为 T。 当液晶面板 1进行 3D显示时，与第 η行像素 Ρ电耦接的电荷充入栅极线 140 被通入第二驱动信号 180， 在该第二驱动信号 180的导通（ON)信号（或称高 电平） 持续的时间内， 与第 n+1行像素 P至第 n+m行像素 P分别电耦接的电荷充 入栅极线 140均被通入第二驱动信号 180的导通 （ON) 信号 （或称高电平）， 此时， 由于与第 n行像素 P电耦接的电荷共享栅极线 150和与第 n+m行像素 P电 耦接的电荷充入栅极线 140电耦接在一起， 因此与第 n行像素 P电耦接的电荷共 享栅极线 150也被通入第二驱动信号 180的导通 （ON) 信号 （或称高电平）， 这样 Sub区 120的共享电容 132被打开， Main区 110、 Sub区 120和共享电容 132 均被充满电， 且 Vm=Vsub=V132， 其中 Vm为充入 Main区 110的电压， Vsub为充 入 Sub区 120的电压， V132为充入共享电容 132的电压； 在与第 n+m行像素 P电 耦接的电荷充入栅极线 140被通入第二驱动信号 180的导通 （ON) 信号 （或 称高电平）时， 与第 n行像素 P电耦接的电荷共享栅极线 150也被通入第二驱动 信号 180的导通 （ON) 信号 （或称高电平）， 由于之前共享电容 132已被充满 电压， 因此 Sub区 120无法向共享电容 132放电， 使得 Vm=Vsub， 进而使得液 晶面板 1在进行 3D显示时低色偏失效， 不会出现 IS残影及左右眼亮度差。 为了保证实现上述目的， 第二驱动信号 180 的导通 （ON) 信号 （或称高 电平） 持续的时间至少为第一驱动信号 170的导通 （ON) 信号 （或称高电平） 持续的时间的 m倍， 即第二驱动信号 180的导通 （ON) 信号 （或称高电平） 持续的时间至少为 mT。 作为本发明的另一实施例， 参照图 7， 在液晶面板 1进行 3D显示时， 第二 驱动信号 180可转换为间隔型驱动信号 190， 该间隔型驱动信号 190包括以第 一驱动信号 170的导通（ON)信号 （或称高电平）持续的时间 T为脉宽 （即持 续的时间） 的导通（ON)信号或关断（OFF)信号的重复脉冲序列， 并且该间 隔型驱动信号 190持续的时间至少为第一驱动信号 170的导通（ON)信号（或 称高电平） 持续的时间的 m倍， 即间隔型驱动信号 190持续的时间至少为 mT。 间隔型驱动信号 190相较持续开启的第二驱动信号 180更易于控制其持续时 间， 且不会产生闪烁。 一并参照图 4、 图 5和图 7， 在液晶面板 1的驱动过程中， 当液晶面板 1 进行 2D显示时， 与第 n行像素 P电耦接的电荷充入栅极线 140被通入第一驱 动信号 170， Main区 110和 Sub区 120均被充满电， 且 Vm=Vsub， 其中 Vm 为充入 Main区 110的电压， Vsub为充入 Sub区 120的电压； 而在与第 n+m 行像素 P电耦接的电荷充入栅极线 140被通入第一驱动信号 170时， 由于与第 n行像素 P电耦接的电荷共享栅极线 150和与第 n+m行像素 P电耦接的电荷充 入栅极线 140电耦接在一起，因此与第 n行像素 P电耦接的电荷共享栅极线 150 被通入第一驱动信号 170， 这样使得 Sub区 120向共享电容 132放电， 进而使 得 Vm>Vsub， 液晶面板 1在进行 2D显示时实现低色偏显示。 其中， 第一驱 动信号 170的导通 （ON) 信号 （或称高电平） 持续的时间为 T。 当液晶面板 1进行 3D显示时，与第 η行像素 Ρ电耦接的电荷充入栅极线 140 被通入间隔型驱动信号 190的导通 （ON) 信号， 在与第 n行像素 P电耦接的电 荷充入栅极线 140被通入的间隔型驱动信号 190持续的时间内， 与第 n+2行像 素？、 第 n+4行像素 P、 ……、 第 n+m行像素 P分别电耦接的电荷充入栅极线 140 均被通入间隔型驱动信号 190的导通 （ON) 信号， 此时， 由于与第 n行像素 P 电耦接的电荷共享栅极线 150和与第 n+m行像素 P电耦接的电荷充入栅极线 140 电耦接在一起， 因此与第 n行像素 P电耦接的电荷共享栅极线 150也被通入间隔 型驱动信号 190的导通 （ON) 信号， 使得 Sub区 120的共享电容 132被打开， Main区 110、 Sub区 120和共享电容 132均被充满电， 且 Vm=Vsub=V132， 其中 Vm为充入 Main区 110的电压， Vsub为充入 Sub区 120的电压， V132为充入共享 电容 132的电压； 在与第 n+m行像素 P电耦接的电荷充入栅极线 140被通入间 隔型驱动信号 190的导通 （ON) 信号时， 与第 n行像素 P电耦接的电荷共享栅 极线 150也被通入间隔型驱动信号 190的导通（ON)信号， 由于共享电容 132 已被充满电压， 因此 Sub区 120无法向共享电容 132放电， 使得 Vm=Vsub， 进 而使得液晶面板 1在进行 3D显示时低色偏失效， 不会出现 IS残影及左右眼亮 度差。 根据本发明的实施例的液晶面板 1通常用于液晶显示器中，具体参照图 8， 根据本发明的实施例的液晶面板 1与背光模组 2相对固定设置， 以组合形成液 晶显示器， 背光模组向液晶面板 1提供显示光源， 以使液晶面板 1显示影像。
尽管已经参照其示例性实施例具体显示和描述了本发明， 但是本领域的技 术人员应该理解， 在不脱离权利要求所限定的本发明的精神和范围的情况下， 可以对其进行形式和细节上的各种改变。

Claims

权利要求书
1、 一种液晶面板， 其中， 包括多个像素、 多条电荷充入栅极线和多条电 荷共享栅极线， 其中， 所述多个像素以阵列的方式排布， 每行像素电耦接至一 条电荷充入栅极线和一条电荷共享栅极线， 且第 n行像素电耦接的电荷共享栅 极线与第 n+m行像素电耦接的电荷充入栅极线； 当所述液晶面板进行 2D显示时， 与每行像素电耦接的电荷充入栅极线被 通入第一驱动信号； 当所述液晶面板进行 3D显示时， 与每行像素电耦接的电 荷充入栅极线被通入第二驱动信号。
2、 根据权利要求 1所述的液晶面板， 其中， 所述第二驱动信号的导通信 号持续的时间至少为所述第一驱动信号的导通信号持续的时间的 m倍。
3、 根据权利要求 2所述的液晶面板， 其中， 所述第二驱动信号为间隔型 驱动信号， 其中， 所述间隔型驱动信号包括交替排列的导通信号和关断信号。
4、 根据权利要求 3所述的液晶面板， 其中， 所述导通信号和所述关断信 号持续的时间均与所述第一驱动信号的导通信号持续的时间相同。
5、 一种液晶面板的驱动方法， 所述液晶面板包括多个像素、 多条电荷充 入栅极线和多条电荷共享栅极线， 其中， 所述多个像素以阵列的方式排布， 每 行像素电耦接至一条电荷充入栅极线和一条电荷共享栅极线， 且第 n行像素电 耦接的电荷共享栅极线与第 n+m行像素电耦接的电荷充入栅极线； 其中， 所 述驱动方法包括： 在所述液晶面板进行 2D显示时， 与每行像素电耦接的电荷充入栅极线被 通入第一驱动信号； 在所述液晶面板进行 3D显示时， 与每行像素电耦接的电荷充入栅极线被 通入第二驱动信号。
6、 根据权利要求 5所述的驱动方法， 其中， 所述第二驱动信号的导通信 号持续的时间至少为所述第一驱动信号的导通信号持续的时间的 m倍。
7、 根据权利要求 6所述的驱动方法， 其中， 所述第二驱动信号为间隔型 驱动信号， 其中， 所述间隔型驱动信号包括交替排列的导通信号和关断信号。
8、 根据权利要求 7所述的驱动方法， 其中， 所述导通信号和所述关断信 号持续的时间均与所述第一驱动信号的导通信号持续的时间相同。
9、 一种液晶显示器， 其包括液晶面板以及与所述液晶面板相对设置的背 光模组，所述背光模组向液晶面板提供显示光源，以使所述液晶面板显示影像， 其中， 所述液晶面板包括多个像素、 多条电荷充入栅极线和多条电荷共享栅极 线， 其中， 所述多个像素以阵列的方式排布， 每行像素电耦接至一条电荷充入 栅极线和一条电荷共享栅极线， 且第 n 行像素电耦接的电荷共享栅极线与第 n+m行像素电耦接的电荷充入栅极线； 当所述液晶面板进行 2D显示时， 与每行像素电耦接的电荷充入栅极线被 通入第一驱动信号； 当所述液晶面板进行 3D显示时， 与每行像素电耦接的电 荷充入栅极线被通入第二驱动信号。
10、 根据权利要求 9所述的液晶显示器， 其中， 所述第二驱动信号的导通 信号持续的时间至少为所述第一驱动信号的导通信号持续的时间的 m倍。
11、 根据权利要求 10所述的液晶显示器， 其中， 所述第二驱动信号为间 隔型驱动信号， 其中， 所述间隔型驱动信号包括交替排列的导通信号和关断信 号。
12、 根据权利要求 11 所述的液晶显示器， 其中， 所述导通信号和所述关 断信号持续的时间均与所述第一驱动信号的导通信号持续的时间相同。
PCT/CN2014/071031 2013-12-27 2014-01-21 液晶面板及其驱动方法、液晶显示器 WO2015096250A1 (zh)

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