WO2016065669A1 - 液晶显示面板及其3d显示时的像素插黑方法 - Google Patents

液晶显示面板及其3d显示时的像素插黑方法 Download PDF

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WO2016065669A1
WO2016065669A1 PCT/CN2014/090739 CN2014090739W WO2016065669A1 WO 2016065669 A1 WO2016065669 A1 WO 2016065669A1 CN 2014090739 W CN2014090739 W CN 2014090739W WO 2016065669 A1 WO2016065669 A1 WO 2016065669A1
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liquid crystal
pixel
frame picture
scanning order
display panel
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PCT/CN2014/090739
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English (en)
French (fr)
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朱江
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深圳市华星光电技术有限公司
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Priority to US14/427,634 priority Critical patent/US9564093B2/en
Publication of WO2016065669A1 publication Critical patent/WO2016065669A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136213—Storage capacitors associated with the pixel electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular to a liquid crystal display panel and a pixel insertion method thereof in 3D display.
  • Three-dimensional (Threee Dimensions, 3D) stereoscopic TV 3D stereoscopic technology mainly has two types of polarized (ie active) and shutter (passive), wherein the shutter 3D stereo technology uses the left and right switches of the glasses and the left and right of the TV image.
  • the frame sync alternates, allowing the eye to see different image images that are quickly switched, resulting in a stereoscopic image in the brain.
  • the crosstalk problem refers to: the left eye image received by the left eye contains the content of the right eye image, and the right eye image received by the right eye contains the content of the left eye image, that is, the left and right eye images interfere with each other, thereby causing formation. An error occurred in the 3D image.
  • a left eye picture ⁇ black picture ⁇ right eye picture ⁇ black picture can be used, so that the left eye receives the left at the same time.
  • the eye picture and the black picture, the right eye simultaneously receives the right eye picture and the black picture, and since the black picture is the background picture, crosstalk does not occur with the normal picture.
  • Black Insertion (BI) is commonly used in flat display devices to improve the display quality of dynamic images of display panels.
  • the black insertion technology uses a black screen between continuous motion images and images to eliminate the integration effect of the human eye on the image, and further improve the animation smear phenomenon often seen in the motion image of the display panel (Moving Picture) Response Timing, MPRT), improves the quality of the display.
  • MPRT Motion Picture Response Timing
  • this black insertion technique requires a higher refresh frequency, for example, to achieve a refresh rate of 60 Hz for each of the left and right eyes, and the driving circuit of the flat display device needs to have a refresh frequency of 240 Hz, which increases power consumption while increasing cost, and This driving method will also bring lower brightness of the display screen, LCD Shortcomings such as short charging time of capacitors.
  • an object of the present invention is to provide a liquid crystal display panel comprising: a plurality of data lines, a plurality of scan lines, and a plurality of pixels, wherein each pixel is connected to a corresponding one of the data lines And a scan line, wherein the liquid crystal display panel further comprises a plurality of control transistors, wherein a gate of each control transistor is connected to the same scan line, and a source of each control transistor is connected to a corresponding one of the data lines, The drains of each control transistor are connected together.
  • the pixel includes a pixel transistor, a storage capacitor, and a liquid crystal capacitor, wherein a gate of the pixel transistor is connected to a corresponding one of the scan lines, and a source of the pixel transistor is connected to a corresponding one of the data lines, A storage capacitor and one end of the liquid crystal capacitor are connected to a drain of the pixel transistor, and the other end of the storage capacitor and the liquid crystal capacitor are connected to a common electrode.
  • each control transistor is connected to the common electrode.
  • a plurality of control transistors and pixel transistors of a plurality of pixels are turned on in a blank time domain of the 2nth frame picture, where n is a positive integer.
  • the scanning order of the 2n-1th frame picture is opposite to the scanning order of the 2nth frame picture.
  • a plurality of control transistors and pixel transistors of a plurality of pixels are turned on in a blank time domain of the nth frame picture, wherein n is a positive integer.
  • the scan order of the nth frame picture is the same as the scan order of the n+1th frame picture
  • the scan order of the n+2 frame picture is the same as the scan order of the n+3 frame picture
  • the n+1th frame The scanning order of the screen is opposite to the scanning order of the n+2th frame.
  • Another object of the present invention is to provide a pixel insertion method for displaying the above liquid crystal display panel 3D, which comprises: turning on a plurality of control transistors and pixel transistors of a plurality of pixels in a blank time domain of the 2nth frame picture.
  • n is a positive integer.
  • the scanning order of the 2n-1th frame picture is opposite to the scanning order of the 2nth frame picture.
  • Still another object of the present invention is to provide a pixel insertion method for displaying a liquid crystal display panel 3D as described above, which includes: a plurality of control transistors and a plurality of pixels in a blank time domain of the nth frame picture The pixel transistors are all turned on, where n is a positive integer.
  • the scan order of the nth frame picture is the same as the scan order of the n+1th frame picture
  • the scan order of the n+2 frame picture is the same as the scan order of the n+3 frame picture
  • the n+1th frame The scanning order of the screen is opposite to the scanning order of the n+2th frame.
  • the invention displays a complete three-dimensional stereoscopic picture in the time of two frames, so that the driving circuit of the liquid crystal display panel has a refreshing frequency lower than the refresh frequency of the prior art, reducing the power consumption and reducing the cost, and
  • the invention inserts a black screen in a blank time domain of one frame, which can increase the brightness of the display screen and increase the charging time of the liquid crystal capacitor.
  • FIG. 1 is a schematic structural view of a liquid crystal display panel according to a first embodiment of the present invention
  • FIG. 2 is a schematic structural view of a liquid crystal display panel according to a second embodiment of the present invention.
  • FIG. 1 is a schematic structural view of a liquid crystal display panel according to a first embodiment of the present invention.
  • the pixel polarity inversion manner of the liquid crystal display panel according to the first embodiment of the present invention may be any polarity inversion manner other than frame inversion, for example, may be a column.
  • a liquid crystal display panel according to a first embodiment of the present invention includes: a plurality of data lines 110 that supply data signals, a plurality of scan lines 120 that provide scan signals, a common electrode 130, and a plurality of pixels defined by the plurality of data lines 110 and the plurality of scan lines 120.
  • each pixel 140 is connected to a corresponding one of the data lines 110 and one of the scan lines 120; each control transistor 150 includes a gate, a drain and a source, wherein the gate of each control transistor 150 is connected to the same scan line 120, each The source of the control transistor 150 is connected to its corresponding one of the data lines 110, and the drains of each of the control transistors 150 are connected together and connected to each of the data lines 110 except the first data line 110.
  • a plurality of control transistors 150 are disposed in the first row, that is, the gate of each control transistor 150 is connected to the first scanning line 120, but the invention is not limited thereto.
  • each pixel 140 includes a pixel transistor 141, a storage capacitor 142, and a liquid crystal capacitor 143.
  • the gate of the pixel transistor 141 is connected to a corresponding one of the scan lines 120, and the pixel transistor 141.
  • the source is connected to a corresponding one of the data lines 110.
  • One end of the storage capacitor 142 and the liquid crystal capacitor 143 are connected to the drain of the pixel transistor 141, and the other end of the storage capacitor 142 and the liquid crystal capacitor 143 are connected to the common electrode 130.
  • the pixel transistor 141 and the control transistor 150 are thin film transistors, but the invention is not limited thereto.
  • a method of inserting a pixel in a three-dimensional (3D) display of a liquid crystal display panel according to a first embodiment of the present invention will be described in detail below. It should be understood that the liquid crystal display panel according to the first embodiment of the present invention can also perform two-dimensional (2D) display.
  • Table 1 shows a pixel insertion method when a liquid crystal display panel according to a first embodiment of the present invention performs 3D display.
  • n is a positive integer
  • the symbol " ⁇ " indicates that the scanning direction (ie, scanning order) of the liquid crystal display panel is sequentially scanned from the last scanning line 120 of the liquid crystal display panel to the second scanning line 120
  • the symbol " ⁇ " "The scanning direction (ie, scanning order) of the liquid crystal display panel is sequentially scanned from the second scanning line 120 of the liquid crystal display panel to the last scanning line 120.
  • the last scan line 120 of the liquid crystal display panel is sequentially scanned to the second scan line 120 to realize the display of the second n-1 frame picture; and then sequentially from the second scan line 120 of the liquid crystal display panel. Scanning to the last scan line 120 to realize display of the 2nth frame picture; then, in the blank time domain of the 2nth frame picture, all the thin film transistors of the liquid crystal display panel (ie, all the pixel transistors 141 and the control transistor 150) are guided by control Thereby, all the data lines 110 of the liquid crystal display panel are connected to the common electrode 130.
  • the pixel voltage of the positive polarity pixel 140 on the liquid crystal display panel is lowered, and the pixel voltage of the negative polarity pixel 140 is raised to finally reach the same voltage, that is, the final voltage is very close to the voltage of the common electrode 130, thereby
  • the liquid crystal display panel is enabled to display a black screen, so that the left eye can separately view a complete three-dimensional stereoscopic image.
  • the pixel voltage of the positive polarity pixel 140 on the liquid crystal display panel is lowered, and the pixel voltage of the negative polarity pixel 140 is raised to finally reach the same voltage, that is, the final voltage is very close to the voltage of the common electrode 130, thereby
  • the liquid crystal display panel is enabled to display a black screen, so that the right eye can separately view a complete three-dimensional stereoscopic image.
  • Table 2 shows another pixel insertion method when the liquid crystal display panel according to the first embodiment of the present invention performs 3D display.
  • m is a positive integer
  • the symbol " ⁇ " indicates that the scanning direction (ie, scanning order) of the liquid crystal display panel is sequentially scanned from the last scanning line 120 of the liquid crystal display panel to the second scanning line 120
  • the symbol " ⁇ " "The scanning direction (ie, scanning order) of the liquid crystal display panel is sequentially scanned from the second scanning line 120 of the liquid crystal display panel to the last scanning line 120.
  • the last scanning line 120 of the liquid crystal display panel is sequentially scanned to the second scanning line 120 to realize the display of the mth frame picture; then the liquid crystal display is controlled by the blank time domain of the mth frame picture.
  • All of the thin film transistors of the panel i.e., all of the pixel transistors 141 and the control transistor 150
  • the pixel voltage of the positive polarity pixel 140 on the liquid crystal display panel is lowered, and the pixel voltage of the negative polarity pixel 140 is raised to finally reach the same voltage, that is, the final voltage is very close to the voltage of the common electrode 130, thereby The liquid crystal display panel is caused to display a black screen.
  • the pixel voltage of the positive polarity pixel 140 on the liquid crystal display panel is lowered, and the pixel voltage of the negative polarity pixel 140 is raised to finally reach the same voltage, that is, the final voltage is very close to the voltage of the common electrode 130, thereby
  • the liquid crystal display panel is caused to display a black screen. In this way, the left and right eyes can separately view one frame of the picture, thereby generating a three-dimensional picture synthesized in one frame by the left and right eyes separately.
  • the pixel voltage of the positive polarity pixel 140 on the liquid crystal display panel is lowered, and the pixel voltage of the negative polarity pixel 140 is raised to finally reach the same voltage, that is, the final voltage is very close to the voltage of the common electrode 130, thereby
  • the liquid crystal display panel is caused to display a black screen. In this way, the left and right eyes can separately view one frame of the picture, thereby generating a three-dimensional picture synthesized in one frame by the left and right eyes separately.
  • the left and right eyes can view a complete three-dimensional stereoscopic picture in the time of two frames, so that the driving circuit of the liquid crystal display panel can have a refreshing frequency lower than the refresh rate of the prior art, and the power consumption can be reduced while being reduced.
  • the cost Moreover, the above two methods of inserting black pixels also bring about an improvement in the brightness of the display screen and an increase in the charging time of the liquid crystal capacitor.
  • FIG. 2 is a schematic structural view of a liquid crystal display panel according to a second embodiment of the present invention.
  • the second embodiment and the first embodiment will not be described again, and only the differences from the first embodiment will be described.
  • the second embodiment is different from the first embodiment in that the drains of each of the control transistors 150 are connected together and both are connected to the common electrode 130.
  • the pixel insertion method for performing the 3D display of the liquid crystal display panel according to the second embodiment of the present invention may employ the pixel insertion black method described in the above Table 1 or the above Table 2, and details are not described herein again.

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Abstract

一种液晶显示面板，以及一种液晶显示面板3D显示时的像素插黑方法。所述液晶显示面板包括：若干条数据线(110)、若干条扫描线(120)、若干个像素(140)以及若干个控制晶体管(150)，其中，每个像素(140)连接其对应的一条数据线(110)和一条扫描线(120)，每个控制晶体管(150)的栅极均连接同一条扫描线(120)，每个控制晶体管(150)的源极连接其对应的一条数据线(110)，每个控制晶体管(150)的漏极均连接在一起。可使液晶显示面板的驱动电路具有比现有技术的刷新频率低一半的刷新频率，降低功耗的同时降低了成本，并且在一帧画面的空白时域插入黑画面，可使显示画面的亮度提升，液晶电容(143)充电时间增加。

Description

液晶显示面板及其3D显示时的像素插黑方法 技术领域
本发明涉及液晶显示技术领域，具体地讲，涉及一种液晶显示面板及其3D显示时的像素插黑方法。
背景技术
三维(Three Dimensions，简称3D)立体电视的3D立体技术主要有偏光式(即主动式)和快门式(即被动式)两种，其中，快门式3D立体技术利用眼镜的左右开关以及电视图像的左右帧同步交替，使眼睛看到快速切换的不同图像画面，从而在大脑中产生立体影像。
在快门式3D立体技术中，当左右眼图像画面交替显示时，容易产生串扰(Crosstalk)问题。该串扰问题指的是：左眼接收的左眼图像中包含有右眼图像的内容，而右眼接收的右眼图像中包含有左眼图像的内容，即左右眼图像相互干扰，从而导致形成的3D图像发生错误。
为了消除这种串扰问题，目前在快门式3D立体技术中采用插入黑画面的方式解决，例如可以采用左眼画面→黑画面→右眼画面→黑画面(LBRB)，使得左眼同时接收到左眼画面以及黑画面，右眼同时接收到右眼画面以及黑画面，由于黑画面为背景画面，不会与正常画面发生串扰。插黑技术(Black Insertion，BI)普遍使用在平面显示设备中，以改善显示面板的动态影像的显示质量。插黑技术是利用在连续的动态影像与影像之间，插入黑画面，以消除人眼对影像的积分效应(Integration Effect)，进一步改善显示面板在动态影像中常有的动画拖影现象(Moving Picture Response Timing，MPRT)，提升显示画面的质量。
然而，这种插黑技术需要更高的刷新频率，以左右眼分别要实现60Hz的刷新频率为例，需要平面显示设备的驱动电路具有240Hz的刷新频率，功耗增加的同时提高了成本，并且这种驱动方式还会带来显示画面的亮度较低，液晶 电容充电时间较短等缺点。
发明内容
为了解决上述现有技术存在的问题，本发明的目的在于提供一种液晶显示面板，包括：若干条数据线、若干条扫描线、若干个像素，其中，每个像素连接其对应的一条数据线和一条扫描线，其中，所述液晶显示面板还包括若干个控制晶体管，其中，每个控制晶体管的栅极均连接同一条扫描线，每个控制晶体管的源极连接其对应的一条数据线，每个控制晶体管的漏极均连接在一起。
进一步地，所述像素包括像素晶体管、存储电容及液晶电容，其中，所述像素晶体管的栅极连接其对应的一条扫描线，所述像素晶体管的源极连接其对应的一条数据线，所述存储电容与所述液晶电容的一端均连接所述像素晶体管的漏极，所述存储电容与所述液晶电容的另一端均连接公共电极。
进一步地，每个控制晶体管的漏极均连接公共电极。
进一步地，在第2n帧画面的空白时域将若干控制晶体管与若干像素的像素晶体管均导通，其中，n为正整数。
进一步地，第2n-1帧画面的扫描顺序与第2n帧画面的扫描顺序相反。
进一步地，在第n帧画面的空白时域将若干控制晶体管与若干像素的像素晶体管均导通，其中，n为正整数。
进一步地，第n帧画面的扫描顺序与第n+1帧画面的扫描顺序相同，且第n+2帧画面的扫描顺序与第n+3帧画面的扫描顺序相同，且第n+1帧画面的扫描顺序与第n+2帧画面的扫描顺序相反。
本发明的另一目的还在于提供一种上述的液晶显示面板3D显示时的像素插黑方法，其包括：在第2n帧画面的空白时域将若干控制晶体管与若干像素的像素晶体管均导通，其中，n为正整数。
进一步地，第2n-1帧画面的扫描顺序与第2n帧画面的扫描顺序相反。
本发明的又一目的又在于提供一种上述的液晶显示面板3D显示时的像素插黑方法，其包括：在第n帧画面的空白时域将若干控制晶体管与若干像素的 像素晶体管均导通，其中，n为正整数。
进一步地，第n帧画面的扫描顺序与第n+1帧画面的扫描顺序相同，且第n+2帧画面的扫描顺序与第n+3帧画面的扫描顺序相同，且第n+1帧画面的扫描顺序与第n+2帧画面的扫描顺序相反。
本发明在两帧画面的时间内显示一副完整的三维立体画面，可使液晶显示面板的驱动电路具有比现有技术的刷新频率低一半的刷新频率，降低功耗的同时降低了成本，并且本发明在一帧画面的空白时域插入黑画面，可使显示画面的亮度提升，液晶电容充电时间增加。
附图说明
通过结合附图进行的以下描述，本发明的实施例的上述和其它方面、特点和优点将变得更加清楚，附图中：
图1是根据本发明的第一实施例的液晶显示面板的结构示意图；
图2是根据本发明的第二实施例的液晶显示面板的结构示意图。
具体实施方式
以下，将参照附图来详细描述本发明的实施例。然而，可以以许多不同的形式来实施本发明，并且本发明不应该被解释为限制于这里阐述的具体实施例。相反，提供这些实施例是为了解释本发明的原理及其实际应用，从而使本领域的其他技术人员能够理解本发明的各种实施例和适合于特定预期应用的各种修改。
图1是根据本发明的第一实施例的液晶显示面板的结构示意图。
参照图1，根据本发明的第一实施例的液晶显示面板的像素极性反转的方式可为除帧反转(frame inversion)之外的其他任一极性反转方式，例如可为列反转(column inversion)或行反转(row inversion)或点反转(dot inversion)。根据本发明的第一实施例的液晶显示面板包括：提供数据信号的若干数据线110、提供扫描信号的若干扫描线120、公共电极130、由若干数据线110与若干扫描线120限定的若干像素140以及若干控制晶体管150，其中，每个像素 140连接其对应的一条数据线110和一条扫描线120；每个控制晶体管150包括栅极、漏极以及源极，其中，每个控制晶体管150的栅极均连接同一条扫描线120，每个控制晶体管150的源极连接其对应的一条数据线110，每个控制晶体管150的漏极均连接在一起且与除第一条数据线110之外的每条数据线110连接。在本实施例中，优选的，若干控制晶体管150被配置在第一行，即每个控制晶体管150的栅极均连接第一条扫描线120，但本发明并不限制于此。
在本实施例中，每个像素140包括像素晶体管141、存储电容142及液晶电容143，其中，在每个像素140中，像素晶体管141的栅极连接其对应的一条扫描线120，像素晶体管141的源极连接其对应的一条数据线110，存储电容142与液晶电容143的一端均连接像素晶体管141的漏极，存储电容142与液晶电容143的另一端均连接公共电极130。
在本实施例中，优选的，像素晶体管141和控制晶体管150均为薄膜晶体管，但本发明并不限制于此。
以下将对根据本发明的第一实施例的液晶显示面板进行三维(Three Dimensions，简称3D)显示时的像素插黑方法进行详细描述。应当理解的是，根据本发明的第一实施例的液晶显示面板也可进行二维(Two Dimensions，简称2D)显示。
表1示出了根据本发明的第一实施例的液晶显示面板进行3D显示时的一种像素插黑方法。在表1中，n为正整数，符号“↑”表示液晶显示面板的扫描方向(即扫描顺序)是从液晶显示面板的最后一条扫描线120顺序扫描至第二条扫描线120，符号“↓”表示液晶显示面板的扫描方向(即扫描顺序)是从液晶显示面板的第二条扫描线120顺序扫描至最后一条扫描线120。
[表1]
Figure PCTCN2014090739-appb-000001
从表1中可知，从液晶显示面板的最后一条扫描线120顺序扫描至第二条扫描线120，以实现第2n-1帧画面的显示；接着从液晶显示面板的第二条扫描线120顺序扫描至最后一条扫描线120，以实现第2n帧画面的显示；而后在第2n帧画面的空白时域通过控制将液晶显示面板的所有薄膜晶体管(即所有的像素晶体管141和控制晶体管150)导通，从而将液晶显示面板的所有数据线110连至公共电极130。此时，液晶显示面板上的正极性的像素140的像素电压降低，而负极性的像素140的像素电压升高，最终达到相同的电压，即最终的电压非常接近于公共电极130的电压，从而使液晶显示面板实现黑画面的显示，这样可使左眼单独观看一副完整的三维立体画面。
从液晶显示面板的最后一条扫描线120顺序扫描至第二条扫描线120，以实现第2n+1帧画面的显示；接着从液晶显示面板的第二条扫描线120顺序扫描至最后一条扫描线120，以实现第2n+2帧画面的显示；而后在第2n+2帧画面的空白时域通过控制将液晶显示面板的所有薄膜晶体管(即所有的像素晶体管141和控制晶体管150)导通，从而将液晶显示面板的所有数据线110连至公共电极130。此时，液晶显示面板上的正极性的像素140的像素电压降低，而负极性的像素140的像素电压升高，最终达到相同的电压，即最终的电压非常接近于公共电极130的电压，从而使液晶显示面板实现黑画面的显示，这样可使右眼单独观看一副完整的三维立体画面。
表2示出了根据本发明的第一实施例的液晶显示面板进行3D显示时的另一种像素插黑方法。在表2中，m为正整数，符号“↑”表示液晶显示面板的扫描方向(即扫描顺序)是从液晶显示面板的最后一条扫描线120顺序扫描至第二条扫描线120，符号“↓”表示液晶显示面板的扫描方向(即扫描顺序)是从液晶显示面板的第二条扫描线120顺序扫描至最后一条扫描线120。
[表2]
Figure PCTCN2014090739-appb-000002
从表2中可知，从液晶显示面板的最后一条扫描线120顺序扫描至第二条扫描线120，以实现第m帧画面的显示；接着在第m帧画面的空白时域通过控制将液晶显示面板的所有薄膜晶体管(即所有的像素晶体管141和控制晶体管150)导通，从而将液晶显示面板的所有数据线110连至公共电极130。此时，液晶显示面板上的正极性的像素140的像素电压降低，而负极性的像素140的像素电压升高，最终达到相同的电压，即最终的电压非常接近于公共电极130的电压，从而使液晶显示面板实现黑画面的显示。然后，从液晶显示面板的最后一条扫描线120顺序扫描至第二条扫描线120，以实现第m+1帧画面的显示；接着在第m+1帧画面的空白时域通过控制将液晶显示面板的所有薄膜晶体管(即所有的像素晶体管141和控制晶体管150)导通，从而将液晶显示面板的所有数据线110连至公共电极130。此时，液晶显示面板上的正极性的像素140的像素电压降低，而负极性的像素140的像素电压升高，最终达到相同的电压，即最终的电压非常接近于公共电极130的电压，从而使液晶显示面板实现黑画面的显示。这样可使左右眼单独观看一帧画面，从而在大脑中产生由左右眼单独观看到的一帧画面合成的三维立体画面。
接着，从液晶显示面板的从液晶显示面板的第二条扫描线120顺序扫描至最后一条扫描线120，以实现第m+2帧画面的显示；在第m+2帧画面的空白时域通过控制将液晶显示面板的所有薄膜晶体管(即所有的像素晶体管141和控制晶体管150)导通，从而将液晶显示面板的所有数据线110连至公共电极130。此时，液晶显示面板上的正极性的像素140的像素电压降低，而负极性的像素140的像素电压升高，最终达到相同的电压，即最终的电压非常接近于公共电极130的电压，从而使液晶显示面板实现黑画面的显示。然后，从液晶显示面板的第二条扫描线120顺序扫描至最后一条扫描线120，以实现第m+3帧画面的显示；接着在第m+3帧画面的空白时域通过控制将液晶显示面板的所有薄膜晶体管(即所有的像素晶体管141和控制晶体管150)导通，从而将液晶显示面板的所有数据线110连至公共电极130。此时，液晶显示面板上的正极性的像素140的像素电压降低，而负极性的像素140的像素电压升高，最终达到相同的电压，即最终的电压非常接近于公共电极130的电压，从而使液晶显示面板实现黑画面的显示。这样可使左右眼单独观看一帧画面，从而在大脑中产生由左右眼单独观看到的一帧画面合成的三维立体画面。
综上，左右眼在两帧画面的时间内观看到一副完整的三维立体画面，可使液晶显示面板的驱动电路具有比现有技术的刷新频率低一半的刷新频率，降低功耗的同时降低了成本。并且上述两种像素插黑方法还会带来显示画面的亮度提升，液晶电容充电时间增加等优点。
图2是根据本发明的第二实施例的液晶显示面板的结构示意图。
第二实施例与第一实施例在此不再赘述，只描述与第一实施例的不同之处。参照图2，第二实施例与第一实施例的不同之处在于：每个控制晶体管150的漏极均连接在一起且均与公共电极130连接。
此外，根据本发明的第二实施例的液晶显示面板进行3D显示时的像素插黑方法可采用上述表1或上述表2所描述的像素插黑方法，在此也不再赘述。
虽然已经参照特定实施例示出并描述了本发明，但是本领域的技术人员将理解：在不脱离由权利要求及其等同物限定的本发明的精神和范围的情况下，可在此进行形式和细节上的各种变化。

Claims (20)

  1. 一种液晶显示面板，其中，包括：若干条数据线、若干条扫描线、若干个像素以及若干个控制晶体管，每个像素连接其对应的一条数据线和一条扫描线，每个控制晶体管的栅极均连接同一条扫描线，每个控制晶体管的源极连接其对应的一条数据线，每个控制晶体管的漏极均连接在一起。
  2. 根据权利要求1所述的液晶显示面板，其中，所述像素包括像素晶体管、存储电容及液晶电容，所述像素晶体管的栅极连接其对应的一条扫描线，所述像素晶体管的源极连接其对应的一条数据线，所述存储电容与所述液晶电容的一端均连接所述像素晶体管的漏极，所述存储电容与所述液晶电容的另一端均连接公共电极。
  3. 根据权利要求1所述的液晶显示面板，其中，每个控制晶体管的漏极均连接公共电极。
  4. 根据权利要求2所述的液晶显示面板，其中，每个控制晶体管的漏极均连接公共电极。
  5. 根据权利要求1所述的液晶显示面板，其中，在第2n帧画面的空白时域将若干控制晶体管与若干像素的像素晶体管均导通，其中，n为正整数。
  6. 根据权利要求5所述的液晶显示面板，其中，第2n-1帧画面的扫描顺序与第2n帧画面的扫描顺序相反。
  7. 根据权利要求1所述的液晶显示面板，其中，在第n帧画面的空白时域将若干控制晶体管与若干像素的像素晶体管均导通，其中，n为正整数。
  8. 根据权利要求7所述的液晶显示面板，其中，第n帧画面的扫描顺序与第n+1帧画面的扫描顺序相同，且第n+2帧画面的扫描顺序与第n+3帧画面的扫描顺序相同，且第n+1帧画面的扫描顺序与第n+2帧画面的扫描顺序相反。
  9. 一种液晶显示面板3D显示时的像素插黑方法，其中，所述液晶显示面板包括：若干条数据线、若干条扫描线、若干个像素以及若干个控制晶体管，每个像素连接其对应的一条数据线和一条扫描线，每个控制晶体管的栅极均连 接同一条扫描线，每个控制晶体管的源极连接其对应的一条数据线，每个控制晶体管的漏极均连接在一起，
    其中，所述像素插黑方法包括：在第2n帧画面的空白时域将若干控制晶体管与若干像素的像素晶体管均导通，其中，n为正整数。
  10. 根据权利要求9所述的像素插黑方法，其中，所述像素包括像素晶体管、存储电容及液晶电容，所述像素晶体管的栅极连接其对应的一条扫描线，所述像素晶体管的源极连接其对应的一条数据线，所述存储电容与所述液晶电容的一端均连接所述像素晶体管的漏极，所述存储电容与所述液晶电容的另一端均连接公共电极。
  11. 根据权利要求9所述的像素插黑方法，其中，每个控制晶体管的漏极均连接公共电极。
  12. 根据权利要求9所述的像素插黑方法，其中，第2n-1帧画面的扫描顺序与第2n帧画面的扫描顺序相反。
  13. 根据权利要求10所述的像素插黑方法，其中，第2n-1帧画面的扫描顺序与第2n帧画面的扫描顺序相反。
  14. 根据权利要求11所述的像素插黑方法，其中，第2n-1帧画面的扫描顺序与第2n帧画面的扫描顺序相反。
  15. 一种液晶显示面板3D显示时的像素插黑方法，其中，所述液晶显示面板包括：若干条数据线、若干条扫描线、若干个像素以及若干个控制晶体管，每个像素连接其对应的一条数据线和一条扫描线，每个控制晶体管的栅极均连接同一条扫描线，每个控制晶体管的源极连接其对应的一条数据线，每个控制晶体管的漏极均连接在一起，
    其中，所述像素插黑方法包括：在第n帧画面的空白时域将若干控制晶体管与若干像素的像素晶体管均导通，其中，n为正整数。
  16. 根据权利要求15所述的像素插黑方法，其中，所述像素包括像素晶体管、存储电容及液晶电容，所述像素晶体管的栅极连接其对应的一条扫描线， 所述像素晶体管的源极连接其对应的一条数据线，所述存储电容与所述液晶电容的一端均连接所述像素晶体管的漏极，所述存储电容与所述液晶电容的另一端均连接公共电极。
  17. 根据权利要求15所述的像素插黑方法，其中，每个控制晶体管的漏极均连接公共电极。
  18. 根据权利要求15所述的像素插黑方法，其中，第n帧画面的扫描顺序与第n+1帧画面的扫描顺序相同，且第n+2帧画面的扫描顺序与第n+3帧画面的扫描顺序相同，且第n+1帧画面的扫描顺序与第n+2帧画面的扫描顺序相反。
  19. 根据权利要求16所述的像素插黑方法，其中，第n帧画面的扫描顺序与第n+1帧画面的扫描顺序相同，且第n+2帧画面的扫描顺序与第n+3帧画面的扫描顺序相同，且第n+1帧画面的扫描顺序与第n+2帧画面的扫描顺序相反。
  20. 根据权利要求17所述的像素插黑方法，其中，第n帧画面的扫描顺序与第n+1帧画面的扫描顺序相同，且第n+2帧画面的扫描顺序与第n+3帧画面的扫描顺序相同，且第n+1帧画面的扫描顺序与第n+2帧画面的扫描顺序相反。
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