WO2015081729A1 - 一种景观装饰灯系统及其地址编码与显示控制方法 - Google Patents

一种景观装饰灯系统及其地址编码与显示控制方法 Download PDF

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Publication number
WO2015081729A1
WO2015081729A1 PCT/CN2014/084706 CN2014084706W WO2015081729A1 WO 2015081729 A1 WO2015081729 A1 WO 2015081729A1 CN 2014084706 W CN2014084706 W CN 2014084706W WO 2015081729 A1 WO2015081729 A1 WO 2015081729A1
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Prior art keywords
address
main control
display
unit
display data
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PCT/CN2014/084706
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English (en)
French (fr)
Inventor
李照华
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深圳市明微电子股份有限公司
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Publication of WO2015081729A1 publication Critical patent/WO2015081729A1/zh

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/10Controlling the light source
    • H05B47/175Controlling the light source by remote control
    • H05B47/18Controlling the light source by remote control via data-bus transmission

Definitions

  • the invention belongs to the technical field of landscape decorative lamp control, and in particular relates to a landscape decorative lamp system and an address coding and display control method thereof.
  • the existing landscape decorative light system includes a plurality of decorative lights, each decorative light includes a plurality of pixels, each pixel consists of three colors of red, green and blue LEDs or monochromatic LEDs, all of which
  • the decorative lights adopt the serial connection to transmit the display data one by one from the first decorative light to achieve the purpose of driving each decorative light for display.
  • the driving chip pair in each decorative light is The received display data is amplified and transmitted to the next decorative light.
  • the driving chip of one of the decorative lights in the landscape decorative lighting system fails, the subsequent decorative lights may not work properly due to the inability to obtain display data. Therefore, when the existing landscape decorative lighting system transmits the received display data in series, the problem arises that the subsequent decorative lights cannot work normally due to the failure of the driving chip of one or more of the decorative lights.
  • the object of the present invention is to provide a landscape decorative light system, which aims to solve the driving chip of one or more decorative lamps when the existing landscape decorative lighting system performs series-by-stage transmission of the received display data. Failure caused the subsequent decorative lights to not work properly.
  • a landscape decorative light system comprising a controller and n display modules, n being a positive integer greater than 1, the controller for outputting an address encoded signal and display data, each of the displays
  • the address coded signal received by the module corresponds to one display data
  • each of the display modules includes one or more light emitting units;
  • the power supply end of each of the display modules is connected to a power source, and the display data receiving end of each of the display modules is connected to the display data end of the controller;
  • the address code input end of the first display module is connected to the address coded signal end of the controller; in the second display module to the nth display module, the nth The address code input end of the display module is connected to the address code output end of the n-1th display module, and the first display module obtains address coded data from the address coded signal received by the address code input end thereof. And transmitting the address coded data to the second display module through the address code output end thereof, and so on, from the second display module to the nth display module step by step ;
  • Each of the display modules further includes a main control module; a common contact formed by the power end of the main control module and the input end of each of the light emitting units is used as a power end of the display module,
  • the address input end, the display data end and the address output end of the main control module are respectively an address code input end, a display data receiving end and an address code output end of the display module, and an output end of each of the light emitting units is connected to the Main control module
  • the main control module drives each of the light emitting units to display in a first preset display mode upon power-on.
  • the main control module encodes data according to the saved address and is valid. Display data correspondingly drives each of the light emitting units for display; when no valid display data and address coded signals are received, the main control module drives each of the light emitting units to the first preset display mode Displaying; when valid display data is not received, but a valid address coded signal is received, the main control module performs an address code write operation according to the valid address coded signal to save the address coded data, and successfully completes the address Each of the light emitting units is driven to display in a second preset display mode during a code write operation.
  • Another object of the present invention is to provide an address encoding and display control method based on the above landscape lighting system, the address encoding and display control method comprising the following steps:
  • Each display module obtains power from the power supply and operates above;
  • the main control module in each display module drives each of the display units to display in a first preset display mode
  • the main control module determines whether valid display data is received, if yes, step D is performed, otherwise, step B and step E are simultaneously performed;
  • the main control module drives each of the light emitting units to perform display according to the saved address coded data and the effective display data;
  • the main control module determines whether a valid address coded signal is received, if yes, step F is performed, otherwise, returns to step B;
  • the main control module performs an address encoding write operation according to the valid address encoding signal to save the address encoded data, and determines whether the address encoding write operation is successfully completed, if yes, step G is performed, otherwise, return to step E;
  • the main control module drives each of the light emitting units to display in a second preset display mode, and returns to the step C.
  • the invention adopts a plurality of display modules including a main control module in a landscape decorative lamp system, and the plurality of display modules acquire display data from the controller in parallel, and are connected in a one-time manner in a series-by-stage transmission manner.
  • the display module performs address coding operation. If the main control module in one display module fails, the main control module in the other display modules can normally encode data according to the saved address and display data acquired from the controller.
  • Corresponding display which solves the problem that the existing decorative lighting system fails to connect the received display data in series, and the subsequent decorative lights are not normal due to the failure of the driving chip of one or more decorative lights. The problem of work.
  • FIG. 1 is a structural view of a landscape decorative light system according to an embodiment of the present invention.
  • FIG. 2 is a flowchart of implementing an address coding and display control method for a landscape decorative light system according to an embodiment of the present invention
  • FIG. 3 is an internal structural diagram of a main control module of a display module in a landscape decorative light system according to a first embodiment of the present invention
  • FIG. 4 is an internal structural diagram of a main control chip in the main control module shown in FIG. 3;
  • FIG. 5 is an internal structural diagram of a main control module of a display module in a landscape decorative light system according to a second embodiment of the present invention.
  • FIG. 6 is an internal structural diagram of a main control chip in the main control module shown in FIG. 5;
  • FIG. 7 is an internal structural diagram of a main control module of a display module in a landscape decorative light system according to a third embodiment of the present invention.
  • FIG. 8 is an internal structural diagram of a main control module of a display module in a landscape decorative light system according to a fourth embodiment of the present invention.
  • FIG. 9 is an internal structural diagram of a main control chip according to the first embodiment and the third embodiment of the present invention when a voltage stabilizing unit is included;
  • Fig. 10 is a view showing the internal structure of the main control chip of the second embodiment and the fourth embodiment of the present invention when the voltage stabilizing unit is included.
  • FIG. 1 shows the structure of a landscape decorative light system according to an embodiment of the present invention. For the convenience of description, only parts related to the present invention are shown, which are described in detail as follows:
  • the landscape decorative light system comprises a controller 100 and n display modules (L 1 ⁇ L n ), n is a positive integer greater than 1, and the controller 100 is configured to output an address coded signal and display data, each The address coded signals received by the display module correspond to one display data, and each display module includes one or more light emitting units 201.
  • the light emitting unit 201 may be composed of a red light LED, a green light LED and a blue light LED, and the red light LED
  • the common junction formed by the anode of the anode, the anode of the green LED and the anode of the blue LED is used as the input end of the light emitting unit 201, the cathode of the red LED, the cathode of the green LED, and the cathode of the blue LED as the light emitting unit 201, respectively.
  • the first output terminal, the second output terminal, and the third output terminal; in other embodiments of the present invention, the light emitting unit 201 may also be composed of a single color LED, for example, a red LED.
  • each display module is connected to the power supply 300 (which may be a DC power supply or an AC power supply, and its output voltage is 5V ⁇ 24V), and the display data receiving end of each display module is connected to the display data end of the controller 100.
  • the power supply 300 which may be a DC power supply or an AC power supply, and its output voltage is 5V ⁇ 24V
  • the display data receiving end of each display module is connected to the display data end of the controller 100.
  • the address code input terminal of the first display module L1 is connected to the address coded signal terminal of the controller 100; in the second display module L 2 to the nth L n in the display module, the address code inputs of the n display module is connected to L n of the n-1 L n-1 display module coded address output terminal, a first display module address from which L 1 coding the received input address encoded signal encoded obtaining address data and transmits to the second display module via its address output of the address code encoded data L 2, and so on, from the second display mode
  • the group L 2 is sequentially transferred to the nth display module L n in steps .
  • Each display module further includes a main control module 202; a common contact formed by the power supply end of the main control module 202 and the input end of each of the illumination units 201 is used as a power supply end of the display module, and an address input of the main control module 202
  • the terminal, the display data terminal and the address output terminal are respectively an address code input end, a display data receiving end and an address code output end of the display module, and an output end of each light emitting unit 201 is connected to the main control module 202.
  • the main control module 202 drives each of the light-emitting units 201 to display in a first preset display mode upon power-on. When only valid display data is received, the main control module 202 correspondingly saves the address-coded data and the display data. Each of the light emitting units 201 is driven to perform display.
  • the main control module 202 drives each of the light emitting units 201 to display in the first preset display mode.
  • the main control module 202 When valid display data is not received, but a valid address coded signal is received, the main control module 202 performs an address code write operation according to the address coded signal to save the address coded data, and successfully completes the address code write operation.
  • Each of the light emitting units 201 is driven to display in a second preset display mode.
  • each display module further includes a first capacitor C1, and the first capacitor C1 is connected between the power terminal of the main control module 202 and the ground.
  • the landscape decorative light system includes a plurality of decorative lights, and the number of display modules and the number of main control modules included in each decorative light are also determined by specific circumstances, for example:
  • the display module includes three illumination units, and one main control module can drive three illumination units for display. If six illumination units are required in each decorative light (such as a guardrail tube), n display modules are required. (L 1 ⁇ L n ) is divided into n/2 groups, that is, every two display modules constitute a strip-shaped decorative light, so the entire landscape decorative light system includes n/2 decorative lights.
  • FIG. 2 shows an implementation flow of the above address encoding and display control method, which is as follows:
  • step S1 each display module obtains power supply from the power source 300.
  • step S2 the main control module 202 in each display module drives each of the light emitting units 201 to display in the first preset display mode.
  • step S3 the main control module 202 determines whether valid display data is received, and if yes, performs steps. S4, No, step S2 and step S5 are simultaneously performed.
  • step S4 the main control module 202 drives each of the light emitting units 201 to perform display based on the saved address encoded data and the valid display data.
  • step S5 the main control module 202 determines whether a valid address coded signal is received. If yes, step S6 is performed. If no, the process returns to step S2.
  • step S6 the main control module 202 performs an address encoding write operation according to the valid address encoding signal to save the address encoded data, and determines whether the address encoding write operation is successfully completed. S7, NO, returns to step S5.
  • step S7 the main control module 202 drives each of the light emitting units 201 to display in the second preset display mode, and returns to the step S3.
  • step S3 if a valid address coded signal is received, the valid address coded signal is regarded as an invalid interference signal, and the display module does not perform an address code write operation according to the valid address coded signal;
  • the controller 100 transmits the display data, the display data is transmitted in the form of a differential signal or a TTL level signal; the first preset display mode and the second preset display mode are two different illumination modes.
  • the light-emitting display mode may be a light-emitting display mode such as a monochromatic light display mode, an extinguishing mode, or a multi-color light mixed display mode, and the monochrome light display mode is that the light-emitting unit performs light-emitting display only in one color; the extinguishing mode is a light-emitting unit.
  • the multi-color light mixed display mode is that the light-emitting unit is mixed with a plurality of colors to display a light-emitting display, such as red, green, and blue.
  • the first preset display mode and the second preset display mode may be the same type of illumination display modes with different illumination effects, for example, if the first preset display mode and the second preset display mode are both monochromatic light display modes, Then, when the first preset display mode is the blue light display mode, the second preset display mode may be any monochromatic light display mode other than blue light.
  • the first preset display mode and the second preset display mode may also be two different types of light-emitting display modes, for example, the first preset display mode and the second preset display mode are respectively an extinguishing mode and a multi-color light mixed display mode. (red, green, blue mixed).
  • the landscape decorative light system is powered on again after being powered off, and is displayed in the first preset display mode. If the valid display data is received first, the display module is saved according to the saved The address coded data and the valid display data drive each of the light emitting units 201 for display. In the process, the saved address coded data is actually saved by the display module successfully completing the address code write operation before powering off.
  • the address coded data which can be used to drive each of the light-emitting units 201 to display directly according to the effective display data, and does not need to repeat the address code write operation every time the power is turned on, and if the controller 100 receives the valid When the address is encoded, the display module will re-encode the address to save the new address-encoded data.
  • the main control module 202 is further described below in conjunction with specific embodiments:
  • the main control module 202 includes:
  • the input end of the voltage regulator chip U2 serves as the power supply end of the main control module 202.
  • the output end of the voltage regulator chip U2 and the first end of the second capacitor C2 are connected to the power supply pin VCC of the main control chip U1, and the second capacitor C2 The second end is connected to the grounding pin GND of the main control chip U1 to the ground.
  • the address input pin ADRI of the main control chip U1 is the address input end of the main control module 202, and the first end of the first resistor R1 is connected to the data of the main control chip U1.
  • the input terminal DAI, the second end of the first resistor R1 is the display data end of the main control module 202, and the output pins (OUT_R, OUT_G, OUT_B) of the main control chip U1 are connected to the output end of each of the light emitting units 201 (the first output end)
  • the second output terminal and the third output terminal) the address output pin ADRO of the main control chip U1 is the address output end of the main control module 202.
  • the voltage regulator chip U2 is used to regulate the input DC power (such as DC voltage of 12V ⁇ 24V) to output 5V DC power to the main control chip U1, and the voltage regulator chip U2 can be a voltage regulator of the model 7805. Device.
  • the main control module 202 can further include a second resistor R2 connected between the output end of the voltage stabilizing chip U2 and the power supply pin VCC of the main control chip U1.
  • the main control module 202 may further include a third capacitor C3 connected between the data input pin DAI of the main control chip U1 and the ground.
  • the main control module 202 may further include a third resistor R3 connected between the data input pin DAI of the main control chip U1 and the ground.
  • the main control module 202 can further include a fourth resistor R4 connected between the address input pin ADRI of the main control chip U1 and the address input end of the main control module 202.
  • the main control module 202 may further include a fifth resistor R5 connected to the address output pin ADRO of the main control chip U1 and the address output end of the main control module 202.
  • the main control module 202 is based on the main control chip U1, the voltage regulator chip U2, the second capacitor C2, and the first resistor R1.
  • the main control module 202 may further include One or more of the above-described second resistor R2, third capacitor C3, third capacitor C3, and third resistor R3, fourth resistor R4, and fifth resistor R5 are each distinguished by a broken line frame in FIG.
  • the main control chip U1 includes:
  • the input end of the display data receiving unit 21 is used as the data input pin DAI of the main control chip U1, and the display data input end and the address input end of the display data decoding unit 22 are respectively connected to the output end of the display data receiving unit 21 and the address code storage unit 28.
  • the input end and the clock end of the signal modulating unit 23 are respectively connected to the output end of the display data decoding unit 22 and the output end of the clock unit 24, and the input end of the LED driving unit 25 is connected to the output end of the signal modulating unit 23, and the LED driving unit Multiple outputs of 25 as the master chip
  • the plurality of output pins of U1 ie, OUT_R, OUT_G, OUT_B described above
  • the input end of the address code receiving unit 26 serves as the address input pin ADRI of the master chip U1, the input terminal of the address code decoding unit 27, and the first address output terminal.
  • the output end of the address code receiving unit 26 and the input end of the address code storage unit 28 are respectively connected, the input end of the address code transmitting unit 29 is connected to the second address output end of the address code decoding unit 27, and the output end of the address code transmitting unit 29 is used as The address output pin ADRO of the master chip U1.
  • the display data receiving unit 21 performs filtering processing on the interference signal contained in the received display data, and the display data decoding unit 22 encodes the display data outputted by the display data receiving unit 21 and the address stored in the address encoding storage unit 28.
  • the data is subjected to decoding and comparison analysis. If the display data is valid, the display data decoding unit 22 outputs a display signal, and then the signal modulation unit 23 performs pulse frequency modulation processing or pulse width modulation on the display signal according to the clock signal provided by the clock unit 24.
  • the display driving signal is output, and the LED driving unit 25 drives each of the light emitting units 201 to perform display according to the display driving signal, and the address encoding receiving unit 26 performs filtering processing on the interference signal contained in the received address encoded signal, and the address encoding
  • the decoding unit 27 performs address decoding processing on the address encoded signal output from the address encoding receiving unit 26, and if the address encoded signal is valid, the address encoding and decoding unit 27 outputs address encoded data, and the address encoding storage unit 28 stores the address encoded data, and Address code
  • the address unit 29 transmits the encoded data.
  • the display data is sent by the controller 100 in the form of a TTL level signal. Therefore, the main control chip U1 only needs to be received through a data input pin DAI. Accordingly, the display data receiving unit 21 has only one. Input.
  • the address code storage unit 28 is a nonvolatile memory such as EEPROM (Electrically Erasable Programmable Read-Only Memory, FLASH (Flash) or OTPROM (One Time) Programmable Read Only Memory, one-time programmable read only memory);
  • the clock unit 24 is a clock oscillation circuit with a crystal oscillator as a core for outputting a clock signal having a fixed period.
  • the main control module 202 includes:
  • the input end of the voltage regulator chip U2 serves as the power supply end of the main control module 202.
  • the output end of the voltage regulator chip U2 and the first end of the second capacitor C2 are connected to the power supply pin VCC of the main control chip U1, and the second capacitor C2
  • the two ends are connected to the ground pin GND of the main control chip U1
  • the address input pin ADRI of the main control chip U1 is the address input end of the main control module 202
  • the first end of the first resistor R1 and the second resistor R2 are One end is respectively connected to the first data input pin DAI_A and the second data input pin DAI_B of the main control chip U1, and the second end of the first resistor R1 and the second end of the second resistor R2 constitute the display data end of the main control module 202
  • Output pin of the main control chip U1 ( OUT_R, OUT_G, OUT_B) are connected to the output ends (the first output end, the second output end, and the third output end) of each
  • the voltage regulator chip U2 is used to regulate the input DC power (such as DC voltage of 12V ⁇ 24V) to output 5V DC power to the main control chip U1, and the voltage regulator chip U2 can be a voltage regulator of the model 7805. Device.
  • the main control module 202 may further include a third resistor R3 connected between the output end of the voltage stabilizing chip U2 and the power supply pin VCC of the main control chip U1.
  • the main control module 202 can further include a fourth resistor R4 connected between the address input pin ADRI of the main control chip U1 and the address input end of the main control module 202.
  • the main control module 202 may further include a fifth resistor R5 connected to the address output pin ADRO of the main control chip U1 and the address output end of the main control module 202.
  • the main control module 202 is based on the main control chip U1, the voltage regulator chip U2, the second capacitor C2, the first resistor R1, and the second resistor R2, and is mainly controlled according to actual application conditions.
  • Module The 202 may further include one or more of the third resistor R3, the fourth resistor R4, and the fifth resistor R5 described above, all of which are distinguished by a dashed box in FIG.
  • the main control chip U1 includes:
  • the first input end and the second input end of the display data receiving unit 21 respectively serve as a first data input pin DAI_A and a second data input pin DAI_B of the main control chip U1, and display data input terminals and address input ends of the data decoding unit 22
  • the output end of the display data receiving unit 21 and the output end of the address code storage unit 28 are respectively connected.
  • the input end and the clock end of the signal modulating unit 23 are respectively connected to the output end of the display data decoding unit 22 and the output end of the clock unit 24, and the LED drive
  • the input end of the unit 25 is connected to the output end of the signal modulating unit 23, and the plurality of output ends of the LED driving unit 25 serve as a plurality of output pins of the main control chip U1 (ie, OUT_R, OUT_G, OUT_B described above), and the address code receiving unit 26
  • the input end serves as the address input pin ADRI of the main control chip U1
  • the input end of the address code decoding unit 27 and the first address output end are respectively connected to the output end of the address code receiving unit 26 and the input end of the address code storage unit 28, and the address code is transmitted.
  • the input of unit 29 is connected to the second address output of address code decoding unit 27, and the output of address code transmitting unit 29 is made. Master chip U1 address output pin ADRO.
  • the display data is transmitted by the controller 100 in the form of a differential signal, it is necessary to receive the display data by the first data input pin DAI_A and the second data input pin DAI_B of the main control chip U1.
  • the display data receiving unit 21 then has two inputs.
  • the working principle and other circuit units inside the main control chip U1 shown in FIG. 6 are the same as the main control chip U1 shown in FIG. 4, and therefore will not be described again.
  • the main control module 202 includes:
  • the first end of the first resistor R1 is the power supply end of the main control module 202, and the second end of the first resistor R1 and the first end of the second capacitor C2 are connected to the power supply pin VCC of the main control chip U1, and the second capacitor C2
  • the second end of the main control chip U1 is connected to the ground pin GND of the main control chip U1
  • the address input pin ADRI of the main control chip U1 is the address input end of the main control module 202
  • the first end of the second resistor R2 is connected to the main control chip U1.
  • the data input pin DAI, the second end of the second resistor R2 is the display data end of the main control module 202, and the output pins (OUT_R, OUT_G, OUT_B) of the main control chip U1 are connected to the output end of each of the light-emitting units 201 (first The output terminal, the second output terminal and the third output terminal), the address output pin ADRO of the main control chip U1 is the address output end of the main control module 202.
  • the main control module 202 may further include a third capacitor C3 connected between the data input pin DAI of the main control chip U1 and the ground.
  • the main control module 202 may further include a third resistor R3 connected between the data input pin DAI of the main control chip U1 and the ground.
  • the main control module 202 can further include a fourth resistor R4 connected between the address input pin ADRI of the main control chip U1 and the address input end of the main control module 202.
  • the main control module 202 may further include a fifth resistor R5 connected to the address output pin ADRO of the main control chip U1 and the address output end of the main control module 202.
  • the main control module 202 is based on the main control chip U1, the second capacitor C2, the first resistor R1, and the second resistor R2, and the main control module 202 may further include One or more of the above-described third capacitor C3, third capacitor C3, and third resistor R3, fourth resistor R4, and fifth resistor R5 are each distinguished by a broken line frame in FIG.
  • the internal structure of the main control chip U1 is the same as that of the main control chip U1 provided by the first embodiment of the present invention, so the working principle is also the same, and therefore will not be described again.
  • the display data is sent by the controller 100 in the form of a TTL level signal. Therefore, the main control chip U1 only needs to be received through a data input pin DAI. Accordingly, the display data receiving unit 21 has only one. Input.
  • the main control module 202 includes:
  • the first end of the first resistor R1 is the power supply end of the main control module 202, and the second end of the first resistor R1 and the first end of the second capacitor C2 are connected to the power supply pin VCC of the main control chip U1, and the second capacitor C2
  • the second end is connected to the ground pin GND of the main control chip U1
  • the address input pin ADRI of the main control chip U1 is the address input end of the main control module 202
  • the first end of the second resistor R2 and the third resistor R3 The first end of the second control circuit U1 is connected to the first data input pin DAI_A and the second data input pin DAI_B, and the second end of the second resistor R2 and the second end of the third resistor R3 constitute display data of the main control module 202.
  • the output pin of the main control chip U1 ( OUT_R, OUT_G, OUT_B) are connected to the output ends (the first output end, the second output end, and the third output end) of each of the light emitting units 201, and the address output pin ADRO of the main control chip U1 is the address output end of the main control module 202. .
  • the main control module 202 can further include a fourth resistor R4 connected between the address input pin ADRI of the main control chip U1 and the address input end of the main control module 202.
  • the main control module 202 may further include a fifth resistor R5 connected to the address output pin ADRO of the main control chip U1 and the address output end of the main control module 202.
  • the main control module 202 is based on the main control chip U1, the second capacitor C2, the first resistor R1, the second resistor R2, and the third resistor R3, and is controlled according to actual application conditions.
  • Module The 202 may also include the fourth resistor R4 and/or the fifth resistor R5 described above, all of which are distinguished by a dashed box in FIG.
  • the internal structure of the main control chip U1 is the same as that of the main control chip U1 provided by the second embodiment of the present invention, so the working principle is also the same, and therefore will not be described again.
  • the display data is transmitted by the controller 100 in the form of a differential signal, it is necessary to receive the display data by the first data input pin DAI_A and the second data input pin DAI_B of the main control chip U1.
  • the display data receiving unit 21 then has two inputs.
  • the main control chip U1 may further include a voltage stabilizing unit 30.
  • the input end of the voltage stabilizing unit 30 serves as the power supply pin VCC of the main control chip U1, and the output of the voltage stabilizing unit 30.
  • the terminal connection display data receiving unit 21, the display data decoding unit 22, the signal modulation unit 23, the clock unit 24, The LED drive unit 25, the address code receiving unit 26, the address code decoding unit 27, the address code storage unit 28, and the address code transmitting unit 29.
  • the main control chip U1 of the first embodiment and the third embodiment of the present invention is internal when the voltage stabilizing unit 30 is included.
  • the structure of the main control chip U1 of the second embodiment and the fourth embodiment of the present invention includes the same as the internal structure of the main control chip U1 provided by the second embodiment of the present invention.
  • Voltage regulator unit The internal structure at 30 o'clock is shown in Figure 10.
  • the voltage stabilizing unit 30 performs voltage stabilization processing on the input voltage, and outputs the data receiving unit 21, the display data decoding unit 22, the signal modulating unit 23, the clock unit 24, the LED driving unit 25, the address encoding receiving unit 26, and the address encoding.
  • Decoding unit 27, address encoding storage unit 28, and address encoding transmitting unit 29 provides power.
  • the embodiment of the present invention adopts a plurality of display modules including the main control module 202 in the landscape decorative light system, and the plurality of display modules acquire display data from the controller in parallel, and are cascaded in series.
  • the transmission method performs address coding operation on multiple display modules at one time. If the main control module in one display module fails, the main control module in other display modules can normally encode data according to the saved address. And the display data obtained from the controller is correspondingly displayed, thereby solving the problem that the existing landscape decorative light system fails to drive the serially and stepwise transmission of the received display data, because one or more of the decorative lights of the decorative chip fails The problem that the subsequent decorative lights are not working properly.

Landscapes

  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

本发明属于景观装饰灯控制技术领域,提供了一种景观装饰灯系统及其地址编码与显示控制方法。本发明通过在景观装饰灯系统中采用多个包括主控模块的显示模组,多个显示模组以并联的方式从控制器获取显示数据,并以串联逐级传送的方式一次性地对多个显示模组进行地址编码操作,如果某一个显示模组中的主控模块失效,则其他显示模组中的主控模块能够正常地根据已保存的地址编码数据以及从控制器获取的显示数据实现相应的显示,从而解决了现有的景观装饰灯系统在对所接收到的显示数据进行串联逐级传送时,因其中一个或多个装饰灯的驱动芯片失效而导致后续的装饰灯无法正常工作的问题。

Description

一种景观装饰灯系统及其地址编码与显示控制方法 技术领域
本发明属于景观装饰灯控制技术领域,尤其涉及一种景观装饰灯系统及其地址编码与显示控制方法。
背景技术
目前,现有的景观装饰灯系统中包括多个装饰灯,每个装饰灯中包含多个像素点,每个像素点由红、绿、蓝三种颜色的LED或者单色LED组成,所有的装饰灯采用串联方式从首个装饰灯开始逐个往后传输显示数据,以达到驱动每个装饰灯进行显示的目的,在传输显示数据的过程中,是由每个装饰灯中的驱动芯片对所接收的显示数据进行放大处理后传送给下一个装饰灯。然而,在上述对显示数据进行传送的过程中,如果景观装饰灯系统中的某个装饰灯的驱动芯片失效,则会使后续的装饰灯因无法获得显示数据而不能正常工作。因此,现有的景观装饰灯系统在对所接收到的的显示数据进行串联逐级传送时,存在因其中一个或多个装饰灯的驱动芯片失效而导致后续的装饰灯无法正常工作的问题。
技术问题
本发明的目的在于提供一种景观装饰灯系统,旨在解决现有的景观装饰灯系统在对所接收到的的显示数据进行串联逐级传送时,因其中一个或多个装饰灯的驱动芯片失效而导致后续的装饰灯无法正常工作的问题。
技术解决方案
本发明是这样实现的,一种景观装饰灯系统,包括控制器和n个显示模组,n为大于1的正整数,所述控制器用于输出地址编码信号和显示数据,每个所述显示模组所接收到的地址编码信号对应一个显示数据,每个所述显示模组包含有一个或多个发光单元;
每个所述显示模组的电源端均连接电源,每个所述显示模组的显示数据接收端均连接所述控制器的显示数据端;
在所述n个显示模组中,第1个显示模组的地址编码输入端连接所述控制器的地址编码信号端;在第2个显示模组至第n个显示模组中,第n个显示模组的地址编码输入端连接第n-1个显示模组的地址编码输出端,所述第1个显示模组从其地址编码输入端所接收到的地址编码信号中获取地址编码数据,并通过其地址编码输出端传送所述地址编码数据至所述第2个显示模组,并依此类推,从所述第2个显示模组逐级传送至所述第n个显示模组;
每个所述显示模组还包括主控模块;所述主控模块的电源端与每个所述发光单元的输入端共接所形成的共接点作为所述显示模组的电源端,所述主控模块的地址输入端、显示数据端及地址输出端分别为所述显示模组的地址编码输入端、显示数据接收端及地址编码输出端,每个所述发光单元的输出端连接所述主控模块;
所述主控模块在上电时驱动每个所述发光单元以第一预设显示模式进行显示,当只接收到有效的显示数据时,所述主控模块根据已保存的地址编码数据和有效的显示数据相应地驱动每个所述发光单元进行显示;当未接收到有效的显示数据和地址编码信号时,所述主控模块驱动每个所述发光单元以所述第一预设显示模式进行显示;当未接收到有效的显示数据,但接收到有效的地址编码信号时,所述主控模块根据有效的地址编码信号进行地址编码写入操作以保存地址编码数据,并在成功完成地址编码写入操作时驱动每个所述发光单元以第二预设显示模式进行显示。
本发明的另一目的还在于提供一种基于上述景观装饰灯系统的地址编码与显示控制方法,所述地址编码与显示控制方法包括以下步骤:
A.每个显示模组从电源获取供电以上电工作;
B.每个显示模组中的主控模块驱动所述显示模组中的每个发光单元以第一预设显示模式进行显示;
C.所述主控模块判断是否接收到有效的显示数据,是,则执行步骤D,否,则同时执行所述步骤B和步骤E;
D.所述主控模块根据已保存的地址编码数据和有效的显示数据驱动每个发光单元进行显示;
E.所述主控模块判断是否接收到有效的地址编码信号,是,则执行步骤F,否,则返回所述步骤B;
F.所述主控模块根据有效的地址编码信号进行地址编码写入操作以保存地址编码数据,并判断是否成功完成地址编码写入操作,是,则执行步骤G,否,则返回所述步骤E;
G.所述主控模块驱动每个发光单元以第二预设显示模式进行显示,并返回所述步骤C。
有益效果
本发明通过在景观装饰灯系统中采用多个包括主控模块的显示模组,多个显示模组以并联的方式从控制器获取显示数据,并以串联逐级传送的方式一次性地对多个显示模组进行地址编码操作,如果某一个显示模组中的主控模块失效,则其他显示模组中的主控模块能够正常地根据已保存的地址编码数据以及从控制器获取的显示数据进行相应的显示,从而解决了现有的景观装饰灯系统在对所接收到的显示数据进行串联逐级传送时,因其中一个或多个装饰灯的驱动芯片失效而导致后续的装饰灯无法正常工作的问题。
附图说明
图1是本发明实施例提供的景观装饰灯系统的结构图;
图2是本发明实施例提供的景观装饰灯系统的地址编码与显示控制方法的实现流程图;
图3是本发明第一实施例提供的景观装饰灯系统中的显示模组的主控模块的内部结构图;
图4是图3所示的主控模块中的主控芯片的内部结构图;
图5是本发明第二实施例提供的景观装饰灯系统中的显示模组的主控模块的内部结构图;
图6是图5所示的主控模块中的主控芯片的内部结构图;
图7是本发明第三实施例提供的景观装饰灯系统中的显示模组的主控模块的内部结构图;
图8是本发明第四实施例提供的景观装饰灯系统中的显示模组的主控模块的内部结构图;
图9是本发明第一实施例和第三实施例的主控芯片在包含稳压单元时的内部结构图;
图10是本发明第二实施例和第四实施例的主控芯片在包含稳压单元时的内部结构图。
本发明的实施方式
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
图1示出了本发明实施例提供的景观装饰灯系统的结构,为了便于说明,仅示出了与本发明相关的部分,详述如下:
本发明实施例提供的景观装饰灯系统包括控制器100和n个显示模组(L1~Ln),n为大于1的正整数,控制器100用于输出地址编码信号和显示数据,每个显示模组所接收到的地址编码信号对应一个显示数据,每个显示模组包含有一个或多个发光单元201,发光单元201可由红光LED、绿光LED及蓝光LED组成,红光LED的阳极、绿光LED的阳极以及蓝光LED的阳极共接所形成的共接点作为发光单元201的输入端,红光LED的阴极、绿光LED的阴极以及蓝光LED的阴极分别作为发光单元201的第一输出端、第二输出端及第三输出端;在本发明其他实施例中,发光单元201也可以是由单色LED组成,例如由红光LED组成。
每个显示模组的电源端均连接电源300(可以是直流电源或交流电源,其输出电压为5V~24V),每个显示模组的显示数据接收端均连接控制器100的显示数据端。
在n个显示模组(L1~Ln)中,第1个显示模组L1的地址编码输入端连接控制器 100的地址编码信号端;在第2个显示模组L2至第n个显示模组Ln中,第n个显示模组Ln的地址编码输入端连接第n-1个显示模组Ln-1的地址编码输出端,第1个显示模组L1从其地址编码输入端所接收到的地址编码信号中获取地址编码数据,并通过其地址编码输出端将该地址编码数据传送至第2个显示模组L2,并依此类推,从第2个显示模组L2依次逐级传送至第n个显示模组Ln
每个显示模组还包括主控模块202;主控模块202的电源端与每个发光单元201的输入端共接所形成的共接点作为显示模组的电源端,主控模块202的地址输入端、显示数据端及地址输出端分别为显示模组的地址编码输入端、显示数据接收端及地址编码输出端,每个发光单元201的输出端连接主控模块202。
主控模块202在上电时驱动每个发光单元201以第一预设显示模式进行显示,当只接收到有效的显示数据时,主控模块202根据已保存的地址编码数据和显示数据相应地驱动每个发光单元201进行显示。
当未接收到有效的显示数据和地址编码信号时,主控模块202驱动每个发光单元201以第一预设显示模式进行显示。
当未接收到有效的显示数据,但接收到有效的地址编码信号时,主控模块202根据该地址编码信号进行地址编码写入操作以保存地址编码数据,并在成功完成地址编码写入操作时驱动每个发光单元201以第二预设显示模式进行显示。
在本发明实施例中,每个显示模组还包括第一电容C1,第一电容C1连接于主控模块202的电源端与地之间。
在实际应用中,景观装饰灯系统是包括多个装饰灯的,而每个装饰灯中所包含的显示模组的个数及主控模块的个数也是因具体情况而定,例如:假设每个显示模组包含3个发光单元,一个主控模块可以驱动3个发光单元进行显示,如果需要在每个装饰灯(如护栏管)中设置6个发光单元,则需要将n个显示模组(L1~Ln)分成n/2组,即每两个显示模组构成一个带状装饰灯,所以整个景观装饰灯系统就包括n/2个装饰灯。
以下结合本发明实施例提供的基于上述景观装饰灯系统的地址编码与显示控制方法对上述的景观装饰灯系统作进一步说明:
图2示出了上述的地址编码与显示控制方法的实现流程,具体如下:
在步骤S1中,每个显示模组从电源300获得供电以上电工作。
在步骤S2中,每个显示模组中的主控模块202驱动每个发光单元201以第一预设显示模式进行显示。
在步骤S3中,主控模块202判断是否接收到有效的显示数据,是,则执行步骤 S4,否,则同时执行步骤S2和步骤S5。
在步骤S4中,主控模块202根据已保存的地址编码数据和有效的显示数据驱动每个发光单元201进行显示。
在步骤S5中,主控模块202判断是否接收到有效的地址编码信号,是,则执行步骤S6,否,则返回步骤S2。
在步骤S6中,主控模块202根据有效的地址编码信号进行地址编码写入操作以保存地址编码数据,并判断是否成功完成地址编码写入操作,是,则执行步骤 S7,否,则返回步骤S5。
在步骤S7中,主控模块202驱动每个发光单元201以第二预设显示模式进行显示,并返回所述步骤S3。
在执行上述步骤S3时,如果接收到有效的地址编码信号,则会将该有效的地址编码信号视为无效的干扰信号,显示模组不根据该有效的地址编码信号进行地址编码写入操作;控制器100发送上述的显示数据时,显示数据以差分信号或者TTL电平信号的形式进行发送;上述的第一预设显示模式与第二预设显示模式是两种发光效果不同的发光显示模式,此发光显示模式可以是单色光显示模式、熄灭模式或者多色光混合显示模式等发光显示模式,单色光显示模式即是发光单元仅以一种颜色进行发光显示;熄灭模式即是发光单元不发光;多色光混合显示模式即是发光单元以多种颜色混合发光显示,如红、绿、蓝三种颜色混合发光。
第一预设显示模式和第二预设显示模式可以是同类型但发光效果不同的发光显示模式,例如:如果第一预设显示模式和第二预设显示模式均为单色光显示模式,则当第一预设显示模式为蓝光显示模式时,第二预设显示模式可以是除了蓝光之外的任何一种单色光显示模式。
第一预设显示模式和第二预设显示模式也可以分别是两种不同类型的发光显示模式,例如第一预设显示模式和第二预设显示模式分别为熄灭模式和多色光混合显示模式(红、绿、蓝混合)。
从上述地址编码与显示控制方法可知,景观装饰灯系统在断电后重新上电,并以第一预设显示模式进行显示,如果先接收到有效的显示数据,则显示模组会根据已保存的地址编码数据和该有效的显示数据驱动每个发光单元201进行显示,在此过程中,已保存的地址编码数据实际上就是显示模组在断电之前成功完成地址编码写入操作所保存的地址编码数据,这就可以在每次上电时不需要重复进行地址编码写入操作,直接根据有效的显示数据驱动每个发光单元201进行显示,而如果接收到控制器100所发出的有效的地址编码信号,则显示模组会重新进行地址编码写入操作以保存新的地址编码数据。
以下结合具体实施例对主控模块202作进一步说明:
实施例1:
如图3所示,主控模块202包括:
主控芯片U1、稳压芯片U2、第二电容C2以及第一电阻R1;
稳压芯片U2的输入端作为主控模块202的电源端,稳压芯片U2的输出端与第二电容C2的第一端共接于主控芯片U1的电源脚VCC,第二电容C2的第二端与主控芯片U1的接地脚GND共接于地,主控芯片U1的地址输入脚ADRI为主控模块202的地址输入端,第一电阻R1的第一端连接主控芯片U1的数据输入脚DAI,第一电阻R1的第二端为主控模块202的显示数据端,主控芯片U1的输出脚(OUT_R、OUT_G、OUT_B)连接每个发光单元201的输出端(第一输出端、第二输出端及第三输出端),主控芯片U1的地址输出脚ADRO为主控模块202的地址输出端。其中,稳压芯片U2用于将输入的直流电(如电压为12V~24V的直流电)进行稳压处理以输出5V直流电为主控芯片U1供电,稳压芯片U2具体可以是型号为7805的稳压器。
主控模块202还可以包括第二电阻R2,第二电阻R2连接于稳压芯片U2的输出端与主控芯片U1的电源脚VCC之间。
主控模块202还可以包括第三电容C3,第三电容C3连接于主控芯片U1的数据输入脚DAI与地之间。在主控模块202包含上述第三电容C3的情况下,主控模块202还可以包括第三电阻R3,第三电阻R3连接于主控芯片U1的数据输入脚DAI与地之间。主控模块202还可以包括第四电阻R4,第四电阻R4连接于主控芯片U1的地址输入脚ADRI与主控模块202的地址输入端之间。
主控模块202还可以包括第五电阻R5,第五电阻R5连接于主控芯片U1的地址输出脚ADRO与主控模块202的地址输出端。
在本实施例中,主控模块202是在包含主控芯片U1、稳压芯片U2、第二电容C2以及第一电阻R1的基础上,根据实际应用情况的不同,主控模块202还可以包括上述的第二电阻R2、第三电容C3、第三电容C3和第三电阻R3、第四电阻R4以及第五电阻R5中的一种或多种,均在图3中以虚线框进行区分。
如图4所示,主控芯片U1包括:
显示数据接收单元21、显示数据解码单元22、信号调制单元23、时钟单元24、LED驱动单元25、地址编码接收单元26、地址编码解码单元27、地址编码存储单元28以及地址编码发送单元29。
显示数据接收单元21的输入端作为主控芯片U1的数据输入脚DAI,显示数据解码单元22的显示数据输入端和地址输入端分别连接显示数据接收单元21的输出端和地址编码存储单元28的输出端,信号调制单元23的输入端和时钟端分别连接显示数据解码单元22的输出端和时钟单元24的输出端,LED驱动单元25的输入端连接信号调制单元23的输出端,LED驱动单元25的多个输出端作为主控芯片 U1的多个输出脚(即上述的OUT_R、OUT_G、OUT_B),地址编码接收单元26的输入端作为主控芯片U1的地址输入脚ADRI,地址编码解码单元27的输入端和第一地址输出端分别连接地址编码接收单元26的输出端和地址编码存储单元28的输入端,地址编码发送单元29的输入端连接地址编码解码单元27的第二地址输出端,地址编码发送单元29的输出端作为主控芯片U1的地址输出脚ADRO。
显示数据接收单元21对接收到的显示数据中所夹杂的干扰信号进行滤除处理,显示数据解码单元22将显示数据接收单元21所输出的显示数据与地址编码存储单元28中所存储的地址编码数据进行解码对比分析,如果显示数据有效,则显示数据解码单元22输出显示信号,再由信号调制单元23根据时钟单元24所提供的时钟信号,对该显示信号进行脉冲频率调制处理或脉冲宽度调制处理后输出显示驱动信号,LED驱动单元25根据该显示驱动信号驱动每个发光单元201进行显示,地址编码接收单元26对接收到的地址编码信号中所夹杂的干扰信号进行滤除处理,地址编码解码单元27对地址编码接收单元26输出的地址编码信号进行地址解码处理,如果地址编码信号有效,则地址编码解码单元27输出地址编码数据,地址编码存储单元28将该地址编码数据进行存储,且地址编码发送单元29将该地址编码数据进行发送。
其中,显示数据是由控制器100以TTL电平信号的形式进行发送的,所以主控芯片U1只需要通过一个数据输入脚DAI进行接收即可,相应地,显示数据接收单元21也就只有一个输入端。
在上述显示数据解码单元22进行解码对比分析的过程中,如果显示数据无效,则不输出显示信号;在上述地址编码解码单元27进行地址解码处理的过程中,如果地址编码信号无效,则不输出地址编码数据。
在上述的主控芯片U1中,地址编码存储单元28是非易失性存储器,如EEPROM( Electrically Erasable Programmable Read-Only Memory,电可擦可编程只读存储器)、FLASH(闪存)或OTPROM(One Time Programmable Read Only Memory,一次性可编程只读存储器);时钟单元24是以晶振为核心的时钟振荡电路,用于输出具有固定周期的时钟信号。
实施例2:
如图5所示,主控模块202包括:
主控芯片U1、稳压芯片U2、第二电容C2、第一电阻R1及第二电阻R2;
稳压芯片U2的输入端作为主控模块202的电源端,稳压芯片U2的输出端与第二电容C2的第一端共接于主控芯片U1的电源脚VCC,第二电容C2的第二端与主控芯片U1的接地脚GND共接于地,主控芯片U1的地址输入脚ADRI为主控模块202的地址输入端,第一电阻R1的第一端和第二电阻R2的第一端分别连接主控芯片U1的第一数据输入脚DAI_A和第二数据输入脚DAI_B,第一电阻R1的第二端和第二电阻R2的第二端构成主控模块202的显示数据端,主控芯片U1的输出脚( OUT_R、OUT_G、OUT_B)连接每个发光单元201的输出端(第一输出端、第二输出端及第三输出端),主控芯片U1的地址输出脚ADRO为主控模块202的地址输出端。其中,稳压芯片U2用于将输入的直流电(如电压为12V~24V的直流电)进行稳压处理以输出5V直流电为主控芯片U1供电,稳压芯片U2具体可以是型号为7805的稳压器。
主控模块202还可以包括第三电阻R3,第三电阻R3连接于稳压芯片U2的输出端与主控芯片U1的电源脚VCC之间。
主控模块202还可以包括第四电阻R4,第四电阻R4连接于主控芯片U1的地址输入脚ADRI与主控模块202的地址输入端之间。
主控模块202还可以包括第五电阻R5,第五电阻R5连接于主控芯片U1的地址输出脚ADRO与主控模块202的地址输出端。
在本实施例中,主控模块202是在包含主控芯片U1、稳压芯片U2、第二电容C2、第一电阻R1以及第二电阻R2的基础上,根据实际应用情况的不同,主控模块 202还可以包括上述的第三电阻R3、第四电阻R4以及第五电阻R5中的一种或多种,均在图5中以虚线框进行区分。
如图6所示,主控芯片U1包括:
显示数据接收单元21、显示数据解码单元22、信号调制单元23、时钟单元24、LED驱动单元25、地址编码接收单元26、地址编码解码单元27、地址编码存储单元28以及地址编码发送单元29。
显示数据接收单元21的第一输入端和第二输入端分别作为主控芯片U1的第一数据输入脚DAI_A和第二数据输入脚DAI_B,显示数据解码单元22的显示数据输入端和地址输入端分别连接显示数据接收单元21的输出端和地址编码存储单元28的输出端,信号调制单元23的输入端和时钟端分别连接显示数据解码单元22的输出端和时钟单元24的输出端,LED驱动单元25的输入端连接信号调制单元23的输出端,LED驱动单元25的多个输出端作为主控芯片U1的多个输出脚(即上述的OUT_R、OUT_G、OUT_B),地址编码接收单元26的输入端作为主控芯片U1的地址输入脚ADRI,地址编码解码单元27的输入端和第一地址输出端分别连接地址编码接收单元26的输出端和地址编码存储单元28的输入端,地址编码发送单元29的输入端连接地址编码解码单元27的第二地址输出端,地址编码发送单元29的输出端作为主控芯片U1的地址输出脚ADRO。
在本实施例中,由于显示数据是由控制器100以差分信号的形式进行发送的,所以需要由主控芯片U1的第一数据输入脚DAI_A和第二数据输入脚DAI_B对显示数据进行接收,则显示数据接收单元21也就随之具备两个输入端。除此之外,图6所示的主控芯片U1内部的工作原理和其他电路单元均与图4所示的主控芯片U1相同,因此不再赘述。
实施例3:
如图7所示,主控模块202包括:
主控芯片U1、第二电容C2、第一电阻R1以及第二电阻R2;
第一电阻R1的第一端作为主控模块202的电源端,第一电阻R1的第二端与第二电容C2的第一端共接于主控芯片U1的电源脚VCC,第二电容C2的第二端与主控芯片U1的接地脚GND共接于地,主控芯片U1的地址输入脚ADRI为主控模块202的地址输入端,第二电阻R2的第一端连接主控芯片U1的数据输入脚DAI,第二电阻R2的第二端为主控模块202的显示数据端,主控芯片U1的输出脚(OUT_R、OUT_G、OUT_B)连接每个发光单元201的输出端(第一输出端、第二输出端及第三输出端),主控芯片U1的地址输出脚ADRO为主控模块202的地址输出端。
主控模块202还可以包括第三电容C3,第三电容C3连接于主控芯片U1的数据输入脚DAI与地之间。在主控模块202包含上述第三电容C3的情况下,主控模块202还可以包括第三电阻R3,第三电阻R3连接于主控芯片U1的数据输入脚DAI与地之间。
主控模块202还可以包括第四电阻R4,第四电阻R4连接于主控芯片U1的地址输入脚ADRI与主控模块202的地址输入端之间。
主控模块202还可以包括第五电阻R5,第五电阻R5连接于主控芯片U1的地址输出脚ADRO与主控模块202的地址输出端。
在本实施例中,主控模块202是在包含主控芯片U1、第二电容C2、第一电阻R1以及第二电阻R2的基础上,根据实际应用情况的不同,主控模块202还可以包括上述的第三电容C3、第三电容C3和第三电阻R3、第四电阻R4以及第五电阻R5中的一种或多种,均在图7中以虚线框进行区分。
在本实施例中,主控芯片U1的内部结构与本发明第一实施例所提供的主控芯片U1相同,所以工作原理也相同,因此不再赘述。
其中,显示数据是由控制器100以TTL电平信号的形式进行发送的,所以主控芯片U1只需要通过一个数据输入脚DAI进行接收即可,相应地,显示数据接收单元21也就只有一个输入端。
实施例4:
如图8所示,主控模块202包括:
主控芯片U1、第二电容C2、第一电阻R1、第二电阻R2以及第三电阻R3;
第一电阻R1的第一端作为主控模块202的电源端,第一电阻R1的第二端与第二电容C2的第一端共接于主控芯片U1的电源脚VCC,第二电容C2的第二端与主控芯片U1的接地脚GND共接于地,主控芯片U1的地址输入脚ADRI为主控模块202的地址输入端,第二电阻R2的第一端和第三电阻R3的第一端分别连接主控芯片U1的第一数据输入脚DAI_A和第二数据输入脚DAI_B,第二电阻R2的第二端和第三电阻R3的第二端构成主控模块202的显示数据端,主控芯片U1的输出脚( OUT_R、OUT_G、OUT_B)连接每个发光单元201的输出端(第一输出端、第二输出端及第三输出端),主控芯片U1的地址输出脚ADRO为主控模块202的地址输出端。
主控模块202还可以包括第四电阻R4,第四电阻R4连接于主控芯片U1的地址输入脚ADRI与主控模块202的地址输入端之间。
主控模块202还可以包括第五电阻R5,第五电阻R5连接于主控芯片U1的地址输出脚ADRO与主控模块202的地址输出端。
在本实施例中,主控模块202是在包含主控芯片U1、第二电容C2、第一电阻R1、第二电阻R2以及第三电阻R3的基础上,根据实际应用情况的不同,主控模块 202还可以包括上述的第四电阻R4和/或第五电阻R5,均在图8中以虚线框进行区分。
在本实施例中,主控芯片U1的内部结构与本发明第二实施例所提供的主控芯片U1相同,所以工作原理也相同,因此不再赘述。
在本实施例中,由于显示数据是由控制器100以差分信号的形式进行发送的,所以需要由主控芯片U1的第一数据输入脚DAI_A和第二数据输入脚DAI_B对显示数据进行接收,则显示数据接收单元21也就随之具备两个输入端。
在本发明第一实施例至第四实施例中,主控芯片U1还可以包括一稳压单元30,稳压单元30的输入端作为主控芯片U1的电源脚VCC,稳压单元30的输出端连接显示数据接收单元21、显示数据解码单元22、信号调制单元23、时钟单元24、 LED驱动单元25、地址编码接收单元26、地址编码解码单元27、地址编码存储单元28以及地址编码发送单元29。
由于本发明第一实施例与第三实施例所提供的主控芯片U1的内部结构相同,所以本发明第一实施例与第三实施例的主控芯片U1在包含稳压单元30时的内部结构如图9所示;而由于本发明第二实施例与第四实施例所提供的主控芯片U1的内部结构相同,所以本发明第二实施例与第四实施例的主控芯片U1包含稳压单元 30时的内部结构如图10所示。
稳压单元30将输入电压进行稳压处理后输出,并为显示数据接收单元21、显示数据解码单元22、信号调制单元23、时钟单元24、LED驱动单元25、地址编码接收单元26、地址编码解码单元27、地址编码存储单元28以及地址编码发送单元 29提供电源。
综上所述,本发明实施例通过在景观装饰灯系统中采用多个包括主控模块202的显示模组,多个显示模组以并联的方式从控制器获取显示数据,并以串联逐级传送的方式一次性地对多个显示模组进行地址编码操作,如果某一个显示模组中的主控模块失效,则其他显示模组中的主控模块能够正常地根据已保存的地址编码数据以及从控制器获取的显示数据进行相应的显示,从而解决了现有的景观装饰灯系统在对所接收到的显示数据进行串联逐级传送时,因其中一个或多个装饰灯的驱动芯片失效而导致后续的装饰灯无法正常工作的问题。
以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。

Claims (10)

  1. 一种景观装饰灯系统,包括控制器和n个显示模组,n为大于1的正整数,所述控制器用于输出地址编码信号和显示数据,每个所述显示模组所接收到的地址编码信号对应一个显示数据,每个所述显示模组包含有一个或多个发光单元;其特征在于:
    每个所述显示模组的电源端均连接电源,每个所述显示模组的显示数据接收端均连接所述控制器的显示数据端;
    在所述n个显示模组中,第1个显示模组的地址编码输入端连接所述控制器的地址编码信号端;在第2个显示模组至第n个显示模组中,第n个显示模组的地址编码输入端连接第n-1个显示模组的地址编码输出端,所述第1个显示模组从其地址编码输入端所接收到的地址编码信号中获取地址编码数据,并通过其地址编码输出端传送所述地址编码数据至所述第2个显示模组,并依此类推,从所述第2个显示模组逐级传送至所述第n个显示模组;
    每个所述显示模组还包括主控模块;所述主控模块的电源端与每个所述发光单元的输入端共接所形成的共接点作为所述显示模组的电源端,所述主控模块的地址输入端、显示数据端及地址输出端分别为所述显示模组的地址编码输入端、显示数据接收端及地址编码输出端,每个所述发光单元的输出端连接所述主控模块;
    所述主控模块在上电时驱动每个所述发光单元以第一预设显示模式进行显示,当只接收到有效的显示数据时,所述主控模块根据已保存的地址编码数据和有效的显示数据相应地驱动每个所述发光单元进行显示;当未接收到有效的显示数据和地址编码信号时,所述主控模块驱动每个所述发光单元以所述第一预设显示模式进行显示;当未接收到有效的显示数据,但接收到有效的地址编码信号时,所述主控模块根据有效的地址编码信号进行地址编码写入操作以保存地址编码数据,并在成功完成地址编码写入操作时驱动每个所述发光单元以第二预设显示模式进行显示。
  2. 如权利要求1所述的景观装饰灯系统,其特征在于,所述显示数据是由所述控制器以TTL电平信号的形式进行发送的;
    所述主控模块包括:
    主控芯片、稳压芯片、第二电容C2以及第一电阻R1;
    所述稳压芯片的输入端作为所述主控模块的电源端,所述稳压芯片的输出端与所述第二电容C2的第一端共接于所述主控芯片的电源脚,所述第二电容C2的第二端与所述主控芯片的接地脚共接于地,所述主控芯片的地址输入脚为所述主控模块的地址输入端,所述第一电阻R1的第一端连接所述主控芯片的数据输入脚,所述第一电阻R1的第二端为所述主控模块的显示数据端,所述主控芯片的输出脚连接每个发光单元的输出端,所述主控芯片的地址输出脚为所述主控模块的地址输出端。
  3. 如权利要求1所述的景观装饰灯系统,其特征在于,所述显示数据是由所述控制器以差分信号的形式进行发送的;
    所述主控模块包括:
    主控芯片、稳压芯片、第二电容C2、第一电阻R1及第二电阻R2;
    所述稳压芯片的输入端作为所述主控模块的电源端,所述稳压芯片的输出端与所述第二电容C2的第一端共接于所述主控芯片的电源脚,所述第二电容C2的第二端与所述主控芯片的接地脚共接于地,所述主控芯片的地址输入脚为所述主控模块的地址输入端,所述第一电阻R1的第一端和所述第二电阻R2的第一端分别连接所述主控芯片的第一数据输入脚和第二数据输入脚,所述第一电阻 R1的第二端和所述第二电阻R2的第二端构成所述主控模块的显示数据端,所述主控芯片的输出脚连接每个发光单元的输出端,所述主控芯片的地址输出脚为所述主控模块的地址输出端。
  4. 如权利要求1所述的景观装饰灯系统,其特征在于,所述显示数据是由所述控制器以TTL电平信号的形式进行发送的;
    所述主控模块包括:
    主控芯片、第二电容C2、第一电阻R1以及第二电阻R2;
    所述第一电阻R1的第一端作为所述主控模块的电源端,所述第一电阻R1的第二端与所述第二电容C2的第一端共接于所述主控芯片的电源脚,所述第二电容C2的第二端与所述主控芯片的接地脚共接于地,所述主控芯片的地址输入脚为所述主控模块的地址输入端,所述第二电阻的第一端连接所述主控芯片的数据输入脚,所述第二电阻R2的第二端为所述主控模块的显示数据端,所述主控芯片的输出脚连接每个发光单元的输出端,所述主控芯片的地址输出脚为所述主控模块的地址输出端。
  5. 如权利要求1所述的景观装饰灯系统,其特征在于,所述显示数据是由所述控制器以差分信号的形式进行发送的;
    所述主控模块包括:
    主控芯片、第二电容C2、第一电阻R1、第二电阻R2以及第三电阻R3;
    所述第一电阻R1的第一端作为所述主控模块的电源端,所述第一电阻R1的第二端与所述第二电容C2的第一端共接于所述主控芯片的电源脚,所述第二电容C2的第二端与所述主控芯片的接地脚共接于地,所述主控芯片的地址输入脚为所述主控模块的地址输入端,所述第二电阻R2的第一端和所述第三电阻R3的第一端分别连接所述主控芯片的第一数据输入脚和第二数据输入脚,所述第二电阻R2的第二端和所述第三电阻R3的第二端构成所述主控模块的显示数据端,所述主控芯片的输出脚连接每个发光单元的输出端,所述主控芯片的地址输出脚为所述主控模块的地址输出端。
  6. 如权利要求2或4所述的景观装饰灯系统,其特征在于,所述主控芯片包括:
    显示数据接收单元、显示数据解码单元、信号调制单元、时钟单元、LED驱动单元、地址编码接收单元、地址编码解码单元、地址编码存储单元以及地址编码发送单元;
    所述显示数据接收单元的输入端作为所述主控芯片的数据输入脚,所述显示数据解码单元的显示数据输入端和地址输入端分别连接所述显示数据接收单元的输出端和所述地址编码存储单元的输出端,所述信号调制单元的输入端和时钟端分别连接所述显示数据解码单元的输出端和所述时钟单元的输出端,所述LED驱动单元的输入端连接所述信号调制单元的输出端,所述LED驱动单元的多个输出端作为所述主控芯片的多个输出脚,所述地址编码接收单元的输入端作为所述主控芯片的地址输入脚,所述地址编码解码单元的输入端和第一地址输出端分别连接所述地址编码接收单元的输出端和所述地址编码存储单元的输入端,所述地址编码发送单元的输入端连接所述地址编码解码单元的第二地址输出端,所述地址编码发送单元的输出端作为所述主控芯片的地址输出脚;
    所述显示数据接收单元对接收到的显示数据中所夹杂的干扰信号进行滤除处理,所述显示数据解码单元将所述显示数据接收单元所输出的显示数据与所述地址编码存储单元中所存储的地址编码数据进行解码对比分析,如果显示数据有效,则所述显示数据解码单元输出显示信号,再由所述信号调制单元根据所述时钟单元所提供的时钟信号,对所述显示信号进行脉冲频率调制处理或脉冲宽度调制处理后输出显示驱动信号,所述LED驱动单元根据该显示驱动信号驱动每个发光单元进行显示,所述地址编码接收单元对接收到的地址编码信号中所夹杂的干扰信号进行滤除处理,所述地址编码解码单元对地址编码接收单元输出的地址编码信号进行地址解码处理,如果所述地址编码信号有效,则所述地址编码解码单元输出地址编码数据,所述地址编码存储单元将该地址编码数据进行存储,且所述地址编码发送单元将该地址编码数据进行发送。
  7. 如权利要求3或5所述的景观装饰灯系统,其特征在于,所述主控芯片包括:
    显示数据接收单元、显示数据解码单元、信号调制单元、时钟单元、LED驱动单元、地址编码接收单元、地址编码解码单元、地址编码存储单元以及地址编码发送单元;
    显示数据接收单元的第一输入端和第二输入端分别作为所述主控芯片的第一数据输入脚和第二数据输入脚,所述显示数据解码单元的显示数据输入端和地址输入端分别连接所述显示数据接收单元的输出端和所述地址编码存储单元的输出端,所述信号调制单元的输入端和时钟端分别连接所述显示数据解码单元的输出端和所述时钟单元的输出端,所述LED驱动单元的输入端连接所述信号调制单元的输出端,所述LED驱动单元的多个输出端作为所述主控芯片的多个输出脚,所述地址编码接收单元的输入端作为所述主控芯片的地址输入脚,所述地址编码解码单元的输入端和第一地址输出端分别连接所述地址编码接收单元的输出端和所述地址编码存储单元的输入端,所述地址编码发送单元的输入端连接所述地址编码解码单元的第二地址输出端,所述地址编码发送单元的输出端作为所述主控芯片的地址输出脚;
    所述显示数据接收单元对接收到的显示数据中所夹杂的干扰信号进行滤除处理,所述显示数据解码单元将所述显示数据接收单元所输出的显示数据与所述地址编码存储单元中所存储的地址编码数据进行解码对比分析,如果显示数据有效,则所述显示数据解码单元输出显示信号,再由所述信号调制单元根据所述时钟单元所提供的时钟信号,对所述显示信号进行脉冲频率调制处理或脉冲宽度调制处理后输出显示驱动信号,所述LED驱动单元根据该显示驱动信号驱动每个发光单元进行显示,所述地址编码接收单元对接收到的地址编码信号中所夹杂的干扰信号进行滤除处理,所述地址编码解码单元对地址编码接收单元输出的地址编码信号进行地址解码处理,如果所述地址编码信号有效,则所述地址编码解码单元输出地址编码数据,所述地址编码存储单元将该地址编码数据进行存储,且所述地址编码发送单元将该地址编码数据进行发送。
  8. 如权利要求6或7所述的景观装饰灯系统,其特征在于,所述主控芯片还包括稳压单元;
    所述稳压单元的输入端作为所述主控芯片的电源脚,所述稳压单元的输出端连接所述显示数据接收单元、所述显示数据解码单元、所述信号调制单元、所述时钟单元、所述LED驱动单元、所述地址编码接收单元、所述地址编码解码单元、所述地址编码存储单元以及所述地址编码发送单元;
    所述稳压单元将输入电压进行稳压处理后输出,并为所述显示数据接收单元、所述显示数据解码单元、所述信号调制单元、所述时钟单元、所述LED驱动单元、所述地址编码接收单元、所述地址编码解码单元、所述地址编码存储单元以及所述地址编码发送单元提供电源。
  9. 如权利要求6或7所述的景观装饰灯系统,其特征在于,所述地址编码存储单元为非易失性存储器,所述非易失性存储器为EEPROM、FLASH或者OTPROM。
  10. 一种基于如权利要求1所述景观装饰灯系统的地址编码与显示控制方法,其特征在于,所述地址编码与显示控制方法包括以下步骤:
    A.每个显示模组从电源获得供电以上电工作;
    B.每个显示模组中的主控模块驱动所述显示模组中的每个发光单元以第一预设显示模式进行显示;
    C.所述主控模块判断是否接收到有效的显示数据,是,则执行步骤D,否,则同时执行所述步骤B和步骤E;
    D.所述主控模块根据已保存的地址编码数据和有效的显示数据驱动每个发光单元进行显示;
    E.所述主控模块判断是否接收到有效的地址编码信号,是,则执行步骤F,否,则返回所述步骤B;
    F.所述主控模块根据有效的地址编码信号进行地址编码写入操作以保存地址编码数据,并判断是否成功完成地址编码写入操作,是,则执行步骤G,否,则返回所述步骤E;
    G.所述主控模块驱动每个发光单元以第二预设显示模式进行显示,并返回所述步骤C。
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