WO2015024342A1 - 数据传输装置、数据传输方法及显示装置 - Google Patents
数据传输装置、数据传输方法及显示装置 Download PDFInfo
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- WO2015024342A1 WO2015024342A1 PCT/CN2013/089521 CN2013089521W WO2015024342A1 WO 2015024342 A1 WO2015024342 A1 WO 2015024342A1 CN 2013089521 W CN2013089521 W CN 2013089521W WO 2015024342 A1 WO2015024342 A1 WO 2015024342A1
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
Definitions
- Data transmission device data transmission method and display device
- the present invention relates to the field of display technologies, and in particular, to a data transmission device, a data transmission method, and a display device to which the data transmission device is applied. Background technique
- a signal transmission method of a display device such as a liquid crystal display (LCD) is generally a low voltage differential signal.
- LVDS transmission mode is a digital interface standard developed for image transmission.
- the input and output levels of signals are LVDS.
- V-By-0ne interface technology is an interface technology that can transmit data at high speed with the development of low-voltage differential signaling technology.
- the multi-channel V-By-One interface module mainly includes a receiving end RX and a transmitting end TX.
- the receiving end RX and the transmitting end TX in the multi-channel V-By-One module pass the control signal Lockn, the hot plug detection signal HTPDN and the plurality of pairs of data signals (each of the plurality of channels corresponds to a plurality of pairs)
- a pair of data lines in the data line) constitutes a communication network.
- V-By-One interface unit In the prior art, the most basic multi-channel V-By-One interface unit is four channels.
- the V-By-One interface unit includes a control signal Lockn, a hot plug detection signal HTPDN, and a four channel data signal (ie, four channels respectively correspond to four pairs of data signals).
- the eight-way or sixteen-channel V-By-One interface module is constructed by connecting multiple four-channel V-By-One interface units in parallel.
- a control signal Lockn controls all timing of the channel (or channel group) to achieve different data transmissions at different times. That is to say, multiple control signals Lockn are provided for multiple channels, but this may bring instability of signal transmission.
- Figure 1 shows the basic control timing diagram and output waveform. Can It is found that there may be an unsynchronization between the respective control signals Lockn 1 to Lockn (N+1) (for example, FIG.
- a data transmission apparatus including a multi-channel V-By-One interface module includes: a receiving end, a transmitting end, and a receiving end A buffer module between the sender and the sender.
- the receiving end transmits a plurality of control signals to the buffer module for a plurality of channels.
- the buffer module sends a low level control signal to the transmitting end when the received plurality of control signals are all low.
- the transmitting end starts transmitting data after receiving the one low level control signal.
- the multi-channel V-By-One interface module may include a plurality of parallel multi-channel V-By-One interface units, and each multi-channel V-By-One interface unit includes a respective receiving end and a transmitting end.
- the receiving end of each multi-channel V-By-One interface unit constitutes a receiving end of the multi-channel V-By-One interface module, and the transmitting end of each multi-channel V-By-One interface unit constitutes the multi-channel V- The sender of the By-One interface module.
- the buffer module may include a buffer unit.
- the buffer module may include a plurality of buffer unit stages, and the number of buffer units in each buffer unit level is decremented.
- Each buffer unit in the first buffer unit stage is connected to the receiving end of the multi-channel V-By-One interface module, and the last buffer unit level
- the number of buffer units is one buffer unit, and the one buffer unit is connected to the transmitting end of the multi-channel V-By-One interface module.
- One or more buffer units in each buffer unit stage send a low level control signal to a buffer unit in the next buffer unit stage or to the plurality of buffer units when all of the received control signals are low level
- the transmitter of the channel V-By-One interface module is a plurality of buffer unit stages, and the number of buffer units in each buffer unit level is decremented.
- Each buffer unit in the first buffer unit stage is connected to the receiving end of the multi-channel V-By-One interface module, and the last buffer unit level
- the number of buffer units is one buffer unit, and the one buffer unit is connected to the transmitting
- the plurality of buffer unit stages may be two buffer unit stages.
- Each buffer unit in the first buffer unit stage is connected to the receiving end of the multi-channel V-By-One interface module, the number of buffer units in the second buffer unit stage is a buffer unit, and the one buffer unit is The transmitting end of the multi-channel V-By-One interface module is connected.
- Each buffer unit in the first buffer unit stage respectively sends a low level control signal to the one buffer unit in the second buffer unit stage when all the received control signals are low level.
- the one buffering unit in the second buffer unit stage sends a low level control signal to the sending of the multi-channel V-By-One interface module when all the received control signals are low level end.
- the buffer unit may include an OR circuit.
- the multi-channel V-By-One interface unit may be a four-channel V-By-One interface unit, and the receiving end of the multi-channel V-By-One interface module is for each four-channel V-By- The four channels of the One interface unit send a control signal.
- a data transmission method based on a multi-channel V-By-One interface module includes a receiving end, a transmitting end, and a receiving end. a buffer module with the transmitting end, the method comprising the steps of: the receiving end transmitting a plurality of control signals to the buffer module for a plurality of channels; the buffering module receiving the plurality of control signals A low level control signal is sent to the transmitting end when both are low level; and the transmitting end starts transmitting data after receiving the one low level control signal.
- a display device including the above data transmission device is provided.
- the data transmission device is connected through a multi-channel V-By-One
- a buffer module is disposed between the receiving end and the transmitting end of the port module, so that when all control signals sent to the buffer module by the receiving end for each channel are low level, the buffer module sends a low level control signal to the transmitting end, When the transmitting end receives the low level control signal, the transmitting end simultaneously sends the output data corresponding to each channel, so that all the output data are synchronized in time, thereby avoiding abnormal display of the picture and enhancing the picture display quality. Finally, the effect of optimizing and improving the user experience is achieved.
- FIG. 1 is a schematic diagram of control timing and output waveforms of a data transmission device in the prior art
- FIG. 2 is a block diagram of a data transmission apparatus including a multi-channel V-By-One interface module according to an embodiment of the present invention
- FIG. 3 is a schematic diagram showing the circuit structure of the data transmission device of FIG. 2;
- FIG. 4 is a schematic diagram showing control timing and output waveforms of the data transmission apparatus of FIG. 2.
- FIG. 5 is a block diagram showing a data transmission apparatus including a multi-channel V-By-One interface module according to another embodiment of the present invention. detailed description
- FIG. 2 is a block diagram of a data transmission apparatus including a multi-channel V-By-One interface module according to an embodiment of the present invention
- FIG. 3 is a circuit diagram of the data transmission apparatus of FIG.
- the data transmission apparatus mainly includes a multi-channel V-By-One interface module.
- the multi-channel V-By-One interface module may include only one of the most basic four-channel V-By-One interface units.
- the multi-channel V-By-One interface module may include only one other type of multi-channel V-By-One interface unit, for example, an eight-channel V-By-One interface unit or a sixteen-channel V. -By-One interface unit, and so on.
- the multi-channel V-By-One interface module may include a receiving end RX, a transmitting end TX, and A buffer module is provided between the receiving end RX and the transmitting end TX.
- the receiving end RX sends a plurality of control signals Lockn to the buffer module for a plurality of channels.
- the buffer module sends a low level control signal to the transmitting terminal TX.
- the transmitting end TX simultaneously transmits the output data corresponding to each channel, so that all the output data are synchronized in time, avoiding abnormal display of the picture, enhancing the display quality of the picture, and finally Achieve optimization to improve the user experience.
- a control signal L 0 ckn is transmitted between the receiving end RX and the transmitting end TX.
- the receiving end RX sets the control signal Lockn low before preparing to receive data.
- the transmitter TX can switch from the Clock Data Recovery (CDR) training mode to the normal mode and start transmitting data.
- CDR Clock Data Recovery
- the present invention is proposed based on the V-By-One interface standard described above, that is, a buffer module is disposed between the receiving end RX and the transmitting end of the multi-channel V-By-One interface module, and the receiving end RX is targeted before preparing to receive data. Multiple control signals Lockn of multiple channels are set low. When all the control signals Lockn input to the buffer module are low, a low level control signal is sent by the buffer module to the transmitting terminal TX.
- the buffer module can be implemented by an OR gate circuit.
- the respective inputs of the OR circuit are connected to the receiving end RX of the multi-channel V-By-One interface module, and the output of the OR circuit is connected to the transmitting end of the multi-channel V-By-One interface module.
- Each input terminal of the OR circuit receives a plurality of control signals Lockn for a plurality of channels transmitted from the receiving end RX. In all the received control signals Lockn, if one control signal Lockn is at a high level, then The control signal outputted from the output of the OR circuit is at a high level, so the transmitting terminal TX does not perform data transmission.
- the output of the OR circuit Only when multiple control signals Lockn for multiple channels are low, the output of the OR circuit outputs a low level control signal, so the transmitting terminal TX can receive a low level at the output of the OR gate circuit. After the control signal, the output data corresponding to each channel is simultaneously transmitted, thereby ensuring the synchronization between the data transmissions of the respective channels.
- the buffer module is implemented as an OR circuit.
- the invention is not limited thereto.
- Those skilled in the art can implement the buffer module as a different circuit according to the teachings of the present invention (for example, can be implemented as three NAND gates) as long as it can be implemented as all A low level signal is output when the input signal is all low level.
- FIG. 5 is a block diagram of a data transmission apparatus including a multi-channel V-By-One interface module in accordance with another embodiment of the present invention.
- the data transmission apparatus mainly includes a multi-channel V-By-One interface module.
- the multi-channel V-By-One interface module can include a plurality of parallel multi-channel V-By-One interface units.
- Each multi-channel V-By-One interface unit (for example, a four-channel V-By-One interface unit) includes its own receiver and transmitter.
- the receiving end of each multi-channel V-By-One interface unit constitutes the receiving end of the multi-channel V-By-One interface module, and the transmitting end of each multi-channel V-By-One interface unit constitutes a multi-channel V-By-One interface
- the sender of the module is a multi-channel V-By-One interface.
- a multi-channel V-By-One interface unit for forming a multi-channel V-By-One interface module in parallel may be a four-channel V-By-One interface unit.
- the multi-channel V-By-One interface unit for parallelly forming a multi-channel V-By-One interface module may be other types of multi-channel V-By-One interface units, for example, an eight-channel V-By-One interface unit or Sixteen channel V-By-One interface unit.
- the individual multi-channel V-By-One interface units for parallel formation of multi-channel V-By-One interface modules may be identical or different from one another.
- the buffer module can be an OR circuit.
- the structure and function of the buffer module are similar to those of the buffer module described in the previous embodiments.
- the buffer module may include a plurality of buffer unit stages, and the number of buffer units in each buffer unit stage is decremented.
- Each buffer unit in the first buffer unit stage is connected to the receiving end of the multi-channel V-By-One interface module, the number of buffer units in the last buffer unit stage is one buffer unit, and the one buffer unit and the multi-channel
- the sender of the V-By-One interface module is connected.
- One or more buffer units in each buffer unit stage will have a low power when all control signals received are low
- the flat control signal is sent to the buffer unit in the next buffer unit stage or sent to multiple channels
- the sender of the V-By-0ne interface module The sender of the V-By-0ne interface module.
- the buffer module can include two buffer unit stages. Each buffer unit in the first buffer unit stage is connected to the receiving end of the multi-channel V-By-One interface module, the number of buffer units in the second buffer unit stage is one buffer unit, and the one buffer unit and the multi-channel The sender of the V-By-One interface module is connected. Each buffer unit in the first buffer unit stage respectively transmits a low level control signal to the one buffer unit in the second buffer unit stage when all the received control signals are low level, and the second buffer The one buffer unit in the cell level transmits a low level control signal to the transmitting end of the multi-channel V-By-One interface module when all of the received control signals are low.
- the use of multiple buffer unit levels also enables all output data to be synchronized in time, avoiding improper display of the picture and without reducing the efficiency of data transmission.
- each level of buffer unit has a certain delay when it is working. Therefore, the multi-stage cascade method may delay the delay, increase the delay time, and increase the instability probability of data transmission.
- the buffer unit in this embodiment functions the same as the buffer module in the above embodiment, and therefore the buffer unit is preferably an OR circuit.
- the invention also provides a data transmission method based on a multi-channel V-By-One interface module, which comprises a receiving end, a transmitting end and a buffering module arranged between the receiving end and the transmitting end .
- the method includes the steps of: the receiving end sends a plurality of control signals to the buffer module for the plurality of channels; and the buffering module sends a low level control signal to the transmitting end when the received plurality of control signals are all low level And the transmitting end starts transmitting data after receiving the one low level control signal. This enables all output data to be synchronized in time, avoiding the abnormal display of the picture and enhancing the display quality of the picture.
- the data transmission device can be applied to various display devices.
- the display device may be a liquid crystal display panel, an electronic paper, an Organic Light Emitting Diode (OLED) panel, a liquid crystal television, a liquid crystal display, a digital photo frame, a mobile phone, a tablet computer, or the like having any display function.
- OLED Organic Light Emitting Diode
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Abstract
本发明涉及一种数据传输装置、数据传输方法以及应用该数据传输装置的显示装置。该数据传输装置包括多通道V-By-One接口模块,所述多通道V-By-One接口模块包括接收端、发送端以及设置在接收端与发送端之间的缓冲模块。接收端针对多个通道将多个控制信号发送至缓冲模块。缓冲模块在所接收到的所有控制信号均为低电平时将一个低电平控制信号发送至发送端。发送端在接收到所述一个低电平控制信号时,同时发送与各个通道相对应的输出数据,从而使所有输出数据在时间上同步,避免画面的不正常显示,增强了画面显示质量,最终达到优化改善用户体验的效果。
Description
数据传输装置、 数据传输方法及显示装置
技术领域
本发明涉及显示技术领域, 具体涉及一种数据传输装置、 数据 传输方法以及应用该数据传输装置的显示装置。 背景技术
根据现有技术, 诸如液晶显示器 (Liquid Crystal Display, LCD ) 之类的显示装置的信号传输方式一般为低电压差分信号
( Low-Voltage Differential Signal ing, LVDS ) 传输方式, LVDS 传输方式是专门面向图像传输开发出的数字接口标准,信号的输入输 出水平采用 LVDS。
V-By-0ne接口技术是随着低压差分信号传输技术的发展而新兴 的一种能高速传输数据的接口技术。 多通道 V-By-One接口模块主要 包括接收端 RX和发送端 TX等部分。 多通道 V-By-One模块中的接收 端 RX和发送端 TX, 通过控制信号 Lockn、 热插拔检测信号 HTPDN以 及多个成对的数据信号(多个通道中的每个通道对应于多对数据线中 的一对数据线) 构成通信网络。
在现有技术中, 最基本的多通道 V-By-One 接口单元为四通道
V-By-One接口单元, 其包括控制信号 Lockn、 热插拔检测信号 HTPDN 和四通道数据信号(即, 四个通道分别对应于四对数据信号) 。 八通 道或十六通道 V-By-One 接口模块是通过并联多个四通道 V-By-One 接口单元构成的。
在多通道 V-By-One接口模块进行数据传输时, 可以针对每个通 道或由多个通道构成的一组通道 (例如, 一个四通道 V-By-One接口 单元中的四个通道) 提供一个控制信号 Lockn对该通道 (或通道组) 所有的时序进行控制, 以实现在不同的时间内传输不同的数据。也就 是说, 针对多个通道提供多个控制信号 Lockn, 但是这样可能会带来 信号传输的不稳定性。图 1示出了基本的控制时序图及输出波形。可
以发现, 由于各个控制信号 Lockn 1至 Lockn (N+1)之间可能存在不 同步 (例如, 图 1示出了不同步的控制信号 Lockn (N+1)与控制信号 Lockn 1 ) , 从而导致同一个画面在经过传输后会出现数据不同步的 现象 (例如, 图 1所示的与控制信号 Lockn (N+1)对应的输出波形相 对于与控制信号 Lockn 1对应的输出波形存在延迟 ΔΤ ) 。 发明内容
(一) 要解决的技术问题
本发明的目的在于提供一种包括多通道 V-By-One接口模块的数 据传输装置,以解决现有技术中由于控制信号 Lockn的不同步而导致 的同一个画面在经过传输后出现的数据不同步所造成画面异常显示 问题。此外,本发明还提供了一种通过该数据传输装置实现的数据传 输方法以及包括该数据传输装置的显示装置。
(二) 技术方案
根据本发明的一个方面,提供一种包括多通道 V-By-One接口模 块的数据传输装置, 所述多通道 V-By-One接口模块包括: 接收端、 发送端以及设置在所述接收端与发送端之间的缓冲模块。所述接收端 针对多个通道将多个控制信号发送至所述缓冲模块。所述缓冲模块在 所接收到的所述多个控制信号均为低电平时将一个低电平控制信号 发送至所述发送端。所述发送端在接收到所述一个低电平控制信号后 开始传输数据。
优选的, 所述多通道 V-By-One接口模块可以包括多个并联的多 通道 V-By-One接口单元,每个多通道 V-By-One接口单元包括各自的 接收端和发送端, 各个多通道 V-By-One接口单元的接收端构成所述 多通道 V-By-One接口模块的接收端,并且各个多通道 V-By-One接口 单元的发送端构成所述多通道 V-By-One接口模块的发送端。
优选的, 所述缓冲模块可以包括一个缓冲单元。
可替换的, 所述缓冲模块可以包括多个缓冲单元级, 每个缓冲 单元级中的缓冲单元的数量递减。第一缓冲单元级中的各缓冲单元与 所述多通道 V-By-One接口模块的接收端连接, 最后的缓冲单元级中
的缓冲单元的数量为一个缓冲单元,并且所述一个缓冲单元与所述多 通道 V-By-One接口模块的发送端连接。 每个缓冲单元级中的一个或 多个缓冲单元在所接收到的所有控制信号均为低电平时将一个低电 平控制信号发送至下一个缓冲单元级中的缓冲单元或发送至所述多 通道 V-By-One接口模块的发送端。
在所述缓冲模块包括多个缓冲单元级的情况下, 所述多个缓冲 单元级可以为两个缓冲单元级。第一缓冲单元级中的各缓冲单元与所 述多通道 V-By-One接口模块的接收端连接, 第二缓冲单元级中的缓 冲单元的数量为一个缓冲单元,并且所述一个缓冲单元与所述多通道 V-By-One 接口模块的发送端连接。 所述第一缓冲单元级中的各缓冲 单元在所接收到的所有控制信号均为低电平时分别将一个低电平控 制信号发送至所述第二缓冲单元级中的所述一个缓冲单元,并且所述 第二缓冲单元级中的所述一个缓冲单元在所接收到的所有控制信号 均为低电平时将一个低电平控制信号发送至所述多通道 V-By-One接 口模块的发送端。
优选的, 所述缓冲单元可以包括或门电路。
优选的,所述多通道 V-By-One接口单元可以为四通道 V-By-One 接口单元, 并且所述多通道 V-By-One接口模块的接收端针对每个四 通道 V-By-One接口单元的四个通道发送一个控制信号。
根据本发明的另一个方面提供了一种基于多通道 V-By-One接口 模块的数据传输方法, 所述多通道 V-By-One接口模块包括接收端、 发送端以及设置在所述接收端与发送端之间的缓冲模块,所述方法包 括步骤:所述接收端针对多个通道将多个控制信号发送至所述缓冲模 块;所述缓冲模块在所接收到的所述多个控制信号均为低电平时将一 个低电平控制信号发送至所述发送端;以及所述发送端在接收到所述 一个低电平控制信号后开始传输数据。
根据本发明的另一个方面提供了一种包括上述数据传输装置的 显示装置。
(三) 有益效果
根据本发明所提供的数据传输装置,通过在多通道 V-By-One接
口模块的接收端与发送端之间设置缓冲模块,使得由接收端发送至缓 冲模块的针对各个通道的所有控制信号均为低电平时,由缓冲模块发 送一个低电平控制信号至发送端,当发送端接收到所述一个低电平控 制信号时,发送端同时发送与各个通道相对应的输出数据,从而使所 有输出数据在时间上同步,避免画面的不正常显示,增强了画面显示 质量, 最终达到优化改善用户体验的效果。 附图说明
图 1 是现有技术中的数据传输装置的控制时序及输出波形示意 图;
图 2是根据本发明一个实施例的包括多通道 V-By-One接口模块 的数据传输装置的模块示意图;
图 3是图 2中数据传输装置的电路结构示意图;
图 4是图 2中的数据传输装置的控制时序及输出波形示意图; 图 5是根据本发明另一个实施例的包括多通道 V-By-One接口模 块的数据传输装置的模块示意图。 具体实施方式
下面结合附图和实施例对本发明的具体实施方式做进一步描 述。 以下实施例仅用于说明本发明, 但不用来限制本发明的范围。
图 2是根据本发明一个实施例的包括多通道 V-By-One接口模块 的数据传输装置的模块示意图,图 3是图 2中数据传输装置的电路结 构示意图。
参考图 2和图 3,根据本实施例的数据传输装置主要包括多通道 V-By-One接口模块。 根据本发明的一个实施例, 多通道 V-By-One接 口模块可以仅包括一个最基本的四通道 V-By-One接口单元。 根据本 发明的其他实施例, 多通道 V-By-One接口模块可以仅包括一个其他 类型的多通道 V-By-One接口单元,例如,八通道 V-By-One接口单元 或者十六通道 V-By-One接口单元, 等等。
多通道 V-By-One接口模块可以包括接收端 RX、 发送端 TX以及
设置在接收端 RX与发送端 TX之间的缓冲模块。 接收端 RX针对多个 通道将多个控制信号 Lockn发送至缓冲模块。当所接收到的所有控制 信号 Lockn均为低电平时,缓冲模块将一个低电平控制信号发送至发 送端 TX。 发送端 TX在接收到该低电平控制信号后, 同时发送与各个 通道相对应的输出数据,从而使所有输出数据在时间上同步,避免画 面的不正常显示,增强了画面的显示质量,最终达到优化改善用户体 验的效果。
根据 V-By-0ne接口标准, 在接收端 RX与发送端 TX之间传递控 制信号 L0ckn。 接收端 RX在准备接收数据之前, 将控制信号 Lockn 置为低电平。 在控制信号 Lockn被置为低电平后, 发送端 TX可以从 时钟数据恢复 (Clock Data Recovery, CDR) 训练模式切换至正常模 式并且开始发送数据。基于上述 V-By-One接口标准提出本发明构思, 即,在多通道 V-By-One接口模块的接收端 RX与发送端之间设置缓冲 模块, 接收端 RX在准备接收数据之前, 将针对多个通道的多个控制 信号 Lockn 置为低电平。 当输入至缓冲模块的所有控制信号 Lockn 均为低电平时, 由缓冲模块将一个低电平控制信号发送至发送端 TX。
因此, 缓冲模块可以通过或门电路来实现。 该或门电路的各个 输入端与多通道 V-By-One接口模块的接收端 RX连接,该或门电路的 输出端与多通道 V-By-One接口模块的发送端连接。 或门电路的各个 输入端接收到从接收端 RX 发送的针对多个通道的多个控制信号 Lockn, 在所接收到的所有控制信号 Lockn中, 如果有一个控制信号 Lockn 处于高电平, 则从或门电路的输出端输出的控制信号为高电 平, 因而发送端 TX不进行数据传输。 只有当针对多个通道的多个控 制信号 Lockn均为低电平时,或门电路的输出端才输出低电平控制信 号, 因而发送端 TX可以在从或门电路的输出端接收到低电平控制信 号之后, 同时发送与各个通道相对应的输出数据,从而保证了各个通 道的数据传输之间的同步性。
根据本实施例, 将缓冲模块实现为或门电路。 然而, 本发明不 限于此。本领域技术人员可以根据本发明的指教将缓冲模块实现为不 同的电路(例如, 可以实现为三个与非门) , 只要能够实现当所有的
输入信号全为低电平信号时, 才输出一个低电平信号。
图 4是图 2中的数据传输装置的控制时序及输出波形示意图。 可以明显看出, 各个输出波形之间的延迟 ΔΤ=0, 避免了画面的不正 常显示, 增强了画面的显示质量。
图 5是根据本发明另一个实施例的包括多通道 V-By-One接口模 块的数据传输装置的模块示意图。
参考图 5, 根据本实施例的数据传输装置主要包括多通道 V-By-One接口模块。 根据本实施例, 多通道 V-By-One接口模块可以 包括多个并联的多通道 V-By-One 接口单元。 每个多通道 V-By-One 接口单元 (例如, 四通道 V-By-One接口单元) 包括各自的接收端和 发送端。 各个多通道 V-By-One 接口单元的接收端构成多通道 V-By-One接口模块的接收端,并且各个多通道 V-By-One接口单元的 发送端构成多通道 V-By-One接口模块的发送端。
根据本发明的一个实施例, 用于并联形成多通道 V-By-One接口 模块的多通道 V-By-One接口单元可以是四通道 V-By-One接口单元。 然而, 本发明不限于此。 用于并联形成多通道 V-By-One接口模块的 多通道 V-By-One接口单元可以是其他类型的多通道 V-By-One接口单 元,例如,八通道 V-By-One接口单元或者十六通道 V-By-One接口单 元。 此外, 用于并联形成多通道 V-By-One 接口模块的各个多通道 V-By-One 接口单元可以是彼此相同或不同的。 但是在并联的多通道 V-By-One 接口单元数量过多时, 会存在数据传输不稳定的问题。 所 有多通道 V-By-One接口单元的接收端均连接至缓冲模块。 根据优选 实施例,缓冲模块可以为或门电路。缓冲模块的结构及作用与前述实 施例中所述的缓冲模块相类似。
根据本发明的一个实施例, 缓冲模块可以包括多个缓冲单元级, 每个缓冲单元级中的缓冲单元的数量递减。第一缓冲单元级中的各缓 冲单元与多通道 V-By-One接口模块的接收端连接, 最后的缓冲单元 级中的缓冲单元的数量为一个缓冲单元,并且所述一个缓冲单元与多 通道 V-By-One接口模块的发送端连接。 每个缓冲单元级中的一个或 多个缓冲单元在所接收到的所有控制信号均为低电平时将一个低电
平控制信号发送至下一个缓冲单元级中的缓冲单元或发送至多通道
V-By-0ne接口模块的发送端。
在实际操作中, 当所有控制信号 Lockn均输入至同一个或门电 路时, 由于需要同时处理很多路的控制信号 Lockn, 可能会降低数据 传输效率, 同时也不便于硬件的实施。 因此, 包括多个缓冲单元级的 缓冲模块能够有效避免这样的问题。
参考图 5所示的实施例, 缓冲模块可以包括两个缓冲单元级。 第一缓冲单元级中的各缓冲单元与多通道 V-By-One接口模块的接收 端连接,第二缓冲单元级中的缓冲单元的数量为一个缓冲单元,并且 所述一个缓冲单元与多通道 V-By-One接口模块的发送端连接。 第一 缓冲单元级中的各缓冲单元在所接收到的所有控制信号均为低电平 时分别将一个低电平控制信号发送至第二缓冲单元级中的所述一个 缓冲单元,并且第二缓冲单元级中的所述一个缓冲单元在所接收到的 所有控制信号均为低电平时将一个低电平控制信号发送至多通道 V-By-One接口模块的发送端。
采用多个缓冲单元级的方式也能够使所有的输出数据在时间上 同步, 避免画面的不正常显示, 并且不会降低数据传输的效率。但是 每一级的缓冲单元在工作时,都有一定的延迟,因此多级级联的方式, 可能会使延迟叠加,增大了延迟时间,数据传输的不稳定性概率变大。 本实施例中的缓冲单元与上述实施例中的缓冲模块作用相同,因此缓 冲单元优选为或门电路。
本发明还提供了一种基于多通道 V-By-One接口模块的数据传输 方法, 多通道 V-By-One接口模块包括接收端、 发送端以及设置在接 收端与发送端之间的缓冲模块。该方法包括步骤:接收端针对多个通 道将多个控制信号发送至缓冲模块;缓冲模块在所接收到的所述多个 控制信号均为低电平时将一个低电平控制信号发送至发送端;以及发 送端在接收到所述一个低电平控制信号后开始传输数据。这样就能够 使所有输出数据在时间上同步,避免画面的不正常显示,增强了画面 的显示质量。
根据本发明的数据传输装置可以应用于各种显示装置。 所述显
示装置可以是液晶显示面板、 电子纸、 有机发光二级管 (Organic Light Emitting Diode, OLED) 面板、 液晶电视、 液晶显示器、 数码 相框、 手机、 平板电脑等具有任何显示功能的产品或部件。
以上实施方式仅用于说明本发明, 而并非对本发明的限制, 有 关技术领域的普通技术人员, 在不脱离本发明的精神和范围的情况 下,还可以做出各种变化和变型, 因此所有等同的技术方案也属于本 发明的保护范畴。
Claims
1. 一种包括多通道 V-By-One接口模块的数据传输装置, 所述 多通道 V-By-One接口模块包括:
接收端;
发送端; 以及
设置在所述接收端与发送端之间的缓冲模块,
其中, 所述接收端针对多个通道将多个控制信号发送至所述缓 冲模块,
所述缓冲模块在所接收到的所述多个控制信号均为低电平时将 一个低电平控制信号发送至所述发送端;
所述发送端在接收到所述一个低电平控制信号后开始传输数 据。
2. 根据权利要求 1所述的数据传输装置, 其中,
所述多通道 V-By-One 接口模块包括多个并联的多通道 V-By-One接口单元,每个多通道 V-By-One接口单元包括各自的接收 端和发送端,
各个多通道 V-By-One 接口单元的接收端构成所述多通道 V-By-One接口模块的接收端, 并且
各个多通道 V-By-One 接口单元的发送端构成所述多通道 V-By-One接口模块的发送端。
3. 根据权利要求 1所述的数据传输装置, 其中, 所述缓冲模块 包括一个缓冲单元。
4. 根据权利要求 1所述的数据传输装置, 其中, 所述缓冲模块 包括多个缓冲单元级, 每个缓冲单元级中的缓冲单元的数量递减, 第一缓冲单元级中的各缓冲单元与所述多通道 V-By-One接口模 块的接收端连接,
最后的缓冲单元级中的缓冲单元的数量为一个缓冲单元, 并且 所述一个缓冲单元与所述多通道 V-By-One接口模块的发送端连接, 其中, 每个缓冲单元级中的一个或多个缓冲单元在所接收到的 所有控制信号均为低电平时将一个低电平控制信号发送至下一个缓 冲单元级中的缓冲单元或发送至所述多通道 V-By-One接口模块的发 送端。
5. 根据权利要求 4所述的数据传输装置, 其中, 所述缓冲模块 包括两个缓冲单元级,
第一缓冲单元级中的各缓冲单元与所述多通道 V-By-One接口模 块的接收端连接,
第二缓冲单元级中的缓冲单元的数量为一个缓冲单元, 并且所 述一个缓冲单元与所述多通道 V-By-One接口模块的发送端连接, 其中, 所述第一缓冲单元级中的各缓冲单元在所接收到的所有 控制信号均为低电平时分别将一个低电平控制信号发送至所述第二 缓冲单元级中的所述一个缓冲单元,并且所述第二缓冲单元级中的所 述一个缓冲单元在所接收到的所有控制信号均为低电平时将一个低 电平控制信号发送至所述多通道 V-By-One接口模块的发送端。
6. 根据权利要求 1-5任意一项所述的数据传输装置, 其中, 所 述缓冲单元包括或门电路。
7. 根据权利要求 2 所述的数据传输装置, 其中, 所述多通道 V-By-One 接口单元为四通道 V_By_0ne 接口单元, 并且所述多通道 V-By-One接口模块的接收端针对每个四通道 V-By-One接口单元的四 个通道发送一个控制信号。
8. 一种基于多通道 V-By-One接口模块的数据传输方法, 所述 多通道 V-By-One接口模块包括接收端、 发送端以及设置在所述接收 端与发送端之间的缓冲模块, 所述方法包括步骤:
所述接收端针对多个通道将多个控制信号发送至所述缓冲模 块;
所述缓冲模块在所接收到的所述多个控制信号均为低电平时将 一个低电平控制信号发送至所述发送端; 以及
所述发送端在接收到所述一个低电平控制信号后开始传输数 据。
9. 一种显示装置, 其包括权利要求 1-7任意一项所述的数据传 输装置。
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| CN107957858A (zh) * | 2017-12-25 | 2018-04-24 | 瀚科科技(大连)有限公司 | 一种子母同步显示装置 |
| CN110021253A (zh) * | 2019-04-24 | 2019-07-16 | 晶晨半导体(上海)股份有限公司 | 显示装置的V-by-One信号控制方法及系统 |
| CN113194347A (zh) * | 2020-01-14 | 2021-07-30 | 海信视像科技股份有限公司 | 一种显示设备和多路通道图像内容同步方法 |
| CN113691786A (zh) * | 2020-05-18 | 2021-11-23 | 青岛海信激光显示股份有限公司 | 激光投影系统及其启动方法 |
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