WO2014194599A1 - 抑制PCIe走光纤通信输出噪声的方法、装置及通信节点 - Google Patents

抑制PCIe走光纤通信输出噪声的方法、装置及通信节点 Download PDF

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Publication number
WO2014194599A1
WO2014194599A1 PCT/CN2013/085076 CN2013085076W WO2014194599A1 WO 2014194599 A1 WO2014194599 A1 WO 2014194599A1 CN 2013085076 W CN2013085076 W CN 2013085076W WO 2014194599 A1 WO2014194599 A1 WO 2014194599A1
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WO
WIPO (PCT)
Prior art keywords
optical
signal
optical module
channel
electrical signal
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PCT/CN2013/085076
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English (en)
French (fr)
Inventor
张忠
李胜
胡瑜
葛小宇
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华为技术有限公司
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to AU2013391863A priority Critical patent/AU2013391863B2/en
Priority to EP13886352.7A priority patent/EP2863555A4/en
Priority to KR1020157002752A priority patent/KR101647336B1/ko
Priority to JP2015526873A priority patent/JP6175709B2/ja
Priority to CN201380001816.XA priority patent/CN103688478B/zh
Publication of WO2014194599A1 publication Critical patent/WO2014194599A1/zh
Priority to US14/957,621 priority patent/US9735871B2/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/25Arrangements specific to fibre transmission
    • H04B10/2507Arrangements specific to fibre transmission for the reduction or elimination of distortion or dispersion
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/07Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems
    • H04B10/075Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal
    • H04B10/079Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
    • H04B10/0795Performance monitoring; Measurement of transmission parameters
    • H04B10/07955Monitoring or measuring power
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/07Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems
    • H04B10/075Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal
    • H04B10/079Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
    • H04B10/0799Monitoring line transmitter or line receiver equipment
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/25Arrangements specific to fibre transmission
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/50Transmitters
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/80Optical aspects relating to the use of optical transmission for specific applications, not provided for in groups H04B10/03 - H04B10/70, e.g. optical power feeding or optical transmission through water
    • H04B10/801Optical aspects relating to the use of optical transmission for specific applications, not provided for in groups H04B10/03 - H04B10/70, e.g. optical power feeding or optical transmission through water using optical interconnects, e.g. light coupled isolators, circuit board interconnections
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0024Peripheral component interconnect [PCI]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2210/00Indexing scheme relating to optical transmission systems
    • H04B2210/07Monitoring an optical transmission system using a supervisory signal

Definitions

  • the present invention relates to the field of optical fiber communication technologies, and in particular, to a method, a device, and a communication node for suppressing high-speed peripheral device interconnection (PCIe) from optical fiber communication output noise.
  • PCIe peripheral device interconnection
  • the PCIe bus is a high-performance system bus for use on computers and communication platforms.
  • the communication states of the two communicating parties based on the PCIe bus are defined. Since the transmitting end and the receiving end of the two communicating parties are connected by a cable, the differential mode voltage of the transmitting end is substantially the same as the differential mode voltage of the receiving end. If the differential mode voltage of the receiving end is below 65mV (millivolts), the receiving end confirms that the transmitting end is in an electrical idle state. If the differential mode voltage of the receiving end is between 65mV and 175mV, the receiving end confirms that the transmitting end sends a noise signal. If the differential mode voltage at the receiving end is above 175 mV, the receiving end confirms that the normal signal is received and decodes the signal.
  • the optical fiber can be used to connect the transmitting end and the receiving end in the prior art. Since the transmitting end outputs an electrical signal, it is necessary to separately set the light at the transmitting end and the receiving end.
  • the module, the optical module at the transmitting end converts the electrical signal into an optical signal, and after the optical signal is transmitted to the receiving end, the optical module of the receiving end converts the optical signal into an electrical signal.
  • the differential mode voltage of the transmitting end is less than 65mV
  • the differential mode voltage received by the receiving end may be greater than 175mV due to the light-emitting characteristics of the optical module, so that the transmitting end is in an electrical idle state, or output. In the case of noise, the fiber communication is abnormal.
  • the embodiment of the invention provides a method, a device and a communication node for suppressing PCIe output optical fiber communication output noise, so as to solve the problem in the prior art that the transmitting end is in an electrical idle state or output noise.
  • the differential mode voltage at the end is greater than 175mV, which causes an abnormality in optical fiber communication.
  • a method for suppressing PCIe outgoing fiber communication output noise comprising: detecting a differential mode voltage at a transmitting end of an interface module;
  • the optical module connected to the interface module is controlled to be turned off.
  • the controlling the closing of the optical module connected to the interface module includes:
  • the laser of the optical module is controlled to be turned off by transmitting a shutdown command to the inter-integrated circuit I2C interface of the optical module.
  • controlling the closing of the optical module connected to the interface module includes:
  • the detection result that the differential mode voltage is lower than the threshold value is sent to the central processing unit CPU through an interrupt mode to control the laser of the optical module to be turned off by the CPU.
  • the method further includes When the differential mode voltage is higher than the threshold, the optical module connected to the interface module is controlled to be turned on.
  • the interface module is an interface chip that interconnects PCIe based on high-speed peripheral devices.
  • a second aspect provides a device for suppressing output noise of a PCIe optical fiber communication, the device comprising: a detecting unit, configured to detect a differential mode voltage at a transmitting end of the interface module;
  • control unit configured to: when the differential mode voltage detected by the detecting unit is lower than a threshold, control an optical module connected to the interface module to be turned off.
  • control unit includes at least one of the following units:
  • a first control subunit configured to control a laser of the optical module to be turned off by enabling a control terminal TX_DISABLE of the optical module
  • the second control subunit is configured to control the laser of the optical module to be turned off by sending a shutdown command to the I2C interface of the optical module.
  • the control unit is configured to send, by using an interrupt mode, a detection result of the differential mode voltage to a threshold value to a central processing unit CPU And controlling the laser of the optical module to be turned off by the CPU.
  • the control unit And when the differential mode voltage detected by the detecting unit is higher than the threshold, the optical module connected to the interface module is controlled to be turned on.
  • a communication node in a third aspect, includes: a PCIe interface chip and a detection and control circuit connected to a transmitting end of the PCIe interface chip, where
  • the detecting circuit is configured to detect a differential mode voltage of a transmitting end of the PCIe interface chip, and when the differential mode voltage is lower than a threshold, control an optical module connected to the PCIe interface chip to be turned off.
  • the detecting and controlling circuit is specifically configured to control a laser of the optical module to be turned off by using a control terminal TX_DISABLE of the optical module, or Sending a shutdown command to the I2C interface of the optical module to control the laser of the optical module to be turned off.
  • the communications node further includes a CPU
  • the detecting and controlling circuit is specifically configured to send the detection result that the differential mode voltage is lower than a threshold value to the CPU by using an interrupt mode;
  • the CPU is configured to control a laser of the optical module to be turned off.
  • the prosecution circuit is integrated on the PCIe interface chip.
  • an embodiment of the present invention provides an optical module, where the optical module is applied to a communication system according to a Peripheral Component Interconnect Express (PCIe), and the optical module includes a prosecution.
  • PCIe Peripheral Component Interconnect Express
  • the detecting circuit is configured to detect a differential mode voltage of the first electrical signal sent by the first PCIe device through the first channel, and if the differential mode voltage of the first electrical signal is lower than the first threshold, Electro-optical conversion mode
  • the block sends a first control signal, where the first control signal is used to indicate that the first channel is in an Electrical Idle (EI) state;
  • the electro-optical conversion module is configured to send, according to the first control signal, a first optical signal to the second optical module, where the first optical signal is used to notify the second optical module to suppress the passage through the first channel
  • the differential mode voltage of the electrical signal sent by the second PCIe device is configured to send, according to the first control signal, a first optical signal to the second optical module, where the first optical signal is used to notify the second optical module to suppress the passage through the first channel.
  • the optical module further includes:
  • a photoelectric conversion module configured to receive a second optical signal sent by the second optical module through the second channel, and convert the received second optical signal into an electrical signal
  • a detecting module configured to detect, according to the electrical signal converted by the second optical signal, whether the second optical signal is an optical signal indicating that the second channel is in an EI state;
  • An electrical signal driving module configured to: when the detecting module determines that the second optical signal is an optical signal indicating that the second channel is in an EI state, suppressing a differential mode voltage of an electrical signal sent to the first PCIe device And transmitting, by the second channel, the suppressed electrical signal to the first PCIe device, where the differential mode voltage of the suppressed electrical signal is lower than a second threshold.
  • a detecting circuit configured to detect a differential mode voltage of the first electrical signal
  • a control circuit configured to generate, according to a preset waveform of a control signal indicating that the communication channel is in an electrical idle EI state, when a differential mode voltage of the first electrical signal is lower than the first threshold a control signal and transmitting the first control signal to the electro-optical conversion module.
  • the detecting module is specifically configured to: when a waveform of an electrical signal converted according to the second optical signal is When the preset waveforms of the control signals indicating that the communication channel is in the electrical idle EI state are the same, the second optical signal is determined to be an optical signal indicating that the second channel is in the EI state.
  • the detecting circuit is further configured to: when the first electrical signal is used When the differential mode voltage is not lower than the first threshold, the second control signal is sent to the electro-optical conversion module according to the first electrical signal, and the second control signal is generated according to the first electrical signal, The first electrical signal carries data sent by the first PCIe device;
  • the photoelectric conversion module is further configured to send a third optical signal to the second optical module according to the second control signal, to transmit the data to the second PCIe device.
  • an embodiment of the present invention provides another optical module, where the optical module is applied according to a fast In the communication system of the fiber optic communication, the optical module includes a procedural control circuit and an electro-optical conversion module, wherein:
  • the detecting circuit is configured to detect a differential mode voltage of the first electrical signal sent by the first PCIe device through the first channel, and if the differential mode voltage of the first electrical signal is lower than the first threshold, The electro-optical conversion module sends a control signal;
  • the electro-optical conversion module is configured to prohibit sending an optical signal through the first channel according to the control signal.
  • the optical module further includes: a detecting module, configured to detect an optical power of the optical signal of the second channel;
  • An electrical signal amplifying circuit configured to: when the detecting module determines that the optical power of the optical signal of the second channel is lower than a threshold, suppress a differential mode of the electrical signal sent to the first PCIe device by using the second channel And transmitting, by the second channel, the suppressed electrical signal to the first PCIe device, where the differential mode voltage of the suppressed electrical signal is lower than a second threshold.
  • an embodiment of the present invention provides a communications node, where the communications node includes a Peripheral Component Interconnect Express (PCIe) chip and the PCIe chip.
  • PCIe Peripheral Component Interconnect Express
  • a prosecution circuit for connecting the transmitting end of the PCIe chip wherein:
  • the PCIe chip is configured to send an electrical signal through a transmitter of the first channel
  • the detecting circuit is configured to detect a differential mode voltage of the electrical signal, and if the differential mode voltage of the electrical signal is lower than the first threshold, prohibiting the optical module connected to the PCIe chip from passing through the first The channel sends an optical signal.
  • the detecting and controlling circuit is specifically configured to disable the laser of the first channel of the optical module from transmitting light by enabling the transmission prohibition TX-DISABLE of the optical module. signal.
  • the communications node further includes a central processing unit CPU;
  • the detection and control circuit is specifically configured to send the detection result that the differential mode voltage is lower than the first threshold value to the CPU by using an interrupt mode;
  • the CPU is configured to control the laser of the first channel of the optical module to be turned off to prohibit the laser of the first channel of the optical module from transmitting an optical signal.
  • an embodiment of the present invention provides a communication system, including a first fast peripheral component interconnection.
  • the second optical module is connected to the second optical module by using a fiber optic cable, wherein the first optical module is connected to the second optical module by using a fiber optic device, a second PCIe device, a second optical module, and a second optical module.
  • the first PCIe device is configured to send, by using the first channel, the first electrical signal to the first optical module that is connected to the first PCIe device;
  • the first optical module is configured to detect a differential mode voltage of the first electrical signal, and if the differential mode voltage of the first electrical signal is lower than a first threshold, generate a first control signal, and generate according to the The first control signal is sent to the second optical module, where the first control signal is used to indicate that the first channel is in an Electrical Idle (EI) state;
  • EI Electrical Idle
  • the second optical module is configured to receive the first optical signal, convert the received first optical signal into a second electrical signal, and determine, according to the second electrical signal, that the first optical signal is a representation
  • the first channel is in an EI state optical signal, suppressing a differential mode voltage of a third electrical signal sent to the second PCIe device by the first channel, and passing the first channel to the second channel
  • the PCIe device sends the suppressed third electrical signal, and the differential mode voltage of the suppressed third electrical signal is lower than the second threshold.
  • the first optical module includes: a detection control circuit, configured to detect a differential mode voltage of the first electrical signal, if a differential mode of the first electrical signal The voltage is lower than the first threshold, and the first control signal is generated according to a preset waveform for indicating that the communication channel is in the EI state;
  • An electro-optical conversion module configured to send the first optical signal to the second optical module according to the first control signal.
  • the second optical module includes:
  • a photoelectric conversion module configured to receive the first optical signal, and convert the received first optical signal into the second electrical signal
  • a detecting module configured to determine the second optical signal when a waveform of the electrical signal converted according to the second optical signal is the same as a waveform of the preset control signal indicating that the communication channel is in an electrical idle EI state An optical signal indicating that the second channel is in an EI state;
  • An electrical signal driving module configured to: when the detecting module determines that the second optical signal is an optical signal indicating that the second channel is in an EI state, suppressing the third electrical signal sent to the second PCIe device a differential mode voltage, and transmitting the suppressed third electrical signal to the second PCIe device through the first channel.
  • the embodiment of the present invention provides a communication system, including a first Peripheral Component Interconnect Express (PCIe) device, a second PCIe device, a second optical module, and a second optical module.
  • the first optical module is connected to the second optical module by using an optical fiber, and the towel is:
  • the first PCIe device is configured to send, by using the first channel, the first electrical signal to the first optical module that is connected to the first PCIe device;
  • the first optical module is configured to detect whether a differential mode voltage of the first electrical signal is lower than a first threshold, if a differential mode voltage of the first differential electrical signal is lower than the first threshold Transmitting, by the first channel, the optical signal to the second optical module;
  • the second optical module is configured to detect an optical power of the optical signal of the first channel, and when it is determined that the optical power of the first channel is lower than a threshold, suppress sending to the second PCIe device by using the first channel a differential mode voltage of the electrical signal, and transmitting the suppressed electrical signal to the second PCIe device through the first channel, the differential mode voltage of the suppressed electrical signal being lower than a second threshold.
  • the first optical module includes: a detection control circuit, configured to detect a differential mode of the first electrical signal sent by the first PCIe device by using the first channel a voltage, if the differential mode voltage of the first electrical signal is lower than the first threshold, turning off a driving current of the first channel of the electro-optical conversion module to prohibit sending to the second optical module through the first channel Optical signal
  • the electro-optical conversion module is configured to prohibit sending an optical signal through the first channel according to the control signal.
  • the second optical module includes:
  • a detecting module configured to detect optical power of the optical signal of the first channel
  • an electrical signal driving module configured to: when determining that an optical power of the optical signal of the first channel is lower than the threshold, suppressing a differential mode voltage of an electrical signal sent to the second PCIe device by using the first channel, And transmitting, by the first channel, the suppressed electrical signal to the second PCIe device.
  • a ninth aspect, the embodiment of the present invention provides a communication method, where the method is applied to a communication system for transmitting optical signals according to a Peripheral Component Interconnect Express (PCIe), the method includes:
  • the first optical module detects a differential mode voltage of the first electrical signal sent by the first PCIe device through the first channel;
  • the An optical module Determining, by the first optical module, whether a differential mode voltage of the first electrical signal is lower than a first threshold; if the differential mode voltage of the first electrical signal is lower than the first threshold, the An optical module generates a first control signal, where the first control signal is used to indicate that the first channel is in an Electrical Idle (EI) state;
  • EI Electrical Idle
  • the first optical module sends a first optical signal to the second optical module according to the first control signal, where The first optical signal is used to notify the second optical module to suppress a differential mode voltage of an electrical signal transmitted to the second PCIe device through the first channel.
  • the method further includes:
  • the first optical module receives the second optical signal sent by the second optical module by using the second optical channel; the first optical module converts the received second optical signal into an electrical signal;
  • the first optical module determines, according to the electrical signal converted by the second optical signal, the second optical signal as an optical signal indicating that the second channel is in an EI state;
  • the first optical module suppresses a differential mode voltage of an electrical signal sent by the second channel to the first PCIe device, where a differential mode voltage of the suppressed electrical signal is lower than a second threshold;
  • the first optical module sends the suppressed electrical signal to the first PCIe device through the second channel.
  • the generating, by the first optical module, the first control signal includes:
  • the first optical module generates the first control signal according to a preset waveform for indicating a control signal that the communication channel is in an EI state.
  • the method further includes:
  • the first optical module generates a second control signal according to the first electrical signal, where the first electrical signal carries data sent by the first PCIe device;
  • the first optical module sends a third optical signal to the second optical module according to the second control signal, where the third optical signal carries the data to be connected to the second optical module.
  • the second PCIe device transmits the data.
  • the embodiment of the present invention provides a communication method, where the method is applied to a communication system for transmitting optical signals according to a Peripheral Component Interconnect Express (PCIe), the method includes:
  • the second optical module receives the first optical signal sent by the first optical module through the first channel
  • the second optical module converts the received first optical signal into a second electrical signal
  • the first optical signal Determining, by the second optical module, the first optical signal as an optical signal indicating that the first channel is in an Electrical Idle (EI) state according to the second electrical signal;
  • the second optical module suppresses a differential mode voltage of the third electrical signal sent by the first channel to the second PCIe device, and the differential mode voltage of the suppressed third electrical signal is lower than a second threshold;
  • the second optical module sends the suppressed third electrical signal to the second PCIe device by using the first channel.
  • the determining, by the second optical module, that the first optical signal is an optical signal that indicates that the first channel is in an EI state, according to the second electrical signal includes: The second optical module determines, according to the waveform of the second electrical signal, the first optical signal as an optical signal indicating that the first channel is in an EI state.
  • the embodiment of the present invention provides a communication method, where the method is applied to a communication system for transmitting optical signals according to a Peripheral Component Interconnect Express (PCIe), the method includes:
  • the first optical module detects a differential mode voltage of the first electrical signal sent by the first PCIe device through the first channel;
  • the first optical module Determining, by the first optical module, whether a differential mode voltage of the first electrical signal is lower than a first threshold; if the differential mode voltage of the first electrical signal is lower than the first threshold, the An optical module prohibits transmitting optical signals through the first channel.
  • the communication method further includes: the first optical module detecting an optical power of an optical signal of the second channel;
  • the first optical module sends the suppressed electrical signal to the first PCIe device by using the second channel, and the differential mode voltage of the suppressed electrical signal is lower than a second threshold.
  • the embodiment of the present invention provides a communication method, where the method is applied to a communication system for transmitting optical signals according to a Peripheral Component Interconnect Express (PCIe), the method includes:
  • the optical module connected to the PCIe chip is prohibited from transmitting the optical signal through the first channel.
  • the disabling the optical module that is connected to the PCIe chip to send the optical signal by using the first channel includes:
  • the optical module of the first channel of the optical module is prohibited from transmitting an optical signal by enabling the optical module control terminal TX-DISABLE.
  • the prohibiting the PCIe chip includes:
  • the central processing unit CPU Transmitting the detection result that the differential mode voltage is lower than the first threshold value to the central processing unit CPU by using an interrupt mode to control the laser of the first channel of the optical module connected to the PCIe chip to be closed by the CPU And transmitting a light signal by a laser that prohibits the first channel of the optical module.
  • the differential mode voltage at the transmitting end of the interface module is detected, and when the differential mode voltage is lower than the threshold value, the optical module connected to the interface module is controlled to be turned off.
  • the control optical module When the communication side uses the optical fiber communication, when the communication terminal detects that the differential mode voltage of the transmission signal is lower than the threshold, the control optical module is turned off, so that the transmitting end cannot output the noise signal, thereby Prevent the receiving end from receiving an abnormal signal and ensure that the optical fiber communication line is normal.
  • FIG. 1 is a schematic diagram of a communication system according to an embodiment of the present invention
  • FIG. 1 is a flow chart of one embodiment of a method for suppressing PCIe outgoing optical fiber communication output noise according to the present invention
  • FIG. 2 is a flow chart of another embodiment of a method for suppressing PCIe outgoing optical fiber communication output noise according to the present invention
  • FIG. 3 is a flowchart of applying the present invention.
  • FIG. 4 is a schematic diagram of another optical communication architecture to which an embodiment of the present invention is applied.
  • FIG. 5 is a schematic diagram of another optical communication architecture to which an embodiment of the present invention is applied.
  • FIG. 6 is a block diagram of an embodiment of an apparatus for suppressing PCIe outgoing optical fiber communication output noise according to the present invention
  • FIG. 7 is a block diagram of an embodiment of a communication node according to the present invention.
  • FIG. 8 is a schematic structural diagram of an optical module according to an embodiment of the present disclosure.
  • FIG. 9 is a schematic structural diagram of still another optical module according to an embodiment of the present disclosure.
  • FIG. 10 is a signaling diagram of a communication method according to an embodiment of the present invention.
  • FIG. 11 is a signaling diagram of still another communication method according to an embodiment of the present invention.
  • FIG. 12 is a flowchart of still another communication method according to an embodiment of the present invention.
  • FIG. 13 is a signaling diagram of still another communication method according to an embodiment of the present invention. Concrete real
  • the following embodiments of the present invention provide methods, apparatus, and communication nodes for suppressing PCIe out of fiber optic communication output noise.
  • the communication system includes a first communication node 10, a second communication node 20, a first optical module 12, and a second optical module 22.
  • the first communication node 10 and the second communication node 20 are both a Peripheral Component Interconnect Express (PCIe) device, and the first communication node 10 includes a first PCIe chip 14, and the second communication node 20 A second PCIe chip 24 is included.
  • PCIe Peripheral Component Interconnect Express
  • the first communication node 10 and the first optical module 12 are connected by a cable, and the second optical module 22 and the second communication node 20 are connected by a cable.
  • the first optical module 12 and the second optical module 22 are used to perform conversion of electrical signals and optical signals.
  • the first optical module 12 and the second optical module 22 are connected by an optical fiber 30.
  • the first communication node 10 transmits data to the second communication node 20 as an example.
  • the first communication node 10 can also serve as a receiving end
  • the second communication node 20 can also serve as a transmitting end.
  • the first optical module 12 connected to the first communication node 10 converts the electrical signal transmitted by the first PCIe chip 14 into an optical signal, and transmits it to the optical fiber 30.
  • a second optical module 22 connected to the second communication node 20 is a second optical module 22 connected to the second communication node 20.
  • the first communication node 10 and the second communication node 20 can be implemented. Communication between. It can be understood that, since the first optical module 12 and the second optical module 22 are connected by the optical fiber 30, even if the distance between the first communication node 10 and the second communication node 20 is long, the mutual completion can be completed through the optical fiber 30. Communication between.
  • the first communication node 10 and the first optical module 12 can be independently configured.
  • the first communication node 10 can be a single board, and the first optical module 12 can be connected to the first communication node through a corresponding connector. 10 sides of the board.
  • the first communication node 10 and the first optical module 12 can also be integrated in the same communication device.
  • the first communication node 10 is a single board, the first optical module 12 can also be located in the first communication through the corresponding connector.
  • the second communication node 20 and the second optical module 22 can be independently configured, and the second communication node 20 and the second optical module 22 can also be integrated in the same communication. In the device. There is no limit here.
  • the electrical Idle (EI) state of the link means that the D+ and D- voltages of the transmitting end of the PCIe chip remain stable, not The state in which the voltage (common mode voltage) is changed.
  • the EI state usually occurs on the link when the link is switched or the link is in low power mode.
  • the sender of the PCIe chip does not send data. For example, in the communication system shown in FIG.
  • the link between the first communication node 10 and the second communication node 20 is at In the EI state, although the transmitting end of the first PCIe chip 14 will not have a valid differential electrical signal output, the second optical module 22 will still output a large amplitude noise signal.
  • the noise signal may cause the differential mode voltage received by the second communication node 20 to be greater than 175 mV, such that the second communication node 20 mistakenly believes that the first communication node 10 has sent data, thereby causing the first communication node 10 and the second communication node 20 to The link status between the two is inconsistent. It should be noted that the first communication node 10 and the second communication node 20 shown in FIG.
  • Embodiments of the present invention may refer to a device that implements communication according to the PCIe standard as a PCIe device. Referring to FIG. 1, a flow chart of an embodiment of a method for suppressing PCIe go optical fiber communication output noise according to the present invention is as follows:
  • Step 101 Detect the differential mode voltage at the transmitting end of the interface module.
  • the interface module of the originating communication node may be specifically a PCIe interface chip.
  • the transmitting end of the interface module is provided with a differential pair. By detecting the voltage difference on the differential pair of the transmitting end, the differential mode voltage of the electrical signal transmitted by the transmitting end can be obtained.
  • the optical module of the transmitting end converts the electrical signal into an optical signal, and after the optical signal is transmitted through the optical fiber to the optical module of the receiving end, the optical module of the receiving end will be The optical signal is then converted into an electrical signal and received by the receiving module of the terminating communication node.
  • Step 102 When the differential mode voltage is lower than the threshold, the optical module connected to the interface module is controlled to be turned off.
  • the laser of the optical module can be controlled to be turned off by enabling the control terminal TX_DISABLE of the optical module; or the internal integrated circuit to the optical module (Inter- Integrated) Circuit, I2C)
  • the interface sends a shutdown command to control the laser of the optical module to be turned off.
  • the detection result of the differential mode voltage below the threshold value can be sent to the central processing unit (CPU) through the interrupt mode.
  • the CPU controls the laser of the optical module to be turned off. After the laser of the optical module of the transmitting end is turned off, the optical module of the transmitting end is no longer issued. The optical signal, therefore, does not receive the optical signal at the receiving end.
  • the receiving communication node determines whether the differential mode voltage of the electrical signal received by the receiving communication node is below 65 mV (millivolt). In the electrical idle state, if the differential mode voltage of the electrical signal received by the receiving communication node is between 65 mV and 175 mV, the receiving communication node confirms that the transmitting communication node sends a noise signal, if the receiving communication node receives the electrical signal. When the differential mode voltage is above 175 mV, the receiving communication node confirms that the originating communication node has sent a normal signal.
  • the embodiment of the present invention when the embodiment of the present invention is applied, if the differential mode voltage of the electrical signal sent by the originating communication node is below 175 mV, that is, when the transmitting end is in an electrical idle state, or when a noise signal is transmitted, if the optical module of the transmitting end is still turned on, the light is The illuminating characteristics of the module, the receiving communication node may receive an electrical signal with a differential mode voltage greater than 175 mV, resulting in inaccurate detection results. Therefore, when the threshold value is set to 175 mV, when the differential mode voltage of the transmitting end of the PCIe interface chip of the originating communication node is less than 175 mV, the optical module of the control end is turned off to ensure the optical communication link. normal.
  • the transmitting end can control the optical module to be turned off when the differential mode voltage of the transmitted signal is detected to be lower than the threshold, so that the transmitting end cannot output the noise signal, thereby Prevent the receiving end from receiving an abnormal signal and ensure that the optical fiber communication line is normal.
  • FIG. 2 another embodiment of a method for suppressing PCIe go optical fiber communication output noise according to the present invention is shown in the following figure:
  • Step 201 Detect a differential mode voltage at a transmitting end of the interface module.
  • the interface module of the originating communication node may be specifically a PCIe interface chip.
  • the transmitting end of the interface module is provided with a differential pair. By detecting the voltage difference on the differential pair of the transmitting end, the differential mode voltage of the electrical signal transmitted by the transmitting end can be obtained.
  • the optical module of the transmitting end converts the electrical signal into an optical signal, and after the optical signal is transmitted through the optical fiber to the optical module of the receiving end, the optical module of the receiving end will be The optical signal is then converted into an electrical signal and received by the receiving module of the terminating communication node.
  • Step 202 Detect whether the differential mode voltage is lower than the threshold. If yes, go to step 203; otherwise, go to step 204.
  • the interface module is specifically a PCIe interface chip, according to the definition of the PCIe standard, if the differential mode voltage of the electrical signal received by the receiving communication node is below 65 mV (millivolt), the receiving communication node confirms the originating communication node. In the electrical idle state, if the differential mode voltage of the electrical signal received by the receiving communication node is between 65mV and 175mV, the receiving communication node confirms that the transmitting communication node sends the noise. Signal, if the differential mode voltage of the electrical signal received by the receiving communication node is above 175 mV, the receiving communication node confirms that the originating communication node has sent a normal signal.
  • the embodiment of the present invention when the embodiment of the present invention is applied, if the differential mode voltage of the electrical signal sent by the originating communication node is below 175 mV, that is, when the transmitting end is in an electrical idle state, or when a noise signal is transmitted, if the optical module of the transmitting end is still turned on, the light is The illuminating characteristics of the module, the receiving communication node may receive an electrical signal with a differential mode voltage greater than 175 mV, resulting in inaccurate detection results. Therefore, when the threshold value is set to 175 mV, when the differential mode voltage of the transmitting end of the PCIe interface chip of the originating communication node is less than 175 mV, the optical module of the control end is turned off to ensure the optical communication link. normal. It should be noted that the threshold value is set to 175 mV, which is only an example. In the actual application, the threshold value may be adjusted as needed, which is not limited in this embodiment of the present invention.
  • Step 203 Control the optical module connected to the interface module to be closed, and return to step 201.
  • the laser of the optical module when the optical module connected to the interface module is turned off, the laser of the optical module can be controlled to be turned off by enabling the control terminal TX_DISABLE of the optical module; or the shutdown command can be sent to the I2C interface of the optical module.
  • the laser of the optical module is turned off.
  • the detection result of the differential mode voltage lower than the threshold value may be sent to the CPU through an interrupt mode to control the laser of the optical module to be turned off by the CPU.
  • Step 204 Control the optical module connected to the interface module to be turned on, and return to step 201.
  • the control module TX_DISABLE of the optical module can be disabled to control the laser of the optical module to be turned on; or the open command can be sent to the I2C interface of the optical module.
  • the laser that controls the optical module is turned on.
  • the detection result that the differential mode voltage is higher than the threshold value may be sent to the CPU through an interrupt mode to control the laser of the optical module to be turned on by the CPU.
  • the optical module of the transmitting end emits an optical signal, and performs normal optical fiber communication with the optical module of the receiving end.
  • the transmitting end can control the optical module to be turned off when the differential mode voltage of the transmitted signal is detected to be lower than the threshold, so that the transmitting end cannot output the noise signal, thereby Prevent the receiving end from receiving an abnormal signal and ensure that the optical fiber communication line is normal.
  • the embodiments of the present invention are described in detail below with reference to several optical communication architecture examples.
  • Each of the following optical communication architectures includes two communication nodes, each of which includes a PCIe interface chip and a control circuit, and a PCIe interface of each communication node.
  • the chip includes a transmitting end and a receiving end, that is, two communication nodes have peer-to-peer communication functions.
  • the communication node on the left side is the originating communication node, and the right side
  • the communication node is the terminating communication node.
  • the optical module connected to the originating communication node and the optical module connected to the receiving communication node are connected by optical fibers, thereby realizing optical communication between the two communication nodes; the prosecution circuit can be based on a field programmable gate array (Field Programmable Gate) Array, FPGA) implementation.
  • FIG. 3 a schematic diagram of an optical communication architecture for applying an embodiment of the present invention:
  • the PCIe interface chip of the originating communication node and the prosecution circuit are separately set, and the differential pair is set on the transmitting end of the PCIe interface chip, respectively represented by D1+ and D1-, and the difference set on the PCIe interface chip of the receiving communication node is respectively
  • the pair of D2+ and D2-, the detecting circuit of the originating communication node is connected to the differential pair D1+ and D1- to detect the differential mode voltage between D1+ and D1-, and the detecting circuit is also connected to the optical module, according to
  • the control type is different, one of the control lines is connected to the control terminal TX_DISABLE of the optical film block, and the other control line can be connected to the I2C interface of the optical module.
  • the detection circuit of the originating communication node detects the voltage difference between D1+ and D1- to obtain the differential mode voltage.
  • the laser of the optical module can be controlled by enabling TX_DISABLE. If it is off, you can also control the laser shutdown of the optical module by sending a shutdown command to the I2C interface.
  • the laser of the optical module of the transmitting end of the transmitting communication node is turned off, the communication between the optical module of the transmitting end of the transmitting node and the optical module of the receiving end of the transmitting end of the transmitting end is interrupted, thereby ensuring the accurate detection result of the differential mode voltage of the receiving communication node. Sex.
  • the laser of the optical module can be controlled by enabling the TX_DISABLE control module, or the laser of the optical module can be controlled by sending an open command to the I2C interface. . After the laser of the optical module of the transmitting end of the transmitting communication node is turned on, the communication between the optical module of the transmitting end of the transmitting communication node side and the optical module of the receiving end of the receiving communication node side is resumed.
  • FIG. 4 another schematic diagram of an optical communication architecture for applying the embodiment of the present invention:
  • FIG. 4 another schematic diagram of an optical communication architecture for applying the embodiment of the present invention:
  • FIG. 5 The same as FIG. 3 and FIG. 4 is that the prosecution circuit of the originating communication node in FIG. 5 is still connected to
  • the differential pair of D1+ and D1- on the transmitting end of the PCIe interface chip is used to detect the differential mode voltage between D1+ and D1-; the difference from FIG. 3 and FIG. 4 is that the prosecution circuit in FIG. 5 is not directly connected to
  • the optical module is connected to the CPU so that the opening and closing of the optical module can be controlled by the CPU control.
  • the detection circuit of the originating communication node detects the voltage difference between D1+ and D1-, Obtaining the differential mode voltage, when the detected differential mode voltage is lower than 175mV, the detection result can be sent to the CPU through the interrupt mode.
  • the CPU can control the laser of the optical module to be turned off by enabling TX_DISABLE, or can be sent off to the I2C interface.
  • the command controls the laser of the optical module to be turned off.
  • the communication between the optical module of the transmitting end of the transmitting end node and the optical module of the receiving end of the transmitting end of the receiving end is interrupted, thereby ensuring the accurate detection result of the differential mode voltage of the receiving communication node.
  • Sex When the detected differential mode voltage is higher than 175mV, it indicates that the originating communication node needs to transmit a normal signal, so the prosecution circuit of the originating communication node can send the detection result to the CPU through the interrupt mode, and the CPU can disable the TX_DISABLE control optical module by enabling the TX_DISABLE.
  • the laser is turned on, and the laser of the optical module can be controlled to be turned on by sending an open command to the I2C interface. After the laser of the optical module of the transmitting end of the originating communication node is turned on, the communication is resumed between the optical module of the transmitting end of the transmitting end node and the optical module of the receiving end of the receiving end of the communication node.
  • the prosecution circuit is separately disposed from the PCIe interface chip. In practical applications, the prosecution circuit may also be integrated on the PCIe interface chip, which is not limited in the embodiment of the present invention.
  • the present invention also provides an embodiment of an apparatus and communication node for suppressing PCIe out of fiber optic communication output noise.
  • an embodiment of an apparatus for suppressing PCIe outgoing optical fiber communication output noise includes: a detecting unit 610 and a control unit 620.
  • the detecting unit 610 is configured to detect a differential mode voltage at a transmitting end of the interface module
  • the control unit 620 is configured to control, when the differential mode voltage detected by the detecting unit 610 is lower than a threshold, to control the optical module connected to the interface module to be turned off.
  • control unit 620 may include at least one of the following units (not shown in FIG. 6): a first control subunit, configured to control the optical module by enabling the control terminal TX_DISABLE of the optical module Laser off;
  • the second control subunit is configured to control the laser of the optical module to be turned off by sending a shutdown command to the I2C interface of the optical module.
  • control unit 620 may be specifically configured to send, by using an interrupt mode, a detection result that the differential mode voltage is lower than a threshold value to a central processing unit CPU, to control a laser of the optical module by using the CPU. shut down.
  • control unit 620 is further configured to: when the differential mode voltage detected by the detecting unit 610 is higher than the threshold, control an optical module connected to the interface module to be turned on.
  • FIG. 7 a block diagram of an embodiment of a communication node according to the present invention is shown:
  • the communication node includes: a PCIe interface chip 710 and a prosecution circuit 720 connected to the transmitting end of the PCIe interface chip 710.
  • the detecting circuit 720 is configured to detect a differential mode voltage of the transmitting end of the PCIe interface chip 710. When the differential mode voltage is lower than a threshold, the optical module connected to the PCIe interface chip 710 is controlled to be turned off. .
  • the spoofing circuit 720 is specifically configured to control the laser of the optical module to be turned off by enabling the control terminal TX.DISABLE of the optical module, or by sending a shutdown command to the I2C interface of the optical module. And controlling the laser of the optical module to be turned off.
  • the communication node may further include a CPU (not shown in FIG. 7): the prosecution circuit 720 may be configured to send, by using an interrupt mode, the detection result that the differential mode voltage is lower than a threshold value.
  • the CPU is configured to control a laser of the optical module to be turned off.
  • the detecting circuit 720 is further configured to control, when the differential mode voltage is higher than the threshold, the optical module connected to the PCIe interface chip 710 to be turned on.
  • the prosecution circuit 720 can be integrated on the PCIe interface chip 710. It can be seen from the above embodiment that the differential mode voltage of the transmitting end of the interface module is detected, and when the differential mode voltage is lower than the threshold value, the optical module connected to the interface module is controlled to be turned off.
  • the control optical module is turned off, so that the transmitting end cannot output the noise signal, thereby Prevent the receiving end from receiving an abnormal signal and ensure that the optical fiber communication line is normal.
  • the prosecution circuit is in control and the PCIe interface.
  • the optical module connected to the chip is turned off, only one channel of the optical module can be turned off, so that one channel that is turned off does not send an optical signal.
  • the light emitting device in the optical module is a laser array
  • the detecting circuit can prevent the laser of one channel of the optical module from transmitting the optical signal without affecting the state of the other channels.
  • the PCIe interface chip in the embodiment of the present invention may also be referred to as a PCIe core chip. FIG.
  • the optical module 80 shown in FIG. 8 can be the first optical module 12 or the second optical module 22 shown in FIG. 1-A.
  • the optical module 80 shown in FIG. 8 will be described below with reference to FIG. 1-A.
  • the optical module 80 can include: a driving module 82 , an electro-optical conversion module 84 , a photoelectric conversion module 86 , a detection module 87 , and an electrical signal driving module 88 .
  • the driving module 82 is connected to the transmitting end of the PCIe chip, and is generally used for realizing equalization and amplification of an electrical signal sent by a transmitting end of the PCIe chip, and generating a driving signal according to an electrical signal sent by the PCIe chip.
  • the driving module 82 may be specifically a laser driving chip.
  • a prosecution circuit 822 is integrated in the drive module 82.
  • the prosecution circuit 822 can include a detection circuit 8221 and a control circuit 8222. among them:
  • the detecting circuit 8221 is configured to detect whether a differential mode voltage of the differential electrical signal sent by the PCIe chip is lower than a preset threshold.
  • the control circuit 8222 is configured to generate a control signal according to the detection result of the detection circuit 8221 to implement control of the optical signal sent by the electro-optical conversion module 84.
  • the control circuit 8222 can be a laser control circuit, and the control signal generated by the control circuit 8222 can be a laser drive signal.
  • the laser driving signal generated by the control circuit 8222 is specifically an electrical signal.
  • the laser driving signal may be a voltage signal or a current signal.
  • the receiving end of the electro-optical conversion module 84 is connected to the output end of the driving module 82.
  • the transmitting end of the electro-optical conversion module 84 is connected to the optical module of the receiving end through an optical fiber. Specifically, the transmitting end of the electro-optical conversion module 84 can pass the optical fiber and the receiving end optical module.
  • the photoelectric conversion modules of (for example, the second optical module 22 in Fig. 1-A) are connected.
  • the electro-optic conversion module 84 is operative to transmit an optical signal based on a control signal generated by the control circuit 8222 in the drive module 82.
  • the electro-optic conversion module 84 is configured to convert the control signal generated by the driving module 82 into an optical signal, and send the converted optical signal through the optical fiber.
  • the electro-optical conversion module 84 can be a laser, a laser array, or a light-emitting diode (LED).
  • the electro-optical conversion module 84 can be a Vertical Cavity Surface Emitting Laser (VCSEL).
  • VCSEL Vertical Cavity Surface Emitting Laser
  • the electro-optical conversion module 84 can emit a modulated optical signal of a corresponding rate according to a driving signal sent from the driving module 82, and an optical power automatic control circuit is provided inside the electro-optical conversion module 84, so that the power of the output optical signal can be stabilized.
  • the photoelectric conversion module 86 is configured to receive the transmitting optical module (for example, the first light in FIG. 1-A). Module 12) transmits the optical signal and converts the received optical signal into an electrical signal.
  • the photoelectric conversion module 86 can be a photodiode or a photodiode array. It can be understood that the electrical signal converted by the photoelectric conversion module 86 can be a current signal.
  • the detecting module 87 is configured to detect the optical power of the optical signal received by the photoelectric conversion module 86 or the waveform of the electrical signal obtained by detecting the conversion of the optical signal received according to the photoelectric conversion module 86.
  • a part of the optical signal separated by the optical signal received by the photoelectric conversion module 86 may be detected by the detecting module 87 by using a splitting technique to detect the optical power of the received optical signal or to implement the light according to the light. Detection of the waveform of the electrical signal obtained by signal conversion.
  • the detection module 87 can send its detection result to the electrical signal driving module 88.
  • the electrical signal driving module 88 can control the differential mode voltage of the differential electrical signal output by the electrical signal driving module 88 to the input end of the PCIe chip according to the detection result of the detecting module 87. It can be understood that the detection module 87 can be integrated or integrated in the electrical signal driving module 88, which is not limited herein.
  • the input end of the electrical signal driving module 88 is respectively connected to the output end of the photoelectric conversion module 86 and the output end of the detecting module, and the output end of the electric signal driving module 88 is connected to the receiving end of the PCIe chip.
  • the electrical signal driving module 88 is configured to implement processing of the electrical signal converted by the photoelectric conversion module 86 according to the detection result of the detecting module 87, so that the differential electrical signal satisfying the requirement can be output to the receiving end of the PCIe chip.
  • the electrical signal driving module 88 can control whether or not the electrical signal converted by the photoelectric conversion module 86 is transmitted to the PCIe chip.
  • the electrical signal driving module 88 can process the electrical signals transmitted to the PCIe chip so that the differential electrical signals that meet the requirements can be output to the receiving end of the PCIe chip.
  • the processing of the electrical signal by the electrical signal driving module 88 includes at least one processing manner of converting, amplifying, limiting or pre-emphasizing the electrical signal.
  • the electrical signal driving module 88 may include a Trans-impedance amplifier (TIA).
  • the optical module 80 may further include a micro control module, and the micro control module may be performed by the management channel and the monitoring channel and the driving module 82, the electro-optical conversion module 84, the photoelectric conversion module 86, the detecting module 87, and the electrical signal driving module 88. Interaction.
  • the micro-control module can also implement information interaction with the PCIe device including the PCIe chip through an inter-integrated circuit (I2C) interface, so as to implement management and monitoring of the optical module 80 by the PCIe device.
  • I2C inter-integrated circuit
  • FIG. 9 is a schematic structural diagram of another optical module according to an embodiment of the present invention.
  • FIG. 9 differs from the optical module shown in FIG. 8 in that, in the optical module shown in FIG. 9, the detecting circuit 8221 is located outside the driving module 82, and the peripheral circuit as the driving module 82 is independently present.
  • FIG. 10 is a signaling diagram of still another communication method according to an embodiment of the present invention, where the method is applied to a communication system that transmits optical signals according to the PCIe standard. The method can be used when the communication channel is in the EI state. The noise output by the light-making module on the channel keeps the communication status at both ends of the link consistent.
  • the method can be implemented by the optical module shown in FIG. 1-A, FIG. 8, or FIG. In order to clearly show the transmission process of the signal, FIG.
  • FIG. 11 illustrates a module involved in processing a signal when the first optical module 12 is used as a transmitting optical module when the communication channel is in the EI state, and a module involved in processing the signal when the second optical module 22 is the receiving optical module.
  • both the first optical module 12 and the second optical module 22 can be used as the signal sent by the PCIe device as the transmitting optical module, or can be used as the signal received by the receiving optical module on the PCIe device. Process it.
  • the communication method in FIG. 10 will be described below with reference to FIGS. 1-A and 11. As shown in FIG.
  • the method may include: In step 1000, the first optical module 12 receives the first electrical signal 901 sent by the first PCIe chip 14 through the first channel.
  • the PCIe chip transmitting end can simultaneously send multiple data signals to the receiving end PCIe chip through multiple lanes (lane) to improve the efficiency of data transmission.
  • the PCIe chip transmitter can transmit data to the receiving PCIe chip through one channel, two channels, four channels, eight channels or 16 channels at the same time.
  • the transmitting end of each channel includes a set of transmitters and receivers, and the receiving end of each channel also includes a set of transmitters and receivers.
  • the transmitter PCIe chip can only support one channel of signal transmission, the transmitter PCIe chip includes a set of transmitters and receivers, and the receiving end PCIe chip also includes a set of transmitters and receivers; if the PCIe chip can Supporting 4 channels of signal transmission, the transmitter PCIe chip can include 4 sets of transmitters and receivers, and the receiver PCIe chip also needs to include 4 sets of transmitters and receivers.
  • a group of transmitters and receivers includes a transmitter and a receiver.
  • the channel link When a link state switching or low power mode occurs on a channel of the PCIe chip, the channel link will be in the EI state. It can be understood that in optical fiber communication, transmission channels are independent of each other and do not affect each other. For example, when an EI state occurs in one channel, it does not affect the data transmission of other channels.
  • the channel is referred to as being established between the transmitting end PCIe chip (for example, the PCIe chip 14) and the receiving end PCIe chip (for example, the PCIe chip 24) through the first optical module and the second optical module.
  • a communication channel for transmitting data for example, the transmitting end PCIe chip 14
  • the receiving end PCIe chip for example, the PCIe chip 24
  • the transmitting end PCIe chip sends information from the first channel
  • the receiving end PCIe chip will receive information through the first channel.
  • the communication channel described in the embodiment of the present invention can be understood as a path that passes during data transmission.
  • the first channel in the embodiment of the present invention refers to any channel in which the PCIe chip transmits data.
  • the first optical module 12 determines that the differential mode voltage of the first electrical signal 901 is lower than the first threshold.
  • the differential mode voltage of the first electrical signal 901 may be detected by the detecting circuit 8221 in the first optical module 12, and it is determined whether the differential mode voltage of the first electrical signal 901 is lower than the first gate. Limit.
  • the detecting circuit 8221 can specifically detect the differential mode voltage of the first electrical signal 901 by detecting the voltage amplitude of the first electrical signal 901.
  • the processing of the first optical module 12 and the second optical module 22 when the differential mode voltage of the first electrical signal 901 is lower than the first threshold is described as an example.
  • the first threshold is a preset threshold value of the differential mode voltage of the electrical signal transmitted by the PCIe chip when the communication channel is in the EI state.
  • the receiving end PCIe chip if the differential mode voltage of the electrical signal received by the receiving PCIe chip is below 65mV (millivolts), the receiving end PCIe chip considers the communication channel to be in an idle state. If the differential mode voltage of the electrical signal received by the receiving end PCIe chip is above 175 mV, the receiving end PCIe chip confirms that the communication channel has exited the electrical idle state, and the transmitting end PCIe chip transmits the data signal.
  • the noise generated on the communication link of the channel is considered.
  • the differential mode voltage of the differential electrical signal received at the receiving end of the first optical module 12 may be higher than 65 mV.
  • the first threshold value may be set to 175 mV in consideration of noise generated on the communication link.
  • the detecting circuit 8221 when the detecting circuit 8221 is located in the optical module 12, when the detecting circuit 8221 detects that the differential mode voltage of the first electrical signal 901 of the first channel is lower than 175 mV, the PCIe chip 14 of the originating communication node 10 is considered to be The first channel is in the EI state.
  • the first threshold can also be set to 65 mV without considering the noise generated on the communication link. It should be noted that, the first threshold value is set to 175 mV or 65 mV, which is only an example. In an actual application, the first threshold value may be adjusted according to actual needs, which is not limited by the embodiment of the present invention. It can be understood that the first threshold value in the embodiment of the present invention is not higher than 175 mV.
  • the first optical module 12 In step 1010, the first optical module 12 generates a first control signal 902, which is used to indicate that the first channel is in an EI state.
  • the first optical module 12 considers that the first channel of the first PCIe chip 14 is in the EI state, in the step 1005, the first module 12 determines that the differential mode voltage of the first electrical signal 901 is lower than the first threshold.
  • the first optical module 12 generates a first control signal 902, and the first control signal 902 is used to indicate that the first channel is in an EI state.
  • the first control signal 902 can be generated by the control circuit 8222 of the detection circuit 822 in the first optical module 12 according to the detection result of the detection circuit 8221, and the first control signal 902 can be sent to the electro-optical conversion module 84.
  • the first control signal 902 can be a drive signal of the electro-optical conversion module 84, wherein the drive signal can include a drive current signal.
  • the electro-optic conversion module 84 is a laser or a laser array
  • the first control signal 902 can be a drive current signal of the laser for controlling the laser of the first channel to emit a modulated light signal of a corresponding rate.
  • the first optical module 12 In order to enable the first optical module 12 to transmit optical signals and transmit data when the communication channel is in the EI state.
  • the transmitted optical signals are differentiated, and the first optical module 12 can generate the first control signal 902 according to a preset pattern of a control signal indicating that the communication channel is in the EI state.
  • the embodiment of the present invention can distinguish the waveform of the control signal when the communication channel is in the EI state from the waveform of the control signal when the data is transmitted.
  • the frequency of the control signal when the communication channel is in the EI state may be different from the frequency of the control signal when the data is transmitted, so that the frequency and transmission of the optical signal emitted by the optical module when the communication channel is in the EI state
  • the frequency of the optical signal emitted by the data time module is different.
  • the amplitude of the control signal when the communication channel is in the EI state may be different from the amplitude of the control signal when the data is transmitted, so that the optical power and transmission of the optical signal emitted by the optical module when the communication channel is in the EI state
  • the optical power of the optical signal emitted by the data time module is different.
  • the waveform of the control signal when the communication channel is in the EI state is not limited, as long as it can be distinguished from the waveform of the control signal when the data is transmitted, thereby enabling the light transmitted by the optical module when the communication channel is in the EI state.
  • the signal can be distinguished from the optical signal transmitted by the optical module when transmitting data.
  • the control signal generated when the first PCIe chip 14 transmits data is referred to as a second control signal 907, and the optical signal sent by the first optical module 12 according to the second control signal 907 is referred to as an optical signal.
  • the first optical module 12 sends a first optical signal 903 to the second optical module 22 according to the first control signal 902.
  • the probing circuit 822 in the first optical module 12 sends a first control signal 902 to the electro-optical conversion module 84.
  • the first control signal 902 is used to drive the electro-optical conversion module 84 to transmit the first optical signal 903 according to the first control signal 902.
  • the first control signal 902 can be a driving current signal, and the intensity of the optical signal emitted by the electro-optical conversion module 84 can be controlled according to the magnitude of the driving current of the first control signal 902, or can be controlled according to the control signal 902.
  • the frequency controls the frequency of the optical signal emitted by the electro-optical conversion module 84.
  • the electro-optical conversion module 84 in the first optical module 12 can transmit the first optical signal 903 through the first channel according to the first control signal 902.
  • the electro-optical conversion module 84 in the first optical module 12 can control the laser of the first channel to transmit the first optical signal 903 according to the first control signal 902 without affecting the light of other channels. Signal transmission.
  • the first optical module 12 and the second optical module 22 are connected by the optical fiber 30, so that the first optical module 12 can send the first optical signal 903 to the second optical module 22 through the optical fiber 30.
  • the waveform of the first control signal 902 may be different from the waveform of the second control signal 907 when the data is transmitted, the first optical signal 903 and the electro-optical conversion generated by the electro-optical conversion module 84 according to the first control signal 902
  • the third optical signal 908 generated by the module 84 in accordance with the second control signal 907 is different.
  • the second optical module 22 converts the first optical signal 903 into a second electrical signal 904.
  • the photoelectric conversion module 86 in the second optical module 22 can convert the first optical signal 903 into a second electrical signal 904.
  • the photoelectric conversion module 86 can be a photodiode. The specific form of the photoelectric conversion module 86 is not limited herein, as long as the optical signal can be converted into an electrical signal.
  • the second optical module 22 determines, based on the second electrical signal 904, the first optical signal 903 as an optical signal indicating that the first channel is in an EI state.
  • the second optical module 22 can determine, according to the waveform of the second electrical signal 904, whether the first optical signal 903 is an optical signal indicating that the first channel is in an EI state. If the waveform of the second electrical signal 904 is the same as the waveform of the predetermined control signal indicating that the communication channel is in the EI state, the first optical signal 903 is determined to be an optical signal indicating that the first channel is in the EI state.
  • the waveform of the second electrical signal 904 is different from the waveform of the preset control signal indicating that the communication channel is in the EI state, it is determined that the first optical signal 903 is not used to indicate that the first channel is in the EI state. signal.
  • the detecting module 87 of the second optical module 22 can detect the waveform of the second electrical signal 904 converted by the first optical signal 903 received by the photoelectric conversion module 86 by using a spectroscopic technique, so that it can be determined whether the waveform of the second electrical signal 904 is
  • the waveform is the same as the preset control signal for indicating that the communication channel is in the EI state.
  • a part of the optical signal of the first optical signal 903 can be input to the detecting module 87 by using a spectroscopic technique, and the detecting module 87 converts part of the optical signal of the first optical signal 903 into an electrical signal, and detects the waveform of the converted electrical signal. Thereby, the waveform of the second electrical signal 904 can be obtained.
  • the second optical module 22 suppresses the differential mode voltage of the third electrical signal 905 outputted to the second PCIe chip 24 through the first channel, and the differential mode voltage of the suppressed third electrical signal 905 is lower than the first mode.
  • the electrical signal driving module 88 in the second optical module 22 is generally used to process the electrical signals output by the photoelectric conversion module 86 so as to be able to output a satisfactory electrical signal to the second PCIe chip 24.
  • the second electrical signal 904 may be processed according to the detection result of the detecting module 87, so as to be able to be
  • the PCIe chip 24 outputs a third electrical signal 905 that meets the requirements. If the detecting module 87 in the second optical module 86 determines that the first optical signal 903 is an optical signal indicating that the communication channel is in the EI state according to the second electrical signal 904, it indicates that the first optical signal 903 is not transmitting data. .
  • the communication state of the PCIe chips at both ends of the first channel is kept consistent, and the second optical module 22 is maintained.
  • the electric signal driving module 88 in the middle can suppress the differential mode voltage of the output third electrical signal 905.
  • the differential mode voltage of the suppressed third electrical signal 905 is lower than the second threshold value, so that the differential mode voltage of the electrical signal received by the second PCIe chip 24 is lower than 175 mV, so that the second PCIe chip 24 can be notified to be maintained. Place The receiving end of the first channel is in the EI state.
  • the second threshold value can be set according to actual conditions, and is not limited herein. In practical applications, considering the noise on the link, the second threshold value should not exceed 175 mV.
  • the second optical module 22 outputs the suppressed third electrical signal 905 to the second PCIe chip 24 through the first channel. Since the second optical module 22 suppresses the differential mode voltage of the third electrical signal 905 in step 1030, the differential mode voltage of the suppressed third electrical signal 905 is lower than the second threshold, and therefore, in step 1035 After the second optical module 22 outputs the suppressed third electrical signal 905 to the second PCIe chip 24 through the first channel, the differential mode voltage of the electrical signal received by the second PCIe chip 24 is not higher than 175 mV. Thus, the second PCIe chip 24 does not mistake the received electrical signal for data. The effect of noise on the link on the link state of the first channel when the first channel of the first PCIe chip 14 is in the EI state is avoided.
  • the first optical module 12 can transmit the first optical signal 903 to the second optical module 22 through the first channel between the existing optical modules, where the first channel is in the non- In the EI state, the first channel can be used to transfer data.
  • a fiber channel may be added between the first optical module 12 and the second optical module, and the added fiber channel is not used to transmit data.
  • the added Fibre Channel is specifically used to transmit an optical signal generated according to a preset control signal indicating that the communication channel is in the EI state when the communication channel is in the EI state, so that a communication channel is in the EI state. Passed to the second optical module 22. Thereby, the second optical module 22 can process the differential mode voltage of the electrical signal outputted to the second PCIe chip 24 through the corresponding communication channel.
  • the communication method described in the foregoing embodiment when the first optical module detects that the first channel of the first PCIe chip is in the EI state, passes the first channel according to a preset control signal indicating that the communication channel is in the EI state. Sending an optical signal to the second optical module to notify the second optical module that the first channel is in an EI state.
  • the second optical module suppresses a differential mode voltage of the differential electrical signal transmitted to the second PCIe chip according to the received optical signal indicating that the first channel is in the EI state.
  • FIG. 12 is a signaling diagram of still another communication method according to an embodiment of the present invention, where the method is applied to a communication system that transmits optical signals according to the PCIe standard.
  • the method can suppress the noise outputted by the optical module on the channel when the communication channel is in the EI state, and can maintain the link state between the PCIe chip of the transmitting end and the PCIe chip of the receiving end.
  • the method can be implemented by the optical module shown in FIG. 1-A, FIG. 8, or FIG.
  • the method also uses the first PCIe chip 14 as the transmitting end and the second PCIe chip 24 as the receiving end.
  • the end is described as an example. 12 is described below with reference to FIG. 1-A and FIG. 8.
  • the method may include:
  • step 1200 the first optical module 12 receives the first electrical signal 901 sent by the first PCIe chip 14 through the first channel.
  • Step 1200 is similar to step 1000 shown in FIG. 10. For details, refer to the description of step 1000 shown in FIG.
  • step 1205 the first optical module 12 determines that the differential mode voltage of the first electrical signal 901 is below a first threshold.
  • Step 1205 is similar to step 1005 shown in FIG. 10. For details, refer to the description of step 1005 shown in FIG.
  • the first optical module 12 In step 1210, the first optical module 12 generates a third control signal.
  • the third control signal is used to prohibit the photoelectric conversion module 84 in the first optical module 12 from transmitting an optical signal through the first channel.
  • the third control signal can be a current signal.
  • the detection circuit 8221 in the first optical module 12 detects that the differential mode voltage of the first electrical signal 901 of the first channel is lower than the first threshold, the detection circuit The control circuit 8222 can be notified to turn off the drive current of the laser of the first channel of the photoelectric conversion module 84 to inhibit the laser of the photoelectric conversion module 84 from transmitting the optical signal through the first channel.
  • the first optical module 12 prohibits transmitting the optical signal through the first channel according to the third control signal.
  • the electro-optical conversion module 84 is taken as an example of the laser array, because the detection circuit 8221 in the first optical module 12 detects that the differential mode voltage of the first electrical signal 901 of the first channel is lower than the first threshold.
  • the control circuit 8222 turns off the driving current of the laser of the first channel of the photoelectric conversion module 84, and the laser of the first channel of the photoelectric conversion module 84 does not transmit the optical signal.
  • the first optical module 12 when the differential mode voltage of the first electrical signal 901 of the first channel of the first PCIe chip 14 is detected to be lower than the first threshold, the first optical module 12 is prohibited from transmitting light through the first channel. signal. Therefore, when the first channel of the first PCIe chip 14 is in the EI state, the output of the link noise is controlled from the transmitting end, preventing the receiving end from receiving an abnormal signal, and ensuring that the optical fiber communication line is normal.
  • the second optical module 22 detects the optical power of the optical signal of the first channel.
  • the detecting module 87 of the second optical module 22 can detect the optical power of the optical signal of the first channel by using a splitting technique.
  • the detecting module 87 can convert the split optical signal into a current signal through a dedicated photodiode, and calculate the optical power of the optical signal of the first channel according to the current magnitude of the converted current signal.
  • the second optical module 22 determines that the optical power of the optical signal of the first channel is below a threshold.
  • the threshold value is a threshold value for the optical power of the optical signal received by the second optical module 22, and the optical power of the optical signal received by the second optical module 22 is lower than the threshold.
  • the first The two-light module 22 considers that no valid optical signal has been received. It can be understood that the threshold is smaller than the optical power value of the optical signal for transmitting data, and the specific value of the threshold of the optical power is not limited in the embodiment of the present invention. It can be understood that, referring to FIG.
  • the first optical module 22 since the first optical module 12 prohibits transmitting the optical signal through the first channel in step 1215, the first optical module 22 detects the first in step 1225.
  • the optical power of the optical signal of the channel may be lower than the threshold, and the second optical module 22 does not receive a valid optical signal through the first channel.
  • the second optical module 22 suppresses the differential mode voltage of the electrical signal outputted to the second PCIe chip 24 through the first channel.
  • the differential mode voltage of the suppressed electrical signal is lower than the second threshold.
  • some electrical signals may be input at the input end of the electrical signal driving module 88 of the second optical module 22 in consideration of the influence of noise on the link.
  • the electrical signal driving module 88 in the second optical module 22 can suppress the differential mode voltage of the electrical signal outputted to the second PCIe chip 24 through the first channel according to the detection result of the detecting module 87, after the suppression.
  • the differential mode voltage of the electrical signal is lower than the second threshold such that the differential mode voltage of the electrical signal received by the second PCIe chip 24 is less than 175 mV.
  • the second threshold value reference may be made to the related description of the embodiment of Fig. 10.
  • step 1235 the second optical module 22 outputs the suppressed electrical signal to the second PCIe chip 24 through the first channel. Since in step 1230, the second optical module 22 suppresses the differential mode voltage of the electrical signal to be output to the second PCIe chip 24 through the first channel, so that the differential mode voltage of the suppressed electrical signal is lower than the first Two thresholds. Therefore, in step 1235, after the second optical module 22 outputs the suppressed electrical signal to the second PCIe chip 24 through the first channel, the differential mode voltage of the electrical signal received by the second PCIe chip 24 is lower than 175 mV. . Therefore, the second PCIe chip 24 does not mistake the electrical signal for data, and the second PCIe chip 24 is prevented from receiving the abnormal signal.
  • the first optical module 12 prohibits the transmission of the optical signal through the first channel.
  • the second optical module 22 suppresses the differential mode voltage of the electrical signal to be output to the second PCIe chip 24 through the first channel when the first optical module 12 prohibits transmitting the optical signal through the first channel.
  • the output of the road noise can be controlled by the method shown in FIG. 12, preventing the second PCIe chip 24 from receiving an abnormal signal when the communication channel is in the EI state, and ensuring that the optical fiber communication line is normal.
  • the second PCIe chip 24 can determine that the first channel of the first PCIe chip 14 remains in the EI state according to the differential mode voltage of the received electrical signal, thereby ensuring that the link states at both ends of the first channel are consistent.
  • the embodiment of the present invention may further include a communication method as shown in FIG. 13 on the basis of the communication method shown in FIG. 10 or FIG.
  • FIG. 13 is still another communication party according to an embodiment of the present invention;
  • the signaling diagram of the communication method shown in FIG. 13 describes the processing procedure of the optical module when the transmitting end PCIe chip and the receiving end PCIe chip normally transmit data.
  • the method can be implemented by the optical module shown in FIG. 1-A, FIG. 8, or FIG.
  • the method shown in FIG. 13 is also described by taking the first PCIe chip 14 as the transmitting end and the second PCIe chip 24 as the receiving end. 13 will be described below with reference to FIGS. 1-A, 8, and 11.
  • the signaling described in FIG. 13 can be specifically referred to the signaling indicated by a broken line in FIG. As shown in FIG. 13, the method may include:
  • the first optical module 12 receives the fourth electrical signal 906 sent by the first PCIe chip 14 through the first channel.
  • the fourth electrical signal 906 carries data information to be transmitted by the first PCIe chip 14.
  • the first optical module 12 determines that the differential mode voltage of the fourth electrical signal 906 is not lower than the first threshold.
  • the differential mode voltage of the fourth electrical signal 906 may be detected by the detecting circuit 8221 in the first optical module 12, and the differential mode voltage of the fourth electrical signal 906 is determined to be lower than the first threshold.
  • the detecting circuit 8221 can specifically detect the differential mode voltage of the fourth electrical signal 906 by detecting the voltage amplitude of the fourth electrical signal 906. Since the first threshold value is a preset threshold value of the differential mode voltage of the electrical signal transmitted by the PCIe chip when the communication channel is in the EI state, as described in step 1005 of FIG.
  • the receiving end PCIe chip confirms that the communication channel has exited the electrical idle state, and the transmitting end PCIe chip transmits the data signal. Therefore, it can be understood that the first threshold is not higher than 175 mV. Since the fourth electrical signal 906 carries the data information transmitted by the first PCIe chip 14, the detection circuit 8221 in the first optical module 12 can detect that the differential mode voltage of the fourth electrical signal 906 is not lower than the preset location. The first threshold is stated.
  • the first optical module 12 generates a second control signal 907.
  • the detecting circuit 8221 in the first optical module 12 detects that the differential mode voltage of the fourth electrical signal 906 is not lower than the first threshold, the first channel of the first PCIe chip 14 is already Exiting the EI state, the first channel of the first PCIe chip 14 transmits normal data.
  • the detection circuit 8221 can transparently transmit the fourth electrical signal 906 to the control circuit 8222, and the control circuit 8222 generates a second control signal 907 according to the fourth electrical signal 906, and sends a second control signal 907 to the electro-optical conversion module 84.
  • the second control signal 907 can be a drive signal of the electro-optical conversion module 84, wherein the drive signal can include a drive current signal. It should be noted that, since the second control signal 907 is generated according to the fourth electrical signal 906 carrying the data information, the waveform of the second control signal 907 and the preset control signal for indicating that the communication channel is in the EI state. The waveform is different. It can be understood that the first PCIe core is carried in the fourth electrical signal 906. The data information transmitted by the slice 14 is such that the data information transmitted by the first PCIe chip 14 is also carried in the second control signal 907 generated according to the fourth electrical signal 906.
  • the first optical module 12 transmits a third optical signal 908 to the second optical module 22 through the first channel according to the second control signal 907.
  • the electro-optical conversion module 84 in the second optical module 12 can control, according to the second control signal 907, a modulated optical signal that emits a corresponding rate through the first channel.
  • the third optical signal 908 carries data information sent by the first PCIe chip 14.
  • the first optical module 12 can transmit the third optical signal 908 to the second optical module 22 through the optical fiber 30.
  • the second optical module 22 converts the third optical signal 908 into a fifth electrical signal 909.
  • the photoelectric conversion module 86 in the second optical module 22 can convert the third optical signal 908 into the fifth electrical signal 909.
  • the photoelectric conversion module 86 can be a photodiode.
  • the second optical module 22 determines that the waveform of the fifth electrical signal 909 is different from the waveform of the preset control signal for indicating that the communication channel is in the EI state.
  • the detecting module 87 in the second optical module 22 can detect the waveform of the fifth electrical signal 909 converted by the third optical signal 908 received by the photoelectric conversion module 86 by using a spectroscopic technique, so that the fifth electrical signal 909 can be determined.
  • the waveform of the waveform is different from the waveform of the preset control signal for indicating that the communication channel is in the EI state.
  • the second optical module 22 sends a sixth electrical signal 910 to the second PCIe chip 24 according to the fifth electrical signal 909, where the sixth electrical signal 910 carries the data information sent by the first PCIe chip 14. .
  • the electrical signal driving module 88 in the second optical module 22 does not perform the differential mode voltage on the sixth electrical signal 910. inhibition.
  • the second PCIe chip 24 is capable of identifying data transmitted by the first PCIe chip 14 from the sixth electrical signal 910. Thereby, data transmission between the first PCIe chip 14 and the second PCIe chip 24 is completed.
  • the communication flow shown in FIG. 13 describes a normal data transmission process between the first PCIe chip 14 and the second PCIe chip 24, similar to the transmission process of the transmission data in the communication system transmitting optical signals according to the PCIe standard in the prior art. Therefore, it will not be described in detail here.
  • the first optical module adopts a processing method as described in FIG.
  • the second optical module 22 can determine that the third optical signal 908 is an optical signal for transmitting data by detecting the optical power of the third optical signal 908. Since the third optical signal 908 carries data, the optical power of the third optical signal 908 is not lower than a preset second threshold, so that the transmitted data signal can be determined according to the optical power of the third optical signal 908. .
  • the implementation of the remaining steps can be referred to the relevant steps in Figure 13, and will not be specifically described here.
  • the first optical module 12 when the first optical module 12 is used as the receiving optical module, the first optical module 12 may also be used as the optical signal sent by the second optical module 22 when the communication channel is in the EI state. Process it.
  • the first optical module 12 When the second optical channel is in the EI state, the first optical module 12 is used as a receiving optical module to receive the special optical signal sent by the second optical module 22 through the second channel for processing.
  • the photoelectric conversion module 86 in the first optical module 12 can receive the second optical signal sent by the second optical module 22 through the second channel, and convert the received second optical signal into electric signal.
  • the detecting module 87 in the first optical module 12 can determine whether the second optical signal is an optical signal indicating that the communication channel is in the EI state.
  • the waveform of the electrical signal converted according to the second optical signal can be determined. Whether the waveform of the control signal indicating that the communication channel is in the EI state is the same or not is used to determine whether the second optical signal is an optical signal indicating that the communication channel is in the EI state. If the detecting module 87 in the first optical module 12 determines that the second optical signal is an optical signal indicating that the communication channel is in the EI state, the electrical signal driving module 88 in the first optical module 12 can suppress passing through the second channel.
  • a differential mode voltage of the electrical signal sent to the receiving end of the first PCIe chip 14 the differential mode voltage of the suppressed electrical signal is lower than the second threshold, and sent to the first PCIe chip 14
  • the suppressed electrical signal is such that the differential mode voltage of the electrical signal received by the first PCIe chip 14 is lower than 175 mV, so that the first PCIe chip 14 can be suppressed when the second channel of the transmitting end is in the EI state.
  • the second channel receives the abnormal signal, so that the first PCIe chip 14 determines that the second channel is still in the EI state, and keeps the link states at both ends of the second channel consistent.
  • the photoelectric conversion module 86, the detecting module 87 and the electrical signal driving module 88 in the first optical module 12 can refer to the second optical module 22 in the above embodiment. Description of the photoelectric conversion module 86, the detection module 87, and the electrical signal driving module 88 in the second optical module 22 as the receiving end optical module. I will not repeat them here. It will be apparent to those skilled in the art that the techniques in the embodiments of the present invention can be implemented by means of software plus a necessary general hardware platform.
  • the technical solution in the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product, which may be stored in a storage medium such as a ROM/RAM. , a diskette, an optical disk, etc., comprising instructions for causing a computer device (which may be a personal computer, server, or network device;) to perform the methods described in various embodiments of the present invention or in certain portions of the embodiments.
  • a computer device which may be a personal computer, server, or network device;

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Abstract

抑制PCIe走光纤通信输出噪声的方法、装置及通信节点,所述方法包括:检测接口模块发送端的差模电压;当所述差模电压低于门限值时,控制与所述接口模块连接的光模块关闭。应用本发明实施例,当通信双方采用光纤通信时,对于发送端,可以在检测到其发送信号的差模电压低于门限值时,控制光模块关闭,使得发送端无法输出噪音信号,从而防止接收端接收到异常信号,保证光纤通信线路正常。

Description

抑制 PCIe走光纤通信输出噪声的方法、 装置及通信节点 本申请要求于 2013 年 6 月 3 日提交中国专利局, 申请号为 PCT/CN2013/076648, 发明名称为 "抑制 PCIe走光纤通信输出噪声的方法、 装 置及通信节点"的国际专利申请的优先权, 上述专利申请的全部内容通过引用结 合在本申请中。 技术领域
本发明涉及光纤通信技术领域,特别涉及抑制高速外围设备互联(Peripheral Component Interconnect Express, PCIe) 走光纤通信输出噪声的方法、 装置及通 信节点。 背景技术
PCIe 总线是应用在计算机和通信平台上的高性能系统总线。 现有技术中定 义了基于 PCIe总线进行交互的通信双方的通信状态, 由于作为通信双方的发送 端和接收端通过电缆连接, 因此发送端的差模电压与接收端的差模电压基本一 致。 如果接收端的差模电压在 65mV (毫伏) 以下, 则接收端确认发送端处于电 气空闲状态, 如果接收端的差模电压在 65mV至 175mV之间, 则接收端确认发 送端发送的是噪声信号, 如果接收端的差模电压在 175mV以上, 则接收端确认 接收到正常信号, 并对该信号进行解码。
但是, 为了提高通信双方之间的传输速率和质量, 现有技术中可以采用光纤 对发送端和接收端进行连接, 由于发送端输出的是电信号, 因此需要在发送端和 接收端分别设置光模块, 发送端的光模块将电信号转换为光信号, 光信号传输到 接收端后, 由接收端的光模块将光信号再转换为电信号。
但是, 当通信双方采用光纤通信时, 即使发送端的差模电压小于 65mV, 由 于光模块的发光特性, 接收端接收到的差模电压可能会大于 175mV, 从而在发 送端处于电气空闲状态, 或者输出噪声的情况下造成光纤通信异常。 发明内容
本发明实施例提供了抑制 PCIe走光纤通信输出噪声的方法、 装置及通信节 点, 以解决现有技术中在发送端处于电气空闲状态, 或者输出噪声的情况下, 接 收端差模电压大于 175mV, 从而造成光纤通信异常的问题。
为了解决上述技术问题, 本发明实施例公开了如下技术方案:
第一方面, 提供一种抑制 PCIe走光纤通信输出噪声的方法, 所述方法包括: 检测接口模块发送端的差模电压;
当所述差模电压低于门限值时, 控制与所述接口模块连接的光模块关闭。 结合第一方面, 在第一方面的第一种可能的实现方式中, 所述控制与所述接 口模块连接的光模块关闭包括:
通过使能所述光模块的控制端 TX_DISABLE, 控制所述光模块的激光器关 闭; 或者,
通过向所述光模块的内部集成电路 I2C接口发送关闭命令,控制所述光模块 的激光器关闭。
结合第一方面, 在第一方面的第二种可能的实现方式中, 所述控制与所述接 口模块连接的光模块关闭包括:
将所述差模电压低于门限值的检测结果通过中断方式发送给中央处理器 CPU, 以通过所述 CPU控制所述光模块的激光器关闭。
结合第一方面, 或第一方面的第一种可能的实现方式, 或第一方面的第二种 可能的实现方式, 在第一方面的第三种可能的实现方式中, 所述方法还包括: 当所述差模电压高于所述门限值时, 控制与所述接口模块连接的光模块开 启。
结合第一方面, 或第一方面的第一种可能的实现方式, 或第一方面的第二种 可能的实现方式, 或第一方面的第三种可能的实现方式, 在第一方面的第四种可 能的实现方式中, 所述接口模块为基于高速外围设备互联 PCIe的接口芯片。
第二方面, 提供一种抑制 PCIe走光纤通信输出噪声的装置, 所述装置包括: 检测单元, 用于检测接口模块发送端的差模电压;
控制单元, 用于当所述检测单元检测到的所述差模电压低于门限值时, 控制 与所述接口模块连接的光模块关闭。
结合第二方面, 在第二方面的第一种可能的实现方式中, 所述控制单元包括 至少一个下述单元:
第一控制子单元, 用于通过使能所述光模块的控制端 TX_DISABLE, 控制 所述光模块的激光器关闭;
第二控制子单元, 用于通过向所述光模块的 I2C接口发送关闭命令, 控制所 述光模块的激光器关闭。 结合第二方面, 在第二方面的第二种可能的实现方式中, 所述控制单元, 具 体用于将所述差模电压低于门限值的检测结果通过中断方式发送给中央处理器 CPU, 以通过所述 CPU控制所述光模块的激光器关闭。
结合第二方面, 或第二方面的第一种可能的实现方式, 或第二方面的第二种 可能的实现方式, 在第二方面的第三种可能的实现方式中, 所述控制单元, 还用 于当所述检测单元检测到的差模电压高于所述门限值时,控制与所述接口模块连 接的光模块开启。
第三方面, 提供一种通信节点, 所述通信节点包括: PCIe接口芯片和与所 述 PCIe接口芯片的发送端连接的检控电路, 其中,
所述检控电路, 用于检测所述 PCIe接口芯片的发送端的差模电压, 当所述 差模电压低于门限值时, 控制与所述 PCIe接口芯片连接的光模块关闭。
结合第三方面, 在第三方面的第一种可能的实现方式中, 所述检控电路, 具 体用于通过使能所述光模块的控制端 TX_DISABLE, 控制所述光模块的激光器 关闭, 或者通过向所述光模块的 I2C接口发送关闭命令, 控制所述光模块的激光 器关闭。
结合第三方面, 在第三方面的第二种可能的实现方式中, 所述通信节点还包 括 CPU,
所述检控电路,具体用于将所述差模电压低于门限值的检测结果通过中断方 式发送给所述 CPU;
所述 CPU, 用于控制所述光模块的激光器关闭。
结合第三方面, 或第三方面的第一种可能的实现方式, 或第三方面的第二种 可能的实现方式, 在第三方面的第三种可能的实现方式中, 所述检控电路, 还用 于当所述差模电压高于所述门限值时, 控制与所述 PCIe接口芯片连接的光模块 开启。
结合第三方面, 或第三方面的第一种可能的实现方式, 或第三方面的第二种 可能的实现方式, 或第三方面的第三种可能的实现方式, 在第一方面的第四种可 能的实现方式中, 所述检控电路集成在所述 PCIe接口芯片上。
第四方面, 本发明实施例提供一种光模块, 所述光模块应用于根据快速外设 组件互联 (Peripheral Component Interconnect Express , PCIe) 进 fi"光纤通信的通信 系统中, 所述光模块包括检控电路和电光转换模块, 其中:
所述检控电路, 用于检测第一 PCIe设备通过第一通道发送的第一电信号的 差模电压, 若所述第一电信号的差模电压低于第一门限值, 则向所述电光转换模 块发送第一控制信号, 其中, 所述第一控制信号用于表示所述第一通道处于电器 空闲 (Electrical Idle, EI) 状态;
所述电光转换模块,用于根据所述第一控制信号向第二光模块发送第一光信 号,所述第一光信号用于通知所述第二光模块抑制通过所述第一通道向第二 PCIe 设备发送的电信号的差模电压。
在第四方面的第一种可能的实现方式中, 所述光模块还包括:
光电转换模块, 用于接收所述第二光模块通过第二通道发送的第二光信号, 并将接收的所述第二光信号转换为电信号;
检测模块,用于根据所述第二光信号转换的电信号检测所述第二光信号是否 为表示所述第二通道处于 EI状态的光信号;
电信号驱动模块,用于当所述检测模块确定所述第二光信号为表示所述第二 通道处于 EI状态的光信号时,抑制向所述第一 PCIe设备发送的电信号的差模电 压, 并通过所述第二通道向所述第一 PCIe设备发送抑制后的电信号, 所述抑制 后的电信号的差模电压低于第二门限值。
结合第四方面或第四方面的第一种可能的实现方式,在第四方面的第二种可 能的实现方式中, 所述检控电路包括:
检测电路, 用于检测所述第一电信号的差模电压;
控制电路, 用于当所述第一电信号的差模电压低于所述第一门限值时, 根据 预设的用于表示通信通道处于电气空闲 EI状态的控制信号的波形生成所述第一 控制信号, 并向所述电光转换模块发送所述第一控制信号。
结合第四方面的第二种可能的实现方式,在第四方面的第三种可能的实现方 式中, 所述检测模块, 具体用于当根据所述第二光信号转换的电信号的波形与所 述预设的用于表示通信通道处于电气空闲 EI状态的控制信号的波形相同时, 判 断所述第二光信号为表示所述第二通道处于 EI状态的光信号。
结合第四方面或第四方面的第一种至第三种中任意一种可能的实现方式,在 第四种可能的实现方式中, 所述检控电路, 还用于当所述第一电信号的差模电压 不低于所述第一门限值时,根据所述第一电信号向所述电光转换模块发送第二控 制信号, 所述第二控制信号根据所述第一电信号生成, 所述第一电信号中携带有 所述第一 PCIe设备发送的数据;
所述光电转换模块,还用于根据所述第二控制信号向所述第二光模块发送第 三光信号, 以向所述第二 PCIe设备传输所述数据。
第五方面, 本发明实施例提供了又一种光模块, 所述光模块应用于根据快速 夕卜设组件互联 (Peripheral Component Interconnect Express , PCIe) 进 fi"光纤通信的 通信系统中, 所述光模块包括检控电路和电光转换模块, 其中:
所述检控电路, 用于检测第一 PCIe设备通过第一通道发送的第一电信号的 差模电压, 若所述第一电信号的差模电压低于第一门限值, 则向所述电光转换模 块发送控制信号;
所述电光转换模块,用于根据所述控制信号禁止通过所述第一通道发送光信 号。
结合第五方面, 在第一种可能的实现方式中, 所述光模块还包括: 检测模块, 用于检测第二通道的光信号的光功率;
电信号放大电路,用于当所述检测模块确定所述第二通道的光信号的光功率 低于阈值时, 抑制通过所述第二通道向所述第一 PCIe设备发送的电信号的差模 电压, 并通过所述第二通道向所述第一 PCIe设备发送抑制后的电信号, 所述抑 制后的电信号的差模电压低于第二门限值。
第六方面, 本发明实施例提供了一种通信节点, 所述通信节点包括快速外设 组件互联总线 (Peripheral Component Interconnect Express , PCIe) 芯片以及与所述
PCIe芯片的发送端连接的检控电路, 其中:
所述 PCIe芯片, 用于通过第一通道的发送器发送电信号;
所述检控电路, 用于检测所述电信号的差模电压, 若所述电信号的差模电压 低于第一门限值, 则禁止与所述 PCIe芯片连接的光模块通过所述第一通道发送 光信号。
结合第六方面, 在第一种可能的实现方式中, 所述检控电路, 具体用于通过 使能所述光模块的发送禁止 TX-DISABLE, 禁止所述光模块的第一通道的激光 器发送光信号。
结合第六方面, 在第二种可能的实现方式中, 所述通信节点还包括中央处理 器 CPU;
所述检控电路,具体用于将所述差模电压低于所述第一门限值的检测结果通 过中断方式发送给所述 CPU;
所述 CPU, 用于控制所述光模块的第一通道的激光器关闭, 以禁止所述光 模块的第一通道的激光器发送光信号。
第七方面, 本发明实施例提供了一种通信系统, 包括第一快速外设组件互联
( Peripheral Component Interconnect Express , PCIe ) 设备、 第二 PCIe设备、 第^ ~ "光 模块以及第二光模块, 所述第一光模块通过光纤连接所述第二光模块, 其中; 所述第一 PCIe设备,用于通过第一通道向与所述第一 PCIe设备连接的所述 第一光模块发送第一电信号;
所述第一光模块, 用于检测所述第一电信号的差模电压, 若所述第一电信号 的差模电压低于第一门限值, 则生成第一控制信号, 并根据生成的第一控制信号 向所述第二光模块发送第一光信号, 其中, 所述第一控制信号用于表示所述第一 通道处于电器空闲 ( Electrical Idle, EI) 状态;
所述第二光模块, 用于接收所述第一光信号, 将接收的所述第一光信号转换 为第二电信号,当根据所述第二电信号确定所述第一光信号为表示所述第一通道 处于 EI状态的光信号时,抑制通过所述第一通道向所述第二 PCIe设备发送的第 三电信号的差模电压, 并通过所述第一通道向所述第二 PCIe设备发送抑制后的 第三电信号, 所述抑制后的第三电信号的差模电压低于第二门限值。
结合第七方面, 在第一种可能的实现方式中, 所述第一光模块包括: 检控电路, 用于检测所述第一电信号的差模电压, 若所述第一电信号的差模 电压低于所述第一门限值, 则根据预设的用于表示通信通道处于 EI状态的控制 信号的波形生成所述第一控制信号;
电光转换模块,用于根据所述第一控制信号向所述第二光模块发送所述第一 光信号。
结合第七方面的第一种可能的实现方式, 在第二种可能的实现方式中, 所述 第二光模块包括:
光电转换模块, 用于接收所述第一光信号, 并将接收的所述第一光信号转换 为所述第二电信号;
检测模块,用于当根据所述第二光信号转换的电信号的波形与所述预设的用 于表示通信通道处于电气空闲 EI状态的控制信号的波形相同时, 确定所述第二 光信号为表示所述第二通道处于 EI状态的光信号;
电信号驱动模块,用于当所述检测模块确定所述第二光信号为表示所述第二 通道处于 EI状态的光信号时,抑制向所述第二 PCIe设备发送的所述第三电信号 的差模电压, 并通过所述第一通道向所述第二 PCIe设备发送所述抑制后的第三 电信号。
第八方面, 本发明实施例提供了又一种通信系统, 包括第一快速外设组件互 联 ( Peripheral Component Interconnect Express , PCIe ) 设备、 第二 PCIe设备、 第^ ~ " 光模块以及第二光模块, 其中, 所述第一光模块通过光纤连接所述第二光模块, 其巾: 所述第一 PCIe设备,用于通过第一通道向与所述第一 PCIe设备连接的所述 第一光模块发送第一电信号;
所述第一光模块, 用于检测所述第一电信号的差模电压是否低于第一门限 值, 若所述第一差分电信号的差模电压低于所述第一门限值, 则禁止通过所述第 一通道向所述第二光模块发送光信号;
所述第二光模块, 用于检测第一通道的光信号的光功率, 当确定所述第一通 道的光功率低于阈值时, 抑制通过所述第一通道向所述第二 PCIe设备发送的电 信号的差模电压, 并通过所述第一通道向所述第二 PCIe设备发送抑制后的电信 号, 所述抑制后的电信号的差模电压低于第二门限值。
结合第八方面, 在第一种可能的实现方式中, 所述第一光模块包括: 检控电路, 用于检测所述第一 PCIe设备通过所述第一通道发送的第一电信 号的差模电压, 若所述第一电信号的差模电压低于第一门限值, 则关闭电光转换 模块的第一通道的驱动电流,以禁止通过所述第一通道向所述第二光模块发送光 信号;
所述电光转换模块,用于根据所述控制信号禁止通过所述第一通道发送光信 号。
结合第八方面或第八方面的第一种可能的实现方式,在第二种可能的实现方 式中, 所述第二光模块包括:
检测模块, 用于检测所述第一通道的光信号的光功率;
电信号驱动模块,用于当确定所述第一通道的光信号的光功率低于所述阈值 时, 抑制通过所述第一通道向所述第二 PCIe设备发送的电信号的差模电压, 并 通过所述第一通道向所述第二 PCIe设备发送所述抑制后的电信号。
第九方面, 本发明实施例提供了一种通信方法, 所述方法应用于根据快速外 设组件互联 (Peripheral Component Interconnect Express , PCIe) 传输光信号的通信 系统中, 该方法包括:
第一光模块检测第一 PCIe 设备通过第一通道发送的第一电信号的差模电 压;
所述第一光模块判断所述第一电信号的差模电压是否低于第一门限值; 若所述第一电信号的差模电压低于所述第一门限值,所述第一光模块生成第 一控制信号, 所述第一控制信号用于表示所述第一通道处于电器空闲 (Electrical Idle, EI) 状态;
所述第一光模块根据所述第一控制信号向第二光模块发送第一光信号,所述 第一光信号用于通知所述第二光模块抑制通过所述第一通道向第二 PCIe设备发 送的电信号的差模电压。
结合第九方面, 在第一种可能的实现方式中, 还包括:
所述第一光模块接收所述第二光模块通过第二通道发送的第二光信号; 所述第一光模块将接收的所述第二光信号转换为电信号;
所述第一光模块根据所述第二光信号转换的电信号确定所述第二光信号为 表示所述第二通道处于 EI状态的光信号;
所述第一光模块抑制通过所述第二通道向所述第一 PCIe设备发送的电信号 的差模电压, 所述抑制后的电信号的差模电压低于第二门限值;
所述第一光模块通过所述第二通道向所述第一 PCIe设备发送所述抑制后的 电信号。
结合第九方面或第九方面的第一种可能的实现方式,在第二种可能的实现方 式中, 所述第一光模块生成第一控制信号包括:
所述第一光模块根据预设的用于表示通信通道处于 EI状态的控制信号的波 形生成所述第一控制信号。
结合第九方面或第九方面的第一种至第二种任意一种可能的实现方式,在第 三种可能的实现方式中,若所述第一差分电信号的差模电压不低于所述第一门限 值, 所述方法还包括:
所述第一光模块根据所述第一电信号生成第二控制信号,所述第一电信号中 携带有所述第一 PCIe设备发送的数据;
所述第一光模块根据所述第二控制信号向所述第二光模块发送第三光信号, 所述第三光信号中携带有所述数据,以向与所述第二光模块连接的所述第二 PCIe 设备传输所述数据。
第十方面, 本发明实施例提供了又一种通信方法, 所述方法应用于根据快速 外设组件互联 (Peripheral Component Interconnect Express , PCIe) 传输光信号的通 信系统中, 该方法包括:
第二光模块接收第一光模块通过第一通道发送的第一光信号;
所述第二光模块将接收的所述第一光信号转换为第二电信号;
所述第二光模块根据所述第二电信号确定所述第一光信号为表示所述第一 通道处于电气空闲 ( Electrical Idle, EI) 状态的光信号;
所述第二光模块抑制通过所述第一通道向第二 PCIe设备发送的第三电信号 的差模电压, 所述抑制后的第三电信号的差模电压低于第二门限值; 所述第二光模块通过所述第一通道向所述第二 PCIe设备发送所述抑制后的 第三电信号。
结合第十方面, 在第一种可能的实现方式中, 所述第二光模块根据所述第二 电信号确定所述第一光信号为表示所述第一通道处于 EI状态的光信号包括: 所述第二光模块根据所述第二电信号的波形确定所述第一光信号为表示所 述第一通道处于 EI状态的光信号。
第十一方面, 本发明实施例提供了又一种通信方法, 所述方法应用于根据快 速夕卜设组件互联 (Peripheral Component Interconnect Express , PCIe) 传输光信号的 通信系统中, 该方法包括:
第一光模块检测第一 PCIe 设备通过第一通道发送的第一电信号的差模电 压;
所述第一光模块判断所述第一电信号的差模电压是否低于第一门限值; 若所述第一电信号的差模电压低于所述第一门限值,所述第一光模块禁止通 过所述第一通道发送光信号。
结合第十一方面, 在第一种可能的实现方式中, 所述通信方法还包括: 所述第一光模块检测第二通道的光信号的光功率;
若确定所述第二通道的光信号的光功率低于阈值,所述第一光模块抑制通过 所述第二通道向所述第一 PCIe设备发送的电信号的差模电压;
所述第一光模块通过所述第二通道向所述第一 PCIe设备发送所述抑制后的 电信号, 所述抑制后的电信号的差模电压低于第二门限值。
第十二方面, 本发明实施例提供了又一种通信方法, 所述方法应用于根据快 速夕卜设组件互联 (Peripheral Component Interconnect Express , PCIe) 传输光信号的 通信系统中, 所述方法包括:
检测 PCIe芯片通过第一通道的发送器发送的电信号的差模电压; 判断所述电信号的差模电压是否低于第一门限值;
当所述电信号的差模电压低于所述第一门限值时, 禁止与所述 PCIe芯片连 接的光模块通过所述第一通道发送光信号。
结合第十二方面, 在第一种可能的实现方式中, 所述禁止与所述 PCIe芯片 连接的光模块通过所述第一通道发送光信号包括:
通过使能所述光模块控制端 TX-DISABLE, 以禁止所述光模块的第一通道 的激光器发送光信号。
结合第十二方面, 在第二种可能的实现方式中, 所述禁止与所述 PCIe芯片 连接的光模块通过所述第一通道发送光信号包括:
将所述差模电压低于所述第一门限值的检测结果通过中断方式发送给中央 处理器 CPU, 以通过所述 CPU控制与所述 PCIe芯片连接的光模块的第一通道 的激光器关闭, 以禁止所述光模块的第一通道的激光器发送光信号。本发明实施 例中, 检测接口模块发送端的差模电压, 当差模电压低于门限值时, 控制与接口 模块连接的光模块关闭。 应用本发明实施例, 当通信双方采用光纤通信时, 对于 发送端, 可以在检测到其发送信号的差模电压低于门限值时, 控制光模块关闭, 使得发送端无法输出噪音信号, 从而防止接收端接收到异常信号, 保证光纤通信 线路正常。 附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例 或现有技术描述中所需要使用的附图作简单地介绍, 显而易见地, 下面描述中的 附图仅仅是本发明的一些实施例, 对于本领域普通技术人员来讲, 在不付出创造 性劳动性的前提下, 还可以根据这些附图获得其他的附图。
图 1-A为本发明实施例提供的一种通信系统示意图;
图 1为本发明抑制 PCIe走光纤通信输出噪声的方法的一个实施例流程图; 图 2为本发明抑制 PCIe走光纤通信输出噪声的方法的另一个实施例流程图; 图 3为应用本发明实施例的一个光通信架构示意图;
图 4为应用本发明实施例的另一个光通信架构示意图;
图 5为应用本发明实施例的另一个光通信架构示意图;
图 6为本发明抑制 PCIe走光纤通信输出噪声的装置的实施例框图; 图 7为本发明通信节点的实施例框图;
图 8为本发明实施例提供的一种光模块的结构示意图;
图 9为本发明实施例提供的又一种光模块的结构示意图;
图 10为本发明实施例提供的一种通信方法信令图;
图 11为本发明实施例提供的又一种通信方法信令图;
图 12为本发明实施例提供的又一种通信方法流程图;
图 13为本发明实施例提供的又一种通信方法信令图。 具体实 式
本发明如下实施例提供了抑制 PCIe走光纤通信输出噪声的方法、 装置及通 信节点。
为了使本技术领域的人员更好地理解本发明实施例中的技术方案,并使本发 明实施例的上述目的、特征和优点能够更加明显易懂, 下面结合附图对本发明实 施例中技术方案作进一步详细的说明。 为了便于理解, 首先对本发明实施例提供的一个通信系统做一个简单的介 绍。 如图 1-A所示, 在该通信系统中, 包含有第一通信节点 10、 第二通信节点 20、 第一光模块 (Optical Module)12以及第二光模块 22。 其中, 第一通信节点 10 和第二通信节点 20 均为快速外设组件互联 (Peripheral Component Interconnect Express , PCIe) 设备, 第一通信节点 10中包含有第一 PCIe芯片 14, 第二通信 节点 20中包含有第二 PCIe芯片 24。 第一通信节点 10与第一光模块 12之间通 过电缆连接, 第二光模块 22和第二通信节点 20之间通过电缆连接。第一光模块 12和第二光模块 22用于进行电信号与光信号的转换。 在第一光模块 12和第二 光模块 22之间通过光纤 30连接。
下面以第一通信节点 10向第二通信节点 20发送数据为例进行描述。当然可 以理解的是, 第一通信节点 10也可以作为接收端, 第二通信节点 20也可以作为 发送端。 当第一通信节点 10 向第二通信节点 20发送数据时, 与第一通信节点 10连接的第一光模块 12将第一 PCIe芯片 14发送的电信号转换为光信号, 并通 过光纤 30传输至于与第二通信节点 20连接的第二光模块 22。第二光模块 22将 接收的光信号转换为电信号后, 并将电信号传输给第二通信节点 20 中的第二 PCIe芯片 24,从而能够实现第一通信节点 10以及第二通信节点 20之间的通信。 可以理解的是, 由于第一光模块 12以及第二光模块 22之间通过光纤 30连接, 因此, 即使第一通信节点 10与第二通信节点 20的距离较远, 也能够通过光纤 30完成相互之间的通信。
需要说明的是, 第一通信节点 10和第一光模块 12可以独立设置, 例如, 第 一通信节点 10可以是一个单板,第一光模块 12可以通过对应的连接器连接在第 一通信节点 10的板边。 第一通信节点 10和第一光模块 12也可以集成在同一个 通信设备中, 例如, 若第一通信节点 10是一个单板, 第一光模块 12也可以通过 对应的连接器位于第一通信节点 10中。类似的, 第二通信节点 20和第二光模块 22可以独立设置, 第二通信节点 20和第二光模块 22也可以集成在同一个通信 设备中。 在此不做限定。
由于现有技术中定义了基于 PCIe总线进行交互的通信双方的通信状态, 其 中, 链路的电器空闲 (Electrical Idle, EI) 状态是指 PCIe芯片的发送端的 D+和 D-电压保持在稳定、 不变的电压(共模电压)时所处的状态。 通常在链路切换或 链路处于低功耗模式下链路会出现 EI状态。 在链路处于 EI状态时, PCIe芯片 的发送端不会发送数据。例如, 在如图 1-A所示的通信系统中, 以第一通信节点 10向第二通信节点 20发送数据为例, 在第一通信节点 10与第二通信节点 20之 间的链路处于 EI状态时, 虽然第一 PCIe芯片 14的发送端将没有有效的差分电 信号输出, 但第二光模块 22仍然会输出一个幅度较大的噪声信号。 该噪声信号 可能会导致第二通信节点 20接收到的差模电压大于 175mV, 使得第二通信节点 20误认为第一通信节点 10发出了数据, 从而导致第一通信节点 10和第二通信 节点 20之间的链路状态不一致。 需要说明的是, 图 1-A中所示的第一通信节点 10和第二通信节点 20可以是 PCIe设备的一种示例, PCIe设备还可以包括 PCIe 芯片等其他设备。本发明实施例可以将根据 PCIe标准实现通信的设备称为 PCIe 设备。 参见图 1, 为本发明抑制 PCIe走光纤通信输出噪声的方法的一个实施例流 程图:
步骤 101 : 检测接口模块发送端的差模电压。
本实施例中, 从发端通信节点侧描述控制光纤通信的过程。发端通信节点的 接口模块可以具体为 PCIe接口芯片, 接口模块的发送端上设置有差分线对, 通 过检测该发送端差分线对上的电压差, 可以得到发送端所传输电信号的差模电 压, 该电信号输出到与接口模块连接的发送端的光模块后, 由该发送端的光模块 将电信号转换为光信号, 光信号通过光纤传输到接收端的光模块后, 由该接收端 的光模块将光信号再转换为电信号, 由收端通信节点的接收模块接收。
步骤 102: 当差模电压低于门限值时, 控制与接口模块连接的光模块关闭。 本实施例中, 在控制与接口模块连接的光模块关闭时, 可以通过使能光模块 的控制端 TX_DISABLE, 控制光模块的激光器关闭; 或者也可以通过向光模块 的内部集成电路 (Inter— Integrated Circuit, I2C) 接口发送关闭命令, 控制光模 块的激光器关闭; 或者, 也可以将差模电压低于门限值的检测结果通过中断方式 发送给中央处理器 (Central Processing Unit, CPU), 以通过该 CPU控制光模块 的激光器关闭。 当发送端的光模块的激光器关闭后, 该发送端的光模块不再发出 光信号, 因此接收端也不会接收到光信号。
本实施例中, 当接口模块具体为 PCIe接口芯片时, 根据 PCIe标准定义, 如 果收端通信节点所接收电信号的差模电压在 65mV (毫伏) 以下, 则收端通信节 点确认发端通信节点处于电气空闲状态,如果收端通信节点所接收电信号的差模 电压在 65mV至 175mV之间, 则收端通信节点确认发端通信节点发送的是噪声 信号, 如果收端通信节点所接收电信号的差模电压在 175mV以上, 则收端通信 节点确认发端通信节点发送了正常信号。 因此在应用本发明实施例时, 如果发端 通信节点所发送电信号的差模电压在 175mV以下,即发送端处于电气空闲状态, 或者发送噪音信号时,如果发送端的光模块仍然开启,则由于光模块的发光特性, 收端通信节点可能接收到差模电压大于 175mV的电信号, 从而导致检测结果不 准确。 因此, 在应用本实施例时, 可以设置门限值为 175mV, 则当检测到发端 通信节点的 PCIe接口芯片的发送端差模电压小于 175mV时,控制发送端的光模 块关闭, 保证光通信链路正常。
由上述实施例可见, 当通信双方采用光纤通信时, 对于发送端, 可以在检测 到其发送信号的差模电压低于门限值时, 控制光模块关闭, 使得发送端无法输出 噪音信号, 从而防止接收端接收到异常信号, 保证光纤通信线路正常。 参见图 2, 为本发明抑制 PCIe走光纤通信输出噪声的方法的另一个实施例 流程图:
步骤 201 : 检测接口模块发送端的差模电压。
本实施例中, 从发端通信节点侧描述控制光纤通信的过程。发端通信节点的 接口模块可以具体为 PCIe接口芯片, 接口模块的发送端上设置有差分线对, 通 过检测该发送端差分线对上的电压差, 可以得到发送端所传输电信号的差模电 压, 该电信号输出到与接口模块连接的发送端的光模块后, 由该发送端的光模块 将电信号转换为光信号, 光信号通过光纤传输到接收端的光模块后, 由该接收端 的光模块将光信号再转换为电信号, 由收端通信节点的接收模块接收。
步骤 202: 检测差模电压是否低于门限值, 若是, 则执行步骤 203; 否则, 执行步骤 204。
本实施例中, 当接口模块具体为 PCIe接口芯片时, 根据 PCIe标准定义, 如 果收端通信节点所接收电信号的差模电压在 65mV (毫伏) 以下, 则收端通信节 点确认发端通信节点处于电气空闲状态,如果收端通信节点所接收电信号的差模 电压在 65mV至 175mV之间, 则收端通信节点确认发端通信节点发送的是噪声 信号, 如果收端通信节点所接收电信号的差模电压在 175mV以上, 则收端通信 节点确认发端通信节点发送了正常信号。 因此在应用本发明实施例时, 如果发端 通信节点所发送电信号的差模电压在 175mV以下,即发送端处于电气空闲状态, 或者发送噪音信号时,如果发送端的光模块仍然开启,则由于光模块的发光特性, 收端通信节点可能接收到差模电压大于 175mV的电信号, 从而导致检测结果不 准确。 因此, 在应用本实施例时, 可以设置门限值为 175mV, 则当检测到发端 通信节点的 PCIe接口芯片的发送端差模电压小于 175mV时,控制发送端的光模 块关闭, 保证光通信链路正常。 需要说明的是, 上述门限值设置为 175mV仅为 一种示例, 在实际应用过程中, 可以根据需要调整该门限值, 对此本发明实施例 不进行限制。
步骤 203: 控制与接口模块连接的光模块关闭, 返回步骤 201。
本实施例中, 在控制与接口模块连接的光模块关闭时, 可以通过使能光模块 的控制端 TX_DISABLE, 控制光模块的激光器关闭; 或者也可以通过向光模块 的 I2C接口发送关闭命令, 控制光模块的激光器关闭; 或者, 也可以将差模电压 低于门限值的检测结果通过中断方式发送给 CPU, 以通过该 CPU控制光模块的 激光器关闭。 当发送端的光模块的激光器关闭后, 该发送端的光模块不再发出光 信号, 因此接收端也不会接收到光信号。
步骤 204: 控制与接口模块连接的光模块开启, 返回步骤 201。
本实施例中, 在控制与接口模块连接的光模块开启时, 可以通过去使能光模 块的控制端 TX_DISABLE, 控制光模块的激光器开启; 或者也可以通过向光模 块的 I2C接口发送开启命令, 控制光模块的激光器开启; 或者, 也可以将差模电 压高于门限值的检测结果通过中断方式发送给 CPU, 以通过该 CPU控制光模块 的激光器开启。 当发送端的光模块的激光器开启后, 该发送端的光模块发出光信 号, 与接收端的光模块之间进行正常的光纤通信。
由上述实施例可见, 当通信双方采用光纤通信时, 对于发送端, 可以在检测 到其发送信号的差模电压低于门限值时, 控制光模块关闭, 使得发送端无法输出 噪音信号, 从而防止接收端接收到异常信号, 保证光纤通信线路正常。 下面结合几个光通信架构实例对本发明实施例进行详细描述,下述每个光通 信架构中包括两个通信节点, 每个通信节点都包括 PCIe接口芯片和检控电路, 每个通信节点的 PCIe接口芯片上都包含发送端和接收端, 即两个通信节点具有 对等的通信功能, 为了描述方便, 均假设左侧的通信节点为发端通信节点, 右侧 的通信节点为收端通信节点。其中, 发端通信节点连接的光模块与收端通信节点 连接的光模块之间通过光纤连接, 以此实现两个通信节点之间的光通信; 检控电 路可以基于现场可编程门阵列 (Field Programmable Gate Array, FPGA) 实现。
参见图 3, 为应用本发明实施例的一个光通信架构示意图:
图 3中, 发端通信节点的 PCIe接口芯片和检控电路分开设置, PCIe接口芯 片的发送端上设置差分线对,分别用 D1+和 D1-表示,对应收端通信节点的 PCIe 接口芯片上设置的差分线对 D2+和 D2-,发端通信节点的检控电路连接到上述差 分线对 D1+和 D1-上, 以便对 D1+和 D1-之间的差模电压进行检测, 同时检控电 路还连接到光模块, 根据控制类型的不同, 其中一根控制线路连接到光膜块的控 制端 TX_DISABLE上, 另一根控制线可以连接到光模块的 I2C接口上。
在控制光纤通信时,发端通信节点的检控电路检测 D1+和 D1-之间的电压差, 获得差模电压,当检测到的差模电压低于 175mV时,可以通过使能 TX_DISABLE 控制光模块的激光器关闭,也可以通过向 I2C接口发送关闭命令控制光模块的激 光器关闭。 当关闭发端通信节点侧发送端的光模块的激光器后, 发端通信节点侧 发送端的光模块和收端通信节点侧接收端的光模块之间通信中断,从而保证收端 通信节点差模电压检测结果的准确性。 当检测到的差模电压高于 175mV时, 说 明发端通信节点要传输正常信号, 因此可以通过去使能 TX_DISABLE控制光模 块的激光器开启, 也可以通过向 I2C 接口发送开启命令控制光模块的激光器开 启。 当开启发端通信节点侧发送端的光模块的激光器后, 发端通信节点侧发送端 的光模块和收端通信节点侧接收端的光模块之间恢复通信。 参见图 4, 为应用本发明实施例的另一个光通信架构示意图:
与图 3不同在于, 图 4中检控电路集成在 PCIe接口芯片上, 相当于由 PCIe 接口芯片直接控制光模块。图 4中检控电路控制光纤通信的过程与图 3中的描述 一致, 在此不再赘述。 参见图 5, 为应用本发明实施例的另一个光通信架构示意图:
与图 3和图 4相同之处在于, 图 5中发端通信节点的检控电路仍然连接到
PCIe接口芯片的发送端的差分线对 D1+和 D1-上, 以便对 D1+和 D1-之间的差模 电压进行检测; 与图 3和图 4不同之处在于, 图 5中检控电路不直接连接到光模 块, 而是连接到 CPU, 从而可以通过 CPU控制控制光模块的开启和关闭。
在控制光纤通信时,发端通信节点的检控电路检测 D1+和 D1-之间的电压差, 获得差模电压, 当检测到的差模电压低于 175mV时, 可以通过中断方式将该检 测结果发送给 CPU, CPU可以通过使能 TX_DISABLE控制光模块的激光器关闭, 也可以通过向 I2C接口发送关闭命令控制光模块的激光器关闭。当关闭发端通信 节点侧发送端的光模块的激光器后,发端通信节点侧发送端的光模块和收端通信 节点侧接收端的光模块之间通信中断,从而保证收端通信节点差模电压检测结果 的准确性。 当检测到的差模电压高于 175mV时, 说明发端通信节点要传输正常 信号, 因此发端通信节点的检控电路可以通过中断方式将该检测结果发送给 CPU, CPU可以通过去使能 TX_DISABLE控制光模块的激光器开启, 也可以通 过向 I2C接口发送开启命令控制光模块的激光器开启。当开启发端通信节点侧发 送端的光模块的激光器后,发端通信节点侧发送端的光模块和收端通信节点侧接 收端的光模块之间恢复通信。
需要说明的是, 图 5中示出的通信架构中, 检控电路与 PCIe接口芯片分开 设置, 在实际应用中, 检控电路也可以集成在 PCIe接口芯片上, 对此本发明实 施例不进行限制。 与本发明抑制 PCIe走光纤通信输出噪声的方法的实施例相对应, 本发明还 提供了抑制 PCIe走光纤通信输出噪声的装置及通信节点的实施例。
参见图 6, 为本发明抑制 PCIe走光纤通信输出噪声的装置的实施例: 该装置包括: 检测单元 610和控制单元 620。
其中, 检测单元 610, 用于检测接口模块发送端的差模电压;
控制单元 620, 用于当所述检测单元 610检测到的所述差模电压低于门限值 时, 控制与所述接口模块连接的光模块关闭。
可选的, 所述控制单元 620可以包括至少一个下述单元 (图 6中未示出): 第一控制子单元, 用于通过使能所述光模块的控制端 TX_DISABLE, 控制 所述光模块的激光器关闭;
第二控制子单元, 用于通过向所述光模块的 I2C接口发送关闭命令, 控制所 述光模块的激光器关闭。
可选的, 所述控制单元 620, 可以具体用于将所述差模电压低于门限值的检 测结果通过中断方式发送给中央处理器 CPU, 以通过所述 CPU控制所述光模块 的激光器关闭。
可选的, 所述控制单元 620, 还可以用于当所述检测单元 610检测到的差模 电压高于所述门限值时, 控制与所述接口模块连接的光模块开启。 参见图 7, 为本发明通信节点的实施例框图:
该通信节点包括: PCIe接口芯片 710和与所述 PCIe接口芯片 710的发送端 连接的检控电路 720。
其中, 所述检控电路 720, 用于检测所述 PCIe接口芯片 710的发送端的差 模电压, 当所述差模电压低于门限值时, 控制与所述 PCIe接口芯片 710连接的 光模块关闭。
可选的, 所述检控电路 720, 可以具体用于通过使能所述光模块的控制端 TX.DISABLE,控制所述光模块的激光器关闭,或者通过向所述光模块的 I2C接 口发送关闭命令, 控制所述光模块的激光器关闭。
可选的,所述通信节点还可以包括 CPU(图 7中未示出):所述检控电路 720, 可以具用于将所述差模电压低于门限值的检测结果通过中断方式发送给所述 CPU; 所述 CPU, 用于控制所述光模块的激光器关闭。
可选的,所述检控电路 720,还可以用于当所述差模电压高于所述门限值时, 控制与所述 PCIe接口芯片 710连接的光模块开启。
可选的, 所述检控电路 720可以集成在所述 PCIe接口芯片 710上。 由上述实施例可见, 检测接口模块发送端的差模电压, 当差模电压低于门限 值时, 控制与接口模块连接的光模块关闭。 应用本发明实施例, 当通信双方采用 光纤通信时, 对于发送端, 可以在检测到其发送信号的差模电压低于门限值时, 控制光模块关闭, 使得发送端无法输出噪音信号, 从而防止接收端接收到异常信 号, 保证光纤通信线路正常。
可以理解的是, 在上述实施例中, 在 PCIe接口芯片可以同时支持多个通道 (lane) 信号传输的情况下, 由于多个通道之间的通信状态是独立的, 检控电路 在控制与 PCIe接口芯片连接的光模块关闭时, 可以仅关闭光模块的一个通道, 使被关闭的一个通道不发送光信号。例如, 当光模块中的发光器件为激光器阵列 时, 检控电路可以使光模块的一个通道的激光器不发送光信号, 而不会影响其他 通道的状态。 需要说明的是, 本发明实施例中的 PCIe接口芯片也可以称为 PCIe 心片。 图 8为本发明实施例提供的一种光模块的结构示意图。 可以理解的是, 图 8 所示的光模块 80可以为图 1-A中所示的第一光模块 12,也可以为第二光模块 22。 下面结合图 1-A对图 8所示的光模块 80进行描述。如图 8所示,光模块 80可以 包括: 驱动模块 82、 电光转换模块 84、 光电转换模块 86、 检测模块 87以及电 信号驱动模块 88。
驱动模块 82, 与 PCIe芯片的发送端连接, 通常用于实现对 PCIe芯片发送 端发送的电信号进行均衡、 放大以及根据 PCIe芯片发送的电信号产生驱动信号 等功能。 实际应用中, 驱动模块 82可以具体为激光器驱动芯片。 在本发明实施 例中, 在驱动模块 82中集成有检控电路 822。 检控电路 822可以包括检测电路 8221以及控制电路 8222。 其中:
检测电路 8221, 用于检测 PCIe芯片发送的差分电信号的差模电压是否低于 预设的门限值。
控制电路 8222, 用于根据检测电路 8221的检测结果生成控制信号, 以实现 对电光转换模块 84发送的光信号的控制。实际应用中, 控制电路 8222可以是激 光器控制电路, 控制电路 8222生成的控制信号可以为激光器驱动信号。 可以理 解的是, 控制电路 8222生成的激光器驱动信号具体为电信号, 具体的, 激光器 驱动信号可以为电压信号, 也可以为电流信号。
电光转换模块 84的接收端与驱动模块 82的输出端连接, 电光转换模块 84 的发送端通过光纤与接收端光模块连接, 具体的, 电光转换模块 84的发送端可 以通过光纤与接收端光模块 (例如, 图 1-A中的第二光模块 22) 的光电转换模 块连接。 电光转换模块 84用于根据驱动模块 82中的控制电路 8222生成的控制 信号发送光信号。换一种表达方式, 电光转换模块 84用于将驱动模块 82生成的 控制信号转换为光信号, 并将转换后的光信号通过光纤发送出去。 实际应用中, 电光转换模块 84可以为激光器、激光器阵列或发光二极管(Light-Emitting Diode, LED), 例如电光转换模块 84可以为垂直腔面发射激光器 (Vertical Cavity Surface Emitting Laser, VCSEL)。电光转换模块 84能够根据驱动模块 82发出的驱动信号 发射出相应速率的调制光信号, 在电光转换模块 84内部带有光功率自动控制电 路, 能够使输出的光信号的功率保持稳定。
当光模块 80作为接收端光模块 (例如, 图 1-A中的第二光模块 22) 时, 光 电转换模块 86, 用于接收发送端光模块 (例如, 图 1-A中的第一光模块 12) 发 送的光信号, 并将接收的光信号转换为电信号。 实际应用中, 光电转换模块 86 可以为光电二极管或光电二极管阵列。 可以理解的是, 经光电转换模块 86转换 后的电信号可以为电流信号。
检测模块 87的一端与光电转换模块 86连接, 另一端与电信号驱动模块 88 的输入端连接。检测模块 87用于检测光电转换模块 86接收的光信号的光功率或 用检测根据所述光电转换模块 86接收的光信号转换获得的电信号的波形。 实际 应用中, 可以采用分光技术, 将光电转换模块 86接收的光信号中分出的一部分 光信号在检测模块 87中进行检测, 以实现对接收的光信号的光功率的检测或实 现对根据光信号转换获得的电信号的波形的检测。 检测模块 87可以将其检测结 果发送给电信号驱动模块 88。 电信号驱动模块 88可以根据检测模块 87的检测 结果控制电信号驱动模块 88向 PCIe芯片输入端输出的差分电信号的差模电压。 可以理解的是,检测模块 87可以独立存在,也可以集成于电信号驱动模块 88中, 在此不做限定。
电信号驱动模块 88的输入端分别与光电转换模块 86的输出端以及检测模块 的输出端连接, 电信号驱动模块 88的输出端与 PCIe芯片的接收端连接。 电信号 驱动模块 88用于根据检测模块 87的检测结果实现对光电转换模块 86转换的电 信号的处理, 以便能够向 PCIe芯片接收端输出满足要求的差分电信号。 例如, 电信号驱动模块 88可以控制是否将光电转换模块 86转换的电信号传输给 PCIe 芯片。 或者, 电信号驱动模块 88可以对传输给 PCIe芯片的电信号进行处理, 以 便能够向 PCIe芯片的接收端输出满足要求的差分电信号。 其中, 电信号驱动模 块 88对电信号的处理包括对电信号进行转换、 放大、 限幅或预加重等至少一种 处理方式。 实际应用中, 电信号驱动模块 88 中可以包括跨导放大器 (Trans-impedance amplifier, TIA)。
实际应用中, 光模块 80中还可以包括微控制模块, 微控制模块可以通过管 理通道和监控通道与驱动模块 82、 电光转换模块 84、 光电转换模块 86、 检测模 块 87以及电信号驱动模块 88进行交互。并且, 微控制模块还可以通过内部集成 电路 (Inter— Integrated Circuit, I2C) 接口与包含 PCIe芯片的 PCIe设备实现信 息交互, 以实现 PCIe设备对光模块 80的管理和监控。 可以理解的是, I2C接口 仅仅是光模块 80的带外管理接口的一种示例。 图 9为本发明实施例提供的另一种光模块的结构示意图。图 9所示的光模块 与图 8所示的光模块的区别在于, 在图 9所示的光模块中, 检测电路 8221位于 驱动模块 82的外部, 作为驱动模块 82的外围电路独立存在。 图 10为本发明实施例提供的又一种通信方法的信令图, 该方法应用于根据 PCIe标准传输光信号的通信系统中。 该方法能够在通信通道处于 EI状态时, 抑 制光模块在该通道上输出的噪声, 使链路两端的通信状态保持一致。该方法可以 由图 1-A、 图 8或图 9中所示的光模块来实现。 为了能够清楚地显示信号的传输 过程, 图 11以图 1-A中所示的第一通信节点 10为发送端以及第二通信节点 20 为接收端为例进行描述。 图 11对当通信通道处于 EI状态时, 第一光模块 12作 为发送端光模块时处理信号涉及的模块以及第二光模块 22作为接收端光模块时 处理信号涉及的模块进行了图示。 当然, 可以理解的是, 无论是第一光模块 12 还是第二光模块 22都既可以作为发送端光模块对 PCIe设备发送的信号进行处 理, 也可以作为接收端光模块对 PCIe设备接收的信号进行处理。 下面将结合图 1-A及图 11对图 10中的通信方法进行描述。 如图 10所示, 该方法可以包括: 在步骤 1000中,第一光模块 12接收第一 PCIe芯片 14通过第一通道发送的 第一电信号 901。 实际应用中, 在 PCIe芯片发送端可以同时通过多个通道 (lane) 分别向接收端 PCIe芯片发送多路数据信号, 以提高数据传输的效率。例如, PCIe 芯片发送端可以同时通过 1个通道、 2个通道、 4个通道、 8个通道或 16个通道 向接收端 PCIe芯片传输数据。 本领域人员可以知道, 每一个通道的发送端包括 一组发送器和接收器, 每一个通道的接收端也包括一组发送器和接收器。 例如, 如果 PCIe芯片只能够支持一个通道的信号传输,则在发送端 PCIe芯片内包含一 组发送器和接收器, 在接收端的 PCIe芯片中也包括一组发送器和接收器; 如果 PCIe芯片能够支持 4个通道的信号传输, 则在发送端 PCIe芯片内可以包含 4组 发送器和接收器, 在接收端 PCIe芯片内中也需要包含 4组发送器和接收器。 其 中, 一组发送器和接收器包括一个发送器和一个接收器。
当 PCIe芯片的某一个通道出现链路状态切换或低功耗模式, 该通道链路会 处于 EI状态。 可以理解的是, 在光纤通信中, 传输通道之间是相互独立的, 不 会相互影响。 例如, 一个通道出现 EI状态时, 不会影响其他通道的数据传输。 在发明实施例中, 所描述的通道是指发送端 PCIe芯片(例如, PCIe芯片 14)与 接收端 PCIe 芯片 (例如, PCIe芯片 24) 之间通过第一光模块和第二光模块建 立的用于传输数据的通信通道。 可以理解的是, 如果发送端 PCIe芯片从第一通 道发送信息, 接收端 PCIe芯片会通过第一通道接收信息。 换一种表达方式, 本 发明实施例中所述的通信通道可以理解为数据传输过程中经过的路径。需要说明 的是, 本发明实施例中的第一通道是指 PCIe芯片传输数据的任意一个通道。
在步骤 1005中,第一光模块 12确定所述第一电信号 901的差模电压低于第 一门限值。实际应用中, 可以由第一光模块 12中的检测电路 8221检测所述第一 电信号 901的差模电压,并判断所述第一电信号 901的差模电压是否低于第一门 限值。 检测电路 8221具体可以通过检测第一电信号 901的电压幅度来检测第一 电信号 901的差模电压。 在图 10所示的实施例中, 以第一电信号 901的差模电 压低于第一门限值时第一光模块 12及第二光模块 22的处理为例进行描述。
第一门限值为预设的当通信通道处于 EI状态时 PCIe芯片发送的电信号的差 模电压的门限值。根据 PCIe标准定义, 如果接收端 PCIe芯片所接收的电信号的 差模电压在 65mV (毫伏) 以下, 则接收端 PCIe芯片认为通信通道处于电气空 闲状态。如果接收端 PCIe芯片所接收的电信号的差模电压在 175mV以上, 则接 收端 PCIe芯片确认通信通道退出了电气空闲状态,发送端 PCIe芯片发送了数据 信号。 实际应用中, 当第一 PCIe芯片 14的一个通道处于 EI状态, 即第一 PCIe 芯片 14在该通道的发送器的差模电压低于 65mV时, 考虑到该通道的通信链路 上产生的噪声, 在第一光模块 12的接收端接收到的差分电信号的差模电压可能 高于 65mV。 在本发明实施例中, 一种情形下, 如果检测电路 8221位于光模块 12中, 考虑到通信链路上产生的噪声, 可以将第一门限值设置为 175mV。例如, 当检测电路 8221位于光模块 12中的情形下, 当检测电路 8221检测到第一通道 的第一电信号 901的差模电压低于 175 mV时, 则认为发端通信节点 10的 PCIe 芯片 14的第一通道处于 EI状态。在又一种情形下, 如果不考虑通信链路上产生 的噪声, 也可以将第一门限值设置为 65 mV。 需要说明的是, 将第一门限值设置 为 175mV或 65mV仅仅是一种示例, 在实际应用中, 还可以根据实际需要调整 该第一门限值, 本发明实施例对此不做限定。 可以理解的是, 本发明实施例中的 第一门限值不会高于 175mV。
在步骤 1010中, 第一光模块 12生成第一控制信号 902, 所述第一控制信号 902用于表示所述第一通道处于 EI状态。 由于在步骤 1005中, 第一模块 12确 定所述第一电信号 901的差模电压低于第一门限值, 则第一光模块 12认为第一 PCIe芯片 14的第一通道处于 EI状态, 第一光模块 12生成第一控制信号 902, 第一控制信号 902用于表示第一通道处于 EI状态。 实际应用中, 可以由第一光 模块 12中的检控电路 822中的控制电路 8222根据检测电路 8221的检测结果生 成第一控制信号 902, 并向电光转换模块 84发送第一控制信号 902。第一控制信 号 902可以是电光转换模块 84的驱动信号, 其中, 驱动信号可以包括驱动电流 信号。例如, 如果电光转换模块 84为激光器或激光器阵列时,第一控制信号 902 可以是激光器的驱动电流信号,该驱动电流信号用于控制所述第一通道的激光器 发射出相应速率的调制光信号。
为了使第一光模块 12在通信通道处于 EI状态时发送的光信号与传输数据时 发送的光信号相区别, 第一光模块 12可以根据预设的用于表示通信通道处于 EI 状态的控制信号的码型生成第一控制信号 902。本发明实施例可以将通信通道处 于 EI状态时的控制信号的波形与传输数据时的控制信号的波形相区别。 例如, 在一种实现方式下, 可以使通信通道处于 EI状态时的控制信号的频率与传输数 据时的控制信号的频率不同, 使得当通信通道处于 EI状态时光模块发出的光信 号的频率与传输数据时光模块发出的光信号的频率不同。 在另一种实现方式下, 可以使通信通道处于 EI状态时的控制信号的幅度与传输数据时的控制信号的幅 度不同, 使得当通信通道处于 EI状态时光模块发出的光信号的光功率与传输数 据时光模块发出的光信号的光功率不同。在本发明实施例, 不对当通信通道处于 EI状态时的控制信号的波形进行限定, 只要能够与传输数据时的控制信号的波 形相区别, 进而能使在通信通道处于 EI状态时光模块发送的光信号与传输数据 时光模块发送的光信号相区别即可。本发明实施例中, 为了描述清楚, 下面将第 一 PCIe芯片 14传输数据时生成的控制信号称为第二控制信号 907, 将第一光模 块 12根据第二控制信号 907发送的光信号称为第三光信号 908。
在步骤 1015中, 第一光模块 12根据第一控制信号 902向第二光模块 22发 送第一光信号 903。第一光模块 12中的检控电路 822向电光转换模块 84发送第 一控制信号 902, 第一控制信号 902用于驱动电光转换模块 84根据第一控制信 号 902发送第一光信号 903。 实际应用中, 第一控制信号 902可以为驱动电流信 号, 可以根据第一控制信号 902的驱动电流的大小实现对电光转换模块 84发出 的光信号的强弱的控制, 也可以根据控制信号 902 的频率实现对电光转换模块 84发出的光信号的频率的控制。
实际应用中, 第一光模块 12中的电光转换模块 84可以根据第一控制信号 902通过第一通道发送第一光信号 903。例如, 如果电光转换模块 84为激光器阵 列,则第一光模块 12中的电光转换模块 84可以控制第一通道的激光器根据第一 控制信号 902发送第一光信号 903, 而不影响其他通道的光信号的传输。
如图 1-A所示,由于第一光模块 12和第二光模块 22之间通过光纤 30连接, 因此第一光模块 12可以通过光纤 30向第二光模块 22发送第一光信号 903。 可 以理解的是, 由于第一控制信号 902 的波形可能与传输数据时的第二控制信号 907的波形不同, 因此, 电光转换模块 84根据第一控制信号 902产生的第一光 信号 903与电光转换模块 84根据第二控制信号 907生成的第三光信号 908不同。 例如, 若第一控制信号 902与第二控制信号 907的振幅不同, 则第一光信号 903 的光功率与第三光信号 908的光功率会有区别。 在步骤 1020中, 第二光模块 22将第一光信号 903转换为第二电信号 904。 第二光模块 22中的光电转换模块 86可以将第一光信号 903转换为第二电信号 904。 其中, 光电转换模块 86可以为光电二极管, 在此不对光电转换模块 86的 具体形式做限定, 只要能够将光信号转换为电信号即可。
在步骤 1025中,第二光模块 22根据第二电信号 904确定第一光信号 903为 表示所述第一通道处于 EI状态的光信号。实际应用中, 第二光模块 22可以根据 第二电信号 904的波形来判断第一光信号 903是否为表示所述第一通道处于 EI 状态的光信号。 若第二电信号 904 的波形与所述预设的用于表示通信通道处于 EI状态的控制信号的波形相同, 则确定第一光信号 903为表示所述第一通道处 于 EI状态的光信号。 若第二电信号 904的波形与所述预设的用于表示通信通道 处于 EI状态的控制信号的波形不同, 则确定第一光信号 903不是用于表示所述 第一通道处于 EI状态的光信号。
第二光模块 22中的检测模块 87可以通过分光技术对光电转换模块 86接收 的第一光信号 903转换成的第二电信号 904的波形进行检测,从而可以判断第二 电信号 904的波形是否与所述预设的用于表示通信通道处于 EI状态的控制信号 的波形相同。例如, 可以利用分光技术将第一光信号 903的一部分光信号输入检 测模块 87, 检测模块 87将第一光信号 903的部分光信号转换成电信号, 并对转 换后的电信号的波形进行检测, 从而能够获得第二电信号 904的波形。
在步骤 1030中, 第二光模块 22抑制通过所述第一通道向第二 PCIe芯片 24 输出的第三电信号 905的差模电压,抑制后的第三电信号 905的差模电压低于第 二门限值。 第二光模块 22中的电信号驱动模块 88通常用于对光电转换模块 86 输出的电信号进行处理, 以便能够向第二 PCIe芯片 24输出满足要求的电信号。 在本发明实施例中,当电信号驱动模块 88接收到光电转换模块 86发送的第二电 信号 904时, 可以根据检测模块 87的检测结果对第二电信号 904进行处理, 以 便能够向第二 PCIe芯片 24输出满足要求的第三电信号 905。 若第二光模块 86 中的检测模块 87根据第二电信号 904确定第一光信号 903为用于表示通信通道 处于 EI状态的光信号, 则表明所述第一光信号 903传输的并不是数据。 为了抑 制第二光模块 22在第一通道处于 EI状态时将链路上的噪声放大后发送给第二 PCIe芯片 24, 使第一通道两端的 PCIe芯片的通信状态保持一致, 第二光模块 22中的电信号驱动模块 88可以抑制输出的第三电信号 905的差模电压。抑制后 的第三电信号 905的差模电压低于第二门限值,以使得第二 PCIe芯片 24接收到 的电信号的差模电压低于 175mV, 从而可以达到通知第二 PCIe芯片 24保持所 述第一通道的接收端处于 EI状态的目的。 可以理解的是, 第二门限值可以根据 实际情况进行设定, 在此不做限定, 实际应用中, 考虑到链路上的噪声, 第二门 限值不应超过 175mV。
在步骤 1035中,第二光模块 22通过所述第一通道向第二 PCIe芯片 24输出 所述抑制后的第三电信号 905。 由于在步骤 1030中, 第二光模块 22抑制了第三 电信号 905的差模电压,抑制后的第三电信号 905的差模电压低于所述第二门限 值, 因此, 在步骤 1035中, 第二光模块 22通过所述第一通道向第二 PCIe芯片 24输出抑制后的第三电信号 905后, 第二 PCIe芯片 24接收到的电信号的差模 电压不会高于 175mV, 从而第二 PCIe芯片 24不会将接收到的电信号误认为是 数据。 避免了当第一 PCIe芯片 14的第一通道处于 EI状态时, 链路上的噪声对 所述第一通道链路状态的影响。
在图 10所示的实施例中,第一光模块 12可以将第一光信号 903通过现有的 光模块之间的第一通道传输给第二光模块 22, 其中, 在第一通道处于非 EI状态 时, 第一通道可以用于传输数据。 在另一种情形下, 还可以在第一光模块 12和 第二光模块之间增加一个光纤通道, 该增加的光纤通道不用于传输数据。该增加 的光纤通道专门用于在某个通信通道处于 EI状态时, 传输根据预设的用于表示 通信通道处于 EI状态的控制信号生成的光信号, 以便将某个通信通道处于 EI状 态的信息传递给第二光模块 22。 从而, 第二光模块 22可以对通过相应通信通道 向第二 PCIe芯片 24输出的电信号的差模电压进行处理。
上述实施例所描述的通信方法, 在第一光模块检测到第一 PCIe芯片的第一 通道处于 EI状态时,根据预设的用于表示通信通道处于 EI状态的控制信号通过 所述第一通道向第二光模块发送光信号, 以通知第二光模块所述第一通道处于 EI状态。 第二光模块根据接收到的用于表示所述第一通道处于 EI状态的光信号 抑制向第二 PCIe芯片发送的差分电信号的差模电压。 本发明实施例所述的通信 方法, 在通信通道处于 EI状态时, 能够避免光模块放大链路上的噪声, 同时能 够使发送端 PCIe芯片和接收端 PCIe芯片之间的链路状态保持一致。 图 12为本发明实施例提供的又一种通信方法的信令图, 所述方法应用于根 据 PCIe标准传输光信号的通信系统中。 该方法能够在通信通道处于 EI状态时, 抑制光模块在该通道上输出的噪声, 同时能够使发送端 PCIe芯片与接收端 PCIe 芯片之间的链路状态保持一致。 该方法可以由图 1-A、 图 8或图 9中所示的光模 块来实现。该方法也是以第一 PCIe芯片 14为发送端、第二 PCIe芯片 24为接收 端为例进行描述。下面结合图 1-A和图 8对图 12进行描述, 如图 12所示, 该方 法可以包括:
在步骤 1200中,第一光模块 12接收第一 PCIe芯片 14通过第一通道发送的 第一电信号 901。 步骤 1200与图 10所示的步骤 1000类似, 具体可以参见图 10 所示的步骤 1000的描述。
在步骤 1205中,第一光模块 12确定所述第一电信号 901的差模电压低于第 一门限值。步骤 1205与图 10所示的步骤 1005类似, 具体可以参见图 10所示的 步骤 1005的描述。
在步骤 1210中, 第一光模块 12生成第三控制信号。其中, 所述第三控制信 号用于禁止第一光模块 12中的光电转换模块 84通过所述第一通道发送光信号。 第三控制信号可以为电流信号。 以电光转换模块 84为激光器阵列为例, 当第一 光模块 12中的检测电路 8221检测到第一通道的第一电信号 901的差模电压低于 所述第一门限值时, 检测电路 8221 可以通知控制电路 8222关闭光电转换模块 84的第一通道的激光器的驱动电流, 以禁止光电转换模块 84的激光器通过所述 第一通道发送光信号。
在步骤 1215中,第一光模块 12根据所述第三控制信号禁止通过所述第一通 道发送光信号。 实际应用中, 以电光转换模块 84为激光器阵列为例, 由于当第 一光模块 12中的检测电路 8221检测到第一通道的第一电信号 901的差模电压低 于所述第一门限值时,控制电路 8222会关闭光电转换模块 84的第一通道的激光 器的驱动电流, 则光电转换模块 84的第一通道的激光器不会发送光信号。
由于上述通信方法中, 第一光模块 12在检测到第一 PCIe芯片 14的第一通 道的第一电信号 901的差模电压低于第一门限值时,会禁止通过第一通道发送光 信号。 从而在第一 PCIe芯片 14的第一通道处于 EI状态时, 从发送端控制了链 路上噪声的输出, 防止接收端接收到异常信号, 保证光纤通信线路正常。
在步骤 1220中, 第二光模块 22检测所述第一通道的光信号的光功率。第二 光模块 22中的检测模块 87可以通过分光技术对第一通道的光信号的光功率进行 检测。 实际应用中, 检测模块 87可以将分光后的光信号经过专用的光电二极管 转换为电流信号,并根据转换后的电流信号的电流大小计算获得所述第一通道的 光信号的光功率。
在步骤 1225中,第二光模块 22确定所述第一通道的光信号的光功率低于阈 值。 在本发明实施例中, 所述阈值是指为第二光模块 22接收的光信号的光功率 设置一个门限值, 当第二光模块 22接收的光信号的光功率低于该门限值时, 第 二光模块 22认为没有接收到有效的光信号。 可以理解的是, 该阈值小于传输数 据的光信号的光功率值,在本发明实施例中不对光功率的阈值的具体数值进行限 定。 可以理解的是, 参见图 1-A, 由于在步骤 1215中, 第一光模块 12禁止通过 所述第一通道发送光信号, 因此, 在步骤 1225中, 第二光模块 22检测到的第一 通道的光信号的光功率会低于所述阈值, 第二光模块 22没有通过第一通道接收 到有效的光信号。
在步骤 1230中, 第二光模块 22抑制通过所述第一通道向第二 PCIe芯片 24 输出的电信号的差模电压。 其中, 抑制后的电信号的差模电压低于第二门限值。 实际应用中, 考虑到链路上的噪声的影响, 在第二光模块 22的电信号驱动模块 88的输入端还可能会有部分电信号输入。 在步骤 1230中, 第二光模块 22中的 电信号驱动模块 88可以根据检测模块 87的检测结果,抑制通过所述第一通道向 第二 PCIe芯片 24输出的电信号的差模电压,抑制后的电信号的差模电压低于第 二门限值, 使得第二 PCIe芯片 24接收到的电信号的差模电压低于 175mV。 关 于第二门限值的描述可以参见图 10实施例的相关描述。
在步骤 1235中,第二光模块 22通过所述第一通道向第二 PCIe芯片 24输出 所述抑制后的电信号。 由于在步骤 1230中, 第二光模块 22抑制了将要通过所述 第一通道向第二 PCIe芯片 24输出的电信号的差模电压,使得抑制后的电信号的 差模电压低于所述第二门限值。 因此, 在步骤 1235中, 第二光模块 22通过所述 第一通道向第二 PCIe芯片 24输出抑制后的电信号后,第二 PCIe芯片 24接收到 的电信号的差模电压会低于 175mV。 从而, 第二 PCIe芯片 24不会将该电信号 误认为是数据, 避免了第二 PCIe芯片 24接收异常信号。
图 12所示的通信方法, 在作为发送端的第一 PCIe芯片 14的第一通道处于 EI状态时, 第一光模块 12会禁止通过第一通道发送光信号。并且第二光模块 22 在第一光模块 12禁止通过第一通道发送光信号的情况下, 抑制了将要通过所述 第一通道向第二 PCIe芯片 24输出的电信号的差模电压。 通过图 12所示的方法 可以控制了路上噪声的输出, 防止第二 PCIe芯片 24在通信通道处于 EI状态时 接收到异常信号, 保证光纤通信线路正常。进一步的, 第二 PCIe芯片 24可以根 据其接收到的电信号的差模电压确定第一 PCIe芯片 14的第一通道依然保持 EI 状态, 从而能够保证第一通道两端的链路状态保持一致。 在又一种情形下, 本发明实施例在图 10或图 12所示的通信方法的基础上, 还可以包括如图 13所示的通信方法。图 13为本发明实施例所述的又一种通信方 法的信令图, 该方法应用于根据 PCIe标准传输光信号的通信系统中。 图 13所示 的通信方法的信令图描述了发送端 PCIe芯片及接收端 PCIe芯片正常传输数据时 光模块的处理过程。 该方法可以由图 1-A、 图 8或图 9中所示的光模块来实现。 图 13所示的方法也是以第一 PCIe芯片 14为发送端、 第二 PCIe芯片 24为接收 端为例进行描述。 下面结合图 1-A、 图 8及图 11对图 13进行描述。 图 13所描 述的信令具体可以参见图 11中虚线表示的信令所示。如图 13所示, 该方法可以 包括:
在步骤 1300中,第一光模块 12接收第一 PCIe芯片 14通过第一通道发送的 第四电信号 906。 其中, 第四电信号 906中携带有第一 PCIe芯片 14要传输的数 据信息。
在步骤 1305中,第一光模块 12确定第四电信号 906的差模电压不低于第一 门限值。实际应用中, 可以由第一光模块 12中的检测电路 8221检测所述第四电 信号 906的差模电压,并判断所述第四电信号 906的差模电压是否低于第一门限 值。 检测电路 8221具体可以通过检测第四电信号 906的电压幅度来检测第四电 信号 906的差模电压。 由于如图 10中步骤 1005中所述, 第一门限值为预设的当 通信通道处于 EI状态时 PCIe芯片发送的电信号的差模电压的门限值。根据 PCIe 标准定义, 如果接收端 PCIe芯片所接收的电信号的差模电压在 175mV以上, 则 接收端 PCIe芯片确认通信通道退出了电气空闲状态,发送端 PCIe芯片发送的是 数据信号。 因此, 可以理解的是, 第一门限值不会高于 175mV。 由于第四电信 号 906中携带有第一 PCIe芯片 14传输的数据信息, 因此, 第一光模块 12中的 检测电路 8221可以检测出第四电信号 906的差模电压不低于预设的所述第一门 限值。
在步骤 1310中, 第一光模块 12生成第二控制信号 907。 实际应用中, 当第 一光模块 12中的检测电路 8221检测到第四电信号 906的差模电压不低于所述第 一门限值时, 则说明第一 PCIe芯片 14的第一通道已经退出 EI状态, 第一 PCIe 芯片 14的第一通道发送的是正常的数据。检测电路 8221可以将所述第四电信号 906透传给控制电路 8222, 由控制电路 8222根据第四电信号 906生成第二控制 信号 907, 并向电光转换模块 84发送第二控制信号 907。第二控制信号 907可以 是电光转换模块 84的驱动信号, 其中, 驱动信号可以包括驱动电流信号。 需要 说明的是,由于第二控制信号 907是根据携带有数据信息的第四电信号 906生成, 因此, 第二控制信号 907的波形与预设的用于表示通信通道处于 EI状态时的控 制信号的波形不同。 可以理解的是, 由于第四电信号 906中携带有第一 PCIe芯 片 14发送的数据信息, 因此, 根据第四电信号 906生成的第二控制信号 907中 也会携带第一 PCIe芯片 14发送的数据信息。
在步骤 1315中,第一光模块 12根据所述第二控制信号 907通过所述第一通 道向第二光模块 22发送第三光信号 908。 实际应用中, 第二光模块 12中的电光 转换模块 84可以根据第二控制信号 907控制通过所述第一通道发射出相应速率 的调制光信号。所述第三光信号 908中携带有所述第一 PCIe芯片 14发送的数据 信息。第一光模块 12可以通过光纤 30将第三光信号 908发送给第二光模块 22。
在步骤 1320中, 第二光模块 22将第三光信号 908转换为第五电信号 909。 具体的,第二光模块 22中的光电转换模块 86可以将第三光信号 908转换为第五 电信号 909。 其中, 光电转换模块 86可以为光电二极管。
在步骤 1325中, 第二光模块 22确定第五电信号 909 的波形与预设的用于 表示通信通道处于 EI状态的控制信号的波形不同。具体的, 第二光模块 22中的 检测模块 87可以通过分光技术对光电转换模块 86接收的第三光信号 908转换成 的第五电信号 909的波形进行检测,从而可以确定第五电信号 909的波形与所述 预设的用于表示通信通道处于 EI状态的控制信号的波形不同。
在步骤 1330中, 第二光模块 22根据所述第五电信号 909向第二 PCIe芯片 24发送第六电信号 910, 其中, 第六电信号 910中携带有第一 PCIe芯片 14发送 的数据信息。可以理解的是, 由于第六电信号 910中携带有第一 PCIe芯片 14发 送的数据信息, 因此第二光模块 22中的电信号驱动模块 88不会对第六电信号 910的差模电压进行抑制。第二 PCIe芯片 24能够从第六电信号 910中识别出的 第一 PCIe芯片 14发送的数据。 从而完成第一 PCIe芯片 14与第二 PCIe芯片 24 之间的数据传输。
图 13所示通信流程描述的是第一 PCIe芯片 14与第二 PCIe芯片 24之间的 正常的数据传输过程, 与现有技术中根据 PCIe标准传输光信号的通信系统中传 输数据的传输过程类似, 因此, 在此不做详细描述。
在又一种实现方式下, 如果在通信通道 EI状态时, 第一光模块采用的是如 图 12所述的处理方法。 相应的, 当该通信通道传输数据时, 在步骤 1325中, 第 二光模块 22可以通过检测第三光信号 908的光功率的方式来确定第三光信号 908 为传输数据的光信号。 由于第三光信号 908中携带有数据, 第三光信号 908的光 功率不会低于预设的第二门限值,从而可以根据第三光信号 908的光功率来确定 传输的是数据信号。 对于这一种实现方式, 其余步骤的实现方式可以参考图 13 中的相关步骤, 在此不再专门描述。 在又一种实现方式下, 在第一光模块 12作为接收端光模块时, 第一光模块 12也可以对第二光模块 22作为发送端光模块在通信通道处于 EI状态时发送的 光信号进行处理。下面以第二通道处于 EI状态时, 第一光模块 12作为接收端光 模块通过第二通道接收第二光模块 22发送的特殊光信号进行处理为例进行简要 描述。 当第二通道处于 EI状态时, 第一光模块 12中的光电转换模块 86可以接 收第二光模块 22通过第二通道发送的第二光信号, 并将接收的所述第二光信号 转换为电信号。第一光模块 12中的检测模块 87可以判断所述第二光信号是否为 表示通信通道处于 EI状态的光信号, 例如, 可以判断根据所述第二光信号转换 的电信号的波形与所述预设的用于表示通信通道处于 EI状态的控制信号的波形 是否相同来判断所述第二光信号是否为表示通信通道处于 EI状态的光信号。 若 第一光模块 12中的检测模块 87确定所述第二光信号为表示通信通道处于 EI状 态的光信号,则第一光模块 12中的电信号驱动模块 88可以抑制通过所述第二通 道向所述第一 PCIe芯片 14接收端发送的电信号的差模电压,所述抑制后的电信 号的差模电压低于所述第二门限值,并向所述第一 PCIe芯片 14发送所述抑制后 的电信号, 使得所述第一 PCIe芯片 14接收到的电信号的差模电压低于 175mV, 从而可以在发送端的第二通道处于 EI状态时, 抑制第一 PCIe芯片 14通过所述 第二通道接收到异常信号, 使得第一 PCIe芯片 14确定所述第二通道仍然处于 EI状态, 保持所述第二通道两端的链路状态一致。
可以理解的是, 当第一光模块 12作为接收端光模块时, 第一光模块 12中的 光电转换模块 86、 检测模块 87以及电信号驱动模块 88可以参见上述实施例中 第二光模块 22作为接收端光模块时, 第二光模块 22中的光电转换模块 86、 检 测模块 87以及电信号驱动模块 88的描述。 在此不再赘述。 本领域的技术人员可以清楚地了解到本发明实施例中的技术可借助软件加 必需的通用硬件平台的方式来实现。基于这样的理解, 本发明实施例中的技术方 案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来,该 计算机软件产品可以存储在存储介质中, 如 ROM/RAM、磁碟、光盘等, 包括若 干指令用以使得一台计算机设备(可以是个人计算机, 服务器, 或者网络设备;) 执行本发明各个实施例或者实施例的某些部分所述的方法。
本说明书中的各个实施例均采用递进的方式描述,各个实施例之间相同相似 的部分互相参见即可, 每个实施例重点说明的都是与其他实施例的不同之处。尤 其,对于系统实施例而言, 由于其基本相似于方法实施例,所以描述的比较简单, 相关之处参见方法实施例的部分说明即可。
以上所述的本发明实施方式, 并不构成对本发明保护范围的限定。任何在本 发明的精神和原则之内所作的修改、等同替换和改进等, 均应包含在本发明的保 护范围之内。

Claims

权 利 要 求
1、一种抑制高速外围设备互联 PCIe走光纤通信输出噪声的方法, 其特征在 于, 所述方法包括:
检测接口模块发送端的差模电压;
当所述差模电压低于门限值时, 控制与所述接口模块连接的光模块关闭。
2、 根据权利要求 1所述的方法, 其特征在于, 所述控制与所述接口模块连 接的光模块关闭包括:
通过使能所述光模块的控制端 TX_DISABLE, 控制所述光模块的激光器关 闭; 或者,
通过向所述光模块的内部集成电路 I2C接口发送关闭命令,控制所述光模块 的激光器关闭。
3、 根据权利要求 1所述的方法, 其特征在于, 所述控制与所述接口模块连 接的光模块关闭包括:
将所述差模电压低于门限值的检测结果通过中断方式发送给中央处理器 CPU, 以通过所述 CPU控制所述光模块的激光器关闭。
4、 根据权利要求 1至 3任意一项所述的方法, 其特征在于, 所述方法还包 括:
当所述差模电压高于所述门限值时, 控制与所述接口模块连接的光模块开 启。
5、 根据权利要求 1至 4任意一项所述的方法, 其特征在于, 所述接口模块 为基于高速外围设备互联 PCIe的接口芯片。
6、一种抑制 PCIe走光纤通信输出噪声的装置,其特征在于,所述装置包括: 检测单元, 用于检测接口模块发送端的差模电压;
控制单元, 用于当所述检测单元检测到的所述差模电压低于门限值时, 控制 与所述接口模块连接的光模块关闭。
7、 根据权利要求 6所述的装置, 其特征在于, 所述控制单元包括至少一个 下述单元:
第一控制子单元, 用于通过使能所述光模块的控制端 TX_DISABLE, 控制 所述光模块的激光器关闭;
第二控制子单元, 用于通过向所述光模块的 I2C接口发送关闭命令, 控制所 述光模块的激光器关闭。
8、 根据权利要求 6所述的装置, 其特征在于,
所述控制单元,具体用于将所述差模电压低于门限值的检测结果通过中断方 式发送给中央处理器 CPU, 以通过所述 CPU控制所述光模块的激光器关闭。
9、 根据权利要求 6至 8任意一项所述的装置, 其特征在于,
所述控制单元, 还用于当所述检测单元检测到的差模电压高于所述门限值 时, 控制与所述接口模块连接的光模块开启。
10、 一种通信节点, 其特征在于, 所述通信节点包括: PCIe接口芯片和与 所述 PCIe接口芯片的发送端连接的检控电路, 其中,
所述检控电路, 用于检测所述 PCIe接口芯片的发送端的差模电压, 当所述 差模电压低于门限值时, 控制与所述 PCIe接口芯片连接的光模块关闭。
11、 根据权利要求 10所述的通信节点, 其特征在于,
所述检控电路, 具体用于通过使能所述光模块的控制端 TX_DISABLE, 控 制所述光模块的激光器关闭, 或者通过向所述光模块的 I2C接口发送关闭命令, 控制所述光模块的激光器关闭。
12、 根据权利要求 10所述的通信节点, 其特征在于, 所述通信节点还包括 中央处理器 CPU,
所述检控电路,具体用于将所述差模电压低于门限值的检测结果通过中断方 式发送给所述 CPU;
所述 CPU, 用于控制所述光模块的激光器关闭。
13、 根据权利要求 10至 12任意一项所述的通信节点, 其特征在于, 所述检控电路,还用于当所述差模电压高于所述门限值时,控制与所述 PCIe 接口芯片连接的光模块开启。
14、根据权利要求 10至 13任意一项所述的通信节点, 其特征在于, 所述检 控电路集成在所述 PCIe接口芯片上。
15、 一种光模块, 所述光模块应用于根据快速外设组件互联 (Peripheral Component Interconnect Express , PCIe)进行光纤通信的通信系统中, 其特征在于, 所述光模块包括检控电路和电光转换模块, 其中:
所述检控电路, 用于检测第一 PCIe设备通过第一通道发送的第一电信号的 差模电压, 若所述第一电信号的差模电压低于第一门限值, 则向所述电光转换模 块发送第一控制信号, 其中, 所述第一控制信号用于表示所述第一通道处于电器 空闲 (Electrical Idle, EI) 状态;
所述电光转换模块,用于根据所述第一控制信号向第二光模块发送第一光信 号,所述第一光信号用于通知所述第二光模块抑制通过所述第一通道向第二 PCIe 设备发送的电信号的差模电压。
16、 根据权利要求 15所述的光模块, 其特征在于, 还包括:
光电转换模块, 用于接收所述第二光模块通过第二通道发送的第二光信号, 并将接收的所述第二光信号转换为电信号;
检测模块,用于根据所述第二光信号转换的电信号检测所述第二光信号是否 为表示所述第二通道处于 EI状态的光信号;
电信号驱动模块,用于当所述检测模块确定所述第二光信号为表示所述第二 通道处于 EI状态的光信号时,抑制向所述第一 PCIe设备发送的电信号的差模电 压, 并通过所述第二通道向所述第一 PCIe设备发送抑制后的电信号, 所述抑制 后的电信号的差模电压低于第二门限值。
17、根据权利要求 15或 16所述的光模块,其特征在于,所述检控电路包括: 检测电路, 用于检测所述第一电信号的差模电压;
控制电路, 用于当所述第一电信号的差模电压低于所述第一门限值时, 根据 预设的用于表示通信通道处于电气空闲 EI状态的控制信号的波形生成所述第一 控制信号, 并向所述电光转换模块发送所述第一控制信号。
18、 根据权利要求 17所述的光模块, 其特征在于: 所述检测模块,具体用于当根据所述第二光信号转换的电信号的波形与所述 预设的用于表示通信通道处于电气空闲 EI状态的控制信号的波形相同时, 判断 所述第二光信号为表示所述第二通道处于 EI状态的光信号。
19、 根据权利要求 15-18任意一项所述的光模块, 其特征在于:
所述检控电路,还用于当所述第一电信号的差模电压不低于所述第一门限值 时, 根据所述第一电信号向所述电光转换模块发送第二控制信号, 所述第二控制 信号根据所述第一电信号生成, 所述第一电信号中携带有所述第一 PCIe设备发 送的数据;
所述光电转换模块,还用于根据所述第二控制信号向所述第二光模块发送第 三光信号, 以向所述第二 PCIe设备传输所述数据。
20、 一种光模块, 所述光模块应用于根据快速外设组件互联 (Peripheral Component Interconnect Express, PCIe)进行光纤通信的通信系统中, 其特征在于, 所述光模块包括检控电路和电光转换模块, 其中:
所述检控电路, 用于检测第一 PCIe设备通过第一通道发送的第一电信号的 差模电压, 若所述第一电信号的差模电压低于第一门限值, 则向所述电光转换模 块发送控制信号;
所述电光转换模块,用于根据所述控制信号禁止通过所述第一通道发送光信 号。
21、 根据权利要求 20所述的光模块, 其特征在于, 还包括:
检测模块, 用于检测第二通道的光信号的光功率;
电信号放大电路,用于当所述检测模块确定所述第二通道的光信号的光功率 低于阈值时, 抑制通过所述第二通道向所述第一 PCIe设备发送的电信号的差模 电压, 并通过所述第二通道向所述第一 PCIe设备发送抑制后的电信号, 所述抑 制后的电信号的差模电压低于第二门限值。
22、 根据权利要求 20-21任意一项所述的光模块, 其特征在于:
所述检控电路,还用于当所述第一电信号的差模电压不低于所述第一门限值 时, 根据所述第一电信号生成第二控制信号, 并向所述电光转换模块发送所述第 二控制信号, 所述第二控制信号根据所述第一电信号生成, 所述第一电信号中携 带有所述第一 PCIe设备发送的数据信息;
所述光电转换模块,还用于根据所述第二控制信号向所述第二光模块发送第 三光信号, 以向所述第二 PCIe设备传输所述数据。
23、 一种通信节点, 其特征在于, 所述通信节点包括快速外设组件互联总线 ( Peripheral Component Interconnect Express , PCIe )芯片以及与所述 PCIe芯片的发 送端连接的检控电路, 其中:
所述 PCIe芯片, 用于通过第一通道的发送器发送电信号;
所述检控电路, 用于检测所述电信号的差模电压, 若所述电信号的差模电压 低于第一门限值, 则禁止与所述 PCIe芯片连接的光模块通过所述第一通道发送 光信号。
24、 根据权利要求 23所述的通信节点, 其特征在于:
所述检控电路, 具体用于通过使能所述光模块的发送禁止 TX-DISABLE, 禁止所述光模块的第一通道的激光器发送光信号。
25、 根据权利要求 24所述的通信节点, 其特征在于:
所述检控电路, 具体用于通过向所述光模块的带外管理接口发送关闭命令, 使能所述光模块的发送禁止 TX-DISABLE, 以禁止所述光模块的第一通道的激 光器发送光信号。
26、 根据权利要求 23所述的通信节点, 其特征在于, 所述通信节点还包括 中央处理器 CPU;
所述检控电路,具体用于将所述差模电压低于所述第一门限值的检测结果通 过中断方式发送给所述 CPU;
所述 CPU, 用于控制所述光模块的第一通道的激光器关闭, 以禁止所述光 模块的第一通道的激光器发送光信号。
27、 根据权利要求 23-26任意一项所述的通信节点, 其特征在于, 若所述电 信号的差模电压不低于所述第一门限值, 所述检控电路还用于控制与所述 PCIe 芯片连接的光模块通过所述第一通道发送光信号。
28、 一种通信系统, 其特征在于, 包括第一快速外设组件互联 (Peripheral Component Interconnect Express , PCIe ) 设备、 第二 PCIe设备、 第一光模块以及第 二光模块, 所述第一光模块通过光纤连接所述第二光模块, 其中;
所述第一 PCIe设备,用于通过第一通道向与所述第一 PCIe设备连接的所述 第一光模块发送第一电信号;
所述第一光模块, 用于检测所述第一电信号的差模电压, 若所述第一电信号 的差模电压低于第一门限值, 则生成第一控制信号, 并根据生成的第一控制信号 向所述第二光模块发送第一光信号, 其中, 所述第一控制信号用于表示所述第一 通道处于电器空闲 ( Electrical Idle, EI) 状态;
所述第二光模块, 用于接收所述第一光信号, 将接收的所述第一光信号转换 为第二电信号,当根据所述第二电信号确定所述第一光信号为表示所述第一通道 处于 EI状态的光信号时,抑制通过所述第一通道向所述第二 PCIe设备发送的第 三电信号的差模电压, 并通过所述第一通道向所述第二 PCIe设备发送抑制后的 第三电信号, 所述抑制后的第三电信号的差模电压低于第二门限值。
29、根据权利要求 28所述的通信系统, 其特征在于, 所述第一光模块包括: 检控电路, 用于检测所述第一电信号的差模电压, 若所述第一电信号的差模 电压低于所述第一门限值, 则根据预设的用于表示通信通道处于 EI状态的控制 信号的波形生成所述第一控制信号;
电光转换模块,用于根据所述第一控制信号向所述第二光模块发送所述第一 光信号。
30、根据权利要求 29所述的通信系统, 其特征在于, 所述第二光模块包括: 光电转换模块, 用于接收所述第一光信号, 并将接收的所述第一光信号转换 为所述第二电信号;
检测模块,用于当根据所述第二光信号转换的电信号的波形与所述预设的用 于表示通信通道处于电气空闲 EI状态的控制信号的波形相同时, 确定所述第二 光信号为表示所述第二通道处于 EI状态的光信号;
电信号驱动模块,用于当所述检测模块确定所述第二光信号为表示所述第二 通道处于 EI状态的光信号时,抑制向所述第二 PCIe设备发送的所述第三电信号 的差模电压, 并通过所述第一通道向所述第二 PCIe设备发送所述抑制后的第三 电信号。
31、 一种通信系统, 其特征在于, 包括第一快速外设组件互联 (Peripheral
Component Interconnect Express, PCIe) 设备、 第二 PCIe设备、 第一光模块以及第 二光模块, 其中, 所述第一光模块通过光纤连接所述第二光模块, 其中:
所述第一 PCIe设备,用于通过第一通道向与所述第一 PCIe设备连接的所述 第一光模块发送第一电信号;
所述第一光模块, 用于检测所述第一电信号的差模电压是否低于第一门限 值, 若所述第一差分电信号的差模电压低于所述第一门限值, 则禁止通过所述第 一通道向所述第二光模块发送光信号; 所述第二光模块, 用于检测第一通道的光信号的光功率, 当确定所述第一通 道的光功率低于阈值时, 抑制通过所述第一通道向所述第二 PCIe设备发送的电 信号的差模电压, 并通过所述第一通道向所述第二 PCIe设备发送抑制后的电信 号, 所述抑制后的电信号的差模电压低于第二门限值。
32、根据权利要求 31所述的通信系统, 其特征在于, 所述第一光模块包括: 检控电路, 用于检测所述第一 PCIe设备通过所述第一通道发送的第一电信 号的差模电压, 若所述第一电信号的差模电压低于第一门限值, 则关闭电光转换 模块的第一通道的驱动电流,以禁止通过所述第一通道向所述第二光模块发送光 信号;
所述电光转换模块,用于根据所述控制信号禁止通过所述第一通道发送光信 号。
33、根据权利要求 30或 31所述的通信系统, 其特征在于, 所述第二光模块 包括:
检测模块, 用于检测所述第一通道的光信号的光功率;
电信号驱动模块,用于当确定所述第一通道的光信号的光功率低于所述阈值 时, 抑制通过所述第一通道向所述第二 PCIe设备发送的电信号的差模电压, 并 通过所述第一通道向所述第二 PCIe设备发送所述抑制后的电信号。
34、 一种通信方法, 所述方法应用于根据快速外设组件互联 (Peripheral Component Interconnect Express , PCIe ) 传输光信号的通信系统中, 其特征在于, 该方法包括:
第一光模块检测第一 PCIe 设备通过第一通道发送的第一电信号的差模电 压;
所述第一光模块判断所述第一电信号的差模电压是否低于第一门限值; 若所述第一电信号的差模电压低于所述第一门限值,所述第一光模块生成第 一控制信号, 所述第一控制信号用于表示所述第一通道处于电器空闲 (Electrical Idle, EI) 状态;
所述第一光模块根据所述第一控制信号向第二光模块发送第一光信号,所述 第一光信号用于通知所述第二光模块抑制通过所述第一通道向第二 PCIe设备发 送的电信号的差模电压。
35、 根据权利要求 34所述的方法, 其特征在于, 还包括:
所述第一光模块接收所述第二光模块通过第二通道发送的第二光信号; 所述第一光模块将接收的所述第二光信号转换为电信号; 所述第一光模块根据所述第二光信号转换的电信号确定所述第二光信号为 表示所述第二通道处于 EI状态的光信号;
所述第一光模块抑制通过所述第二通道向所述第一 PCIe设备发送的电信号 的差模电压, 所述抑制后的电信号的差模电压低于第二门限值;
所述第一光模块通过所述第二通道向所述第一 PCIe设备发送所述抑制后的 电信号。
36、根据权利要求 34或 35所述的方法, 其特征在于, 所述第一光模块生成 第一控制信号包括:
所述第一光模块根据预设的用于表示通信通道处于 EI状态的控制信号的波 形生成所述第一控制信号。
37、 根据权利要求 34-36任意一项所述的方法, 其特征在于, 若所述第一差 分电信号的差模电压不低于所述第一门限值, 所述方法还包括:
所述第一光模块根据所述第一电信号生成第二控制信号,所述第一电信号中 携带有所述第一 PCIe设备发送的数据;
所述第一光模块根据所述第二控制信号向所述第二光模块发送第三光信号, 所述第三光信号中携带有所述数据,以向与所述第二光模块连接的所述第二 PCIe 设备传输所述数据。
38、 一种通信方法, 所述方法应用于根据快速外设组件互联 (Peripheral
Component Interconnect Express , PCIe) 传输光信号的通信系统中, 其特征在于, 该方法包括:
第二光模块接收第一光模块通过第一通道发送的第一光信号;
所述第二光模块将接收的所述第一光信号转换为第二电信号;
所述第二光模块根据所述第二电信号确定所述第一光信号为表示所述第一 通道处于电气空闲 ( Electrical Idle, EI) 状态的光信号;
所述第二光模块抑制通过所述第一通道向第二 PCIe设备发送的第三电信号 的差模电压, 所述抑制后的第三电信号的差模电压低于第二门限值;
所述第二光模块通过所述第一通道向所述第二 PCIe设备发送所述抑制后的 第三电信号。
39、 根据权利要求 38所述的通信方法, 其特征在于, 还包括:
所述第二光模块接收所述第一光模块通过所述第一通道发送的第三光信号, 所述第三光信号中携带有第一 PCIe设备发送的数据信息;
所述第二光模块将接收的所述第三光信号转换为第五电信号;
所述第二光模块根据所述第五电信号确定所述第三光信号不为表示所述第 一通道处于 EI状态的光信号;
所述第二光模块根据所述第五电信号向第二 PCIe设备发送第六电信号, 其 中, 所述第六电信号中携带有所述第一 PCIe设备发送的数据信息。
40、根据权利要求 38或 39所述的方法, 其特征在于, 所述第二光模块根据 所述第二电信号确定所述第一光信号为表示所述第一通道处于 EI状态的光信号 包括:
所述第二光模块根据所述第二电信号的波形确定所述第一光信号为表示所 述第一通道处于 EI状态的光信号。
41、 一种通信方法, 所述方法应用于根据快速外设组件互联 (Peripheral Component Interconnect Express , PCIe ) 传输光信号的通信系统中, 其特征在于, 该方法包括:
第一光模块检测第一 PCIe 设备通过第一通道发送的第一电信号的差模电 压;
所述第一光模块判断所述第一电信号的差模电压是否低于第一门限值; 若所述第一电信号的差模电压低于所述第一门限值,所述第一光模块禁止通 过所述第一通道发送光信号。
42、 根据权利要求 41所述的通信方法, 其特征在于, 还包括:
所述第一光模块检测第二通道的光信号的光功率;
若确定所述第二通道的光信号的光功率低于阈值,所述第一光模块抑制通过 所述第二通道向所述第一 PCIe设备发送的电信号的差模电压;
所述第一光模块通过所述第二通道向所述第一 PCIe设备发送所述抑制后的 电信号, 所述抑制后的电信号的差模电压低于第二门限值。
43、 根据权利要求 41-42任意一项所述的通信方法, 其特征在于, 当所述第 一电信号的差模电压不低于所述第一门限值时, 所述方法还包括:
所述第一光模块根据所述第一电信号生成第二控制信号,所述第一电信号中 携带有所述第一 PCIe设备发送的数据信息;
所述第一光模块根据所述第二控制信号发送第三光信号,所述第三光信号中 携带有所述数据, 以向第二 PCIe设备传输所述数据。
44、 一种通信方法, 所述方法应用于根据快速外设组件互联 (Peripheral Component Interconnect Express, PCIe) 传输光信号的通信系统中, 其特征在于, 所述方法包括:
检测 PCIe芯片通过第一通道的发送器发送的电信号的差模电压;
判断所述电信号的差模电压是否低于第一门限值;
当所述电信号的差模电压低于所述第一门限值时, 禁止与所述 PCIe芯片连 接的光模块通过所述第一通道发送光信号。
45、 根据权利要求 44所述的通信方法, 其特征在于, 所述禁止与所述 PCIe 芯片连接的光模块通过所述第一通道发送光信号包括:
通过使能所述光模块控制端 TX-DISABLE, 以禁止所述光模块的第一通道 的激光器发送光信号。
46、根据权利要求 44所述的方法, 其特征在于, 所述禁止与所述 PCIe芯片 连接的光模块通过所述第一通道发送光信号包括:
将所述差模电压低于所述第一门限值的检测结果通过中断方式发送给中央 处理器 CPU, 以通过所述 CPU控制与所述 PCIe芯片连接的光模块的第一通道 的激光器关闭, 以禁止所述光模块的第一通道的激光器发送光信号。
47、 根据权利要求 44-46任意一项所述的方法, 其特征在于, 还包括: 当所述电信号的差模电压不低于所述第一门限值时, 控制与所述 PCIe芯片 连接的光模块通过所述第一通道发送光信号。
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