WO2014183418A1 - 有机薄膜晶体管及其制备方法 - Google Patents

有机薄膜晶体管及其制备方法 Download PDF

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WO2014183418A1
WO2014183418A1 PCT/CN2013/088130 CN2013088130W WO2014183418A1 WO 2014183418 A1 WO2014183418 A1 WO 2014183418A1 CN 2013088130 W CN2013088130 W CN 2013088130W WO 2014183418 A1 WO2014183418 A1 WO 2014183418A1
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organic
poly
film transistor
insulating layer
thin film
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English (en)
French (fr)
Inventor
王向华
熊贤风
刘则
邱龙臻
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
    • H10K10/474—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics the gate dielectric comprising a multilayered structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
    • H10K10/474—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics the gate dielectric comprising a multilayered structure
    • H10K10/476—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics the gate dielectric comprising a multilayered structure comprising at least one organic layer and at least one inorganic layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H10K71/135—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing using ink-jet printing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/80—Constructional details
    • H10K10/82—Electrodes
    • H10K10/84—Ohmic electrodes, e.g. source or drain electrodes

Definitions

  • Embodiments of the present invention relate to an organic thin film transistor and a method of fabricating the same. Background technique
  • An organic thin film transistor is a semiconductor device made of an organic material instead of a conventional inorganic material. Compared with transistors made of inorganic materials, the film forming technology of OTFT is more and more updated, so that the manufacturing process is simple, diverse, and low in cost, and the fabricated transistor is more flexible.
  • silicon oxide is a very important insulating material in a silicon-based semiconductor device and the fabrication process is mature, in the conventional organic thin film transistor structure shown in FIG. 1, silicon oxide is generally used as the insulating layer 12 on the gate electrode layer 11. Then, the source/drain electrode layer 13 is formed on the insulating layer 12, and the organic semiconductor material is printed on the source/drain electrode layer 13 to form the organic semiconductor layer 14.
  • An embodiment of the invention provides an organic thin film transistor, comprising:
  • an inorganic insulating layer is further formed between the gate electrode layer and the organic semiconductor layer, and the organic insulating layer is located between the inorganic insulating layer and the organic semiconductor layer.
  • At least a portion of the organic semiconductor layer is in direct contact with the organic insulating layer.
  • At least a portion of the organic semiconductor layer for forming a channel is in direct contact with the organic insulating layer.
  • the organic polymeric material is formed by a cross-linking reaction between poly(4-vinylphenol) and methylated poly(melamine-co-formaldehyde) having the formula (I) Methyl (4-vinylphenol) repeat unit shown:
  • the sum of the mass parts of the poly(4-ethoxylated phenol) and the methylated poly(melamine-co-formic acid) in the organic polymer material is 5 to 15% of the total mass parts.
  • the mass fraction ratio of poly(4-vinylphenol) to methylated poly(melamine-co-formaldehyde) is less than 5 and greater than 1.
  • Another embodiment of the present invention provides a method of fabricating an organic thin film transistor, comprising: forming an organic insulating layer made of an organic polymer material on a substrate on which a gate electrode layer is formed;
  • a source/drain electrode layer and an organic semiconductor layer are formed on the substrate on which the organic insulating layer is formed.
  • the forming an organic insulating layer made of an organic polymer material on the substrate on which the gate electrode layer is formed includes:
  • the prepared organic polymer material solution is coated on the substrate on which the gate electrode layer is formed to form an organic insulating layer;
  • the prepared organic polymer material solution is coated on a substrate on which a gate electrode layer and an inorganic insulating layer are formed to form an organic insulating layer.
  • the solution for preparing an organic polymeric material includes:
  • the coating the prepared organic polymer material solution to form an organic insulating layer comprises: poly(4-ethoxylated phenol) and methylated poly(melamine-co-formaldehyde) undergoing organic crosslinking reaction under heating to form The organic insulating layer.
  • poly(4-ethoxyphenyl) and methylated poly(melamine-co-formaldehyde) are cross-linked to form an organic high molecular polymer having the formula (I) Methyl (4-vinylphenol) repeat unit shown:
  • the sum of the mass parts of the poly(4-ethoxylated phenol) and the methylated poly(melamine-co-formaldehyde) in the solution is 5 to 15% of the total mass parts of the solution.
  • the mass fraction ratio of poly(4-ethoxyphenyl) to methylated poly(melamine-co-formaldehyde) is less than 5 and greater than 1.
  • poly(4-vinylphenol), methylated poly(melamine-co-formaldehyde), and propylene glycol monomethyl ether acetate are mixed in a mass ratio of 6:4:90 to prepare the solution.
  • the prepared organic polymer material solution is applied to a substrate on which a gate electrode layer is formed or a substrate on which a gate electrode layer and an inorganic insulating layer are formed by spin coating at a low speed and then spin coating at a high speed.
  • the low speed spin coating is spin coating at 800 rpm and the high speed rotation is spin coating at 4000 rpm.
  • the prepared organic polymer material solution is coated on the substrate on which the gate electrode layer is formed or on the substrate on which the gate electrode layer and the inorganic insulating layer are formed,
  • the substrate coated with the organic polymer material solution is placed in a vacuum drying oven for heat treatment to cause organic crosslinking reaction between poly(4-vinylphenol) and methylated poly(melamine-co-formaldehyde) under heating conditions.
  • organic crosslinking reaction between poly(4-vinylphenol) and methylated poly(melamine-co-formaldehyde) under heating conditions.
  • the substrate coated with the solution of the organic polymer material is placed in a vacuum drying oven
  • the heating temperature was 180 °C.
  • FIG. 1 is a schematic structural view of an organic thin film transistor in the prior art
  • FIG. 2 is a schematic view of an organic thin film transistor according to an embodiment of the present invention.
  • FIG. 3 is a schematic view of another organic thin film transistor according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of two source and drain electrodes of different sizes according to an embodiment of the present invention.
  • FIG. 5 is a statistical diagram of field effect mobility of a bottom gate top contact organic thin film transistor prepared by using electrodes of different sizes shown in FIG. 4 before and after 12 hours vacuum treatment according to an embodiment of the present invention
  • FIG. 6 is a photograph of a high-magnification polarizing mirror of an organic thin film transistor of a bottom gate contact structure in a channel region according to an embodiment of the present invention
  • FIG. 7 is a statistical diagram of field effect mobility of an organic thin film transistor using a bottom-gate contact structure of electrodes and channel lengths of different sizes shown in FIG. 4 according to an embodiment of the present invention
  • Fig. 8 is a view showing a comparison of transmission characteristics of a bottom gate contact organic thin film transistor and a corresponding bottom gate top contact device according to an embodiment of the present invention. detailed description
  • Embodiments of the present invention provide an organic thin film transistor including a substrate and a gate electrode layer and a source/drain electrode layer formed on the substrate, and an organic half is formed between source and drain electrodes of the source/drain electrode layer Made of organic insulation.
  • Embodiments of the present invention provide an organic thin film transistor in which an organic insulating layer made of an organic polymer material is added between a gate electrode layer and an organic semiconductor layer.
  • an organic insulating layer made of an organic polymer material is added between a gate electrode layer and an organic semiconductor layer.
  • the organic in the prior art is improved.
  • the difference in crystallization behavior of the semiconductor material printed on the surface of the source/drain electrode layer and the surface of the insulating layer can well solve the problem that the organic semiconductor material is printed on the inner region of the source/drain electrode channel and the transition between the channel and the source and drain electrodes.
  • the problem of discontinuous film properties is formed, thereby eliminating the hysteresis of the output characteristics of the organic thin film transistor and realizing large-scale continuous printing of the organic thin film transistor.
  • an organic thin film transistor can be divided into a top gate structure and a bottom gate structure according to the position of the gate electrode.
  • the two types of structures can be subdivided into different regions according to the position of the source and drain electrodes and the organic semiconductor layer.
  • the organic thin film transistor of the bottom gate top contact structure since the source-drain electrodes need to be prepared on the relatively fragile organic semiconductor, the high-precision micro-etching process cannot be used, and the source and drain must be transmitted through the reticle. As a result of the fabrication of the electrode, the resolution of the electrode pattern of the organic thin film transistor is greatly reduced. Therefore, the use of a bottom gate contact structure to prepare an organic thin film transistor is more suitable for application.
  • the organic thin film transistor of the bottom gate bottom contact structure shown in Fig. 2 and the organic thin film transistor of the bottom gate top contact structure shown in Fig. 3 will be described as an example.
  • the organic thin film transistor of the bottom gate bottom contact structure includes: a gate electrode layer 21, an insulating layer 22, an organic insulating layer 23, a source/drain electrode layer 24, and an organic semiconductor layer 25.
  • the organic insulating layer 23 is formed by coating a solution of poly(4-vinylphenol), methylated poly(melamine-co-formaldehyde) dissolved in propylene glycol monomethyl ether acetate.
  • poly(4-ethoxyphenol) and methylated poly(melamine-co-formaldehyde) are cross-linked under heating to form an organic polymer polymerization.
  • the organic high molecular polymer has a methylated poly(melamine-CO-formaldehyde) cross-linked poly(4-ethoxylated phenol) repeating unit represented by formula (I):
  • PVP materials materials made by cross-linking of poly(4-ethoxyphenylphenol) and methylated poly(melamine-co-formaldehyde) may be collectively referred to as PVP materials.
  • the above materials are selected as the organic insulating layer, mainly because the surface energy of the PVP material is similar to that of the source and drain electrode layers, which can better improve the crystallization of the organic semiconductor material printed on the surface of the source/drain electrode layer and the surface of the insulating layer.
  • the difference in behavior effectively eliminates the hysteresis of the output characteristics of the organic thin film transistor, thereby realizing large-scale continuous printing of the organic thin film transistor.
  • an organic insulating layer made of an organic polymer material may be directly used as the gate insulating layer, that is, no insulating is required on the gate electrode layer.
  • the sum of the mass fractions of poly(4-vinylphenol) and methylated poly(melamine-co-formic acid) in the above solution for preparing the PVP material is 5 to 15% of the total mass fraction, And the mass fraction ratio of poly(4-vinylphenol) to methylated poly(melamine-co-formaldehyde) is less than 5 and greater than 1.
  • poly(4-vinylphenol), methylated poly(melamine-co-formaldehyde) and propylene glycol monomethyl ether acetate are produced in a mass ratio of 6:4:90.
  • the organic insulating layer made of PVP material prepared by using this ratio can have more similar surface energy to the source and drain electrode layers, and can better improve the printing of the organic semiconductor material on the surface of the source/drain electrode layer and the surface of the insulating layer.
  • the crystallization behavior is different, thereby achieving large-scale continuous printing of the organic thin film transistor.
  • the embodiment shown in Fig. 3 is a modification of the embodiment shown in Fig. 2, which differs from the embodiment shown in Fig. 2 mainly in the structure of the thin film transistor.
  • the organic thin film transistor of the bottom gate top contact structure includes: a gate electrode layer 31, an insulating layer 32, an organic insulating layer 33, a source/drain electrode layer 34, and an organic semiconductor layer 35.
  • the method of preparing the organic insulating layer 33 is the same as the method of preparing the organic insulating layer 23 in the embodiment shown in FIG. 2.
  • at least a portion of the organic semiconductor layer is in direct contact with the organic insulating layer.
  • at least a portion of the organic semiconductor layer for forming a channel is in direct contact with the organic insulating layer.
  • An embodiment of the present invention further provides a method for fabricating an organic thin film transistor, comprising: forming an organic insulating layer made of an organic polymer material on a substrate on which a gate electrode layer is formed; and forming the organic insulating layer on the substrate A source/drain electrode layer and an organic semiconductor layer are formed on the substrate.
  • the organic thin film transistor is provided in the embodiment of the present invention, and an organic insulating layer made of an organic polymer material is prepared between the gate electrode layer and the organic semiconductor layer.
  • an organic insulating layer made of an organic polymer material is prepared between the gate electrode layer and the organic semiconductor layer.
  • the organic in the prior art is improved.
  • the difference in crystallization behavior of the semiconductor material printed on the surface of the source/drain electrode layer and the surface of the insulating layer can solve the problem that the organic semiconductor material is printed on the inner region of the source-drain electrode channel and the region between the channel and the source-drain electrode.
  • the problem of discontinuous film properties is formed, thereby eliminating the hysteresis of the output characteristics of the organic thin film transistor and realizing large-scale continuous printing of the organic thin film transistor.
  • the method for preparing an organic thin film transistor may include the following steps:
  • Step 1 forming a gate electrode layer on the substrate
  • the gate electrode layer can be formed on the substrate using an existing method, which will not be described in detail herein.
  • Step 2 forming an insulating layer on the substrate on which the gate electrode layer is formed;
  • the insulating layer is made of a silicon oxide material.
  • the silicon oxide sheet is immersed in a mixed solution of concentrated sulfuric acid and hydrogen peroxide in a volume ratio of 7:3 until the bubbles attached to the surface of the silicon oxide sheet disappear and are removed.
  • the organic contamination of the surface of the silicon oxide sheet was followed by washing with ultraviolet ozone for 30 minutes.
  • a mixed solution of concentrated sulfuric acid and hydrogen peroxide can be placed on a hot stage at 90 °C.
  • Step 3 Form an organic insulating layer on the substrate on which the gate electrode layer and the insulating layer are formed; the organic insulating layer may be made of an organic polymer material.
  • the preparation of the second insulating substrate, that is, the organic insulating layer, can be carried out as follows: First, the organic polymer material poly(4-ethoxyphenyl), methylated poly(melamine-co-formaldehyde) is dissolved in propylene glycol monomethyl ether.
  • the sum of the mass parts of the poly(4-vinylphenol) and the methylated poly(melamine-co-formaldehyde) in the solution of the organic polymer material accounts for The total mass fraction of the solution is 5 to 15%, and the mass fraction of poly(4-ethoxyphenyl) and methylated poly(melamine-CO-formaldehyde) is less than 5 and greater than 1.
  • poly(4-ethoxyphenyl), methylated poly(melamine-co-formaldehyde) and propylene glycol monomethyl ether acetate are prepared in a mass ratio of 6:4:90.
  • the organic polymer material solution is coated on the substrate on which the gate electrode layer and the insulating layer are formed
  • the organic polymer material solution is coated on the gate electrode layer by spin coating at a low speed and then high speed spin coating. And on the substrate of the insulating layer.
  • low speed spin coating is applied for 8 seconds at 800 rpm and high speed for 40 seconds at 4000 rpm. Thereby, the organic polymer material solution can be more uniformly spin-coated on the substrate.
  • the thickness of the organic solution coated with the organic polymer material is coated to appropriately adjust the temperature or time of the heat treatment, and the embodiment of the present invention No restrictions.
  • Step 4 ink-jet printing an organic semiconductor material on a substrate on which a gate electrode layer, an insulating layer and an organic insulating layer are formed to form an organic semiconductor layer;
  • This step includes two aspects: one is the preparation of organic semiconductor materials; the other is inkjet printing organic semiconductor materials.
  • the organic semiconductor material required for inkjet printing is o-dichlorobenzene as a solvent, and the solvent is mixed with TIPS-pentacene as a solute at a ratio of 1:0.02 by weight to obtain a mixed solution, which is then mixed.
  • the solution was placed on a hot plate at 40-45 ° C for 20 minutes with heat until the solute was completely dissolved.
  • the number of nozzles, the dot pitch, and the one-way line pitch can be set.
  • the number of nozzles is three
  • the dot pitch is 20 micrometers
  • the one-way line pitch is 100 micrometers.
  • Step 5 A source/drain electrode layer is prepared on a substrate on which a gate electrode layer, an insulating layer, an organic insulating layer, and an organic semiconductor layer are formed.
  • the source/drain electrode layer may be formed using an existing method, and the reticle forming the pattern of the active drain electrode layer and the pattern formed on the organic semiconductor layer are aligned in accordance with the structural requirements of the organic thin film transistor, and placed in close contact with the organic semiconductor layer
  • a gold thin plated electrode was formed by a vacuum evaporation method to form a source/drain electrode in a region not covered by the mask, and then placed in a vacuum drying oven for 12 hours to obtain an organic thin film transistor.
  • the organic thin film transistor is a bottom gate top contact structure.
  • the design of the source and drain electrodes can be divided into small electrodes and large electrodes, as shown in Fig. 4.
  • the small electrode is located above and the large electrode is located below.
  • the main difference between the small electrode and the large electrode is that in the small-electrode organic thin film transistor, the contact area of the organic semiconductor layer and the organic insulating layer is larger than the contact area of the organic semiconductor and the source and drain electrodes.
  • the performance of the organic thin film transistor is improved after the organic thin film transistor prepared by using two electrodes of different sizes (however, the channel size between the small electrodes and the large electrode is the same) is placed in a vacuum drying oven for 12 hours; As shown in FIG.
  • the organic thin film transistor prepared by the small electrode is superior in performance to the organic thin film transistor prepared by the large electrode, indicating that the organic semiconductor film is recrystallized under vacuum conditions, mainly due to the organic insulating layer and the organic semiconductor.
  • a uniform interface of the layers is formed. It can be found by atomic force microscopy that before and after the spin-coating of the organic insulating film, the bottom of the village (before the spin-on organic insulating film, the bottom of the village refers to the insulating layer; after spin-coating the organic insulating film, the bottom finger The roughness of the organic insulating layer is reduced from 0.5 to 0.6 nm (roughness of the insulating layer) to 0.3 to 0.4 nm (roughness of the organic insulating layer).
  • the lower roughness facilitates the formation of an interface of a high quality organic semiconductor layer and an organic insulating layer. Therefore, in the design of the organic semiconductor structure, the use of the small electrode can improve the ratio of the interface area of the organic semiconductor layer and the smooth organic insulating layer to the interface area of the organic semiconductor layer and the source and drain electrodes, thereby facilitating the ratio of the interface area of the organic semiconductor layer and the surface of the organic insulating layer. Improve the performance of organic thin film transistors.
  • an organic insulating layer made of an organic polymer material may be directly used as the gate insulating layer, that is, the gate electrode is not required.
  • An insulating layer is further prepared on the layer, so step 2 in the above embodiment can be omitted.
  • an embodiment of the present invention further provides a method of fabricating an organic thin film transistor for fabricating a bottom gate bottom contact structure.
  • steps 4 and 5 in the above preparation method are interchanged.
  • other steps can be set between steps 4 and 5 after the interchange.
  • the method of fabricating the organic thin film transistor for preparing the bottom gate bottom contact structure may further include the following steps after the source/drain electrode layer is prepared and before the inkjet printing of the organic semiconductor material:
  • the surface of the source/drain electrode layer was treated with pentafluorothiophenol.
  • the surface of the source/drain electrode layer is treated with pentafluorothiophenol, and there are three methods, including:
  • the prepared bottom gate bottom contact organic thin film transistor is in the channel.
  • the boundary is continuous; and the organic thin film transistor prepared by using two different sizes of electrode pairs in the bottom-drain contact layer in the bottom gate contact structure is placed in a vacuum drying oven for 12 hours, as shown in FIG.
  • the small field electrode and the larger channel length of the bottom gate contact organic thin film transistor have higher field effect mobility, which again demonstrates that the interface size between the organic semiconductor and the insulating layer is important for the performance of the organic thin film transistor. Influence.
  • the transmission characteristics of the prepared bottom gate contact organic thin film transistor and the corresponding bottom gate top contact organic thin film transistor are compared, because in the case of organic electrons, an organic thin film transistor having a bottom gate structure is often used. And it is generally believed that the bottom gate top contact organic thin film transistor is more prominent in performance, and the bottom gate bottom contact electrode structure has two kinds of mediums of a gate insulating layer and a source/drain metal electrode on the substrate before printing the organic film. The properties of the grown organic film are different, which affects the performance of the entire transistor.
  • the method for preparing the organic thin film transistor provided by the embodiment of the present invention compares the transmission characteristics of the bottom gate contact organic thin film transistor and the corresponding bottom gate top contact organic thin film transistor, as shown in FIG.
  • the bottom-gate contact device has a smaller sub-threshold swing than the bottom-gate contact, and the bottom-gate bottom contact organic thin film transistor is overcome by the selective surface modification technique.
  • the problem of discontinuous film in the channel region improves the switching speed of the organic thin film transistor while achieving high mobility.

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Abstract

一种有机薄膜晶体管及其制备方法。该有机薄膜晶体管包括基板，形成在所述基板上的栅电极层（21）和源漏电极层（24）；在源漏电极层（24）的源漏电极之间形成有有机半导体层（25）；以及形成在所述栅电极层（21）和有机半导体层（25）之间且由有机聚合物材料制成的有机绝缘层（23）。

Description

有机薄膜晶体管及其制备方法 技术领域
本发明的实施例涉及一种有机薄膜晶体管及其制备方法。 背景技术
有机薄膜晶体管（ Organic Thin Film Transistor, OTFT )是一种用有机材 料代替传统无机材料制成的半导体器件。相对于无机材料制成的晶体管而言， OTFT 的成膜技术更多、 更新， 从而使制作工艺筒单、 多样、 成本低， 制成 的晶体管更具有柔性。
由于氧化硅是硅基半导体器件中非常重要的绝缘材料且制备工艺成熟， 因此在如图 1所示的现有的有机薄膜晶体管结构中， 通常采用氧化硅作为栅 电极层 11上的绝缘层 12,之后在绝缘层 12上制备源漏电极层 13,并在源漏 电极层 13上打印有机半导体材料形成有机半导体层 14。
在现有的喷墨打印制备有机薄膜晶体管的工艺中， 多数是将有机半导体 墨水材料直接打印在氧化硅村底上， 由于有机半导体材料在氧化硅表面和金 属电极表面的结晶性能存在差异， 因此导致了有机半导体薄膜在沟道边界的 不连续， 从而无法满足跨沟道打印连续有机半导体薄膜的需要， 最终会破坏 有机半导体薄膜的连续性和失去对有机半导体薄膜晶体结构的控制作用。 此 夕卜， 从器件性能角度看， 直接将有机半导体材料打印在氧化硅村底上， 其传 输特性往往还表现有明显的迟滞现象。 发明内容
本发明的一个实施例提供一种有机薄膜晶体管， 包括：
基板；
Figure imgf000003_0001
机绝缘层。 在一个示例中， 在所述栅电极层和所述有机半导体层之间还形成有无机 绝缘层， 所述有机绝缘层位于所述无机绝缘层和所述有机半导体层之间。
在一个示例中， 所述有机半导体层的至少一部分与所述有机绝缘层直接 接触。
在一个示例中， 所述有机半导体层的至少用于形成沟道的部分与所述有 机绝缘层直 触。
在一个示例中，所述有机聚合物材料由聚（ 4-乙烯基苯酚）和甲基化聚 (三 聚氰胺 -co-甲醛)发生交联反应生成， 所述有机聚合物材料具有式（I )所示的 甲基 （4-乙烯基苯酚）重复单元：
Figure imgf000004_0001
( I ) 。
在一个示例中， 所述有机聚合物材料中的聚（4-乙婦基苯酚）与甲基化 聚 (三聚氰胺 -co-甲酸)的质量份数之和占总质量份数的 5 ~ 15%, 且聚（4-乙 烯基苯酚）与甲基化聚 (三聚氰胺 -co-甲醛)的质量份数比小于 5 , 大于 1。
本发明的另一个实施例提供一种有机薄膜晶体管的制备方法， 包括： 在形成有栅电极层的基板上形成有由有机聚合物材料制成的有机绝缘 层；
在形成有所述有机绝缘层的基板上形成源漏电极层和有机半导体层。 在一个示例中， 所述在形成有栅电极层的基板上形成有由有机聚合物材 料制成的有机绝缘层包括：
制备有机聚合物材料的溶液；
将制备的有机聚合物材料溶液涂覆在形成有栅电极层的基板上， 以便形 成有机绝缘层； 或
在形成有栅电极层的基板上形成无机绝缘层；
制备有机聚合物材料的溶液；
将制备的有机聚合物材料溶液涂覆在形成有栅电极层和无机绝缘层的基 板上， 以便形成有机绝缘层。 在一个示例中， 所述制备有机聚合物材料的溶液包括：
将聚（ 4-乙烯基苯酚 ) 、 甲基化聚 (三聚氰胺 -co-甲醛)溶于丙二醇单甲醚 乙酸酯混合制成所述有机聚合物材料的溶液；
所述将制备的有机聚合物材料溶液涂覆形成有机绝缘层包括： 聚（4-乙婦基苯酚）和甲基化聚 (三聚氰胺 -co-甲醛)在加热条件下发生有 机交联反应， 形成所述有机绝缘层。
在一个示例中， 聚（4-乙婦基苯酚）和甲基化聚 (三聚氰胺 -co-甲醛)发生 交联反应生成有机高分子聚合物， 所述有机高分子聚合物具有式（I )所示的 甲基 （4-乙烯基苯酚）重复单元：
Figure imgf000005_0001
( I ) 。
在一个示例中， 所述溶液中的聚（4-乙婦基苯酚）与甲基化聚 (三聚氰胺 -co-甲醛)的质量份数之和占所述溶液总质量份数的 5 ~ 15% ,且聚（ 4-乙婦基 苯酚）与甲基化聚 (三聚氰胺 -co-甲醛)的质量份数比为小于 5, 大于 1。
在一个示例中， 聚（4-乙烯基苯酚） 、 甲基化聚 (三聚氰胺 -co-甲醛)和丙 二醇单甲醚乙酸酯按照质量比 6:4:90混合制成所述溶液。
在一个示例中， 将制备的有机聚合物材料溶液以先低速旋涂后高速旋涂 的方式涂覆在形成有栅电极层的基板上或形成有栅电极层和无机绝缘层的基 板上。
在一个示例中， 低速旋涂为以 800转 /分钟的转速旋涂， 高速旋转为以 4000转 /分钟的转速旋涂。
在一个示例中， 将制备的有机聚合物材料溶液涂覆在形成有栅电极层的 基板上或形成有栅电极层和无机绝缘层的基板上之后，
将涂覆有有机聚合物材料溶液的基板放入真空干燥箱中进行热处理， 使 聚（4-乙烯基苯酚）和甲基化聚 (三聚氰胺 -co-甲醛)在加热条件下发生有机交 联反应， 以形成有机绝缘层。
在一个示例中， 将涂覆有有机聚合物材料溶液的基板放入真空干燥箱中 加热的温度为 180°C。 附图说明
为了更清楚地说明本发明实施例的技术方案， 下面将对实施例的附图作 筒单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例， 而非对本发明的限制。
图 1为现有技术中的有机薄膜晶体管结构示意图；
图 2为本发明实施例一种有机薄膜晶体管示意图；
图 3为本发明实施例另一种有机薄膜晶体管示意图；
图 4为本发明实施例中两种大小不同的源漏电极示意图；
图 5为本发明实施例使用图 4所示大小不同的电极制备的底栅顶接触有 机薄膜晶体管在 12小时真空处理前后的场效应迁移率统计图；
图 6为本发明实施例底栅底接触结构的有机薄膜晶体管在沟道区的高倍 偏光显敫镜照片；
图 7为本发明实施例使用图 4所示大小不同的电极和沟道长度的底栅底 接触结构的有机薄膜晶体管的场效应迁移率统计图；
图 8为本发明实施例底栅底接触有机薄膜晶体管与相应的底栅顶接触器 件的传输特性对比图。 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚， 下面将结合本发 明实施例的附图，对本发明实施例的技术方案进行清楚、 完整地描述。显然， 所描述的实施例是本发明的一部分实施例， 而不是全部的实施例。 基于所描 述的本发明的实施例， 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例， 都属于本发明保护的范围。
下面结合附图对本发明实施例提供一种有机薄膜晶体管及其制备方法进 行详细描述。
本发明实施例提供了一种有机薄膜晶体管， 包括基板以及形成在所述基 板上的栅电极层和源漏电极层， 在源漏电极层的源漏电极之间形成有有机半 成的有机绝缘层。
本发明实施例提供了一种有机薄膜晶体管， 是在栅电极层和有机半导体 层之间增加了一层由有机聚合物材料制成的有机绝缘层。 与由氧化硅材料形 成的绝缘层相比， 因为由有机聚合物材料形成的有机绝缘层的表面能与源漏 电极层的表面能具有更好的相似性， 所以改善了在现有技术中有机半导体材 料打印在源漏电极层表面与绝缘层表面产生的结晶行为的差异性， 能够很好 地解决有机半导体材料打印在源漏电极沟道内部、 沟道与源漏电极过渡的局 部区域上所形成的薄膜性质不连续的问题， 从而较好地消除了有机薄膜晶体 管输出特性的迟滞现象， 实现有机薄膜晶体管大规模地连续性打印。
有机薄膜晶体管就其结构而言， 根据栅电极的位置不同， 可将其分为顶 栅结构和底栅结构， 此两类结构又可根据源漏电极与有机半导体层的位置不 同， 细分为底栅底接触结构、 底栅顶接触结构、 顶栅底接触结构和顶栅顶接 触结构四种类型。 由于在底栅底接触的有机薄膜晶体管中有机半导体的制备 是在最后步骤进行的， 因此制备得到的有机半导体薄膜不易在后续的制备过 程中遭到破坏。 相反， 在底栅顶接触结构的有机薄膜晶体管中， 由于需要在 比较脆弱的有机半导体上制备源漏电极，因此无法采用高精度的微刻蚀工艺， 而必须要透过掩模版才能进行源漏电极的制作， 结果导致有机薄膜晶体管电 极图案的分辨率大幅下降。 因此采用底栅底接触结构制备有机薄膜晶体管更 加契合应用的要求。 下面分别以图 2所示的底栅底接触结构的有机薄膜晶体 管和图 3所示的底栅顶接触结构的有机薄膜晶体管为例进行说明。
如图 2所示， 底栅底接触结构的有机薄膜晶体管包括： 栅电极层 21、 绝 缘层 22、有机绝缘层 23、 源漏电极层 24和有机半导体层 25。有机绝缘层 23 由聚（4-乙烯基苯酚） 、 甲基化聚 (三聚氰胺 -co-甲醛)溶于丙二醇单甲醚乙酸 酯制成的溶液涂覆形成。
需要说明的是， 在涂覆形成有机绝缘层的过程中， 聚（4-乙婦基苯酚） 和甲基化聚 (三聚氰胺 -co-甲醛）在加热条件下发生交联反应生成有机高分子 聚合物， 所述有机高分子聚合物具有式（I )所示的甲基化聚 (三聚氰胺 -CO- 甲醛)交联聚（4-乙婦基苯酚）重复单元：
Figure imgf000008_0001
I 。 其中， m、 n为大于等于 1的正整数， m、 n的上限取值范围可根据所需 材料的分子量的大小而定。 例如， m=3, n=230。
通常， 由聚（4-乙婦基苯酚） 、 甲基化聚 (三聚氰胺 -co-甲醛)交联制成的 材料可以统称为 PVP材料。选用以上材料作为有机绝缘层，主要是因为 PVP 材料的表面能与源漏电极层所具有的表面能相似， 可以较好地改善有机半导 体材料打印在源漏电极层表面与绝缘层表面产生的结晶行为的差异性， 有效 地消除有机薄膜晶体管输出特性的迟滞现象， 从而实现有机薄膜晶体管大规 模地连续性打印。
在本发明的其他实施例中， 如果有机绝缘层的电绝缘性能足够好， 也可 以直接使用由有机聚合物材料制作的有机绝缘层作为栅绝缘层， 即不需要在 栅电极层上再制备绝缘层。
在用于制备所述 PVP材料的上述溶液中的聚（ 4-乙烯基苯酚 )与甲基化 聚 (三聚氰胺 -co-甲酸)的质量份数之和占总质量份数的 5 ~ 15%, 且聚（4-乙 烯基苯酚）与甲基化聚 (三聚氰胺 -co-甲醛)的质量份数比小于 5 , 大于 1。 优 选地， 聚（4-乙烯基苯酚） 、 甲基化聚 (三聚氰胺 -co-甲醛)和丙二醇单甲醚乙 酸酯按质量比 6:4:90制成。选用此比例配制而成的 PVP材料制成的有机绝缘 层， 可以与源漏电极层具有更加相似的表面能， 可以较好地改善有机半导体 材料打印在源漏电极层表面与绝缘层表面产生的结晶行为的差异性， 从而实 现有机薄膜晶体管大规模地连续性打印。
图 3所示实施例为图 2所示实施例的一种变型， 其与图 2所示实施例的 不同主要在于薄膜晶体管的结构。 如图 3所示， 底栅顶接触结构的有机薄膜 晶体管包括： 栅电极层 31、 绝缘层 32、 有机绝缘层 33、 源漏电极层 34和有 机半导体层 35。 有机绝缘层 33的制备方法与图 2所示实施例中的有机绝缘 层 23的制备方法相同。 从以上图 2和图 3可以看到， 本发明实施例的有机薄膜晶体管中， 有机 半导体层的至少一部分与有机绝缘层直接接触。 例如， 有机半导体层的至少 用于形成沟道的部分与有机绝缘层直接接触。
本发明实施例还提供了一种有机薄膜晶体管的制备方法， 包括： 在形成 有栅电极层的基板上形成有由有机聚合物材料制成的有机绝缘层； 在形成有 所述有机绝缘层的基板上形成源漏电极层和有机半导体层。
本发明实施例提供的这种有机薄膜晶体管制备方法， 是在栅电极层和有 机半导体层之间制备了一层由有机聚合物材料制成的有机绝缘层。 与由氧化 硅材料形成的绝缘层相比， 因为由有机聚合物材料形成的有机绝缘层的表面 能与源漏电极层的表面能具有更好的相似性， 所以改善了在现有技术中有机 半导体材料打印在源漏电极层表面与绝缘层表面产生的结晶行为的差异性， 能够 4艮好地解决有机半导体材料打印在源漏电极沟道内部、 沟道与源漏电极 过渡的局部区域上所形成的薄膜性质不连续的问题， 从而较好地消除了有机 薄膜晶体管输出特性的迟滞现象，实现有机薄膜晶体管大规模地连续性打印。
例如， 本发明的实施例提供的有机薄膜晶体管的制备方法， 可以包括以 下步骤：
步骤 1、 在基板上形成栅电极层；
可以使用现有的方法在基板上形成栅电极层， 此处不再详述。
步骤 2、 在形成有栅电极层的基板上形成绝缘层；
绝缘层由氧化硅材料制成。 在基板上制备绝缘村底即绝缘层时： 首先是 将氧化硅片放入体积比为 7:3的浓硫酸与双氧水的混合溶液中进行浸泡， 直 到附着于氧化硅片表面的气泡消失、 去除了氧化硅片表面的有机污染为止， 然后再用紫外臭氧进行清洗 30分钟。为了加快去除氧化硅片表面有机污染的 速度， 可以将浓硫酸与双氧水的混合溶液放置在 90°C的热台上。
步骤 3、 在形成有栅电极层和绝缘层的基板上形成有机绝缘层； 有机绝缘层可以由有机聚合物材料制成。 制备第二绝缘村底即有机绝缘 层时可以按照如下步骤进行： 首先将有机聚合物材料聚（ 4-乙婦基苯酚） 、 甲基化聚 (三聚氰胺 -co-甲醛)溶于丙二醇单甲醚乙酸酯制成所述有机聚合物 材料的溶液； 然后， 将制备的有机聚合物材料溶液涂覆在形成有栅电极层和 绝缘层的基板上； 再然后， 将涂覆有有机聚合物材料溶液的基板放入真空干 燥箱中进行热处理， 即可形成第二绝缘村底。 需要说明的是， 在涂覆形成第 二绝缘村底的过程中， 聚（4-乙烯基苯酚）和甲基化聚 (三聚氰胺 -co-甲醛）在 加热条件下发生有机交联反应生成有机高分子聚合物， 所述有机高分子聚合 物具有式（I )所示的甲基化聚 (三聚氰胺 -co-甲醛)交联聚（4-乙烯基苯酚）重 复单元:
Figure imgf000010_0001
( I ) 。 可选的， 在制备有机聚合物材料溶液时， 所述有机聚合物材料溶液中的 聚（ 4-乙烯基苯酚 )与甲基化聚 (三聚氰胺 -co-甲醛)的质量份数之和占所述溶 液总质量份数的 5 ~ 15%, 且聚（4-乙婦基苯酚）与甲基化聚 (三聚氰胺 -CO- 甲醛)的质量份数比小于 5, 大于 1。 优选地， 聚（4-乙婦基苯酚） 、 甲基化 聚 (三聚氰胺 -co-甲醛)和丙二醇单甲醚乙酸酯按照质量比 6:4:90 制成所述溶 液。
在将有机聚合物材料溶液涂覆在形成有栅电极层和绝缘层的基板上时， 所述有机聚合物材料溶液是以先低速旋涂后高速旋涂的方式涂覆在形成有栅 电极层和绝缘层的基板上的。 可选的， 低速旋涂为以 800转 /分钟的转速旋涂 8秒， 高速旋转为以 4000转 /分钟的转速旋涂 40秒。 从而， 能够更好地将有 机聚合物材料溶液均匀地旋涂在基板上。
可选的， 在真空干燥箱中进行热处理时， 所述涂覆有有机聚合物材料溶 涂覆的有机溶液的厚度而对热处理的温度或时间做出适当的调整， 本发明的 实施例对此不作限制。
步骤 4、 在形成有栅电极层、 绝缘层和有机绝缘层的基板上喷墨打印有 机半导体材料， 以形成有机半导体层；
此步骤包括两个方面： 一是有机半导体材料的配制； 二是喷墨打印有机 半导体材料。 喷墨打印所需的有机半导体材料是以邻二氯苯为溶剂， 该溶剂与作为溶 质的有机半导体材料 TIPS-并五苯按重量比为 1:0.02的比例进行混合得到混 合液， 然后将混合液放置在 40-45°C的热台上加热处理 20分钟， 直到溶质完 全溶解即可使用。
在喷墨打印有机半导体材料的过程中， 可以对喷头数目、 点间距和单程 线条间距进行设置，优选地， 喷头数目为 3个， 点间距为 20微米和单程线条 间距为 100微米。 设置完成之后进行打印， 将打印后的有机薄膜晶体管置于 真空干燥箱中在 60 °C温度下热处理 20分钟。
步骤 5、 在形成有栅电极层、 绝缘层、 有机绝缘层和有机半导体层的基 板上制备源漏电极层。
可以使用现有的方法形成源漏电极层， 将形成有源漏电极层图案的掩模 版与在有机半导体层上已形成的图案按照有机薄膜晶体管结构要求对准， 紧 贴放置在有机半导体层之上， 采用真空蒸镀的方法将金镀在未被掩模版遮住 的区域形成源漏电极，然后在真空干燥箱中放置 12小时， 即可得到有机薄膜 晶体管。 该有机薄膜晶体管为底栅顶接触结构。
源漏电极的设计可分为小电极和大电极， 如图 4所示， 图中位于上面的 为小电极、 位于下面的为大电极。 小电极与大电极的主要不同在于： 在小电 极有机薄膜晶体管中， 有机半导体层与有机绝缘层的接触面积相对于有机半 导体与源漏电极的接触面积较大。 采用两种大小不同的电极（但是， 小电极 间和大电极间的沟道尺寸是相同的 )制备的有机薄膜晶体管在真空干燥箱中 放置 12小时后，有机薄膜晶体管的性能都得到了提升； 如图 4所示， 小电极 制备的有机薄膜晶体管在性能上优于大电极制备的有机薄膜晶体管， 说明有 机半导体薄膜在真空的条件下发生了重结晶， 这主要是由于有机绝缘层与有 机半导体层的均匀界面形成的。 通过原子力显微镜表征可以发现， 在旋涂有 机绝缘层薄膜前后，村底（在旋涂有机绝缘层薄膜前， 该村底指的是绝缘层； 在旋涂有机绝缘层薄膜后， 该村底指的是有机绝缘层）的粗糙度从 0.5-0.6纳 米（绝缘层的粗糙度）下降到 0.3-0.4纳米（有机绝缘层的粗糙度）。 较低的 粗糙度有利于形成高质量的有机半导体层和有机绝缘层的界面。 因此在有机 半导体结构设计方面， 采用小电极可以提高有机半导体层和表面光滑的有机 绝缘层的界面面积与有机半导体层和源漏电极的界面面积之比， 因此有利于 提高有机薄膜晶体管的性能。
需要说明的是， 在本发明的其他实施例中， 如果有机绝缘层的电绝缘性 能足够好， 也可以直接使用由有机聚合物材料制作的有机绝缘层作为栅绝缘 层， 即不需要在栅电极层上再制备绝缘层， 因此上面实施例中的步骤 2可以 省略。
作为对上述底栅顶接触结构的有机薄膜晶体管制备方法的一种变型， 本 发明实施例还提供了一种制备底栅底接触结构的有机薄膜晶体管的制备方 法。 具体而言， 是将上述制备方法中的步骤 4和步骤 5互换。 可选的， 还可 以在互换后的步骤 4和步骤 5之间设置其他步骤。 例如， 在本发明的一个实 施例中， 在制备源漏电极层之后且在喷墨打印有机半导体材料之前， 该制备 底栅底接触结构的有机薄膜晶体管的制备方法还可包括如下步骤：
对源漏电极层的表面进行五氟苯硫酚处理。
可选的， 对源漏电极层的表面进行五氟苯硫酚处理， 可以有三种方法， 包括：
( 1 )干法自组装单分子工艺， 将干燥器中滴入 0.1毫升五氟苯硫酚， 放 入制备有源漏电极层的基板， 密封放置 12小时； 或者，
( 2 )湿法自组装单分子工艺 , 以甲苯为溶剂 , 甲苯与五氟苯硫酚按照体 积比为 75: 0.1进行混合， 将制备有源漏电极层的基板 五氟苯硫酚的溶 液中浸泡半小时取出， 用乙醇进行沖洗， 旋干， 放置在 100°C的热台上加入 处理 10-20分钟； 或者，
( 3 )喷墨打印图案化表面处理工艺，将五氟苯硫酚的溶液喷于金电极（即 表面镀有金的源漏电极）上， 使溶剂慢慢挥干， 在源漏电极层表面留下表面 处理剂单分子层。
在本发明实施例提供的底栅底接触有机薄膜晶体管的制备方法中， 通过 对沟道区进行高倍偏光显微镜放大， 如图 6所示， 发现所制备的底栅底接触 有机薄膜晶体管在沟道边界是连续的； 并且对底栅底接触结构中的源漏电极 层也采用两种大小不同的电极对制备的有机薄膜晶体管在真空干燥箱中放置 12小时后， 如图 7所示， 具有较小的电极和较大的沟道长度的底栅底接触有 机薄膜晶体管的场效应迁移率较高， 这也再次说明了有机半导体与绝缘层之 间的界面大小对于有机薄膜晶体管的性能产生重要的影响作用。 除此之外， 还对制备的底栅底接触有机薄膜晶体管与相应的底栅顶接触 有机薄膜晶体管的传输特性做了对比， 因为就有机电子而言， 常选用具有底 栅结构的有机薄膜晶体管， 并且一般认为底栅顶接触有机薄膜晶体管在性能 上更加突出， 而底栅底接触电极结构在打印制备有机薄膜之前因其基板上有 栅绝缘层和源漏金属电极两种介质， 在其上生长的有机薄膜的性能不同， 从 而会影响到整个晶体管的性能。 而采用本发明实施例提供的这种有机薄膜晶 体管的制备方法， 对比底栅底接触有机薄膜晶体管与相应的底栅顶接触有机 薄膜晶体管的传输特性， 如图 8所示， 对比发现二者的迁移率和开光比等性 能指标相当， 而且与底栅顶接触相比， 底栅底接触器件具有更小的亚阈值摆 动， 同时采用选择性表面修饰技术后， 克服了底栅底接触有机薄膜晶体管在 沟道区域薄膜不连续的问题， 在获得高迁移率的同时， 还提高了有机薄膜晶 体管的开关速度。
以上所述仅是本发明的示范性实施方式， 而非用于限制本发明的保护范 围， 本发明的保护范围由所附的权利要求确定。

Claims

权利要求书
1、 一种有机薄膜晶体管， 包括：
基板；
形成在所述基板上的栅电极层和源漏电极层；
Figure imgf000014_0001
机绝缘层。
2、根据权利要求 1所述的有机薄膜晶体管， 其中， 在所述栅电极层和所 述有机半导体层之间还形成有无机绝缘层， 所述有机绝缘层位于所述无机绝 缘层和所述有机半导体层之间。
3、根据权利要求 1或 2所述的有机薄膜晶体管， 其中， 所述有机半导体 层的至少一部分与所述有机绝缘层直接接触。
4、根据权利要求 3所述的有机薄膜晶体管， 其中， 所述有机半导体层的 至少用于形成沟道的部分与所述有机绝缘层直接接触。
5、 根据权利要求 1-4任一项所述的有机薄膜晶体管， 其中， 制备所述有 机绝缘层包括：
将聚（4-乙烯基苯酚） 、 甲基化聚 (三聚氰胺 -co-甲醛)溶于丙二醇单甲醚 乙酸酯混合制成有机聚合物材料的溶液；
将所述有机聚合物材料的溶液进行涂覆， 聚（4-乙烯基苯酚）和甲基化 聚 (三聚氰胺 -co-甲醛)在加热条件下发生交联反应， 形成所述有机绝缘层。
6、 根据权利要求 1-5任一项所述的有机薄膜晶体管， 其中， 所述有机聚 合物材料由聚（4-乙烯基苯酚）和甲基化聚 (三聚氰胺 -co-甲醛)发生交联反应 生成， 所述有机聚合物材料具有式（I )所示的甲基化聚 (三聚氰胺 -co-甲醛) 交联
Figure imgf000014_0002
7、 根据权利要求 5所述的有机薄膜晶体管， 其中， 所述溶液中的聚（4- 乙烯基苯酚 )与甲基化聚 (三聚氰胺 -co-甲醛)的质量份数之和占所述溶液总质 量份数的 5 ~ 15%, 且聚（4-乙婦基苯酚）与甲基化聚 (三聚氰胺 -co-甲醛)的 质量份数比小于 5, 大于 1。
8、 根据权利要求 5所述的有机薄膜晶体管， 其中， 所述溶液是由聚（4- 乙烯基苯酚）、 甲基化聚 (三聚氰胺 -co-甲醛)和丙二醇单甲醚乙酸酯按照质量 比 6:4:90混合制成。
9、 一种有机薄膜晶体管的制备方法， 包括：
在形成有栅电极层的基板上形成有由有机聚合物材料制成的有机绝缘 层；
在形成有所述有机绝缘层的基板上形成源漏电极层和有机半导体层。
10、 根据权利要求 9所述的有机薄膜晶体管的制备方法， 其中， 所述在 形成有栅电极层的基板上形成有由有机聚合物材料制成的有机绝缘层包括： 制备有机聚合物材料的溶液；
将制备的有机聚合物材料溶液涂覆在形成有栅电极层的基板上， 以便形 成有机绝缘层； 或
在形成有栅电极层的基板上形成无机绝缘层；
制备有机聚合物材料的溶液；
将制备的有机聚合物材料溶液涂覆在形成有栅电极层和无机绝缘层的基 板上， 以便形成有机绝缘层。
11、根据权利要求 10所述的有机薄膜晶体管的制备方法， 其中， 所述制 备有机聚合物材料的溶液包括：
将聚（4-乙烯基苯酚） 、 甲基化聚 (三聚氰胺 -co-甲醛)溶于丙二醇单甲醚 乙酸酯混合制成所述有机聚合物材料的溶液；
所述将制备的有机聚合物材料溶液涂覆形成有机绝缘层包括：
聚（4-乙婦基苯酚）和甲基化聚 (三聚氰胺 -co-甲醛)在加热条件下发生有 机交联反应， 形成所述有机绝缘层。
12、 根据权利要求 11所述的有机薄膜晶体管的制备方法， 其中， 聚（4- 乙烯基苯酚 )和甲基化聚 (三聚氰胺 -co-甲醛)发生交联反应生成有机高分子聚 合物，所述有机高分子聚合物具有式（ I )所示的甲基化聚 (三聚氰胺 -co-甲醛) 交联
Figure imgf000016_0001
( I ) 。
13、根据权利要求 11所述的有机薄膜晶体管的制备方法， 其中， 所述溶 液中的聚（4-乙烯基苯酚）与甲基化聚 (三聚氰胺 -co-甲醛)的质量份数之和占 所述溶液总质量份数的 5 ~ 15%, 且聚（4-乙婦基苯酚）与甲基化聚 (三聚氰 胺 -co-甲醛)的质量份数比为小于 5, 大于 1。
14、 根据权利要求 11所述的有机薄膜晶体管的制备方法， 其中， 聚（4- 乙婦基苯酚）、 甲基化聚 (三聚氰胺 -co-甲醛)和丙二醇单甲醚乙酸酯按照质量 比 6:4:90混合制成所述溶液。
15、根据权利要求 10所述的有机薄膜晶体管的制备方法， 其中， 将制备 的有机聚合物材料溶液以先低速旋涂后高速旋涂的方式涂覆在形成有栅电极 层的基板上或形成有栅电极层和无机绝缘层的基板上。
16、根据权利要求 15所述的有机薄膜晶体管的制备方法， 其中，低速旋 涂为以 800转 /分钟的转速旋涂， 高速旋转为以 4000转 /分钟的转速旋涂。
17、根据权利要求 11所述的有机薄膜晶体管的制备方法， 其中， 将制备 的有机聚合物材料溶液涂覆在形成有栅电极层的基板上或形成有栅电极层和 无机绝缘层的基板上之后，
将涂覆有有机聚合物材料溶液的基板放入真空干燥箱中进行热处理， 使 聚（4-乙烯基苯酚）和甲基化聚 (三聚氰胺 -co-甲醛)在加热条件下发生有机交 联反应， 以形成有机绝缘层。
18、根据权利要求 17所述的有机薄膜晶体管的制备方法， 其中， 将涂覆 有有机聚合物材料溶液的基板放入真空干燥箱中加热的温度为 180°C。
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