WO2014173133A1

WO2014173133A1 - Decoding method and decoding apparatus for polar code

Info

Publication number: WO2014173133A1
Application number: PCT/CN2013/088492
Authority: WO
Inventors: 李斌; 沈晖
Original assignee: 华为技术有限公司
Priority date: 2013-04-27
Filing date: 2013-12-04
Publication date: 2014-10-30
Also published as: CN104124979B; CN104124979A

Abstract

Embodiments of the present invention provide a decoding method and a decoding apparatus for a polar code. The method comprises: grouping a first polar code having a length of N into s second polar codes, a length of each second polar code being N/s, N and s being integer powers of 2, and N>s; performing path splitting of list decoding on s second polar codes concurrently, and combining split paths of s second polar codes after path splitting, so as to obtain multiple combined paths having a length of N; choosing a first combined path from multiple combined paths having a length of N bits, the first combined path being a path having the greatest path metric value among the multiple combined paths having a length of N bits, or a path passing cyclic redundancy check (CRC) among the multiple combined paths having a length of N bits; and obtaining a decoding result of the first polar code according to the first combined path. In this case, a decoding throughput of the polar code can be improved, and a decoding delay can be decreased.

Description

Polar code decoding method and decoding device

This application claims priority to Chinese Patent Application No. 201310152544.5, entitled "Construction Method and Apparatus for a Business Message", filed on April 27, 2013, the entire contents of which is incorporated herein by reference. In the application. Technical field

Embodiments of the present invention relate to the field of codec and, more particularly, to a decoding method and decoding apparatus for a Polar code (polar code). Background technique

Communication systems usually use channel coding to improve the reliability of data transmission and ensure the quality of communication.

The Polar code is an encoding method that can achieve Shannon capacity and has low coding and decoding complexity. The Polar code is a linear block code. The generator matrix is GN. The encoding process is ^x i ^N =Ui ^N( ^, where G _N . =B _N F ^3⁄4n , code length _Ν=2η ,

Here ^P = [; :], BN is a transposed matrix, such as a bit reversal matrix.

It is the Kronecker power of F, defined as = F®F - ". The code of the _Polar code can be expressed as ( ^N , ^K , ^A , ^U A.), and its encoding process is: ^{X =} u _A G _N .(A)®u _A .G _N .(A ^c ), where A is the set of information bit indices, GN. (A) is the row corresponding to the index in set A in GN. The resulting sub-matrix, GN. (AC), is the sub-matrix obtained from the row corresponding to the index in the set AC in GN. ^u A. is a frozen bit, the number of which is (N_K), which is a known bit. For simplicity, these freeze bits can be set to zero.

The decoding of the Polar code can be decoded by SC (successive-cancellation). The process is as follows:

Consider a Polar code whose parameters are ( ^N , ^K , ^A , ^u A ^C ).

In SC decoding, the following conditional likelihood functions are calculated in order:

.„ ^w '; )? , (1)

Where y is the received signal vector (yl, γ2, ..., yN) and is the bit vector (ul, u2, -, ui-l) ₀ W is the transition probability and L is the log likelihood ratio. If icA, the following judgment:

(2)

If icA ^e , simple order = _Ui (3)

In the above formulas (2) and (3), the decision value of the bit ^ is indicated.

The complexity of SC decoding is 0 (Nlog2N). SC decoding can achieve good performance under the condition that the code length N is very long, and it is close to the Shannon limit.

In the SC decoding, the bit-by-bit order decoding is performed, and after each bit is decoded, the hard bit is performed and then used for subsequent bit decoding. This may result in error propagation, resulting in degraded decoding performance. List (decoding) Decoding preserves multiple candidate paths to achieve decoding performance that approximates maximum likelihood. The combination of SC decoding and List decoding results in SC-List decoding.

The process of SC-List decoding of the Polar code is briefly described as follows:

Path splitting: Each time if ^ is an information bit, the current decoding path is split into two paths: one path ^:^ and one path ^= When the total number of paths exceeds a predefined threshold Lmax When discarding the least reliable path, only the most reliable path of the Lmax strip (called the survivor path) is kept ·' and the probability values on all paths are updated. Lmax is a positive integer and can be called the number of surviving paths.

No path splitting: If ^ is a freeze bit, then all decoding paths are not split, set the number of keep paths unchanged and update the probability values of all paths.

However, SC-List decoding can only perform bit-by-bit sequential decoding, with large decoding delay and low decoding throughput. Summary of the invention

The embodiment of the invention provides a decoding method and a decoder for a Polar code, which can improve the decoding throughput of the Polar code.

In a first aspect, a method for decoding a Polar code is provided, including: dividing a first Polar code of length N into s second Polar codes, wherein each second Polar code has a length of N/s N and s is an integer power of 2 and N>s; the path of the list of the second Polar codes is split in parallel, and the split paths of the s second Polar codes are merged after the path splitting, thereby obtaining Multiple merge paths of length N; select the number of multiple merge paths of length N bits a merge path, where the first merge path is the path with the largest path metric value among the plurality of merge paths with the length of N bits or the path of the CRC through the cyclic redundancy check in the multiple merge paths of length N bits; The first merge path obtains a decoding result of the first Polar code.

With reference to the first aspect, in a first implementation manner of the first aspect, performing path splitting on the s second Polar codes in parallel, and splitting the path of the s second Polar codes after the path splitting Merging, to obtain a plurality of merge paths of length N, comprising: performing path splitting on the kth bit of each second Polar code in parallel to obtain 2L split paths corresponding to each second Polar code, k, L a positive integer and lk N/s, where k=l, L=l, where k>l is the number of surviving paths before the path splitting of the kth bit; according to the first Polar code and the s The nature of the bit corresponding to the kth bit of the second Polar code, combining the total sX2L split paths corresponding to the s second Polar codes, to obtain a P merge path of length kXs, P being a positive integer and P^sX2L _; The P strip merge path of length kXs performs subsequent path splitting and merging processing to obtain multiple merge paths of length N.

With reference to the first aspect and the foregoing implementation manner, in a second implementation manner of the first aspect, performing subsequent path splitting and merging processing according to the P strip merge path of length kXs to obtain multiple merges of length N The path includes: when k<N/s, if P Lma _X , decomposing the P-type merge path of length kXs into s merge path groups, and each of the merge path groups includes P with length k The strip merge path is used as a survivor path, and the s merge path groups are respectively used in path splitting and merging processing for the k+1th bit of the s second Polar codes; if P>Lmax, the slave length is kX s The Lmax strip merge path with the largest path metric is selected in the P merge path, and the selected Lmax strip merge path is decomposed into s merge path groups, and each merge path group includes a Lmax strip merge path of length k as a survivor path. And combining the s merge path groups for the path splitting and merging process of the k+1th bit of the s second Polar codes; when k=N/s, the P strip merge path of length kX s is used as Multiple merge paths of length N, where Lmax is the predetermined maximum number of paths.

With reference to the first aspect and the foregoing implementation manner, in a third implementation manner of the first aspect, combining s second according to the nature of the bit corresponding to the kth bit of the s second Polar codes in the first Polar code A total of sX2L split paths corresponding to the Polar code, resulting in a P-segment of length kXs And the path includes: when the bits corresponding to the kth bit of the s second Polar codes in the first Polar code are frozen bits, the split path whose kth bit is equal to the specific value is selected and merged to obtain a length of k X s The intermediate merge path of the P strips is used as the merge path of the P strips, where P=L, and the specific value is the value of the freeze bit.

With reference to the first aspect and the foregoing implementation manner, in a fourth implementation manner of the first aspect, the s second are combined according to the nature of the bit corresponding to the kth bit of the s second Polar codes in the first Polar code. A total of s X 2L split paths corresponding to the Polar code, and a P merge path of length k X s is obtained, including: when there are w bits in the first Polar code corresponding to the kth bit of the s second Polar codes When information bits and sw freeze bits, where w is an integer and 0 ws, the split path corresponding to the k-th bit of the freeze bit is not equal to the specific value, and the remaining split paths are merged to obtain the middle of the P-length of k X s The merge path is used as the P merge path, where P=2w XL, and the specific value is the value of the freeze bit.

With reference to the first aspect and the foregoing implementation manner, in a fifth implementation manner of the first aspect, the first Polar code of length N is divided into s second Polar codes that are coupled to each other, including: the first Polar code The received signal vectors are sequentially equally divided into s-segment received signal vectors, and each received signal vector is used as a received signal vector of a second Polar code to determine s second Polar codes.

In a second aspect, a decoding apparatus for a Polar code is provided, including: a segmentation unit, configured to divide a first Polar code of length N into s second Polar codes, wherein a length of each second Polar code N/s, N and s are integer powers of 2 and N>s; split merging unit, for splitting the path of Lis decoding of s second Polar codes in parallel, and s after path splitting The split path of the second Polar code is merged to obtain a plurality of merge paths of length N; the selecting unit is configured to select the first merge path of the plurality of merge paths of length N bits, and the first merge path is length a path having the largest path metric value among the plurality of merge paths of the N bits or a path for verifying the CRC by cyclic redundancy in a plurality of merge paths having a length of N bits; and determining means for obtaining the first according to the first merge path The decoding result of a Polar code.

In conjunction with the second aspect, in a first implementation of the second aspect, the split combining unit includes: s decoders of length N/s for paralleling the kth bit of each second Polar code Perform path splitting to obtain 2L split paths corresponding to each second Polar code, where k and L are positive integers and l ^k^N/s, L=l when k=l, L is the number of surviving paths before path splitting for the kth bit; k combiner, based on the first Polar code and s The nature of the bit corresponding to the kth bit of the second Polar code, combining the total s X 2L split paths corresponding to the s second Polar codes, to obtain a P merge path of length k X s, P being a positive integer and P s X 2L, P strip merge path of length k X s is used for subsequent path splitting and merging processing.

With reference to the second aspect and the foregoing implementation manner, in the second implementation manner of the second aspect, the split combining unit further includes a decomposer. When k<N/s, if P Lmax, the decomposer is used to set the length to The P merge path of k X s is decomposed into s merge path groups, each merge path group contains P merge paths of length k as surviving paths, and the resolver is also used to output s merge path groups to s respectively. Decoders, so that s decoders perform path splitting of the k+1th bit of the s second Polar codes in parallel; if P>Lm _ax , the resolver is used to merge from P strips of length k X s The Lmax strip merge path with the largest path metric is selected in the path, and the selected Lmax strip merge path is decomposed into s merge path groups, and each merge path group includes a Lmax strip merge path of length k as a survivor path, and decomposed The device is further configured to output s merge path groups to s decoders respectively, so that s decoders perform path splitting of the k+1th bits of the s second Polar codes in parallel; wherein Lmax is a predetermined maximum The number of paths.

With reference to the second aspect and the foregoing implementation manner, in a third implementation manner of the second aspect, when k=N/s, the combiner is further configured to use a P-type merge path of length k X s as the length N. Multiple merge paths.

With reference to the second aspect and the foregoing implementation manner, in a fourth implementation manner of the second aspect, the combiner is specifically configured to: when the bit corresponding to the kth bit of the s second Polar codes in the first Polar code is frozen When the bit is selected, the split path with the kth bit equal to the specific value is selected and merged to obtain the P intermediate merge path of length k X s, and the P intermediate merge path is taken as the P merge path, where? 4. The specific value is the value of the frozen bit.

With reference to the second aspect and the foregoing implementation manner, in a fifth implementation manner of the second aspect, the combiner is specifically configured to: when the bit corresponding to the kth bit of the s second Polar codes in the first Polar code exists When information bits and sw freeze bits, where w is an integer and 0 ws, the split path corresponding to the kth bit of the freeze bit is not equal to the specific value, and the remaining split paths are merged. The intermediate merge path of the P strips with the length k x s is obtained, and the intermediate merge path of the P strips is taken as the P merge path, where P=2w XL, and the specific value is the value of the freeze bit.

With reference to the second aspect and the foregoing implementation manner, in a sixth implementation manner of the second aspect, the decoder is further configured to calculate a path metric value of each split path.

With reference to the second aspect and the foregoing implementation manner, in a seventh implementation manner of the second aspect, the segmentation unit is specifically configured to sequentially divide the received signal vector of the first Polar code into s segment received signal vectors, each segment The received signal vector is used as a received signal vector of a second Polar code to determine s second Polar codes.

In the embodiment of the present invention, a Polar code of length N is divided into a multi-segment Polar code, and the segmented Polar code is independently split, and then the obtained split paths are combined, and finally the merge path with the largest path metric value is obtained. Thereby, the decoding result of the original Polar code is obtained, so that it is not necessary to sequentially decode N bits, which can improve the decoding throughput of the Polar code and reduce the decoding delay. DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments or the prior art description will be briefly described below. Obviously, the drawings in the following description are only some of the present invention. For the embodiments, those skilled in the art can obtain other drawings according to the drawings without any creative work.

1 is a flow chart of a method of decoding a Polar code according to an embodiment of the present invention.

2 is a schematic diagram of a decoding process in the case of s=2.

Figure 3 is a schematic diagram of the decoding process in the case of s = 4.

Fig. 4 is a block diagram showing a decoding apparatus of a Polar code according to an embodiment of the present invention.

Figure 5 is a schematic block diagram of an apparatus in accordance with another embodiment of the present invention. detailed description

Embodiment 1 As shown in FIG. 1 , a flowchart of a method for constructing a service message according to an embodiment of the present invention includes the following steps: The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

The embodiments of the present invention are applicable to various communication systems, and therefore, the following description is not limited to a specific communication system. Global System of Mobi le communication ("GSM") system, Code Division Multiple Access ("CDMA") system, Wideband Code Division Multiple Access (referred to as Wideband Code Division Multiple Access) "WCDMA") system, General Packet Radio Service ("GPRS", "Long Term Evolution" (LTE) system), LTE Frequency Division Duplex ("Frequency Diviation Duplex") FDD") system, LTE Time Division Duplex ("TDD"), Universal Mobi-Telecommunication System (UMTS), etc. The base station or terminal in the above system uses the tradition The information or data of the turbo code, LDPC code encoding process can be encoded using the Polar code in this embodiment.

1 is a flow chart of a method of decoding a Polar code according to an embodiment of the present invention. The method of Figure 1 can be performed by a decoding device of the Polar code. The decoding means may be located in a receiving device of the Polar code, for example by a processor in the receiving device, or by a dedicated Polar decoder in the receiving device.

101. The first Polar code of length N is divided into s second Polar codes, wherein each second Polar code has a length of N/s, N and s are integer powers of 2, and N>s.

Wherein, the s second Polar codes are coupled to each other, that is, the information bits of the s second Polar codes are Association. The length of the Polar code refers to the number of bits included in the Polar code. The first Polar code refers to the original Polar code that needs to be decoded, and its input is the received signal vector ^ = ( 1, y2, ..., yN).

The Polar code has an intrinsic recursive structure and can be divided into a plurality of Polar codes that are coupled to each other and have a shorter length. Optionally, as an embodiment, the received signal vector of the first Polar code may be sequentially equally divided into s segments, and each received signal vector is used as a received signal of the second Polar code.

Take the case of s=2 as an example, as mentioned above.

Therefore, the encoding process of the Polar code can be expressed as:

p 0

x _l = u _x pp

0

F® Here: " = [So the Polar code of length N can be expressed as follows:

Where: i3⁄4 = v _l ® v _N/2+l ^ b, = v _N/2+l Thus, a Polar code of length N can be divided into two N/2 long Polar codes that are coupled to each other, ie The above second Polar code. In other words, two second Polar codes of length N/2 can be obtained:

N _ _h N/2 -β)(»-1)

ΛΝ/2+1 ― ^υ \ "ΝΙ2 ¹ In this case, in step 101, the received signal vector of the first Polar code is divided into N/2

The received signal vector for the two second Polar codes.

Similarly, taking the case of s=4 as an example, a Polar code of length N can be expressed as:

-2) 0 0 0

-2)

N — N D 0 0

-2) 0 0

-2)

«i =^ θ ν _Ν/4+ί Θ v _Nn+l ® ν _3Λ

Nil N

N ^I4 V;;;;

So you can get 4 second Polar codes as:

N/4 ® (n-2)

A^ ^I B _TIA F

Nil i NI

NiA+\ ― \ N/4

3N/4 ® ("-2")

X N/2+1 'NIA

N NIA

d

In this case, in step 101, the received signal vector of the first Polar code is

N/4 Nil 3JV/4 N

The received signal vectors of 4 second Polar codes are / ₄₊₁ > / ₂₊₁ and _3⁄4/ ₄₊₁ .

Similarly, taking the case of s=8 as an example, a Polar code of length N can be expressed as:

⁼ l

3N/8 4N/8 5N/8 6N/8 7N/8 N

V

2N/ + © ^V 3 /8 ₊ i © 3⁄4 5ΛΑ/8+

N

N

^V 7W/8+l So you can get 8 second Polar codes as:

N/8 ® ("-3")

^U \ D Γ

■2W/8 _

XN/ +l ~ ^U \ D Γ

®("-3")

N ^! BF

5N ® ("-3")

X 4W/8+1 B F

6N ® 0 — 3)

^B N/ ^F

IN ®("-3")

6N/ +1 61 B F

ΊΝί^Λ In this case, in step 101, the received signal vector of the first Polar code is divided into eight received signal vectors of the second Polar code ^ " ^/8 , d :

For other s values, s second Polar codes can be similarly obtained, and details are not described herein again. In addition, the embodiment of the present invention does not limit the segmentation manner of the Polar code, and may also perform segmentation in other ways than the sequential division, as long as the mutual coupling between the segmented Polar codes is ensured.

102: Perform path splitting on the s second Polar codes in parallel, and merge the split paths of the s second Polar codes after the path splitting, thereby obtaining a length of Ν. Strip merge path.

Path splitting refers to two split paths based on the previous decoding path based on the current decoding bits of 0 and 1. At the same time, the path metrics of each split path can be settled. The larger the path metric value, the higher the reliability of the corresponding path. An example of the path metric is the logarithm of the path probability value, but the embodiment of the present invention does not limit the specific form of the path metric.

And selecting, by the first merge path, the first merge path of the multiple merge paths of the length N, where the first merge path is the path with the largest path metric value among the multiple merge paths of the length N or The path of the CRC (Cyclic Redundancy Check) in the multiple merge paths of N.

The first merge path thus obtained is the most reliable path and can therefore be used to obtain the final decoded result.

104. Obtain a decoding result of the first Polar code according to the first merge path.

The decoding result of the first Polar code can be obtained from the decoding result of the second Polar code according to the correspondence between the second Polar code and the respective bits of the first Polar code. An exemplary process of obtaining a decoding result of the first Polar code will be described in more detail below in conjunction with a specific embodiment.

In the embodiment of the present invention, a Polar code of length N is divided into a multi-segment Polar code, and the segmented Polar code is independently split, and then the obtained split paths are combined to obtain a merge path with the largest path metric value. Thus, the decoding result of the original Polar code is obtained, so that it is not necessary to sequentially decode N bits, which can improve the decoding throughput of the Polar code and reduce the decoding delay.

In addition, the embodiment of the present invention only needs a decoder with a length of N/s, which can reduce the resources and computational complexity occupied by a single decoder, so that it can be flexibly applied to a resource-constrained scenario. It should be noted that the decoder in the embodiment of the present invention may be implemented entirely by dedicated hardware, such as a dedicated chip, an integrated circuit, or other firmware; or may be implemented by a general-purpose processor and its instructions, and the instructions may be stored in the processor. Or stored in a separate memory. These forms are all within the scope of embodiments of the invention.

Optionally, as an embodiment, in step 102, path segmentation may be performed on the kth bit of each second Polar code in parallel to obtain 2L split paths corresponding to each second Polar code, k, L. It is a positive integer and lk N/s, when k=l, L=l, and when k>l, L is the number of surviving paths before the path splitting of the kth bit. In other words, s length decoders of length N/s can be used to split the second Polar code and calculate the path metric of each split path. This eliminates the need to serially split the path bit by bit, improving the decoding throughput and reducing the decoding delay.

Then, according to the nature of the bits in the first Polar code corresponding to the kth bit of the s second Polar codes (ie, whether the corresponding bit is a frozen bit or an information bit), the total s corresponding to the s second Polar codes are combined. X 2L split paths, resulting in P merge paths of length k X s. P is a positive integer and P s X 2L. In this way, the subsequent path splitting and merging processes can be performed according to the P-strip merge path of length k X s to obtain multiple merge paths of length N.

The corresponding bit refers to the position of the kth bit of the second Polar code originally in the first Polar code. Taking the input bit as an example, it is assumed that the input bit of the first Polar code is represented as ( ^ν ,

o For example, in the case of s=2 above, the first Polar code

7V/2 N Nil N/2 input bits are represented as (^, ^v w "), and the input bits of the two second Polar codes are respectively, and then "the corresponding bit in the first Polar code is, in the first Polar The corresponding bit in the code is that the corresponding bit may be an information bit or a frozen bit.

Optionally, as another embodiment, the path is merged according to the P strips of length k X s When the subsequent path splitting and merging process is performed to obtain the multiple merge paths of length N, different processing may be performed according to the current value of k.

For example, when k<N/s, if P Lmax, P strip merge paths of length k X s are decomposed into s merge path groups, and each merge path group contains P strip merge paths of length k as surviving The path, and the s merge path groups are used for path splitting and merging processing of the k+1th bit of the s second Polar codes, respectively. On the other hand, if P>Lm _ax , the Lmax strip merge path with the largest path metric value is selected from the P merge paths of length k X s, and the selected Lmax strip merge path is decomposed into s merge path groups. Each merged path group includes an Lmax strip merge path of length k as a survivor path, and s merge path sets are used for path splitting and merging processing of the k+1th bit of the s second Polar codes, respectively. Lmax is the predetermined maximum number of paths. Using the threshold Lmax can avoid excessive algorithm complexity.

When k=N/s, the P-strip merge path of length k X s can be used as multiple merge paths of length N.

Optionally, as another embodiment, the total s X 2L split paths corresponding to the s second Polar codes are combined according to the nature of the bits corresponding to the kth bit of the s second Polar codes in the first Polar code. When the P strip merge path of length k X s is obtained, when the bits corresponding to the kth bit of the s second Polar codes in the first Polar code are frozen bits, the split path with the kth bit equal to the specific value is selected. Combine to obtain P intermediate merge paths of length k X s, thus obtaining P=L. The above specific value is the value of the frozen bit, such as '0'.

Optionally, as another embodiment, the total s X 2L split paths corresponding to the s second Polar codes are combined according to the nature of the bits corresponding to the kth bit of the s second Polar codes in the first Polar code. , when the P strip merge path of length k X s is obtained, when the first Polar code is associated with s When there are w information bits and s_w frozen bits in the bit corresponding to the kth bit of the second Polar code, where w is an integer and 0 ws, the split path corresponding to the kth bit of the frozen bit is not equal to the specific value, and the merge is performed. The remaining split paths result in P intermediate merge paths of length kXs, thus obtaining P=2wXL. The above specific value is the value of the frozen bit, for example, '0'.

Optionally, as another embodiment, in step 101, the received signal vector of the first Polar code may be sequentially equally divided into s-segment received signal vectors, and each received signal vector is received as a second Polar code. The signal vector determines s second Polar codes.

The decoding process of the embodiment of the present invention will be described in more detail below with reference to specific examples. 2 is a schematic diagram of a decoding process in the case of s=2.

First, the Polar code of length N is divided into two Polar codes of length N/2, that is, the first half of the received signal vector ^Λ and the second half of the received signal vector / ₂₊₁ . The corresponding input bits are satisfied:

"'· ^=ν '·® ^ν TM _{l ≤ i ≤ N/2} In other words,

V =

Two SC-list decoders A and B of length N/2 can be used to perform parallel path splitting on two N/2 long Polar codes, respectively. Before the path splitting of the kth bit, it is assumed that the current L surviving paths are: H Md^ , where (i ≤ w ≤ ). Where path = ^{{ 1} , ² '·"' ^ ^{} is} used for decoder A, path ^ = , , ···, " ^{} is} used for decoder B.

The process of two-way parallel SC-List decoding is as follows:

First, decoder A and decoder B respectively generate new 2L paths, in which decoder A generates 2L new paths are ^{ K = ^0} , ( ^{1 ≤ m ≤} >', and decoder B produces 2L new paths {H, i =0} , i ^B m- ^b m,k = !} ^ (1 ≤ W ≤ ).

If ^ and ^v ^^ are both frozen bits, ie ^ = ⁰ and ₊ w/ ₂ =0, then = ^v t ₊ w/2 ® ^v t+w/2 = 0, b _m , _k = v _k+N =Q , get L merge paths: = = ^Q , _k = 0}. The new L paths { , = 0} (i ≤ _w ≤ ) are used for the new L paths of decoder _A = W (i ≤ _w ≤ ) for decoder _B.

If ^v * is the FROZEN bit ( ^v * = ⁰ ) and ^v N is the information bit, then a _m , _k =v _k+NI2 , b _m , _k =v _k+Nn , get _2L merge paths:

^m( ^V k+N n ~ {A _m , B _m , a _m , _k = ^k+N /2^m,k = ^V k+N/l} \ < ΪΗ < L ^V k+N/2 Two {0,1}

Specifically, the 2L merge paths are: ^^^ ^, ,^^ ^^ ^ and

^P m( ^V k ₊ N/2 =

l ≤ m ≤ L. The metric of the merge path is the sum of 2 path metrics: ^M ( ^P TMd/2)) ^{= M} ({d / ₂ }) + M({d / ₂ }), l ≤ m ≤ L. Here, the path metric is the logarithm of the path probability value.

Path metric; ^M (^, ^V f ₂ » is the path metric for path ^.

In addition, if 2L>Lmax, where Lmax is the number of preset maximum paths, then the Lmax paths with the largest path metric value are selected from 2L paths, and then from the selected Lmax merge paths ^{4 ^', ^ , ^ ^} decomposes Lmax paths ^{ « ^} for decoder A and Lmax paths ^', ^} for decoder B.

If both ^v * and ^V * ^{+ A} ^ are information bits, then ^ ¹ ^® ¹ ^^, , _k = v _{k+N/2 f} yields 4L merge paths - ^P > r ^V k, ^V k ₊ N / 2, ⁼ An, ^B m people & m, k ^{= V} k ® ^V k ₊ N / 2, b _m , _k = V _k+N ! ₂ } , where <m<L , v _k , v _k+N/2 {0,\} . Specifically, these 4L paths are:

PJ _k = , v _k+N/2 = o) = {Α _Μ ,Β _Μ ,ά _Μ = o, L _k = 0} P _m iy _k -o, _i+w/2 = i) = {A _m , B _m , a _mk = l, b _mk = 1} , P _m (y _k = lv _k+N/2 - o) = {A _m , B _m , a _mk = l, b _mk = 0} and ^p _m y _k = v _k+N/2 = l) = {A _m , B _m , 3 _mk =0, b _mk =1} , i ≤ _w ≤ . The metric of the merge path is the sum of the two path metrics:

= v _k ®v _k+NI2 }) + M{{B _m ,b _mk = v _k+N/2 }) . Here ^M ({ ^A _m ^ _k =v _k ®v _k ^ _NI2 }) is the path { Path metric of A _m , a _mk = v _k ®v _k+N/2 }; ^M \B _m , b _m , _k = v _fc+jV/2 }) is the path {H = v _i+jV/2 Path metric for }.

In addition, if 4L>Lma _X , then Lmax paths with the largest path metric value are selected from 4L paths, and then Lmax paths ^{ « ^} are decomposed from the selected Lmax paths for decoder A and ^{ ^'^ ^{} is} used for decoder B.

When the decoder completes all decoding calculations, that is, when k=N/2, all merge paths are obtained according to the above method (in this case, all merge paths are N), and the output path metric is the largest (corresponding to the probability value). a combined maximum path, then: ^{/ = 2} "" and ^/ = ^{^_2/2/2} and _{+ 1} to give _{^2/2 + 1.} Finally rearrange to get the original input bit <.

The embodiment of Fig. 2 decodes the two second Polar codes in parallel, thus improving decoding throughput and reducing latency.

Figure 3 is a schematic diagram of the decoding process in the case of s = 4.

First, the Polar code of length N is divided into four Polar codes of length N/4, that is, four received signal vectors, _/2+1 and ^ _/4+1 . The corresponding input bits are satisfied:

^ =ν _ί+Ν/4 @ν _ί+3Ν/4 \<ί<ΝΙΛ Can get:

Ten

Four SC-list decoders A, B, C and D of length N/4 can be used. The four decoders use W ⁴ , , ^ ^ and "^^4" as inputs respectively. Before performing path splitting on the kth bit, assume that the current L paths are:

P„, = ^^"^"^,^^'(^?,^?,^ ^^),...,^ —,,^^—^^—^, “— ), where (l≤ ≤£ ). Where path: A ^ , ^^,..., ^^^ is used for decoder A, path

^ = { . ... , J is used for decoder B, path = {^, ^.2, ···^^—j is used for decoder _c , path = ^ ^, "..., ^' ^ for Decoder D.

The process of 4-way parallel SC-List decoding is as follows:

First, the decoder A/B/C/D generates a new 2L path: where decoder A generates a new 2L path as ^{ « = ^0} , Ί ^1} , \ <m<L - decoder B Generate a new 2L path {B _m A, _k =0} , { , ₄ =1}, l _{≤ m ≤} ; Decoder C produces a new 2L paths H 0} , H =l}, i _{≤ m ≤ L} . Decoder D produces a new 2L path ίΚ, ί =. } , {K =i}, l≤m≤L.

The path of the merge path is a combination of 4 paths:

P _m ( ^V k, ^V k+N 14, ^V k+N i 2, ^V k+^NI )― {^m, , , , ^Q m,k, ik, ^C m,k, ^m,k )

Here \<k< N/4

, d

By traversing the various combinations of all variables (Hw/ ₄ , ^V f ₂ , _+3Ar/4 ), we get the full merge path. Note: Since the FROZEN bit is "0", assume that all combinations are = ^2W , where w is ^ , ν^ _/4 , ν^ _/2 , ν _ί+ ^ ₄ ) The number of information bits, the number of merge paths is a few. It can be seen that ^-{0 2, , 4}, thus J = {1, ² , ⁴ , ⁸ , 16 ⁶ }. The metric of the merge path is the sum of the corresponding path metrics from the four decoders. That is: MP _m v _k , v _{k+N 4} , v _k+N , v ^, = MA _m , a _m , _k , + MB _m , i _mk , + MC _m , d _m , _k , + MD _m , _k , .

In addition, if JL>Lm _ax , then the Lmax path with the largest Lmax path metric value is selected from the JL paths, and then the Lmax paths are decomposed from the selected Lmax paths ^'^'Ά^'^^Λ^ ^{ ^ ^} for decoder A Lmax path decoder B Lmax paths ^{C -^ ^} for decoder C Lmax path decoder D

3) When the decoder completes all decoding calculations, that is, when k=N/4, all merge paths are obtained according to the above method (in this case, all merge paths are N), and the output path metric is the largest (corresponding probability) Value) The largest merge path, then passed:

Get it. Finally rearrange to get the original input bit ^.

The embodiment of Figure 3 decodes four second Polar codes in parallel, thus improving translation For other s values, segmentation and independent decoding can be similarly performed, and details are not described herein again.

Fig. 4 is a block diagram showing a decoding apparatus of a Polar code according to an embodiment of the present invention. Figure 4 decoding device

40 includes a segmentation unit 41, a split merge unit 42, a selection unit 43, and a determination unit 44.

The segmentation unit 41 is configured to divide the first Polar code of length N into s second Polar codes coupled to each other, wherein each second Polar code has a length of N/s, and N and s are integer powers of 2. And

N>s _;

The split merging unit 42 is configured to perform path splitting on the s second Polar codes in parallel, and combine the split paths of the s second Polar codes after the path splitting, thereby obtaining a length of N Strip merge path;

The selecting unit 43 is configured to select a first merge path of the multiple merge paths of the length N, where the first merge path is the path with the largest path metric value among the multiple merge paths of the length N or a length of N The path of the CRC is verified by cyclic redundancy in multiple merge paths;

The determining unit 44 is configured to obtain a decoding result of the first Polar code according to the first merge path. In the embodiment of the present invention, a Polar code of length N is divided into a multi-segment Polar code, and the segmented Polar code is independently split, and then the obtained split paths are combined, and finally the merge path with the largest path metric value is obtained. Thereby, the decoding result of the original Polar code is obtained, so that it is not necessary to sequentially decode N bits, which can improve the decoding throughput of the Polar code and reduce the decoding delay.

In addition, the embodiment of the present invention only needs a decoder with a length of N/s, which can reduce the resources and computational complexity occupied by a single decoder, so that it can be flexibly applied to a resource-constrained scenario.

It should be noted that the decoder in the embodiment of the present invention may be implemented entirely by dedicated hardware, such as a dedicated chip, an integrated circuit, or other firmware; or may be implemented by a general purpose processor and its instructions. The commands can be stored in the processor or stored in a separate memory. These forms are all within the scope of embodiments of the invention.

Optionally, as an embodiment, the split combining unit 42 includes: s lengths N/s decoder 421, configured to perform path splitting on the kth bit of each second Polar code in parallel, to obtain each 2L splitting paths corresponding to the second Polar code, k, L are positive integers and lk N/s, k=l is L=l, k> l is L is the number of surviving paths before the path splitting of the kth bit; The combiner 422 is configured to combine the total s X 2L split paths corresponding to the s second Polar codes according to the nature of the bits corresponding to the kth bit of the s second Polar codes in the first Polar code, to obtain a length k P strip merge paths of X s, P is a positive integer and P s X 2L, and P merge paths of length k X s are used for subsequent path splitting and merging processing.

Optionally, as another embodiment, the split combining unit 42 may further include a decomposer 423. When k<N/s, if P Lmax, the decomposer is used to decompose the P strip merge path of length k X s into s merge path groups, and each merge path group contains P strip merge paths of length k as The path is survived, and the decomposer is further configured to output the s merge path groups to the s decoders, respectively, so that the s decoders perform the path splitting of the k+1th bits of the s second Polar codes in parallel. If P>Lmax, the resolver is used to select the Lmax strip merge path with the largest path metric value from the P strip merge paths of length k X s, and decompose the selected Lmax strip merge path into s merge path groups, each The merge path group includes a Lmax strip merge path of length k as a survivor path, and the resolver is further configured to output s merge path groups to s decoders, respectively, so that s decoders perform s The path of the k+1th bit of the second Polar code is split. Where Lmax is the predetermined maximum number of paths.

Optionally, as another embodiment, when k=N/s, the combiner 422 is further configured to use a length of k X s The P strip merge path is used as multiple merge paths of length N.

Optionally, as another embodiment, the combiner 422 is specifically configured to: when the bits corresponding to the kth bit of the s second Polar codes in the first Polar code are frozen bits, select the kth bit to be equal to the specific value. The split path is merged to obtain the P intermediate merge path of length k X s, and the P intermediate merge path is taken as the P merge path, where P=L, and the specific value is the value of the freeze bit.

Optionally, as another embodiment, the combiner 422 is specifically configured to: when there are w information bits and s_w freeze bits in the bit corresponding to the kth bit of the s second Polar codes in the first Polar code, where w is an integer and 0 ws, deletes the split path corresponding to the k-th bit of the frozen bit that is not equal to the specific value, merges the remaining split paths, and obtains the P intermediate merge path of length k X s, and takes the intermediate merge path of P as P strip merge path, where P=2w XL, the specific value is the value of the frozen bit.

Optionally, as another embodiment, the decoder 421 is further configured to calculate a path metric value for each split path.

Optionally, as another embodiment, the segmentation unit 41 is specifically configured to sequentially divide the received signal vector of the first Polar code into s-segment received signal vectors, each segment of the received signal vector as one of the second The received signal vector of the Polar code determines s second Polar codes.

Figure 5 is a schematic block diagram of an apparatus in accordance with another embodiment of the present invention. The apparatus 50 of FIG. 5 can be used to implement various steps and methods in the above method embodiments. The device 50 can be applied to a base station or terminal in various communication systems. In the embodiment of FIG. 5, apparatus 50 includes a transmit circuit 502, a receive circuit 503, a decode processor 504, a processing unit 505, a memory 506, and an antenna 501. Processing unit 505 controls the operation of device 50 and is operable to process signals. Processing unit 505 may also be referred to as a CPU (Central Processing Unit). Memory 506 can include read only memory and random The memory is accessed and instructions and data are provided to processing unit 505. A portion of memory 506 may also include non-volatile line random access memory (NVRAM). In a particular application, device 50 may be embedded or may itself be a wireless communication device such as a mobile telephone, and may also include a carrier that houses transmit circuitry 502 and receive circuitry 503 to allow for data transmission between device 50 and a remote location. receive. Transmit circuit 502 and receive circuit 503 can be coupled to antenna 501. The various components of device 50 are coupled together by a bus system 509, which in addition to the data bus includes a power bus, a control bus, and a status signal bus. However, for clarity of description, various buses are labeled as bus system 509 in the figure.

The method disclosed in the above embodiments of the present invention may be applied to the decoding processor 504 or implemented by the decoding processor 504. Decoding processor 504 may be an integrated circuit chip with signal processing capabilities. In an implementation process, the steps of the above method may be completed by an integrated logic circuit of the hardware in the decoding processor 504 or an instruction in the form of software. These instructions can be implemented and controlled by processing unit 505. For performing the method disclosed in the embodiments of the present invention, the above decoding processor may be a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), an off-the-shelf programmable gate array (FPGA), or other programmable Logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps, and logic blocks disclosed in the embodiments of the invention may be implemented or carried out. The general purpose processor may be a microprocessor or the processor or any conventional processor, decoder or the like. The steps of the method disclosed in the embodiments of the present invention may be directly implemented as a hardware decoding processor, or may be performed by a combination of hardware and software modules in the decoding processor. The software modules can be located in a conventional storage medium such as random access memory, flash memory, read only memory, programmable read only memory or electrically erasable programmable memory, registers, and the like. The storage medium is located in the memory 506, and the decoding processor 504 reads the information in the memory 506, combining Its hardware completes the steps of the above method.

In particular, memory 506 can store instructions that cause decoding processor 504 or processing unit 505 to perform the following processes:

The first Polar code of length N is divided into s second Polar codes, wherein each second Polar code has a length of N/s, N and s are integer powers of 2 and N>s; The second Polar code performs path splitting of the list List decoding, and merges the split paths of the s second Polar codes after the path splitting, thereby obtaining multiple merge paths of length N; selecting multiple pieces of length N The first merge path in the merge path, where the first merge path is the path with the largest path metric value among the multiple merge paths of length N or the path of the CRC through the cyclic redundancy check in the multiple merge paths of length N; According to the first merge path, the decoding result of the first Polar code is obtained.

In the embodiment of the present invention, a Polar code of length N is divided into a multi-segment Polar code, and the segmented Polar code is independently split, and then the obtained split paths are combined, and finally the merge path with the largest path metric value is obtained. Thereby, the decoding result of the original Polar code is obtained, so that it is not necessary to sequentially decode N bits, which can improve the decoding throughput of the Polar code and reduce the decoding delay.

Optionally, as an embodiment, the memory 506 also stores instructions that cause the decoding processor 504 or the processing unit 505 to perform the following process: performing path splitting on the kth bit of each second Polar code in parallel, obtaining each 2L split path corresponding to the second Polar code, k and L are positive integers and lk N/s, k=l is L=l, k> l is L is the number of surviving paths before the path splitting of the kth bit; The nature of the bit corresponding to the kth bit of the s second Polar code in the first Polar code, combining the total s X 2L split paths corresponding to the s second Polar codes, to obtain a P merge path of length k X s , P is a positive integer and P s X 2L _; according to the P-strip path of length k X s The path performs subsequent path splitting and merging processing to obtain multiple merge paths of length N.

Optionally, as another embodiment, the memory 506 also stores instructions that cause the decoding processor 504 or the processing unit 505 to perform the following process: When k<N/s, if P Lma _X , the length is k X s The P strip merge path is decomposed into s merge path groups, each merge path group contains P merge paths of length k as surviving paths, and s merge path groups are respectively used for the kth of s second Polar codes. +1 bit path splitting and merging processing; if P>Lm _ax , selecting the Lmax strip merging path with the largest path metric value from the P strip merge paths of length k X s, and decomposing the selected Lmax strip merge path into s merge path groups, each merge path group includes Lmax strip merge paths of length k as surviving paths, and s merge path groups are used for path splitting of the k+1th bits of s second Polar codes, respectively Combining processing; when k=N/s, the P-strip merge path of length k X s is taken as a plurality of merge paths of length N, where Lmax is a predetermined maximum number of paths.

Optionally, as another embodiment, the memory 506 also stores instructions that cause the decoding processor 504 or the processing unit 505 to perform the following process: when the bits corresponding to the kth bit of the s second Polar codes in the first Polar code When the bits are frozen, the split path with the kth bit equal to the specific value is selected to be merged to obtain the P intermediate merge path of length k X s, and the P intermediate merge path is taken as the P merge path, where P=L, specific The value is the value of the frozen bit.

Optionally, as another embodiment, the memory 506 also stores instructions that cause the decoding processor 504 or the processing unit 505 to perform the following process: when the bits corresponding to the kth bit of the s second Polar codes in the first Polar code When there are w information bits and sw frozen bits, where w is an integer and 0 ws, the split path corresponding to the k-th bit of the frozen bit is not equal to a specific value, and the remaining split paths are merged to obtain a length of k X s The intermediate merge path of the P strips is used as the merge path of the P strips, where P=2wX L, and the specific value is the value of the freeze bit. Optionally, as another embodiment, the memory 506 further stores instructions that cause the decoding processor 504 or the processing unit 505 to perform the following process: sequentially dividing the received signal vector of the first Polar code into s-segment received signal vectors, Each segment of the received signal vector serves as a received signal vector of a second Polar code to determine s second Polar codes.

Those of ordinary skill in the art will appreciate that the elements and algorithms of the various examples described in connection with the embodiments disclosed herein can be implemented in a combination of electronic hardware or computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the solution. A person skilled in the art can use different methods for implementing the described functions for each particular application, but such implementation should not be considered to be beyond the scope of the present invention.

A person skilled in the art can clearly understand that the specific working process of the system, the device and the unit described above can be referred to the corresponding process in the foregoing method embodiments for the convenience and brevity of the description, and details are not described herein again.

In the several embodiments provided herein, it should be understood that the disclosed systems, devices, and methods may be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the unit is only a logical function division. In actual implementation, there may be another division manner, for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not executed. In addition, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be electrical, mechanical or otherwise.

The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. You can choose some of them according to actual needs or All units are used to achieve the objectives of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as separate products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention, which is essential or contributes to the prior art, or a part of the technical solution, may be embodied in the form of a software product, which is stored in a storage medium, including The instructions are used to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and the like, which can store program codes. .

The above is only the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily think of changes or substitutions within the technical scope of the present invention. It should be covered by the scope of the present invention. Therefore, the scope of the invention should be determined by the scope of the claims.

Claims

Rights request

A method for decoding a polar Polar code, comprising:

The first Polar code of length N is divided into s second Polar codes, wherein each second Polar code has a length of N/s, N and s are integer powers of 2 and N>s;

Parallelly splitting the path of the s second Polar codes into the Listed List code, and merging the split paths of the s second Polar codes after the path splitting, thereby obtaining multiple pieces of length N Merge path

Selecting a first merge path of the multiple merge paths of the length N, where the first merge path is the path with the largest path metric value among the multiple merge paths of length N or the length is N The path of the CRC is verified by cyclic redundancy in multiple merge paths;

Obtaining a decoding result of the first Polar code according to the first merge path.

2. The decoding method according to claim 1, wherein the performing the path splitting on the s second Polar codes in parallel, and splitting the s second Polar codes after the path splitting The paths are merged to obtain multiple merge paths of length N, including:

Parallelly splitting the kth bit of each second Polar code to obtain each second

2L split path corresponding to the Polar code, k, L are positive integers and lk N/s, k=l, L=l, k> l, L is the surviving path before the path splitting for the kth bit Number

Combining the total s X 2L split paths corresponding to the s second Polar codes according to the nature of the bits corresponding to the kth bit of the s second Polar codes in the first Polar code, to obtain a length of k P strips of X s merge paths, P is a positive integer and P s X 2L _;

Performing subsequent path splitting and merging processing according to the P-strip merge path of length k X s to obtain the multiple merge paths of length N.

The decoding method according to claim 2, wherein the subsequent path splitting and merging processing is performed according to the P-strip merge path of length k X s to obtain the plurality of strips of length N Merge paths, including:

When k<N/s, if P Lma _X , the P strip merge path of length k X s is decomposed into s merge path groups, and each merge path group includes P strips of length k combined The path is a surviving path, and the s merge path groups are respectively used in path splitting and merging processing for the k+1th bit of the s second Polar codes; if P>Lm _ax , then the length is P strip of k X s The Lmax strip merge path with the largest path metric is selected in the merge path, and the selected Lmax strip merge path is decomposed into s merge path groups, and each merge path group includes a Lmax merge path of length k as a survivor path. And using the s merge path groups respectively for path splitting and merging processing of the k+1th bit of the s second Polar codes;

When k=N/s, the P-strip merge path of length k X s is used as the multiple merge path of length N,

Where Lmax is the predetermined maximum number of paths.

The decoding method according to claim 2 or 3, wherein the merging according to the nature of the bit corresponding to the kth bit of the s second Polar codes in the first Polar code The total s X 2L split paths corresponding to the s second Polar codes are obtained, and the P merge paths of length k X s are obtained, including:

When the bits corresponding to the kth bit of the s second Polar codes in the first Polar code are frozen bits, the split path with the kth bit equal to the specific value is selected and merged to obtain a length of k X s. The intermediate merge path of the P strips is used as the merge path of the P strips, where P=L, and the specific value is the value of the freeze bit.

When there are w information bits and sw freeze bits in the bit corresponding to the kth bit of the s second Polar codes in the first Polar code, where w is an integer and 0 ws, the deletion corresponds to the frozen bit The k-th bit is not equal to the split path of the specific value, and the remaining split paths are merged to obtain P intermediate merge paths of length k X s, and the P intermediate merge paths are used as the P merge paths, where P= 2w XL, the specific value is a value of the frozen bit.

The decoding method according to any one of claims 1 to 5, wherein the first Polar code of length N is divided into s second Polar codes, including:

The received signal vector of the first Polar code is sequentially equally divided into s-segment received signal vectors, and each received signal vector is used as a received signal vector of the second Polar code to determine the s second Polar codes.

A decoding device for a polar Polar code, comprising:

a segmentation unit, configured to divide the first Polar code of length N into s second Polar codes, wherein each second Polar code has a length of N/s, N and s are integer powers of 2, and N>s ;

a split combining unit, configured to perform path splitting on the s second Polar codes in parallel, and combine the split paths of the s second Polar codes after the path splitting, thereby obtaining a length Multiple merge paths for N;

a selecting unit, configured to select a first merge path of the plurality of merge paths of the length N, where the first merge path is a path with the largest path metric value among the multiple merge paths of the length N or a path in which a CRC is verified by cyclic redundancy in a plurality of merge paths of length N;

And a determining unit, configured to obtain, according to the first merge path, a decoding result of the first Polar code.

The decoding apparatus according to claim 7, wherein the splitting and merging unit comprises:

s a length N/s decoder for performing path splitting on the kth bit of each second Polar code in parallel to obtain 2L split paths corresponding to each second Polar code, where k and L are positive Integer and lk N/s, when k=l, L=l, where k> l is the number of surviving paths before the path splitting of the kth bit;

a merging unit, configured to combine a total s X 2L split path corresponding to the s second Polar codes according to a property of the bit corresponding to the kth bit of the s second Polar codes in the first Polar code, to obtain a total s X 2L split path corresponding to the s second Polar codes, P strip merge paths of length k X s, P is a positive integer and P s X 2L, and the P strip merge paths of length k X s are used for subsequent path splitting and merging processing.

The decoding apparatus according to claim 8, wherein the split combining unit further includes a decomposer, when k<N/s,

If P Lma _X , the decomposer is configured to decompose the P strip merge path of length k X s into s merge path groups, and each merge path group includes P strip merge paths of length k as surviving a path, and the decomposer is further configured to output the s merge path groups to the s decoders respectively, so that the s decoders perform the k+th of the s second Polar codes in parallel 1-bit path splitting;

If P>Lm _ax , the resolver is used to merge from the P strips of length k X s Selecting the Lmax strip merge path with the largest path metric, and decomposing the selected Lmax strip merge path into s merge path groups, each of the merge path groups including the Lmax strip merge path of length k as a survivor path, and The decomposer is further configured to output the s combined path groups to the s decoders respectively, so that the s decoders perform the path of the k+1th bit of the s second Polar codes in parallel Split;

Where Lmax is the predetermined maximum number of paths.

The decoding apparatus according to claim 8 or 9, wherein, when k=N/s, the combiner is further configured to use the P-strip merge path of length k X s as the Multiple merge paths of length N.

The decoding device according to any one of claims 8 to 10, wherein the combiner is specifically configured to be used in the first Polar code and the s second Polar code When the bits corresponding to the k bits are frozen bits, the split path with the kth bit equal to the specific value is selected and merged to obtain P intermediate merge paths of length k X s, and the P intermediate merge paths are used as the P strips The merge path, where P=L, the specific value is the value of the freeze bit.

The decoding apparatus according to any one of claims 8 to 10, wherein the combiner is specifically configured to: when the first Polar code is the kth of the s second Polar codes When there are w information bits and sw frozen bits in the bit corresponding to the bit, where w is an integer and 0 ws, the split path corresponding to the kth bit of the frozen bit is not equal to the specific value, and the remaining split path is merged to obtain the length. For the P intermediate merge path of k X s, the P intermediate merge path is used as the P merge path, where P=2w XL, and the specific value is the value of the freeze bit.

The decoding apparatus according to any one of claims 8 to 12, wherein the decoder is further configured to calculate a path metric value of each split path.

The decoding apparatus according to any one of claims 7 to 13, wherein the segmentation unit is specifically configured to sequentially divide the received signal vector of the first Polar code into s segment received signals. a vector, each segment of the received signal vector as a received signal vector of the second Polar code to determine the s second Polar codes.