WO2019206136A1 - Method and device for rate matching and de-rate matching polar code - Google Patents

Method and device for rate matching and de-rate matching polar code Download PDF

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Publication number
WO2019206136A1
WO2019206136A1 PCT/CN2019/083883 CN2019083883W WO2019206136A1 WO 2019206136 A1 WO2019206136 A1 WO 2019206136A1 CN 2019083883 W CN2019083883 W CN 2019083883W WO 2019206136 A1 WO2019206136 A1 WO 2019206136A1
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Prior art keywords
bit
sequence
matching
constraint
coding
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PCT/CN2019/083883
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French (fr)
Chinese (zh)
Inventor
牛凯
朴瑨楠
戴金晟
董超
王桂杰
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华为技术有限公司
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Publication of WO2019206136A1 publication Critical patent/WO2019206136A1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • H04L1/0058Block-coded modulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0067Rate matching

Definitions

  • the embodiments of the present invention relate to the field of coding and decoding technologies, and in particular, to a rate matching and de-rate matching method and device for a polarization code.
  • Polar codes proposed by Turkish professor Arikan are the first good codes that can theoretically achieve Shannon's capacity and have low coding and decoding complexity. Therefore, Polar code has great prospects in the development and application 5G, and the Third Generation Partnership Project (the 3 rd Generation Partner Project, 3GPP) radio access network (Radio Access Network, RAN1) 87th meeting Accepted for control channel coding.
  • 3GPP Third Generation Partnership Project
  • the code length of the original Polar code is an integer power of 2.
  • a Polar code of any code length needs to be implemented by rate matching.
  • the prior art implements rate matching using a scheme such as puncture or shortening. That is, the prior art performs rate matching during encoding, puncturing or shortening the mother code exceeding the target code length to reach the target code length, performing de-rate matching during decoding, and filling and restoring the received decoding sequence to the mother code. Code length.
  • the rate matching scheme of the polar code there is a problem that the decoding performance is not high. Therefore, it is urgent to provide a rate matching method to improve the decoding performance.
  • the embodiment of the present application provides a rate matching and de-rate matching method and device for a polarization code to improve decoding performance.
  • the embodiment of the present application provides a rate matching method for a polarization code, including:
  • the number of available matching locations will be searched for by The reduction is M+1 times, which effectively reduces the search complexity.
  • the coding bit corresponding to the matching position in the encoded sequence can be made 0, and the decoding performance is improved, and the N and the M are An integer, the M is less than N; the rate matching sequence is sent to the receiving device.
  • the rate matching of the Polar code is performed based on the coding constraint relationship and the matching position consecutively, and the decoding performance can be improved.
  • the number of the coding constraint relationships is at least one, the difference between the number of all constraint positions corresponding to the at least one coding constraint relationship and the number of the coding constraint relationships and the matching position The number is equal, and the code rate non-destructive principle can be satisfied, so that the code rate can take any value between 0 and 1.
  • the method before the obtaining a sequence to be encoded of length N according to the coding constraint relationship, the method further includes:
  • the obtaining a matching column from the coding matrix according to the matching position in the rate matching pattern includes:
  • Gaussian elimination processing is performed on the element 1 in the initial matrix to obtain a matching matrix, and the columns in the matching matrix are the matching columns.
  • the coding matrix is simplified, so that the coding constraint relationship can be quickly obtained.
  • the acquiring a sequence to be encoded of length N according to a coding constraint relationship includes:
  • the method further includes:
  • the attributes of the bits of the constraint position in the coding constraint relationship can be constructed to ensure that the information bits and the frozen bits are correct in quantity and attributes.
  • the determining the attributes of the first bit of each constraint position in the encoding constraint relationship in the preset configuration sequence includes:
  • the determining the attributes of the second bit in the preset configuration sequence includes:
  • an embodiment of the present application provides a method for matching a rate of a polarization code, including:
  • the rate matching sequence is de-rate matched according to the rate matching pattern to obtain a sequence to be decoded of length N, where the rate matching pattern includes a plurality of consecutive matching positions, and the N and the M are integers. Said M is less than N;
  • the number of the decoding constraint relationships is at least two, and the difference between the number of all constraint positions corresponding to at least two of the coding constraint relationships and the number of the decoding constraint relationships is The number of matching locations is equal.
  • the to-be-decoded bit in the sequence to be decoded is located at a constraint position in the coding constraint relationship, the to-be-decoded according to the coding constraint relationship
  • the sequence is decoded, including:
  • the embodiment of the present application provides a sending device, including:
  • An encoding module configured to obtain a sequence to be encoded with a length of N according to a coding constraint relationship, and perform polarization coding on the sequence to be coded to obtain a coded sequence, where the coding constraint relationship is used to indicate at least two of the sequences to be coded. Constrained positions, and the bits at the at least two constraint positions have the same value;
  • a rate matching module configured to obtain a rate matching sequence of length M according to the matching position in the rate matching pattern and the encoded sequence, where the rate matching pattern includes multiple consecutive matching positions, after the encoding
  • the coded bit corresponding to the matching position in the sequence is 0, the N and the M are integers, and the M is less than N;
  • a sending module configured to send the rate matching sequence to the receiving device.
  • the number of the coding constraint relationships is at least one, the difference between the number of all constraint positions corresponding to the at least one coding constraint relationship and the number of the coding constraint relationships and the matching position The number is equal.
  • the method further includes: a relationship obtaining module, configured to obtain a matching column from the encoding matrix according to the matching position in the rate matching pattern before acquiring the sequence to be encoded with the length N according to the encoding constraint relationship,
  • the ordering of the matching columns in the encoding matrix is the same as the sorting position of the matching locations in the rate matching pattern;
  • the relationship obtaining module is further specifically configured to:
  • Gaussian elimination processing is performed on the element 1 in the initial matrix to obtain a matching matrix, and the columns in the matching matrix are the matching columns.
  • the coding module is specifically used to:
  • the method further includes: a bit attribute determining module, configured to, according to the encoding constraint relationship, an attribute of a first bit located in each constraint position in the encoding constraint relationship, and located in the encoding constraint relationship Attributes of the second bit other than the attribute, before acquiring the sequence to be coded, determining an attribute of the first bit of each constraint position in the coding constraint relationship in the preset configuration sequence, where the preset structure sequence is a constructed sequence of the sequence to be encoded;
  • bit attribute determining module is specifically configured to:
  • bit attribute module is specifically used to:
  • the embodiment of the present application provides a receiving device, including:
  • a receiving module configured to receive a rate matching sequence of length M sent by the sending device
  • a rate matching module configured to perform rate de-matching on the rate matching sequence according to the rate matching pattern, to obtain a sequence to be decoded of length N, where the rate matching pattern includes multiple consecutive matching positions, where the N and The M is an integer, and the M is less than N;
  • a decoding module configured to decode the to-be-decoded sequence according to a coding constraint relationship, to obtain a decoded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be decoded, and The decoding results of the bits located at the at least two constraint positions are the same.
  • the number of the decoding constraint relationships is at least two, and the difference between the number of all constraint positions corresponding to at least two of the coding constraint relationships and the number of the decoding constraint relationships is The number of matching locations is equal.
  • the decoding module is specifically configured to:
  • an embodiment of the present application provides a sending device, including: a memory and a processor, where the memory is used to store a computer program, and the processor is configured to call and run the computer program from the memory, so that The processor runs the computer program to perform the rate matching method as described in the first aspect and the various possible designs of the first aspect.
  • an embodiment of the present application provides a receiving device, including: a memory, a processor, and a computer program, where the computer program is stored in the memory, and the processor runs the computer program to perform the foregoing second aspect and The de-rate matching method described in various possible designs of the second aspect.
  • the embodiment of the present application provides a storage medium, where the storage medium includes a computer program, and the computer program is used to implement the rate matching method according to the first aspect and various possible designs of the first aspect, Alternatively, the computer program is for implementing the de-rate matching method as described in the second aspect and the various possible designs of the second aspect.
  • an embodiment of the present application provides a computer program product, where the computer program product includes computer program code, when the computer program code is run on a computer, causing the computer to perform the foregoing first aspect and the first aspect A rate matching method as described in the possible design, or a de-rate matching method as described in the second aspect and the various possible designs of the second aspect.
  • an embodiment of the present application provides a chip, including a memory and a processor, where the memory is used to store a computer program, and the processor is configured to call and run the computer program from the memory, so that the processing
  • the apparatus performs the rate matching method as described in the first aspect and the various possible designs of the first aspect, or the de-rate matching method described in the second aspect and the various possible designs of the second aspect.
  • an embodiment of the present application provides an encoding apparatus for performing the rate matching method according to the first aspect and various possible designs of the first aspect.
  • an embodiment of the present application provides a decoding apparatus for the de-rate matching method described in the second aspect and the various possible designs of the second aspect.
  • the transmitting device obtains a sequence to be encoded of length N according to the coding constraint relationship, and performs polarization coding on the coded sequence to obtain a coded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be coded. And the bits of the at least two constraint positions have the same value, and the sending device obtains a rate matching sequence of length M according to the matching position and the encoded sequence in the rate matching pattern, where the rate matching pattern includes multiple consecutive matches.
  • the coded bit corresponding to the matching position in the sequence is 0, N and M are integers, M is less than N, the transmitting device sends a rate matching sequence to the receiving device, and the receiving device receives the rate matching sequence of length M sent by the sending device, The receiving device performs rate de-matching on the rate matching sequence according to the rate matching pattern to obtain a sequence to be decoded with a length of N, and the receiving device decodes the sequence to be decoded according to the decoding constraint relationship to obtain a decoded sequence and a decoding constraint relationship. Used to indicate at least two constraint positions in the sequence to be decoded, and at least Same bit positions constraints decoding result.
  • rate matching and de-rate matching of the Polar code are performed based on the coding constraint relationship and the matching position consecutively, and the decoding performance can be improved.
  • FIG. 1 shows a network architecture that may be applicable to an embodiment of the present application
  • FIG. 2 is a flowchart of processing a rate matching of a polarization code according to an embodiment of the present disclosure
  • FIG. 3 is a schematic flowchart of a method for acquiring a rate matching pattern according to an embodiment of the present disclosure
  • FIG. 4 is a schematic structural diagram of a rate matching pattern provided by an embodiment of the present application.
  • FIG. 5 is a schematic flowchart of a method for constructing a Polar code according to an embodiment of the present disclosure
  • FIG. 6 is a schematic diagram of a process of constructing a Polar code according to an embodiment of the present application.
  • FIG. 7 is a signaling flowchart of rate matching and de-rate matching provided by an embodiment of the present application.
  • FIG. 8 is a schematic diagram of obtaining a rate matching sequence according to an embodiment of the present application.
  • FIG. 9 is a schematic flowchart of a decoding method according to an embodiment of the present disclosure.
  • FIG. 10A is a schematic diagram 1 of a path extension according to an embodiment of the present application.
  • FIG. 10B is a schematic diagram 2 of a path extension according to an embodiment of the present application.
  • FIG. 11 is a schematic diagram 1 of decoding performance comparison according to an embodiment of the present application.
  • FIG. 12 is a second schematic diagram of decoding performance according to an embodiment of the present application.
  • FIG. 13 is a third schematic diagram of decoding performance provided by an embodiment of the present application.
  • FIG. 14 is a schematic structural diagram of a sending device according to an embodiment of the present disclosure.
  • FIG. 15 is a schematic structural diagram of a receiving device according to an embodiment of the present disclosure.
  • FIG. 16 is a schematic structural diagram of hardware of a sending device according to an embodiment of the present disclosure.
  • FIG. 17 is a schematic structural diagram of hardware of a receiving device according to an embodiment of the present disclosure.
  • the network architecture and the service scenario described in the embodiments of the present application are for the purpose of more clearly illustrating the technical solutions of the embodiments of the present application, and do not constitute a limitation of the technical solutions provided by the embodiments of the present application.
  • the technical solutions provided by the embodiments of the present application are equally applicable to similar technical problems.
  • the embodiments of the present application can be applied to a wireless communication system.
  • the wireless communication system mentioned in the embodiments of the present application includes but is not limited to: Narrow Band-Internet of Things (NB-IoT), global mobile Global System for Mobile Communications (GSM), Enhanced Data Rate for GSM Evolution (EDGE), Wideband Code Division Multiple Access (WCDMA), Code Division Multiple Access (CDMA) 2000 System (Code Division Multiple Access, CDMA2000), Time Division-Synchronization Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), and Next Generation 5G Mobile Communication System .
  • NB-IoT Narrow Band-Internet of Things
  • GSM Global System for Mobile Communications
  • EDGE Enhanced Data Rate for GSM Evolution
  • WCDMA Wideband Code Division Multiple Access
  • CDMA Code Division Multiple Access
  • CDMA2000 Code Division Multiple Access 2000 System
  • TD-SCDMA Time Division-Synchronization Code Division Multiple Access
  • LTE Long Term Evolution
  • Next Generation 5G Mobile Communication System Next Generation 5G Mobile Communication
  • FIG. 1 shows a network architecture that may be applicable to an embodiment of the present application.
  • the network architecture provided by this embodiment includes a network device 101 and a terminal device 102.
  • the network device 101 is a device that accesses the terminal device to the wireless network, and may be in Global System of Mobile communication (GSM) or Code Division Multiple Access (CDMA).
  • Base station Base Transceiver Station, BTS for short
  • BTS Base Transceiver Station
  • NodeB, NB base station
  • WCDMA Wideband Code Division Multiple Access
  • LTE Long Term Evolution
  • Evolved Node B (eNB or eNodeB for short) or a relay station or access point, or a network side device (such as a base station) in a future 5G network or a public land mobile network (Public Land Mobile Network) Network devices and the like in PLMN) are not limited herein.
  • FIG. 1 is a schematic diagram showing a possible schematic diagram, and the network device 101 is taken as an example for a base station.
  • the base station may include various forms of macro base stations, micro base stations, relay stations, access points, and the like.
  • the device device 102 may be a wireless terminal or a wired terminal, the wireless terminal may be a device that provides voice and/or other service data connectivity to the user, a handheld device with wireless connectivity, or other processing device connected to the wireless modem. .
  • the wireless terminal can communicate with one or more core networks via a Radio Access Network (RAN), which can be a mobile terminal, such as a mobile phone (or "cellular" phone) and a mobile terminal.
  • RAN Radio Access Network
  • the computer for example, can be a portable, pocket, handheld, computer built-in or in-vehicle mobile device that exchanges language and/or data with the wireless access network.
  • FIG. 1 schematically depicts a possible schematic diagram in which the terminal device 102 is a mobile phone as an example.
  • the network device 101 and the terminal device 102 may use a Polar code as a coding and coding scheme.
  • the encoding device as the transmitting device in this embodiment may be the network device 101 or the terminal device 102.
  • the decoding device as the receiving device may be the terminal device 102 or the network device 101.
  • the network device 101 performs polarization coding as a transmitting device
  • the terminal device 102 performs polarization decoding as a receiving device.
  • the terminal device 102 performs polarization decoding as a transmitting device
  • the network device 101 performs polarization decoding as a receiving device.
  • the Polar code herein includes, but is not limited to, an Arikan Polar code, a PC-Polar code, a CA-Polar code, and a PC-CA-Polar code.
  • Arikan Polar refers to the original Polar code, which is not cascaded with other codes, only information bits and frozen bits.
  • PC-Polar is a Polar code of Cascade Check (PC)
  • CA-Polar is a Cyclic Redundancy Check Aided (CA) Polar code and other cascading Polar codes.
  • the PC-CA-Polar code is a Polar code that concatenates both PC and CA at the same time. PC-Polar and CA-Polar improve the performance of Polar codes by cascading different codes.
  • Vector, length N ie mother code length
  • G is an N ⁇ N matrix, and Matrix here
  • the Kronecker product defined as log 2 N matrices F 2 ; the addition and multiplication operations referred to above are addition and multiplication operations on a binary Galois field.
  • a part of the bits in u N are used to carry information, which is called information bits.
  • the set of indexes of these bits is denoted as A; another part of the bits is set to a fixed value pre-agreed by the transceiver, which is called A fixed bit whose set of indices is represented by the complement A c of A.
  • a fixed bit whose set of indices is represented by the complement A c of A.
  • the Polar code is decoded based on a Successive Cancellation (SC) decoding algorithm or a SC List (SCL) decoding algorithm.
  • the decoding algorithm of the polar code is not particularly limited in this embodiment.
  • the SC decoding algorithm that is, sequentially decodes from the first bit.
  • the serial offset list (SC List, SCL) decoding algorithm is an improvement of the SC decoding algorithm. Multiple candidate decoding results are reserved in each bit, and all the bits are decoded, and all decodings in the list are performed according to certain criteria. The result is selected to obtain the final decoded result.
  • FIG. 2 is a flowchart of processing a rate matching of a polarization code according to an embodiment of the present application.
  • the CA-Polar code is taken as an example, that is, the CRC of the CRC code is used as an example to describe the process of the rate matching process. I will not repeat them here.
  • the transmitting device obtains a K-bit long information bit sequence according to k information bits and a CRC code of length m, and then performs polarization encoding on the information bit sequence to obtain N bits long.
  • the encoded sequence wherein the N-bit long encoded sequence includes information bits and freeze bits.
  • the transmitting device performs puncturing or puncturing on the encoded sequence to obtain a rate matching sequence of M bits long.
  • the transmitting device sends the encoded sequence to the receiving device through the channel, and the receiving device performs decoding by using the SCL decoding method to obtain a plurality of candidate paths, and the candidate path obtained by the CRC is verified, and if the verification result is verified Then, the candidate path that passes the verification is the decoding result, and if the verification fails, the other candidate paths are verified until the decoding result is obtained.
  • a rate matching and de-rate matching method for a polarization code is proposed, which makes the matching position more flexible and variable, and the decoding performance is higher.
  • the rate matching may be a puncture process or a shortening process on the encoded sequence.
  • the punching position of the punching process or the shortening position of the shortening process can be understood as a matching position.
  • the matching position can be flexibly set, and the matching position can be not only the front end or the back end of the encoded sequence, but also any position of the encoded sequence.
  • a plurality of consecutive matching locations may be indicated by a rate matching pattern.
  • the design principle of the rate matching pattern is that the matching position is continuous, and the number of frozen bits and the number of matching positions that satisfy the matching position are equal, so as to achieve the principle of rate loss.
  • the present embodiment obtains a rate matching pattern based on the coded bit corresponding to the matching position, and constructs a Polar code based on the coding constraint relationship corresponding to the rate matching pattern, thereby performing targeted polarization. Encoding to ensure decoding performance. Detailed description will be made below using specific embodiments.
  • the code length M is matched
  • the length of the information bit is K
  • the source sequence u N (u 1 , u 2 , ..., u N )
  • the coding sequence c u N G, where G is the polarization code encoding matrix
  • FIG. 3 is a schematic flowchart of a method for acquiring a rate matching pattern according to an embodiment of the present disclosure. As shown in FIG. 3, the method includes:
  • the preset construction sequence is a constructed sequence of the sequence to be encoded.
  • the sorting of the matching column in the encoding matrix is the same as the sorting position of the matching position in the rate matching pattern.
  • FIG. 3 is a detailed description of the present embodiment in conjunction with a specific embodiment. For other implementation manners, similar to the embodiment, the present embodiment is not described herein again.
  • the preset structure sequence is a structure sequence of the sequence to be coded, that is, the present application pre-configures a sequence with a mother code length of 8, which is the same length as the sequence to be coded.
  • the matching position of this embodiment takes i to i+Q-1, that is, takes Q consecutive matching positions.
  • the matching position in the initial rate matching pattern is from 1 to 3, and then 2 to 4, 3 to 5, and so on.
  • the rate matching pattern is used to indicate a plurality of consecutive matching positions, and the length of the matching pattern is equal to the preset configuration sequence, and may be a sequence including 0 and 1, wherein 0 is used to indicate a matching position, and 1 is used to indicate Non-matching location.
  • the matching position is 1, 2, and 3.
  • the matching columns thus obtained from the encoding matrix G are the first to third columns in the matrix.
  • the coding matrix is as follows:
  • the shaded part of matrix A is the matching column.
  • Obtaining a solution expression corresponding to each matching position according to a preset construction sequence u 8 (u 1 , u 2 , . . . , u 8 ) and a matching column having the same sorting position as each matching position, wherein
  • the expression is an expression obtained by multiplying a preset construction sequence and a matching column, and the value of the solution expression is 0.
  • the matching columns thus obtained from the encoding matrix G are the 4th to 6th columns in the matrix.
  • the coding matrix is as follows:
  • the shaded portion of matrix B is the matching column.
  • u 8 (u 1 , u 2 ,..., u 8 ) and the matching column with the same sort position as each matching position, the solution expression corresponding to each matching position is obtained as follows:
  • the coding matrix can be simplified, so that the coding constraint relationship can be quickly obtained.
  • the initial matrix is extracted from the coding matrix according to the matching position in the rate matching pattern; the Gaussian elimination processing is performed on the element 1 in the initial matrix to obtain a matching matrix, and the columns in the matching matrix are matching columns.
  • the matrix B will be described here as an example.
  • the gray 4, 5, and 6 columns constitute the initial matrix, and Gaussian elimination processing is performed on the element 1 in the initial matrix to obtain the matching matrix Gp.
  • the Gaussian elimination process is a Gaussian elimination process on a column with a large column. For example, if the column weight of the fifth column is 4, the Gaussian elimination is performed on the 5th column according to the 6th column, because the 6th element of the 5th column is The eighth element is the same as the sixth element and the eighth element of the sixth column, so the sixth element and the eighth element of the fifth column perform Gaussian elimination processing, and element 1 becomes element 0.
  • This embodiment only schematically shows the process of Gaussian elimination. For other Gaussian elimination processes, the embodiment is not particularly limited herein.
  • the coding constraint relationship can also be directly obtained for the matching matrix.
  • This embodiment schematically shows another implementation manner for obtaining an encoding constraint relationship through a matching matrix. For other implementation manners for obtaining a coding constraint relationship through a matching matrix, the protection scope of the present application is not included in this embodiment. Let me repeat.
  • the coding constraint relationship is The corresponding rate matching pattern satisfies the code rate lossless principle.
  • the two coding constraint relations correspond to 8 constraint positions, then the difference is 6, and the difference can be understood as the number of frozen bits affected, and the difference is not equal to the number of matching positions, so A rate matching pattern with a matching position of 1 to 3 does not satisfy the rate loss non-destructive principle.
  • the two coding constraint relations correspond to five constraint positions, and the difference is 3, and the difference can be understood as the number of frozen bits affected, the difference being equal to the number of matching positions, the matching position A rate matching pattern of 4 to 6 satisfies the rate loss principle.
  • the present embodiment exemplarily illustrates the case where the code rate non-destructive principle is not satisfied and the case where the code rate non-destructive principle is satisfied by using the matrix A and the matrix B.
  • the code rate is not damaged.
  • the rate matching pattern of the principle may be at least one, and the rate matching pattern that does not satisfy the code rate lossless may also be multiple.
  • the preset screening rules include, but are not limited to, Gaussian Approximation (GA) estimation, or Polarization Weight (PW) value as a measure to select the best rate matching pattern as the rate matching pattern. . Or fixed matching position selection, such as front end, back end, end, etc., to obtain the target rate matching pattern.
  • the preset screening principle is not particularly limited, and the implementation manner of acquiring the target rate matching pattern is not particularly limited. If the target rate matching pattern is the rate matching pattern corresponding to the matrix B, the implementation is as shown in FIG. 4 , and FIG. 4 is a schematic structural diagram of the rate matching pattern provided by the embodiment of the present application. Where 0 represents the matching position and 1 represents the non-matching position.
  • the matching position by setting consecutive matching positions, not only can the matching position be set regularly, but also the decoding performance can be improved, and the matching position can be any position by the coding constraint relationship, and the matching position can be increased.
  • the flexibility of the setting, and the rate matching pattern satisfies the code rate non-destructive principle, ensuring that the code rate can be taken from 0 to 1.
  • FIG. 5 is a schematic flowchart of a method for constructing a Polar code according to an embodiment of the present disclosure.
  • the attribute of the first bit of each constraint position in the encoding constraint relationship in the preset configuration sequence is first determined; and the attribute of the second bit in the preset structure sequence is determined, wherein the second bit is a preset
  • the bits in the sequence other than the first bit are constructed, and the attributes of the bits are frozen bits or information bits.
  • S501 Determine, according to a preset construction method, a first information bit in a first bit corresponding to each constraint position of each coding constraint relationship;
  • S503. Determine, according to a preset length of the information bit sequence and the number of first information bits, a quantity of second information bits in the second bit, where the second bit is a bit other than the first bit in the preset configuration sequence;
  • the preset construction method may be a GA configuration mode or a PW construction manner.
  • the specific configuration manner is not particularly limited in this embodiment, as long as the configuration manner can construct a Polar code, which belongs to the protection scope of the present application. .
  • the PW structure is preset as an example of the preset configuration.
  • the rate matching pattern corresponding to the matrix B is a pattern that satisfies the code rate lossless principle. Therefore, the coding constraint relationship corresponding to the matrix B in this embodiment is For example, to explain how to construct a Polar code.
  • FIG. 6 is a schematic diagram of a process of constructing a Polar code according to an embodiment of the present application.
  • the reliability of each polarized subchannel is obtained according to the PW metric, and the information bits and the freeze bits are determined according to the reliability of the polarized subchannel.
  • the reliability of the polarized subchannels is ranked. As the ordering increases, the reliability of the polarized subchannels decreases, that is, the reliability of the polarized subchannels ranked 1 is the highest. The polarization subchannels sorted to 8 have the lowest reliability.
  • the process of determining information bits (Data, abbreviated as D) and frozen bits (Frozen, F for short) is as follows:
  • the value of the frozen bit determined here is not a preset fixed value, but a coding constraint relationship is satisfied, that is, the value is the same as the value of the information bit.
  • the Polar code is constructed according to the coding constraint relationship, and then the remaining bits in the preset structure sequence are constructed, so that the frozen bit and the information bit can conform to the coding constraint relationship, and the information bits in the preset structure sequence are guaranteed.
  • the number of sequences is the same as the length of the information bit sequence, so that the preset construction sequence can be used in the encoding and decoding process of the Polar code.
  • the coding constraint relationship and the rate matching pattern are obtained. It will be understood by those skilled in the art that for a receiving device as a decoding device, a decoding constraint relationship and a rate matching pattern can be obtained in the same manner, wherein the decoding constraint relationship is similar to the encoding constraint relationship. The manner in which the decoding side obtains the decoding constraint relationship and the rate matching pattern is not described in this embodiment. Those skilled in the art can understand that the encoding device can also send the encoding constraint relationship and the rate matching pattern to the receiving device after acquiring the encoding constraint relationship.
  • the coding constraint relationship and the rate matching pattern may also be determined by other devices, and then the coding constraint relationship and the rate matching pattern are preset to the encoding device and the decoding device, that is, pre-agreed for both.
  • the implementation manner of obtaining the coding constraint relationship and the rate matching pattern for the encoding device and the decoding device is not particularly limited. The specific implementation of rate matching and de-rate matching is described in detail below for the rate matching pattern and coding constraint relationship that have been obtained.
  • FIG. 7 is a signaling flowchart of rate matching and de-rate matching provided by an embodiment of the present application. As shown in FIG. 7, the method includes:
  • the sending device acquires a sequence to be encoded of length N according to the coding constraint relationship, and performs polarization coding on the coded sequence to obtain a coded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be coded, and is located at The bits of at least two constraint positions have the same value.
  • the rate matching pattern corresponding to the coding constraint relationship of this embodiment satisfies the code rate lossless principle.
  • a rate matching pattern that does not satisfy the principle of loss of rate can also be used.
  • the to-be-coded sequence is obtained according to the coding constraint relationship, the attribute of the first bit of each constraint position located in the coding constraint relationship, and the attribute of the second bit located outside the coding constraint relationship.
  • the attribute of the first bit and the attribute of the second bit can be referred to the Polar code constructed in FIG. 6 above.
  • the sequence to be encoded is obtained according to the coding constraint relationship and the Polar code shown in FIG. 6, and then the sequence to be encoded is polar coded to obtain a coded sequence.
  • the structure of the sequence to be encoded and the sequence after encoding can be as shown in FIG. 8, where 0 represents a frozen bit and A represents 0 or 1.
  • the sending device obtains a rate matching sequence of length M according to the matching position and the encoded sequence in the rate matching pattern, where the rate matching pattern includes multiple consecutive matching positions, and the coding bits corresponding to the matching positions in the encoded sequence are obtained.
  • N and M are integers, and M is less than N.
  • the rate matching pattern can be as shown in FIG. 4, and those skilled in the art can understand that the determination of the coding constraint relationship is set by the result of the matching position coding being 0, and therefore, the coded sequence corresponds to the matching position.
  • the position code result must be 0.
  • the encoded sequence After obtaining the encoded sequence, according to the matching position in the rate matching pattern, the encoded sequence is punctured or shortened to obtain a rate matching sequence of length M, which can be seen in FIG. 8.
  • the sending device sends a rate matching sequence to the receiving device.
  • the receiving device receives a rate matching sequence of length M transmitted by the sending device.
  • the sending device sends the rate matching sequence to the receiving device by using the channel, and the receiving device receives the rate matching sequence of length M transmitted by the sending device.
  • the received signal sequence received by the receiving device is soft information, and the receiving device obtains a log likelihood ratio corresponding to each bit to be decoded according to the soft information (Log likelihood). Ratio, LLR), for a receiving device, the rate matching sequence can be understood as a log likelihood ratio sequence.
  • the receiving device performs rate de-matching on the rate matching sequence according to the rate matching pattern to obtain a sequence to be decoded with a length of N.
  • the rate matching pattern includes multiple consecutive matching positions, where N and M are integers, and M is less than N.
  • the receiving device decodes the sequence to be decoded according to a coding constraint relationship, to obtain a decoded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be decoded, and at least two constraint positions.
  • the decoding result of the bits is the same.
  • the receiving device After receiving the rate matching sequence, the receiving device performs rate de-matching on the rate matching sequence according to the rate matching pattern. Specifically, since the matching position in the rate matching pattern is a punctured or shortened position, that is, the bit corresponding to the matching position is a bit that is not transmitted, in the process of de-rate matching, for the puncturing operation, the pair corresponding to the matching position The number likelihood ratio is set to 0. For the shortening operation, the log likelihood ratio corresponding to the matching position is set to a relatively large value, for example, it can be set to infinity. By setting the log likelihood ratio of the matching position and combining the log likelihood ratio of the channel reception, a sequence to be decoded with a code length of N can be obtained.
  • the matching end can be shortened at the encoding end to achieve rate matching.
  • the log likelihood ratio corresponding to the matching position can be set to a relatively large value.
  • the SC or SCL decoding method may be used, and the decoding sequence is decoded in combination with the decoding constraint relationship to obtain a decoded sequence. That is, for the same decoding constraint relationship, the decoding results of the bits located in at least two constraint positions are the same.
  • the transmitting device obtains a sequence to be encoded of length N according to the coding constraint relationship, and performs polarization coding on the coded sequence to obtain a coded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be coded. And the bits of the at least two constraint positions have the same value, and the sending device obtains a rate matching sequence of length M according to the matching position and the encoded sequence in the rate matching pattern, where the rate matching pattern includes multiple consecutive matches.
  • the coded bit corresponding to the matching position in the sequence is 0, N and M are integers, M is less than N, the transmitting device sends a rate matching sequence to the receiving device, and the receiving device receives the rate matching sequence of length M sent by the sending device, The receiving device performs rate de-matching on the rate matching sequence according to the rate matching pattern to obtain a sequence to be decoded with a length of N, and the receiving device decodes the sequence to be decoded according to the decoding constraint relationship to obtain a decoded sequence and a decoding constraint relationship. Used to indicate at least two constraint positions in the sequence to be decoded, and at least Same bit positions constraints decoding result.
  • rate matching and de-rate matching of the Polar code are performed based on the coding constraint relationship and the matching position consecutively, and the decoding performance can be improved.
  • FIG. 9 is a schematic flowchart of a decoding method according to an embodiment of the present disclosure. As shown in FIG. 9, the method includes:
  • the initial path is set to an empty path, all paths are expanded by bit 0 or 1, and the path metrics are updated separately, the paths are sorted by path metrics, and the L bars with the largest path metric are retained.
  • Path delete the remaining paths.
  • L is the search width, that is, the maximum number of saved paths, and L is greater than or equal to 1.
  • This embodiment provides a schematic diagram of path extension. For other path extensions, this embodiment will not be described here.
  • decoding is performed by decoding a constraint relationship, and a reliable decoding path can be obtained, and decoding performance can be improved.
  • RQUP is a decoding curve corresponding to a reverse-order quasi-uniform puncturing rate matching scheme
  • Pd Proposed, Pd for short
  • the abscissa Eb/N0 is the bit signal to noise ratio
  • the ordinate is the block error ratio (BLER)
  • R is the code rate
  • K is the length of the information sequence.
  • the bit error rate corresponding to the rate matching scheme of the embodiment of the present application is significantly smaller than that of the RQUP.
  • the bit error rate of the scheme, the embodiment of the present application has a performance gain of about 0.2 dB with respect to RQUP.
  • FIG. 14 is a schematic structural diagram of a sending device according to an embodiment of the present disclosure.
  • the transmitting device 140 includes an encoding module 1401, a rate matching module 1402, and a sending module 1403.
  • the method further includes: a relationship obtaining module 1404 and a bit attribute determining module 1405.
  • the encoding module 1401 is configured to obtain a sequence to be encoded with a length of N according to a coding constraint relationship, and perform polarization coding on the sequence to be encoded to obtain a coded sequence, where the coding constraint relationship is used to indicate at least a sequence to be coded. Two constraint positions, and the bits at the at least two constraint positions have the same value;
  • the rate matching module 1402 is configured to obtain a rate matching sequence of length M according to the matching position in the rate matching pattern and the encoded sequence, where the rate matching pattern includes multiple consecutive matching positions, and the encoding
  • the coded bit corresponding to the matching position in the subsequent sequence is 0, the N and the M are integers, and the M is less than N;
  • the sending module 1403 is configured to send the rate matching sequence to the receiving device.
  • the number of the coding constraint relationships is at least one, and a difference between the number of all constraint positions corresponding to the at least one coding constraint relationship and the number of the coding constraint relationships is equal to the number of the matching positions.
  • the relationship obtaining module 1404 is configured to obtain a matching column from the encoding matrix according to the matching position in the rate matching pattern before acquiring the sequence to be encoded with the length N according to the encoding constraint relationship, where the matching column is obtained.
  • the ordering in the encoding matrix is the same as the sorting position of the matching position in the rate matching pattern;
  • the relationship obtaining module 1404 is further specifically configured to:
  • Gaussian elimination processing is performed on the element 1 in the initial matrix to obtain a matching matrix, and the columns in the matching matrix are the matching columns.
  • the encoding module 1401 is specifically configured to:
  • the bit attribute determining module 1404 is configured to: in accordance with the encoding constraint relationship, an attribute of a first bit located in each constraint position in the encoding constraint relationship, and a second bit located outside the encoding constraint relationship An attribute of the first bit of each constraint position in the coding constraint relationship in the preset configuration sequence before the sequence to be coded is obtained, where the preset structure sequence is the sequence to be coded Construction sequence
  • bit attribute determining module 1404 is specifically configured to:
  • bit attribute module 1404 is specifically configured to:
  • the sending device provided in this embodiment may be used to perform the rate matching method performed by the sending device in the foregoing method, and the implementation principle and the technical effect are similar.
  • FIG. 15 is a schematic structural diagram of a receiving device according to an embodiment of the present disclosure. As shown in FIG. 15, the receiving device 150 includes: a receiving module 1501, a de-rate matching module 1502, and a decoding module 1503.
  • the receiving module 1501 is configured to receive a rate matching sequence of length M sent by the sending device.
  • the rate matching module 1502 is configured to perform rate de-matching on the rate matching sequence according to the rate matching pattern to obtain a sequence to be decoded of length N, where the rate matching pattern includes multiple consecutive matching positions, and the N And said M is an integer, and said M is less than N;
  • the decoding module 1503 is configured to decode the to-be-decoded sequence according to a coding constraint relationship to obtain a decoded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be decoded. And the decoding results of the bits located at the at least two constraint positions are the same.
  • the number of the coding constraint relationships is at least two, and the difference between the number of all constraint positions corresponding to at least two of the coding constraint relationships and the number of the coding constraint relationships and the matching position The number is equal.
  • the decoding module 1503 is specifically configured to:
  • the receiving device provided in this embodiment may be used to perform the de-rate matching method performed by the receiving device in the foregoing method embodiment, and the implementation principle and the technical effect are similar.
  • FIG. 16 is a schematic structural diagram of hardware of a sending device according to an embodiment of the present disclosure.
  • the transmitting device 160 includes: a processor 1601 and a memory 1602;
  • the processor 1601 is configured to execute a computer program of the memory storage to implement the rate matching method performed by the transmitting device in the foregoing embodiment. For details, refer to the related description in the foregoing method embodiments.
  • the memory 1602 can be either independent or integrated with the processor 1601.
  • the sending device 160 may further include:
  • a bus 1603 is provided for connecting the memory 1602 and the processor 1601.
  • the transmitting device shown in FIG. 16 may further include a transmitter 1601 for transmitting a rate matching sequence and the like.
  • the relationship obtaining module, the encoding module, the rate matching module, and the bit attribute determining module described in FIG. 14 may be implemented by being integrated in the processor 1601, and the sending module may be implemented by being integrated in the transmitter 1601.
  • the sending device provided in this embodiment may be used to perform the rate matching method performed by the sending device in the foregoing method, and the implementation principle and the technical effect are similar.
  • FIG. 17 is a schematic structural diagram of hardware of a receiving device according to an embodiment of the present disclosure.
  • the receiving device 170 of this embodiment includes: a processor 1701 and a memory 1702; wherein
  • a memory 1702 configured to store a computer program
  • the processor 1701 is configured to execute a computer program of the memory storage to implement the steps performed by the receiving device in the above embodiment. For details, refer to the related description in the foregoing method embodiments.
  • the memory 1702 can be either independent or integrated with the processor 1701.
  • the receiving device 170 may further include:
  • the bus 1703 is configured to connect the memory 1702 and the processor 1701.
  • the receiving device shown in FIG. 17 may further include a receiver 1704 for receiving a rate matching sequence and the like.
  • the receiving module described in FIG. 15 may be implemented in the receiver 1704, and the de-rate matching module and the decoding module may be implemented in the processor 1701.
  • the receiving device provided in this embodiment may be used to perform the de-rate matching method performed by the receiving device in the foregoing example, and the implementation principle and the technical effect are similar.
  • the embodiment of the present application further provides a storage medium, where the storage medium includes a computer program, and the computer program is used to implement an indication method of an encoding mode performed by the first device in the foregoing embodiment.
  • the embodiment of the present application further provides a storage medium, where the storage medium includes a computer program, and the computer program is used to implement the indication method of the encoding mode performed by the second device in the above embodiment.
  • the embodiment of the present application further provides a computer program product, the computer program product comprising computer program code, when the computer program code is run on a computer, causing the computer to execute the indication method of the coding mode performed by the first device.
  • the embodiment of the present application further provides a chip, including a memory and a processor, the memory is used to store a computer program, and the processor is configured to call and run the computer program from the memory, so that the chip is installed
  • the communication device performs the indication method of the encoding mode performed by the first device as above.
  • the embodiment of the present application further provides a computer program product, the computer program product comprising computer program code, when the computer program code is run on a computer, causing the computer to execute the indication method of the coding mode performed by the second device.
  • the embodiment of the present application further provides a chip, including a memory and a processor, the memory is used to store a computer program, and the processor is configured to call and run the computer program from the memory, so that the chip is installed
  • the communication device performs the indication method of the encoding mode performed by the second device as above.
  • the disclosed apparatus and method may be implemented in other manners.
  • the device embodiments described above are only illustrative.
  • the division of the modules is only a logical function division.
  • multiple modules may be combined or integrated. Go to another system, or some features can be ignored or not executed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or module, and may be electrical, mechanical or otherwise.
  • modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional module in each embodiment of the present invention may be integrated into one processing unit, or each module may exist physically separately, or two or more modules may be integrated into one unit.
  • the unit formed by the above module can be implemented in the form of hardware or in the form of hardware plus software functional units.
  • the above-described integrated modules implemented in the form of software function modules can be stored in a computer readable storage medium.
  • the software function module is stored in a storage medium, and includes a plurality of instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (English: processor) to perform the embodiments of the present application. Part of the steps of the method.
  • processor may be a central processing unit (English: Central Processing Unit, CPU for short), or may be other general-purpose processors, digital signal processors (English: Digital Signal Processor, referred to as DSP), ASICs. (English: Application Specific Integrated Circuit, ASIC for short).
  • the general purpose processor may be a microprocessor or the processor or any conventional processor or the like. The steps of the method disclosed in connection with the invention may be directly embodied by the execution of the hardware processor or by a combination of hardware and software modules in the processor.
  • the memory may include high speed RAM memory, and may also include non-volatile memory NVM, such as at least one disk memory, and may also be a USB flash drive, a removable hard disk, a read only memory, a magnetic disk, or an optical disk.
  • NVM non-volatile memory
  • the bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus.
  • ISA Industry Standard Architecture
  • PCI Peripheral Component
  • EISA Extended Industry Standard Architecture
  • the bus can be divided into an address bus, a data bus, a control bus, and the like.
  • address bus a data bus
  • control bus a control bus
  • the bus in the drawings of the present application is not limited to only one bus or one type of bus.
  • the above storage medium may be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read only memory (EEPROM), erasable In addition to Programmable Read Only Memory (EPROM), Programmable Read Only Memory (PROM), Read Only Memory (ROM), Magnetic Memory, Flash Memory, Disk or Optical Disk.
  • SRAM static random access memory
  • EEPROM electrically erasable programmable read only memory
  • EPROM Programmable Read Only Memory
  • PROM Programmable Read Only Memory
  • ROM Read Only Memory
  • Magnetic Memory Flash Memory
  • Disk Disk
  • Disk Optical Disk
  • An exemplary storage medium is coupled to the processor to enable the processor to read information from, and write information to, the storage medium.
  • the storage medium can also be an integral part of the processor.
  • the processor and the storage medium may be located in an Application Specific Integrated Circuits (ASIC).
  • ASIC Application Specific Integrated Circuits
  • the processor and the storage medium can also exist as discrete components in the electronic device or the master device.

Abstract

Provided by the embodiments of the present application are a method and device for rate matching and de-rate matching a polar code, the method comprising: acquiring a sequence to be coded of which the length is N according to a coding constraint relationship, and performing polarization coding on the sequence to be coded so as to obtain a coded sequence, the coding constraint relationship being used to indicate at least two constraint positions in the sequence to be coded, and bits located at the at least two constraint positions having the same value; obtaining, according to matching positions in a rate matching pattern and the coded sequence, a rate matching sequence of which the length is M, wherein the rate matching pattern comprises a plurality of consecutive matching positions, and coded bits corresponding to the matching positions in the coded sequence are 0, N and M being integers, and M being less than N; and sending the rate matching sequence to a receiving device. The embodiments of the present application may improve decoding performance.

Description

极化码的速率匹配、解速率匹配方法及设备Rate matching, de-rate matching method and device for polarization code
本申请要求于2018年4月23日提交中国专利局、申请号为201810366668.6、申请名称为“极化码的速率匹配、解速率匹配方法及设备”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。This application claims the priority of the Chinese patent application filed on April 23, 2018, the Chinese Patent Office, the application number is 201810366668.6, and the application name is "Polarization code rate matching, de-rate matching method and device". The citations are incorporated herein by reference.
技术领域Technical field
本申请实施例涉及编译码技术领域,尤其涉及一种极化码的速率匹配、解速率匹配方法及设备。The embodiments of the present invention relate to the field of coding and decoding technologies, and in particular, to a rate matching and de-rate matching method and device for a polarization code.
背景技术Background technique
通信系统通常采用信道编码提高数据传输的可靠性,以保证通信的质量。土耳其教授Arikan提出的极化码(Polar codes)是第一个理论上可以达到香农容量且具有低编译码复杂度的好码。因此,Polar码在5G中具有很大的发展和应用前景,并在第三代合作伙伴项目(the 3 rd Generation Partner Project,3GPP)无线接入网(Radio Access Network,RAN1)第87次会议上被接纳用于控制信道编码。 Communication systems usually use channel coding to improve the reliability of data transmission to ensure the quality of communication. The Polar codes proposed by Turkish professor Arikan are the first good codes that can theoretically achieve Shannon's capacity and have low coding and decoding complexity. Therefore, Polar code has great prospects in the development and application 5G, and the Third Generation Partnership Project (the 3 rd Generation Partner Project, 3GPP) radio access network (Radio Access Network, RAN1) 87th meeting Accepted for control channel coding.
在具体实现过程中,原始Polar码(母码)的码长为2的整数次幂,在实际应用中需要通过速率匹配实现任意码长的Polar码。现有技术采用打孔(puncture)或缩短(shorten)等方案实现速率匹配。即现有技术在编码时进行速率匹配,对超过目标码长的母码进行打孔或缩短达到目标码长,译码时进行解速率匹配,对接收到的译码序列进行填充恢复至母码码长。然而,目前针对polar码的速率匹配方案,存在译码性能不高的问题,因此,亟需提供一种速率匹配方法,以提高译码性能。In the specific implementation process, the code length of the original Polar code (parent code) is an integer power of 2. In practical applications, a Polar code of any code length needs to be implemented by rate matching. The prior art implements rate matching using a scheme such as puncture or shortening. That is, the prior art performs rate matching during encoding, puncturing or shortening the mother code exceeding the target code length to reach the target code length, performing de-rate matching during decoding, and filling and restoring the received decoding sequence to the mother code. Code length. However, at present, for the rate matching scheme of the polar code, there is a problem that the decoding performance is not high. Therefore, it is urgent to provide a rate matching method to improve the decoding performance.
发明内容Summary of the invention
本申请实施例提供一种极化码的速率匹配、解速率匹配方法及设备,以提高译码性能。The embodiment of the present application provides a rate matching and de-rate matching method and device for a polarization code to improve decoding performance.
第一方面,本申请实施例提供一种极化码的速率匹配方法,包括:In a first aspect, the embodiment of the present application provides a rate matching method for a polarization code, including:
根据编码约束关系获取长度为N的待编码序列,并对所述待编码序列进行极化编码,得到编码后序列,所述编码约束关系用于指示待编码序列中的至少两个约束位置,以及位于所述至少两个约束位置的比特的取值相同;Obtaining a sequence to be coded with a length of N according to a coding constraint relationship, and performing polarization coding on the sequence to be coded to obtain a coded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be coded, and The bits located at the at least two constraint positions have the same value;
根据速率匹配图样中的匹配位置对所述编码后序列进行打孔或缩短操作,得到长度为M的速率匹配序列,其中,所述速率匹配图样中包括多个连续的匹配位置,可以在获取匹配位置时,将搜索可用匹配位置的次数由
Figure PCTCN2019083883-appb-000001
降低为M+1次,有效降低了搜索复杂度,通过设置编码约束关系,可以使得编码后序列中所述匹配位置对应的编码比特为0,提高译码性能,所述N和所述M为整数,所述M小于N;向接收设备发送所述速率匹配序列。
Performing a puncturing or shortening operation on the encoded sequence according to the matching position in the rate matching pattern to obtain a rate matching sequence of length M, wherein the rate matching pattern includes multiple consecutive matching positions, and the matching may be obtained. When searching for a location, the number of available matching locations will be searched for by
Figure PCTCN2019083883-appb-000001
The reduction is M+1 times, which effectively reduces the search complexity. By setting the coding constraint relationship, the coding bit corresponding to the matching position in the encoded sequence can be made 0, and the decoding performance is improved, and the N and the M are An integer, the M is less than N; the rate matching sequence is sent to the receiving device.
本实施例基于编码约束关系以及匹配位置连续来进行Polar码的速率匹配,可以提高译码性能。In this embodiment, the rate matching of the Polar code is performed based on the coding constraint relationship and the matching position consecutively, and the decoding performance can be improved.
在一种可能的设计中,所述编码约束关系的数量为至少一个,所述至少一个编码约束关系对应的所有约束位置的数量与所述编码约束关系的数量的差值与所述匹配位置的数量相等,可以满足码率无损原则,使得码率可以取0至1之间的任意值。In a possible design, the number of the coding constraint relationships is at least one, the difference between the number of all constraint positions corresponding to the at least one coding constraint relationship and the number of the coding constraint relationships and the matching position The number is equal, and the code rate non-destructive principle can be satisfied, so that the code rate can take any value between 0 and 1.
在一种可能的设计中,所述根据编码约束关系获取长度为N的待编码序列之前,所述方法还包括:In a possible design, before the obtaining a sequence to be encoded of length N according to the coding constraint relationship, the method further includes:
根据所述速率匹配图样中的匹配位置从编码矩阵中获取匹配列,其中,所述匹配列在所述编码矩阵中的排序与所述匹配位置在所述速率匹配图样中的排序位置相同;And obtaining a matching column from the encoding matrix according to the matching position in the rate matching pattern, wherein the sorting of the matching column in the encoding matrix is the same as the sorting position of the matching position in the rate matching pattern;
根据预设构造序列以及与每个匹配位置的排序位置相同的匹配列,获取每个所述匹配位置对应的求解表达式,其中,所述预设构造序列为所述待编码序列的构造序列,所述求解表达式的值为0;Acquiring a solution expression corresponding to each of the matching positions according to a preset configuration sequence and a matching column that is the same as a sorting position of each matching position, where the preset structure sequence is a constructed sequence of the sequence to be encoded, The value of the solution expression is 0;
根据每个所述匹配位置对应的求解表达式,获取所述编码约束关系。And obtaining the coding constraint relationship according to a solution expression corresponding to each of the matching positions.
在一种可能的设计中,所述根据所述速率匹配图样中的匹配位置从编码矩阵中获取匹配列,包括:In a possible design, the obtaining a matching column from the coding matrix according to the matching position in the rate matching pattern includes:
根据所述速率匹配图样中的匹配位置,从所述编码矩阵中提取初始矩阵;Extracting an initial matrix from the coding matrix according to a matching position in the rate matching pattern;
对所述初始矩阵中的元素1进行高斯消元处理,得到匹配矩阵,所述匹配矩阵中的列为所述匹配列。Gaussian elimination processing is performed on the element 1 in the initial matrix to obtain a matching matrix, and the columns in the matching matrix are the matching columns.
通过提取初始矩阵并进行高斯消元处理,对编码矩阵进行了简化,从而可以快速获取编码约束关系。By extracting the initial matrix and performing Gaussian elimination processing, the coding matrix is simplified, so that the coding constraint relationship can be quickly obtained.
在一种可能的设计中,所述根据编码约束关系获取长度为N的待编码序列,包括:In a possible design, the acquiring a sequence to be encoded of length N according to a coding constraint relationship includes:
根据所述编码约束关系、位于所述编码约束关系中的各约束位置的第一比特的属性以及位于所述编码约束关系之外的第二比特的属性,获取所述待编码序列,其中,比特的属性为冻结比特或信息比特。Obtaining the to-be-coded sequence according to the coding constraint relationship, an attribute of a first bit of each constraint position located in the coding constraint relationship, and an attribute of a second bit located outside the coding constraint relationship, where the bit The attributes are frozen bits or information bits.
在一种可能的设计中,所述根据所述编码约束关系、位于所述编码约束关系中的各约束位置的第一比特的属性以及位于所述编码约束关系之外的第二比特的属性,获取所述待编码序列之前,所述方法还包括:In a possible design, the attribute according to the coding constraint relationship, the first bit of each constraint position located in the coding constraint relationship, and the attribute of the second bit located outside the coding constraint relationship, Before the obtaining the sequence to be encoded, the method further includes:
确定预设构造序列中位于所述编码约束关系中的各约束位置的所述第一比特的属性,所述预设构造序列为所述待编码序列的构造序列;Determining an attribute of the first bit of each constraint position in the encoding constraint relationship in a preset configuration sequence, where the preset construction sequence is a constructed sequence of the sequence to be encoded;
确定所述预设构造序列中所述第二比特的属性,其中,所述第二比特为所述预设构造序列中除所述第一比特之外的比特,比特的属性为冻结比特或信息比特。Determining an attribute of the second bit in the preset configuration sequence, where the second bit is a bit other than the first bit in the preset configuration sequence, and the attribute of the bit is a frozen bit or information Bit.
通过先构造编码约束关系中的约束位置的比特的属性,在构造其它位置的比特的属性,可以保证信息比特和冻结比特在数量和属性上正确。By constructing the attributes of the bits of the constraint position in the coding constraint relationship, the attributes of the bits at other positions can be constructed to ensure that the information bits and the frozen bits are correct in quantity and attributes.
在一种可能的设计中,所述确定预设构造序列中位于所述编码约束关系中的各约束位置的第一比特的属性,包括:In a possible design, the determining the attributes of the first bit of each constraint position in the encoding constraint relationship in the preset configuration sequence includes:
根据预设构造方法在每个所述编码约束关系的各约束位置对应的所述第一比特中确定一个第一信息比特;Determining, according to a preset construction method, a first information bit in the first bit corresponding to each constraint position of each of the coding constraint relationships;
将各约束位置对应的第一比特中除所述第一信息比特之外的第一比特确定为第一冻结比特,其中,所述第一冻结比特的取值满足所述编码约束关系。Determining, in the first bit corresponding to each constraint position, a first bit other than the first information bit as a first frozen bit, wherein the value of the first frozen bit satisfies the coding constraint relationship.
在一种可能的设计中,所述确定所述预设构造序列中第二比特的属性,包括:In a possible design, the determining the attributes of the second bit in the preset configuration sequence includes:
根据预设信息比特序列的长度和所述第一信息比特的数量,确定所述第二比特中第二 信息比特的数量;Determining, according to the length of the preset information bit sequence and the number of the first information bits, the number of second information bits in the second bit;
根据所述预设构造方法和所述第二信息比特的数量,在所述第二比特中确定所述第二信息比特和第二冻结比特,所述第二冻结比特的取值为预设固定值。Determining, according to the preset configuration method and the number of the second information bits, the second information bit and the second frozen bit in the second bit, where the value of the second frozen bit is preset fixed value.
第二方面,本申请实施例提供一种极化码的解速率匹配方法,包括:In a second aspect, an embodiment of the present application provides a method for matching a rate of a polarization code, including:
接收发送设备发送的长度为M的速率匹配序列;Receiving a rate matching sequence of length M sent by the sending device;
根据速率匹配图样对所述速率匹配序列进行解速率匹配,得到长度为N的待译码序列,所述速率匹配图样中包括多个连续的匹配位置,所述N和所述M为整数,所述M小于N;The rate matching sequence is de-rate matched according to the rate matching pattern to obtain a sequence to be decoded of length N, where the rate matching pattern includes a plurality of consecutive matching positions, and the N and the M are integers. Said M is less than N;
根据译码约束关系对所述待译码序列进行译码,得到译码后序列,所述译码约束关系用于指示待译码序列中的至少两个约束位置,以及位于所述至少两个约束位置的比特的译码结果相同。Decoding the sequence to be decoded according to a coding constraint relationship to obtain a decoded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be decoded, and at least two The decoding result of the bits of the constraint position is the same.
在一种可能的设计中,所述译码约束关系的数量为至少两个,至少两个所述译码约束关系对应的所有约束位置的数量与所述译码约束关系的数量的差值与所述匹配位置的数量相等。In a possible design, the number of the decoding constraint relationships is at least two, and the difference between the number of all constraint positions corresponding to at least two of the coding constraint relationships and the number of the decoding constraint relationships is The number of matching locations is equal.
在一种可能的设计中,若所述待译码序列中的第一待译码比特位于所述译码约束关系中的约束位置,所述根据所述译码约束关系对所述待译码序列进行译码,包括:In a possible design, if the first to-be-decoded bit in the sequence to be decoded is located at a constraint position in the coding constraint relationship, the to-be-decoded according to the coding constraint relationship The sequence is decoded, including:
判断与所述第一待译码比特位于同一译码约束关系中的第二待译码比特是否被译码;Determining whether the second to-be-decoded bit in the same coding constraint relationship as the first to-be-decoded bit is decoded;
若是,则将所述第一待译码比特的值设置为与所述第二待译码比特的值相同;If yes, setting the value of the first to-be-decoded bit to be the same as the value of the second to-be-decoded bit;
若否,则对所述第一待译码比特进行译码,得到所述第一待译码比特的值。If not, decoding the first to-be-decoded bit to obtain a value of the first to-be-decoded bit.
第三方面,本申请实施例提供一种发送设备,包括:In a third aspect, the embodiment of the present application provides a sending device, including:
编码模块,用于根据编码约束关系获取长度为N的待编码序列,并对所述待编码序列进行极化编码,得到编码后序列,所述编码约束关系用于指示待编码序列中的至少两个约束位置,以及位于所述至少两个约束位置的比特的取值相同;An encoding module, configured to obtain a sequence to be encoded with a length of N according to a coding constraint relationship, and perform polarization coding on the sequence to be coded to obtain a coded sequence, where the coding constraint relationship is used to indicate at least two of the sequences to be coded. Constrained positions, and the bits at the at least two constraint positions have the same value;
速率匹配模块,用于根据速率匹配图样中的匹配位置和所述编码后序列,得到长度为M的速率匹配序列,其中,所述速率匹配图样中包括多个连续的匹配位置,所述编码后序列中所述匹配位置对应的编码比特为0,所述N和所述M为整数,所述M小于N;a rate matching module, configured to obtain a rate matching sequence of length M according to the matching position in the rate matching pattern and the encoded sequence, where the rate matching pattern includes multiple consecutive matching positions, after the encoding The coded bit corresponding to the matching position in the sequence is 0, the N and the M are integers, and the M is less than N;
发送模块,用于向接收设备发送所述速率匹配序列。And a sending module, configured to send the rate matching sequence to the receiving device.
在一种可能的设计中,所述编码约束关系的数量为至少一个,所述至少一个编码约束关系对应的所有约束位置的数量与所述编码约束关系的数量的差值与所述匹配位置的数量相等。In a possible design, the number of the coding constraint relationships is at least one, the difference between the number of all constraint positions corresponding to the at least one coding constraint relationship and the number of the coding constraint relationships and the matching position The number is equal.
在一种可能的设计中,还包括:关系获取模块,用于在根据编码约束关系获取长度为N的待编码序列之前,根据所述速率匹配图样中的匹配位置从编码矩阵中获取匹配列,其中,所述匹配列在所述编码矩阵中的排序与所述匹配位置在所述速率匹配图样中的排序位置相同;In a possible design, the method further includes: a relationship obtaining module, configured to obtain a matching column from the encoding matrix according to the matching position in the rate matching pattern before acquiring the sequence to be encoded with the length N according to the encoding constraint relationship, The ordering of the matching columns in the encoding matrix is the same as the sorting position of the matching locations in the rate matching pattern;
根据预设构造序列以及与每个匹配位置的排序位置相同的匹配列,获取每个所述匹配位置对应的求解表达式,其中,所述预设构造序列为所述待编码序列的构造序列,所述求解表达式的值为0;Acquiring a solution expression corresponding to each of the matching positions according to a preset configuration sequence and a matching column that is the same as a sorting position of each matching position, where the preset structure sequence is a constructed sequence of the sequence to be encoded, The value of the solution expression is 0;
根据每个所述匹配位置对应的求解表达式,获取所述编码约束关系。And obtaining the coding constraint relationship according to a solution expression corresponding to each of the matching positions.
在一种可能的设计中,所述关系获取模块还具体用于:In a possible design, the relationship obtaining module is further specifically configured to:
根据所述速率匹配图样中的匹配位置,从所述编码矩阵中提取初始矩阵;Extracting an initial matrix from the coding matrix according to a matching position in the rate matching pattern;
对所述初始矩阵中的元素1进行高斯消元处理,得到匹配矩阵,所述匹配矩阵中的列为所述匹配列。Gaussian elimination processing is performed on the element 1 in the initial matrix to obtain a matching matrix, and the columns in the matching matrix are the matching columns.
在一种可能的设计中,所述编码模块具体用于:In a possible design, the coding module is specifically used to:
根据所述编码约束关系、位于所述编码约束关系中的各约束位置的第一比特的属性以及位于所述编码约束关系之外的第二比特的属性,获取所述待编码序列,其中,比特的属性为冻结比特或信息比特。Obtaining the to-be-coded sequence according to the coding constraint relationship, an attribute of a first bit of each constraint position located in the coding constraint relationship, and an attribute of a second bit located outside the coding constraint relationship, where the bit The attributes are frozen bits or information bits.
在一种可能的设计中,还包括:比特属性确定模块,用于在根据所述编码约束关系、位于所述编码约束关系中的各约束位置的第一比特的属性以及位于所述编码约束关系之外的第二比特的属性,获取所述待编码序列之前,确定预设构造序列中位于所述编码约束关系中的各约束位置的所述第一比特的属性,所述预设构造序列为所述待编码序列的构造序列;In a possible design, the method further includes: a bit attribute determining module, configured to, according to the encoding constraint relationship, an attribute of a first bit located in each constraint position in the encoding constraint relationship, and located in the encoding constraint relationship Attributes of the second bit other than the attribute, before acquiring the sequence to be coded, determining an attribute of the first bit of each constraint position in the coding constraint relationship in the preset configuration sequence, where the preset structure sequence is a constructed sequence of the sequence to be encoded;
确定所述预设构造序列中所述第二比特的属性,其中,所述第二比特为所述预设构造序列中除所述第一比特之外的比特,比特的属性为冻结比特或信息比特。Determining an attribute of the second bit in the preset configuration sequence, where the second bit is a bit other than the first bit in the preset configuration sequence, and the attribute of the bit is a frozen bit or information Bit.
在一种可能的设计中,所述比特属性确定模块具体用于:In a possible design, the bit attribute determining module is specifically configured to:
根据预设构造方法在每个所述编码约束关系的各约束位置对应的所述第一比特中确定一个第一信息比特;Determining, according to a preset construction method, a first information bit in the first bit corresponding to each constraint position of each of the coding constraint relationships;
将各约束位置对应的第一比特中除所述第一信息比特之外的第一比特确定为第一冻结比特,其中,所述第一冻结比特的取值满足所述编码约束关系。Determining, in the first bit corresponding to each constraint position, a first bit other than the first information bit as a first frozen bit, wherein the value of the first frozen bit satisfies the coding constraint relationship.
在一种可能的设计中,所述比特属性模块具体用于:In a possible design, the bit attribute module is specifically used to:
根据预设信息比特序列的长度和所述第一信息比特的数量,确定所述第二比特中第二信息比特的数量;Determining, according to the length of the preset information bit sequence and the number of the first information bits, the number of second information bits in the second bit;
根据所述预设构造方法和所述第二信息比特的数量,在所述第二比特中确定所述第二信息比特和第二冻结比特,所述第二冻结比特的取值为预设固定值。Determining, according to the preset configuration method and the number of the second information bits, the second information bit and the second frozen bit in the second bit, where the value of the second frozen bit is preset fixed value.
第四方面,本申请实施例提供一种接收设备,包括:In a fourth aspect, the embodiment of the present application provides a receiving device, including:
接收模块,用于接收发送设备发送的长度为M的速率匹配序列;a receiving module, configured to receive a rate matching sequence of length M sent by the sending device;
解速率匹配模块,用于根据速率匹配图样对所述速率匹配序列进行解速率匹配,得到长度为N的待译码序列,所述速率匹配图样中包括多个连续的匹配位置,所述N和所述M为整数,所述M小于N;a rate matching module, configured to perform rate de-matching on the rate matching sequence according to the rate matching pattern, to obtain a sequence to be decoded of length N, where the rate matching pattern includes multiple consecutive matching positions, where the N and The M is an integer, and the M is less than N;
译码模块,用于根据译码约束关系对所述待译码序列进行译码,得到译码后序列,所述译码约束关系用于指示待译码序列中的至少两个约束位置,以及位于所述至少两个约束位置的比特的译码结果相同。a decoding module, configured to decode the to-be-decoded sequence according to a coding constraint relationship, to obtain a decoded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be decoded, and The decoding results of the bits located at the at least two constraint positions are the same.
在一种可能的设计中,所述译码约束关系的数量为至少两个,至少两个所述译码约束关系对应的所有约束位置的数量与所述译码约束关系的数量的差值与所述匹配位置的数量相等。In a possible design, the number of the decoding constraint relationships is at least two, and the difference between the number of all constraint positions corresponding to at least two of the coding constraint relationships and the number of the decoding constraint relationships is The number of matching locations is equal.
在一种可能的设计中,若所述待译码序列中的第一待译码比特位于所述译码约束关系中的约束位置,所述译码模块具体用于:In a possible design, if the first to-be-decoded bit in the sequence to be decoded is located at a constraint position in the coding constraint relationship, the decoding module is specifically configured to:
判断与所述第一待译码比特位于同一译码约束关系中的第二待译码比特是否被译码;Determining whether the second to-be-decoded bit in the same coding constraint relationship as the first to-be-decoded bit is decoded;
若是,则将所述第一待译码比特的值设置为与所述第二待译码比特的值相同;If yes, setting the value of the first to-be-decoded bit to be the same as the value of the second to-be-decoded bit;
若否,则对所述第一待译码比特进行译码,得到所述第一待译码比特的值。If not, decoding the first to-be-decoded bit to obtain a value of the first to-be-decoded bit.
第五方面,本申请实施例提供一种发送设备,包括:存储器和处理器,所述存储器用于存储计算机程序,所述处理器用于从所述存储器中调用并运行所述计算机程序,使得所述处理器运行所述计算机程序执行如上第一方面以及第一方面的各种可能的设计所述的速率匹配方法。In a fifth aspect, an embodiment of the present application provides a sending device, including: a memory and a processor, where the memory is used to store a computer program, and the processor is configured to call and run the computer program from the memory, so that The processor runs the computer program to perform the rate matching method as described in the first aspect and the various possible designs of the first aspect.
第六方面,本申请实施例提供一种接收设备,包括:存储器、处理器以及计算机程序,所述计算机程序存储在所述存储器中,所述处理器运行所述计算机程序执行如上第二方面以及第二方面的各种可能的设计所述的解速率匹配方法。In a sixth aspect, an embodiment of the present application provides a receiving device, including: a memory, a processor, and a computer program, where the computer program is stored in the memory, and the processor runs the computer program to perform the foregoing second aspect and The de-rate matching method described in various possible designs of the second aspect.
第七方面,本申请实施例提供一种存储介质,所述存储介质包括计算机程序,所述计算机程序用于实现如上第一方面以及第一方面的各种可能的设计所述的速率匹配方法,或者,所述计算机程序用于实现如上第二方面以及第二方面的各种可能的设计所述的解速率匹配方法。In a seventh aspect, the embodiment of the present application provides a storage medium, where the storage medium includes a computer program, and the computer program is used to implement the rate matching method according to the first aspect and various possible designs of the first aspect, Alternatively, the computer program is for implementing the de-rate matching method as described in the second aspect and the various possible designs of the second aspect.
第八方面,本申请实施例提供一种计算机程序产品,所述计算机程序产品包括计算机程序代码,当所述计算机程序代码在计算机上运行时,使得计算机执行如上第一方面以及第一方面的各种可能的设计所述的速率匹配方法,或者,执行如上第二方面以及第二方面的各种可能的设计所述的解速率匹配方法。In an eighth aspect, an embodiment of the present application provides a computer program product, where the computer program product includes computer program code, when the computer program code is run on a computer, causing the computer to perform the foregoing first aspect and the first aspect A rate matching method as described in the possible design, or a de-rate matching method as described in the second aspect and the various possible designs of the second aspect.
第九方面,本申请实施例提供一种芯片,包括存储器和处理器,所述存储器用于存储计算机程序,所述处理器用于从所述存储器中调用并运行所述计算机程序,使得所述处理器执行如上第一方面以及第一方面的各种可能的设计所述的速率匹配方法,或者,执行如上第二方面以及第二方面的各种可能的设计所述的解速率匹配方法。In a ninth aspect, an embodiment of the present application provides a chip, including a memory and a processor, where the memory is used to store a computer program, and the processor is configured to call and run the computer program from the memory, so that the processing The apparatus performs the rate matching method as described in the first aspect and the various possible designs of the first aspect, or the de-rate matching method described in the second aspect and the various possible designs of the second aspect.
第十方面,本申请实施例提供一种编码装置,所述装置用于执行如上第一方面以及第一方面的各种可能的设计所述的速率匹配方法。In a tenth aspect, an embodiment of the present application provides an encoding apparatus for performing the rate matching method according to the first aspect and various possible designs of the first aspect.
第十一方面,本申请实施例提供一种译码装置,所述装置用于如上第二方面以及第二方面的各种可能的设计所述的解速率匹配方法。In an eleventh aspect, an embodiment of the present application provides a decoding apparatus for the de-rate matching method described in the second aspect and the various possible designs of the second aspect.
本实施例通过发送设备根据编码约束关系获取长度为N的待编码序列,并对待编码序列进行极化编码,得到编码后序列,编码约束关系用于指示待编码序列中的至少两个约束位置,以及位于至少两个约束位置的比特的取值相同,发送设备根据速率匹配图样中的匹配位置和编码后序列,得到长度为M的速率匹配序列,其中,速率匹配图样中包括多个连续的匹配位置,编码后序列中匹配位置对应的编码比特为0,N和M为整数,M小于N,发送设备向接收设备发送速率匹配序列,接收设备接收发送设备发送的长度为M的速率匹配序列,接收设备根据速率匹配图样对速率匹配序列进行解速率匹配,得到长度为N的待译码序列,接收设备根据译码约束关系对待译码序列进行译码,得到译码后序列,译码约束关系用于指示待译码序列中的至少两个约束位置,以及位于至少两个约束位置的比特的译码结果相同。本实施例基于编码约束关系以及匹配位置连续来进行Polar码的速率匹配和解速率匹配,可以提高译码性能。In this embodiment, the transmitting device obtains a sequence to be encoded of length N according to the coding constraint relationship, and performs polarization coding on the coded sequence to obtain a coded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be coded. And the bits of the at least two constraint positions have the same value, and the sending device obtains a rate matching sequence of length M according to the matching position and the encoded sequence in the rate matching pattern, where the rate matching pattern includes multiple consecutive matches. Position, the coded bit corresponding to the matching position in the sequence is 0, N and M are integers, M is less than N, the transmitting device sends a rate matching sequence to the receiving device, and the receiving device receives the rate matching sequence of length M sent by the sending device, The receiving device performs rate de-matching on the rate matching sequence according to the rate matching pattern to obtain a sequence to be decoded with a length of N, and the receiving device decodes the sequence to be decoded according to the decoding constraint relationship to obtain a decoded sequence and a decoding constraint relationship. Used to indicate at least two constraint positions in the sequence to be decoded, and at least Same bit positions constraints decoding result. In this embodiment, rate matching and de-rate matching of the Polar code are performed based on the coding constraint relationship and the matching position consecutively, and the decoding performance can be improved.
附图说明DRAWINGS
图1示出了本申请实施例可能适用的一种网络架构;FIG. 1 shows a network architecture that may be applicable to an embodiment of the present application;
图2为本申请实施例提供的极化码的速率匹配的处理流程图;FIG. 2 is a flowchart of processing a rate matching of a polarization code according to an embodiment of the present disclosure;
图3为本申请实施例提供的获取速率匹配图样的方法流程示意图;FIG. 3 is a schematic flowchart of a method for acquiring a rate matching pattern according to an embodiment of the present disclosure;
图4为本申请实施例提供的速率匹配图样的结构示意图;4 is a schematic structural diagram of a rate matching pattern provided by an embodiment of the present application;
图5为本申请实施例提供的构造Polar码的方法流程示意图;FIG. 5 is a schematic flowchart of a method for constructing a Polar code according to an embodiment of the present disclosure;
图6为本申请实施例提供的Polar码的构造过程示意图;FIG. 6 is a schematic diagram of a process of constructing a Polar code according to an embodiment of the present application;
图7为本申请实施例提供的速率匹配和解速率匹配的信令流程图;FIG. 7 is a signaling flowchart of rate matching and de-rate matching provided by an embodiment of the present application;
图8为本申请实施例提供的速率匹配序列获取示意图;FIG. 8 is a schematic diagram of obtaining a rate matching sequence according to an embodiment of the present application;
图9为本申请实施例提供的译码方法流程示意图;FIG. 9 is a schematic flowchart of a decoding method according to an embodiment of the present disclosure;
图10A为本申请实施例提供的路径扩展示意图一;FIG. 10A is a schematic diagram 1 of a path extension according to an embodiment of the present application; FIG.
图10B为本申请实施例提供的路径扩展示意图二;FIG. 10B is a schematic diagram 2 of a path extension according to an embodiment of the present application; FIG.
图11为本申请实施例提供的译码性能对比示意图一;FIG. 11 is a schematic diagram 1 of decoding performance comparison according to an embodiment of the present application; FIG.
图12为本申请实施例提供的译码性能对比示意图二;FIG. 12 is a second schematic diagram of decoding performance according to an embodiment of the present application; FIG.
图13为本申请实施例提供的译码性能对比示意图三;FIG. 13 is a third schematic diagram of decoding performance provided by an embodiment of the present application; FIG.
图14为本申请实施例提供的发送设备的结构示意图;FIG. 14 is a schematic structural diagram of a sending device according to an embodiment of the present disclosure;
图15为本申请实施例提供的接收设备的结构示意图;FIG. 15 is a schematic structural diagram of a receiving device according to an embodiment of the present disclosure;
图16为本申请实施例提供的发送设备的硬件结构示意图;FIG. 16 is a schematic structural diagram of hardware of a sending device according to an embodiment of the present disclosure;
图17为本申请实施例提供的接收设备的硬件结构示意图。FIG. 17 is a schematic structural diagram of hardware of a receiving device according to an embodiment of the present disclosure.
具体实施方式detailed description
本申请实施例描述的网络架构以及业务场景是为了更加清楚的说明本申请实施例的技术方案,并不构成对于本申请实施例提供的技术方案的限定,本领域普通技术人员可知,随着网络架构的演变和新业务场景的出现,本申请实施例提供的技术方案对于类似的技术问题,同样适用。The network architecture and the service scenario described in the embodiments of the present application are for the purpose of more clearly illustrating the technical solutions of the embodiments of the present application, and do not constitute a limitation of the technical solutions provided by the embodiments of the present application. The technical solutions provided by the embodiments of the present application are equally applicable to similar technical problems.
本申请实施例可以应用于无线通信系统,需要说明的是,本申请实施例提及的无线通信系统包括但不限于:窄带物联网系统(Narrow Band-Internet of Things,NB-IoT)、全球移动通信系统(Global System for Mobile Communications,GSM)、增强型数据速率GSM演进系统(Enhanced Data rate for GSM Evolution,EDGE)、宽带码分多址系统(Wideband Code Division Multiple Access,WCDMA)、码分多址2000系统(Code Division Multiple Access,CDMA2000)、时分同步码分多址系统(Time Division-Synchronization Code Division Multiple Access,TD-SCDMA),长期演进系统(Long Term Evolution,LTE)以及下一代5G移动通信系统。The embodiments of the present application can be applied to a wireless communication system. It should be noted that the wireless communication system mentioned in the embodiments of the present application includes but is not limited to: Narrow Band-Internet of Things (NB-IoT), global mobile Global System for Mobile Communications (GSM), Enhanced Data Rate for GSM Evolution (EDGE), Wideband Code Division Multiple Access (WCDMA), Code Division Multiple Access (CDMA) 2000 System (Code Division Multiple Access, CDMA2000), Time Division-Synchronization Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), and Next Generation 5G Mobile Communication System .
下面结合图1对本申请实施例的可能的网络架构进行介绍。图1示出了本申请实施例可能适用的一种网络架构。如图1所示,本实施例提供的网络架构包括网络设备101和终端设备102。The possible network architecture of the embodiment of the present application is introduced below with reference to FIG. FIG. 1 shows a network architecture that may be applicable to an embodiment of the present application. As shown in FIG. 1 , the network architecture provided by this embodiment includes a network device 101 and a terminal device 102.
其中,网络设备101是一种将终端设备接入到无线网络的设备,可以是全球移动通讯(Global System of Mobile communication,简称GSM)或码分多址(Code Division Multiple Access,简称CDMA)中的基站(Base Transceiver Station,简称BTS),也可以是宽带码分多址(Wideband Code Division Multiple Access,简称WCDMA)中的基站(NodeB,简称NB),还可以是长期演进(Long Term Evolution,简称LTE)中的演进型基站(Evolved Node B,简称eNB或eNodeB),或者中继站或接入点,或者未来5G网络中的网络侧设备(例如基站)或未来演进的公共陆地移动网络(Public Land Mobile Network,PLMN)中的网 络设备等,在此并不限定。图1示意性的绘出了一种可能的示意,以该网络设备101为基站为例进行了绘示。该基站可以包括各种形式的宏基站,微基站,中继站,接入点等等。The network device 101 is a device that accesses the terminal device to the wireless network, and may be in Global System of Mobile communication (GSM) or Code Division Multiple Access (CDMA). Base station (Base Transceiver Station, BTS for short), may also be a base station (NodeB, NB for short) in Wideband Code Division Multiple Access (WCDMA), or Long Term Evolution (LTE). Evolved Node B (eNB or eNodeB for short), or a relay station or access point, or a network side device (such as a base station) in a future 5G network or a public land mobile network (Public Land Mobile Network) Network devices and the like in PLMN) are not limited herein. FIG. 1 is a schematic diagram showing a possible schematic diagram, and the network device 101 is taken as an example for a base station. The base station may include various forms of macro base stations, micro base stations, relay stations, access points, and the like.
设备设备102可以是无线终端也可以是有线终端,无线终端可以是指向用户提供语音和/或其他业务数据连通性的设备,具有无线连接功能的手持式设备、或连接到无线调制解调器的其他处理设备。无线终端可以经无线接入网(Radio Access Network,简称RAN)与一个或多个核心网进行通信,无线终端可以是移动终端,如移动电话(或称为“蜂窝”电话)和具有移动终端的计算机,例如,可以是便携式、袖珍式、手持式、计算机内置的或者车载的移动装置,它们与无线接入网交换语言和/或数据。例如,个人通信业务(Personal Communication Service,简称PCS)电话、无绳电话、会话发起协议(Session Initiation Protocol,简称SIP)话机、无线本地环路(Wireless Local Loop,简称WLL)站、个人数字助理(Personal Digital Assistant,简称PDA)等设备。无线终端也可以称为系统、订户单元(Subscriber Unit)、订户站(Subscriber Station),移动站(Mobile Station)、移动台(Mobile)、远程站(Remote Station)、远程终端(Remote Terminal)、接入终端(Access Terminal)、用户终端(User Terminal)、用户代理(User Agent),在此不作限定。图1示意性的绘出了一种可能的示意,以该终端设备102为移动电话为例进行了绘示。The device device 102 may be a wireless terminal or a wired terminal, the wireless terminal may be a device that provides voice and/or other service data connectivity to the user, a handheld device with wireless connectivity, or other processing device connected to the wireless modem. . The wireless terminal can communicate with one or more core networks via a Radio Access Network (RAN), which can be a mobile terminal, such as a mobile phone (or "cellular" phone) and a mobile terminal. The computer, for example, can be a portable, pocket, handheld, computer built-in or in-vehicle mobile device that exchanges language and/or data with the wireless access network. For example, Personal Communication Service (PCS) telephone, cordless telephone, Session Initiation Protocol (SIP) telephone, Wireless Local Loop (WLL) station, personal digital assistant (Personal) Digital Assistant, PDA for short. The wireless terminal may also be referred to as a system, a subscriber unit, a subscriber station, a mobile station, a mobile station, a remote station, a remote terminal, and a remote terminal. The access terminal, the user terminal (User Terminal), and the user agent (User Agent) are not limited herein. FIG. 1 schematically depicts a possible schematic diagram in which the terminal device 102 is a mobile phone as an example.
在本实施例中,该网络设备101和终端设备102可以将极化(Polar)码作为编译码方案。本实施例作为发送设备的编码设备可以为上述的网络设备101或终端设备102,同理,作为接收设备的译码设备可以为上述的终端设备102或网络设备101。具体地,当网络设备101作为发送设备进行极化编码时,则终端设备102作为接收设备进行极化译码。对应地,当终端设备102作为发送设备进行极化编码时,则网络设备101作为接收设备进行极化译码。In this embodiment, the network device 101 and the terminal device 102 may use a Polar code as a coding and coding scheme. The encoding device as the transmitting device in this embodiment may be the network device 101 or the terminal device 102. Similarly, the decoding device as the receiving device may be the terminal device 102 or the network device 101. Specifically, when the network device 101 performs polarization coding as a transmitting device, the terminal device 102 performs polarization decoding as a receiving device. Correspondingly, when the terminal device 102 performs polarization coding as a transmitting device, the network device 101 performs polarization decoding as a receiving device.
在本实施例中,这里的Polar码包括但不限于Arikan Polar码、PC-Polar码、CA-Polar码、PC-CA-Polar码。Arikan Polar是指原始的Polar码,没有与其它码级联,只有信息比特和冻结比特。PC-Polar是级联了奇偶校验(Parity Check,PC)的Polar码,CA-Polar是循环冗余校验辅助(Cyclic Redundancy Check Aided,CA)的Polar码及其他级联Polar码。PC-CA-Polar码是同时级联了PC和CA的Polar码。PC-Polar和CA-Polar是通过级联不同的码来提高Polar码的性能。In this embodiment, the Polar code herein includes, but is not limited to, an Arikan Polar code, a PC-Polar code, a CA-Polar code, and a PC-CA-Polar code. Arikan Polar refers to the original Polar code, which is not cascaded with other codes, only information bits and frozen bits. PC-Polar is a Polar code of Cascade Check (PC), CA-Polar is a Cyclic Redundancy Check Aided (CA) Polar code and other cascading Polar codes. The PC-CA-Polar code is a Polar code that concatenates both PC and CA at the same time. PC-Polar and CA-Polar improve the performance of Polar codes by cascading different codes.
其中,Polar码是一种线性块码,其编码矩阵为G,编码过程为u NG=x N,其中u N=(u 1,u 2,...,u N)是一个二进制的行矢量,长度为N(即母码长度);G是一个N×N的矩阵,且
Figure PCTCN2019083883-appb-000002
这里矩阵
Figure PCTCN2019083883-appb-000003
定义为log 2N个矩阵F 2的克罗内克(Kronecker)乘积;以上涉及的加法、乘法操作均为二进制伽罗华域(Galois Field)上的加法、乘法操作。
The Polar code is a linear block code whose encoding matrix is G, and the encoding process is u N G=x N , where u N =(u 1 , u 2 , . . . , u N ) is a binary line. Vector, length N (ie mother code length); G is an N×N matrix, and
Figure PCTCN2019083883-appb-000002
Matrix here
Figure PCTCN2019083883-appb-000003
The Kronecker product defined as log 2 N matrices F 2 ; the addition and multiplication operations referred to above are addition and multiplication operations on a binary Galois field.
Polar码的编码过程中,u N中的一部分比特用来携带信息,称为信息比特,这些比特的索引的集合记作A;另外的一部分比特置为收发端预先约定的固定值,称之为固定比特,其索引的集合用A的补集A c表示。不失一般性,这些固定比特通常被设为0,只需要收发端预先约定,固定比特序列可以被任意设置。 In the encoding process of the Polar code, a part of the bits in u N are used to carry information, which is called information bits. The set of indexes of these bits is denoted as A; another part of the bits is set to a fixed value pre-agreed by the transceiver, which is called A fixed bit whose set of indices is represented by the complement A c of A. Without loss of generality, these fixed bits are usually set to 0, only need to be pre-agreed by the transceiver, and the fixed bit sequence can be arbitrarily set.
Polar码基于串行抵消(Successive Cancellation,SC)译码算法或串行抵消列表(SC List, SCL)译码算法等进行译码,本实施例对polar码的译码算法不做特别限制。其中,SC译码算法,即从第1个比特开始顺序译码。串行抵消列表(SC List,SCL)译码算法是对SC译码算法的改进,在每个比特保留多个候选译码结果,完成全部比特的译码后根据一定准则对列表中所有译码结果进行选择,得到最终译码结果。The Polar code is decoded based on a Successive Cancellation (SC) decoding algorithm or a SC List (SCL) decoding algorithm. The decoding algorithm of the polar code is not particularly limited in this embodiment. The SC decoding algorithm, that is, sequentially decodes from the first bit. The serial offset list (SC List, SCL) decoding algorithm is an improvement of the SC decoding algorithm. Multiple candidate decoding results are reserved in each bit, and all the bits are decoded, and all decodings in the list are performed according to certain criteria. The result is selected to obtain the final decoded result.
图2为本申请实施例提供的极化码的速率匹配的处理流程图。如图2所示,本实施例以CA-Polar码为例,即级联了CRC码的Polar为例来说明速率匹配的处理流程图,对于其它方式的Polar码的处理方式类似,本实施例此处不再赘述。FIG. 2 is a flowchart of processing a rate matching of a polarization code according to an embodiment of the present application. As shown in FIG. 2, the CA-Polar code is taken as an example, that is, the CRC of the CRC code is used as an example to describe the process of the rate matching process. I will not repeat them here.
具体地,在发送设备侧,该发送设备根据k个信息比特和长度为m的CRC码,得到了K比特长的信息比特序列,然后对该信息比特序列进行极化编码,得到N比特长的编码后序列,其中,该N比特长的编码后序列包括信息比特和冻结比特。发送设备对该编码后序列进行打孔或删余处理,得到M比特长的速率匹配序列。发送设备通过信道将该编码后序列发送给接收设备,接收设备通过SCL译码方法进行译码,得到多条候选路径,根据CRC对得到的候选路径进行校验,若校验结果为校验通过,则校验通过的候选路径为译码结果,若校验未通过,则对其它候选路径进行校验,直至获取译码结果。Specifically, on the transmitting device side, the transmitting device obtains a K-bit long information bit sequence according to k information bits and a CRC code of length m, and then performs polarization encoding on the information bit sequence to obtain N bits long. The encoded sequence, wherein the N-bit long encoded sequence includes information bits and freeze bits. The transmitting device performs puncturing or puncturing on the encoded sequence to obtain a rate matching sequence of M bits long. The transmitting device sends the encoded sequence to the receiving device through the channel, and the receiving device performs decoding by using the SCL decoding method to obtain a plurality of candidate paths, and the candidate path obtained by the CRC is verified, and if the verification result is verified Then, the candidate path that passes the verification is the decoding result, and if the verification fails, the other candidate paths are verified until the decoding result is obtained.
在本实施例中,提出了一种极化码的速率匹配和解速率匹配方法,该方法使得匹配位置更加灵活多变,且译码性能较高。该速率匹配可以为对编码后序列进行的打孔(puncture)处理或缩短(shorten)处理。其中,打孔处理的打孔位置或缩短处理的缩短位置可以理解为匹配位置。该匹配位置可以灵活设置,该匹配位置不仅可以为编码后序列的前端或后端,还可以为编码后序列的任意位置。In this embodiment, a rate matching and de-rate matching method for a polarization code is proposed, which makes the matching position more flexible and variable, and the decoding performance is higher. The rate matching may be a puncture process or a shortening process on the encoded sequence. Among them, the punching position of the punching process or the shortening position of the shortening process can be understood as a matching position. The matching position can be flexibly set, and the matching position can be not only the front end or the back end of the encoded sequence, but also any position of the encoded sequence.
在本实施例中,可以通过速率匹配图样来指示多个连续的匹配位置。对速率匹配图样的设计原则为匹配位置为连续的,且满足匹配位置影响的冻结位数量和匹配位置的数量相等,以实现码率无损原则。基于以上两个原则,本实施例基于匹配位置对应的编码后的比特为0来获取速率匹配图样,并基于该速率匹配图样对应的编码约束关系来构造Polar码,从而有针对性的进行极化编码,以保证译码性能。下面采用具体的实施例,来进行详细说明。In this embodiment, a plurality of consecutive matching locations may be indicated by a rate matching pattern. The design principle of the rate matching pattern is that the matching position is continuous, and the number of frozen bits and the number of matching positions that satisfy the matching position are equal, so as to achieve the principle of rate loss. Based on the above two principles, the present embodiment obtains a rate matching pattern based on the coded bit corresponding to the matching position, and constructs a Polar code based on the coding constraint relationship corresponding to the rate matching pattern, thereby performing targeted polarization. Encoding to ensure decoding performance. Detailed description will be made below using specific embodiments.
本实施例的信道模型:极化码母码码长N=2 n,速率匹配后码长M,匹配数量Q=N-M,信息位长度K,信源序列u N=(u 1,u 2,...,u N),则编码序列c=u NG,其中G为极化码编码矩阵,且
Figure PCTCN2019083883-appb-000004
The channel model of this embodiment: the code length of the coded mother code is N=2 n , the code length M is matched, the number of matches is Q=NM, the length of the information bit is K, and the source sequence u N =(u 1 , u 2 , ..., u N ), then the coding sequence c = u N G, where G is the polarization code encoding matrix, and
Figure PCTCN2019083883-appb-000004
图3为本申请实施例提供的获取速率匹配图样的方法流程示意图。如图3所示,该方法包括:FIG. 3 is a schematic flowchart of a method for acquiring a rate matching pattern according to an embodiment of the present disclosure. As shown in FIG. 3, the method includes:
S301、设定母码长度为N的预设构造序列,速率匹配后码长为M,匹配数量Q=N-M,匹配位置为i至i+Q-1,i初始化=1。S301: Set a preset structure sequence with a mother code length of N. After the rate matching, the code length is M, the number of matches is Q=N-M, the matching position is i to i+Q-1, and i is initialized=1.
其中,预设构造序列为待编码序列的构造序列。The preset construction sequence is a constructed sequence of the sequence to be encoded.
S302、根据速率匹配图样中的匹配位置(i至i+Q-1)从编码矩阵中获取i至i+Q-1列,得到匹配列。S302. Acquire i to i+Q-1 columns from the coding matrix according to the matching positions (i to i+Q-1) in the rate matching pattern to obtain a matching column.
其中,匹配列在编码矩阵中的排序与匹配位置在速率匹配图样中的排序位置相同。The sorting of the matching column in the encoding matrix is the same as the sorting position of the matching position in the rate matching pattern.
S303、根据预设构造序列以及与每个匹配位置的排序位置相同的匹配列,获取每个匹配位置对应的求解表达式,所述求解表达式的值为0;S303. Acquire a solution expression corresponding to each matching position according to a preset configuration sequence and a matching column that is the same as a sorting position of each matching position, where the value of the solution expression is 0;
S304、根据每个匹配位置对应的求解表达式,获取编码约束关系。S304. Acquire a coding constraint relationship according to a solution expression corresponding to each matching position.
S305、设定i=i+1,判断i+1是否小于等于i+Q-1,若是,则执行S302,若否,则执行S306。S305, setting i=i+1, determining whether i+1 is less than or equal to i+Q-1, if yes, executing S302, and if not, executing S306.
本实施例结合一具体的实施例对图3进行详细说明,对于其它的实现方式,与该实施例类似,本实施例此处不再赘述。FIG. 3 is a detailed description of the present embodiment in conjunction with a specific embodiment. For other implementation manners, similar to the embodiment, the present embodiment is not described herein again.
首先,构造母码长度为8的预设构造序列u 8=(u 1,u 2,...,u 8),速率匹配后码长为5,即匹配数量Q=N-M=8-5=3。其中,预设构造序列为待编码序列的构造序列,即本申请预先构造一个母码长度为8的序列,该预设构造序列与待编码序列的长度相同。 First, construct a preset structure sequence u 8 =(u 1 ,u 2 ,...,u 8 ) with a mother code length of 8, and the code length after the rate matching is 5, that is, the number of matches Q=NM=8-5= 3. The preset structure sequence is a structure sequence of the sequence to be coded, that is, the present application pre-configures a sequence with a mother code length of 8, which is the same length as the sequence to be coded.
本实施例的匹配位置取i至i+Q-1,即取Q个连续的匹配位置。起始时速率匹配图样中的匹配位置从1至3,然后依次2至4、3至5等。其中,速率匹配图样用于指示连续的多个匹配位置,该速率匹配图样的长度与预设构造序列相等,可以为包含0和1的序列,其中,0用于指示匹配位置,1用于指示非匹配位置。The matching position of this embodiment takes i to i+Q-1, that is, takes Q consecutive matching positions. The matching position in the initial rate matching pattern is from 1 to 3, and then 2 to 4, 3 to 5, and so on. The rate matching pattern is used to indicate a plurality of consecutive matching positions, and the length of the matching pattern is equal to the preset configuration sequence, and may be a sequence including 0 and 1, wherein 0 is used to indicate a matching position, and 1 is used to indicate Non-matching location.
初始化i=1时,匹配位置为1、2、3。由此从编码矩阵G中获取得到的匹配列为矩阵中的第1至3列。编码矩阵具体如下所示:When i=1 is initialized, the matching position is 1, 2, and 3. The matching columns thus obtained from the encoding matrix G are the first to third columns in the matrix. The coding matrix is as follows:
Figure PCTCN2019083883-appb-000005
Figure PCTCN2019083883-appb-000005
矩阵AMatrix A
矩阵A中的阴影部分即为匹配列。根据预设构造序列u 8=(u 1,u 2,...,u 8)以及与每个匹配位置的排序位置相同的匹配列,获取每个匹配位置对应的求解表达式,其中,求解表达式为预设构造序列与匹配列进行相乘处理得到的表达式,该求解表达式的值为0。 The shaded part of matrix A is the matching column. Obtaining a solution expression corresponding to each matching position according to a preset construction sequence u 8 =(u 1 , u 2 , . . . , u 8 ) and a matching column having the same sorting position as each matching position, wherein The expression is an expression obtained by multiplying a preset construction sequence and a matching column, and the value of the solution expression is 0.
在本实施例中,求解表达式如下所示:In this embodiment, the solution expression is as follows:
Figure PCTCN2019083883-appb-000006
Figure PCTCN2019083883-appb-000006
Figure PCTCN2019083883-appb-000007
Figure PCTCN2019083883-appb-000007
Figure PCTCN2019083883-appb-000008
Figure PCTCN2019083883-appb-000008
其中,
Figure PCTCN2019083883-appb-000009
为取异或符号,根据求解表达式获取编码约束关系的过程如下推导一所示
among them,
Figure PCTCN2019083883-appb-000009
In order to take the XOR symbol, the process of obtaining the encoding constraint relationship according to the solution expression is as follows:
Figure PCTCN2019083883-appb-000010
Figure PCTCN2019083883-appb-000010
Figure PCTCN2019083883-appb-000011
Figure PCTCN2019083883-appb-000011
Figure PCTCN2019083883-appb-000012
Figure PCTCN2019083883-appb-000012
本实例在推导时,先从列重小的列进行推导,再对列重大的列进行推导。由此,得到编码约束关系为u 1=u 2=u 3=u 4以及u 5=u 6=u 7=u 8In the case of derivation, this example is derived from the column with a small column weight, and then the column with a large column is deduced. Thus, the coding constraint relationship is obtained as u 1 =u 2 =u 3 =u 4 and u 5 =u 6 =u 7 =u 8 .
然后,设定i=i+1,此时匹配位置为2、3、4,得到编码约束关系的实现方式如上所示,本实施例此处不再赘述。本实施例为了便于说明,再对匹配位置为4、5、6时,如何获取编码关系进行详细说明。Then, i=i+1 is set, and the matching position is 2, 3, and 4, and the implementation of the coding constraint relationship is as shown in the above, which is not described herein again. In this embodiment, for convenience of explanation, how to obtain the coding relationship when the matching positions are 4, 5, and 6 is described in detail.
当匹配位置为4、5、6时,由此从编码矩阵G中获取得到的匹配列为矩阵中的第4至6列。编码矩阵具体如下所示:When the matching positions are 4, 5, 6, the matching columns thus obtained from the encoding matrix G are the 4th to 6th columns in the matrix. The coding matrix is as follows:
Figure PCTCN2019083883-appb-000013
Figure PCTCN2019083883-appb-000013
矩阵BMatrix B
矩阵B中的阴影部分即为匹配列。根据预设构造序列u 8=(u 1,u 2,...,u 8)以及与每个匹配位置的排序位置相同的匹配列,获取每个匹配位置对应的求解表达式如下所示: The shaded portion of matrix B is the matching column. According to the preset construction sequence u 8 =(u 1 , u 2 ,..., u 8 ) and the matching column with the same sort position as each matching position, the solution expression corresponding to each matching position is obtained as follows:
Figure PCTCN2019083883-appb-000014
Figure PCTCN2019083883-appb-000014
Figure PCTCN2019083883-appb-000015
Figure PCTCN2019083883-appb-000015
Figure PCTCN2019083883-appb-000016
Figure PCTCN2019083883-appb-000016
其中,根据求解表达式获取编码约束关系的过程如下推导二所示:The process of obtaining the coding constraint relationship according to the solution expression is as follows:
c 6=0→{u 6=u 8 c 6 =0→{u 6 =u 8
Figure PCTCN2019083883-appb-000017
Figure PCTCN2019083883-appb-000017
c 4=0→{u 4=u 8 c 4 =0→{u 4 =u 8
本实例在推导时,先从列重小的列进行推导,再对列重大的列进行推导。由此,得到编码约束关系为u 4=u 6=u 8和u 5=u 7In the case of derivation, this example is derived from the column with a small column weight, and then the column with a large column is deduced. Thus, the coding constraint relationship is obtained as u 4 = u 6 = u 8 and u 5 = u 7 .
重复上述类似的过程,在i=6时结束,可以得到6种匹配位置对应的编码约束关系。The above similar process is repeated, and when i=6, the coding constraint relationship corresponding to the six matching positions can be obtained.
进一步地,在上述实施例的基础上,还可以对编码矩阵进行简化处理,从而快速得到编码约束关系。具体地,根据速率匹配图样中的匹配位置,从编码矩阵中提取初始矩阵;对初始矩阵中的元素1进行高斯消元处理,得到匹配矩阵,匹配矩阵中的列为匹配列。为了便于说明,此处以矩阵B为例进行说明。Further, on the basis of the foregoing embodiment, the coding matrix can be simplified, so that the coding constraint relationship can be quickly obtained. Specifically, the initial matrix is extracted from the coding matrix according to the matching position in the rate matching pattern; the Gaussian elimination processing is performed on the element 1 in the initial matrix to obtain a matching matrix, and the columns in the matching matrix are matching columns. For convenience of explanation, the matrix B will be described here as an example.
Figure PCTCN2019083883-appb-000018
Figure PCTCN2019083883-appb-000018
其中,灰色的4、5、6三列组成了初始矩阵,对初始矩阵中的元素1进行高斯消去处理,得到匹配矩阵Gp。其中,高斯消去处理是对列重大的列进行高斯消去处理,例如,第5列的列重为4,则根据第6列对第5列进行高斯消去,由于第5列的第6个元素和第8个元素与第6列的第6个元素和第8个元素相同,所以第5列的第6个元素和第8个元素进行高斯消去处理,由元素1变为元素0。本实施例仅示意性的给出了高斯消去的过程,对于其它高斯消去的过程,本实施例此处不做特别限制。Among them, the gray 4, 5, and 6 columns constitute the initial matrix, and Gaussian elimination processing is performed on the element 1 in the initial matrix to obtain the matching matrix Gp. Among them, the Gaussian elimination process is a Gaussian elimination process on a column with a large column. For example, if the column weight of the fifth column is 4, the Gaussian elimination is performed on the 5th column according to the 6th column, because the 6th element of the 5th column is The eighth element is the same as the sixth element and the eighth element of the sixth column, so the sixth element and the eighth element of the fifth column perform Gaussian elimination processing, and element 1 becomes element 0. This embodiment only schematically shows the process of Gaussian elimination. For other Gaussian elimination processes, the embodiment is not particularly limited herein.
在得到匹配矩阵Gp后,可以根据该匹配矩阵中的匹配列获取的求解表达式如下所示:After the matching matrix Gp is obtained, the solution expression that can be obtained according to the matching column in the matching matrix is as follows:
Figure PCTCN2019083883-appb-000019
Figure PCTCN2019083883-appb-000019
Figure PCTCN2019083883-appb-000020
Figure PCTCN2019083883-appb-000020
Figure PCTCN2019083883-appb-000021
Figure PCTCN2019083883-appb-000021
其中,根据求解表达式获取编码约束关系的过程如下推导三所示:Among them, the process of obtaining the coding constraint relationship according to the solution expression is as follows:
c 4=0→{u 4=u 8 c 4 =0→{u 4 =u 8
Figure PCTCN2019083883-appb-000022
Figure PCTCN2019083883-appb-000022
c 6=0→{u 6=u 8 c 6 =0→{u 6 =u 8
本领域技术人员可以理解,针对化简得到的匹配矩阵,得到的求解表达式更简单,每列的列重大小相等,可以从任一列来推导编码约束关系,推导过程简单,提高了处理效率。Those skilled in the art can understand that for the matching matrix obtained by simplification, the obtained expression is simpler, the column weight of each column is equal, and the coding constraint relationship can be derived from any column, the derivation process is simple, and the processing efficiency is improved.
进一步地,针对化简得到的匹配矩阵,还可以针对匹配矩阵直接得到编码约束关系。具体地,可以根据编码约束关系中元素1的位置来直接获取编码约束关系,例如,针对匹配矩阵中的第1列,有两个元素为1的位置,对应u 4、u 8,由于每列的模二加结果为零,则可以得到u 4=u 8,由于u 8出现在匹配矩阵中的第3列,而第3列元素为1的位置,对应u 8、u 6,由此可以直接得到u 4=u 8=u 6,针对匹配矩阵中的第2列,可以得到u 5=u 7。本实施例示意性的给出了另一种通过匹配矩阵获取编码约束关系的实现方式,对于其它通过匹配矩阵获取编码约束关系的实现方式,都属于本申请的保护范畴,本实施例此处不再赘述。 Further, for the matching matrix obtained by simplification, the coding constraint relationship can also be directly obtained for the matching matrix. Specifically, the coding constraint relationship may be directly obtained according to the position of the element 1 in the coding constraint relationship. For example, for the first column in the matching matrix, there are two locations where the element is 1, corresponding to u 4 , u 8 , because each column If the modulo two-addition result is zero, u 4 =u 8 can be obtained, since u 8 appears in the third column in the matching matrix, and the third column element has a position of 1, corresponding to u 8 , u 6 , thereby Obtaining u 4 =u 8 =u 6 directly, u 5 =u 7 can be obtained for the second column in the matching matrix. This embodiment schematically shows another implementation manner for obtaining an encoding constraint relationship through a matching matrix. For other implementation manners for obtaining a coding constraint relationship through a matching matrix, the protection scope of the present application is not included in this embodiment. Let me repeat.
S306、根据各编码约束关系的数量和匹配位置的数量,获取满足码率无损原则的速率匹配图样。S306. Obtain a rate matching pattern that satisfies the code rate lossless principle according to the number of each coding constraint relationship and the number of matching positions.
本领域技术人员可以理解,通过S301至S305,可以获取6种编码约束关系,即对应6中速率匹配图样。然而,由于编码约束关系的存在,影响了能够承载的信息比特的数量,存在码率损伤的问题,因此需要在获取的所有编码约束关系中,获取满足码率无损原则的编码约束关系。Those skilled in the art can understand that, through S301 to S305, six coding constraint relationships can be obtained, that is, corresponding to the 6 medium rate matching pattern. However, due to the existence of the coding constraint relationship, the number of information bits that can be carried is affected, and there is a problem of code rate impairment. Therefore, in all the coding constraint relationships obtained, the coding constraint relationship satisfying the code rate lossless principle is obtained.
以上述矩阵A和矩阵B对应的编码约束关系为例,来说明码率损失的问题。Taking the coding constraint relationship corresponding to the above matrix A and matrix B as an example, the problem of rate loss is explained.
对于矩阵A,编码约束关系为u 1=u 2=u 3=u 4以及u 5=u 6=u 7=u 8,由于约束关系的存在,能够承载的信息比特的数量只有2,但由于M=5,因此对于矩阵A对应的速率匹配图样,码率最大为2/5,存在码率损失的问题。由此,该矩阵A对应的编码约束关系不满足码率无损原则。 For matrix A, the coding constraint relationship is u 1 =u 2 =u 3 =u 4 and u 5 =u 6 =u 7 =u 8 , the number of information bits that can be carried is only 2 due to the existence of the constraint relationship, but due to M=5, so for the rate matching pattern corresponding to the matrix A, the code rate is at most 2/5, and there is a problem of loss of rate. Therefore, the coding constraint relationship corresponding to the matrix A does not satisfy the code rate non-destructive principle.
对于矩阵B,编码约束关系为u 4=u 6=u 8和u 5=u 7。由于约束关系的存在,能够承载的信息比特的数量为5(编码约束关系对应2个,其余3个比特对应3个),同时M=5,因此矩阵B对应的速率匹配图样,码率最大为1,不存在码率损失的问题,保证码率可以从0取到1。 For matrix B, the coding constraint relationship is u 4 = u 6 = u 8 and u 5 = u 7 . Due to the existence of the constraint relationship, the number of information bits that can be carried is 5 (the coding constraint relationship corresponds to 2, and the remaining 3 bits correspond to 3), and M=5, so the matrix B corresponds to the rate matching pattern, and the maximum code rate is 1, there is no problem of loss of rate, the guaranteed code rate can be taken from 0 to 1.
由上可知,在编码约束关系的数量为至少一个时,该至少一个编码约束关系对应的所有约束位置的数量与编码约束关系的数量的差值与匹配位置的数量相等时,则该编码约束关系对应的速率匹配图样满足码率无损原则。It can be seen that, when the number of coding constraint relationships is at least one, when the difference between the number of all constraint positions corresponding to the at least one coding constraint relationship and the number of coding constraint relationships is equal to the number of matching positions, the coding constraint relationship is The corresponding rate matching pattern satisfies the code rate lossless principle.
例如,对于矩阵A,两个编码约束关系对应8个约束位置,则该差值为6,该差值可 以理解为被影响的冻结比特的数量,该差值与匹配位置的数量不相等,所以匹配位置为1至3的速率匹配图样不满足码率无损原则。对于矩阵B,两个编码约束关系对应5个约束位置,则该差值为3,该差值可以理解为被影响的冻结比特的数量,该差值与匹配位置的数量相等,所述匹配位置为4至6的速率匹配图样满足码率无损原则。For example, for matrix A, two coding constraint relations correspond to 8 constraint positions, then the difference is 6, and the difference can be understood as the number of frozen bits affected, and the difference is not equal to the number of matching positions, so A rate matching pattern with a matching position of 1 to 3 does not satisfy the rate loss non-destructive principle. For the matrix B, the two coding constraint relations correspond to five constraint positions, and the difference is 3, and the difference can be understood as the number of frozen bits affected, the difference being equal to the number of matching positions, the matching position A rate matching pattern of 4 to 6 satisfies the rate loss principle.
本领域技术人员可以理解,本实施例仅以矩阵A和矩阵B来示例性的说明了不满足码率无损原则的情况和满足码率无损原则的情况,在具体实现过程中,满足码率无损原则的速率匹配图样可以为至少一个,不满足码率无损的速率匹配图样也可以为多个。It can be understood by those skilled in the art that the present embodiment exemplarily illustrates the case where the code rate non-destructive principle is not satisfied and the case where the code rate non-destructive principle is satisfied by using the matrix A and the matrix B. In the specific implementation process, the code rate is not damaged. The rate matching pattern of the principle may be at least one, and the rate matching pattern that does not satisfy the code rate lossless may also be multiple.
S307、根据预设筛选原则和满足码率无损的速率匹配图样,获取目标速率匹配图样。S307. Acquire a target rate matching pattern according to a preset screening principle and a rate matching pattern that satisfies a code rate losslessness.
由上可知,满足码率无损原则的速率匹配图样有多个,因此可以根据预设筛选原则筛选出待使用的速率匹配图样。该预设筛选规则包括但不限于高斯近似(Gaussian Approximation,GA)估计,或者极化重量(Polarization Weight,PW)值作为衡量标准,以选出对应原则下最好的速率匹配图样作为速率匹配图样。或者固定匹配位置选取,例如前端、后端、末端等,以获取目标速率匹配图样。本实施例对预设筛选原则不做特别限制,对获取目标速率匹配图样的实现方式也不做特别限制。若目标速率匹配图样为矩阵B对应的速率匹配图样,则其实现方式如图4所示,图4为本申请实施例提供的速率匹配图样的结构示意图。其中,0代表匹配位置,1代表非匹配位置。It can be seen from the above that there are multiple rate matching patterns satisfying the principle of rate loss, so that the rate matching pattern to be used can be selected according to the preset screening principle. The preset screening rules include, but are not limited to, Gaussian Approximation (GA) estimation, or Polarization Weight (PW) value as a measure to select the best rate matching pattern as the rate matching pattern. . Or fixed matching position selection, such as front end, back end, end, etc., to obtain the target rate matching pattern. In this embodiment, the preset screening principle is not particularly limited, and the implementation manner of acquiring the target rate matching pattern is not particularly limited. If the target rate matching pattern is the rate matching pattern corresponding to the matrix B, the implementation is as shown in FIG. 4 , and FIG. 4 is a schematic structural diagram of the rate matching pattern provided by the embodiment of the present application. Where 0 represents the matching position and 1 represents the non-matching position.
本实施例通过设置连续的匹配位置,不仅可以有规则的对匹配位置进行设置,还可以提高译码性能,通过编码约束关系得到的速率匹配图样,匹配位置可以为任意的位置,增加了匹配位置设置的灵活性,且该速率匹配图样满足码率无损原则,保证码率可以从0取到1。In this embodiment, by setting consecutive matching positions, not only can the matching position be set regularly, but also the decoding performance can be improved, and the matching position can be any position by the coding constraint relationship, and the matching position can be increased. The flexibility of the setting, and the rate matching pattern satisfies the code rate non-destructive principle, ensuring that the code rate can be taken from 0 to 1.
图5为本申请实施例提供的构造Polar码的方法流程示意图。在本实施例中,先确定预设构造序列中位于编码约束关系中的各约束位置的第一比特的属性;再确定预设构造序列中第二比特的属性,其中,第二比特为预设构造序列中除第一比特之外的比特,比特的属性为冻结比特或信息比特。具体的实现过程如图5所示:FIG. 5 is a schematic flowchart of a method for constructing a Polar code according to an embodiment of the present disclosure. In this embodiment, the attribute of the first bit of each constraint position in the encoding constraint relationship in the preset configuration sequence is first determined; and the attribute of the second bit in the preset structure sequence is determined, wherein the second bit is a preset The bits in the sequence other than the first bit are constructed, and the attributes of the bits are frozen bits or information bits. The specific implementation process is shown in Figure 5:
S501、根据预设构造方法在每个编码约束关系的各约束位置对应的第一比特中确定一个第一信息比特;S501. Determine, according to a preset construction method, a first information bit in a first bit corresponding to each constraint position of each coding constraint relationship;
S502、将各约束位置对应的第一比特中除第一信息比特之外的第一比特确定为第一冻结比特,其中,第一冻结比特的取值满足编码约束关系;S502, determining, by the first bit corresponding to each constraint position, a first bit other than the first information bit as a first frozen bit, where the value of the first frozen bit satisfies an encoding constraint relationship;
S503、根据预设的信息比特序列的长度和第一信息比特的数量,确定第二比特中第二信息比特的数量,第二比特为预设构造序列中除第一比特之外的比特;S503. Determine, according to a preset length of the information bit sequence and the number of first information bits, a quantity of second information bits in the second bit, where the second bit is a bit other than the first bit in the preset configuration sequence;
S504、根据预设构造方法和第二信息比特的数量,在第二比特中确定第二信息比特和第二冻结比特,第二冻结比特的取值为预设固定值。S504. Determine, according to the preset configuration method and the number of second information bits, the second information bit and the second frozen bit in the second bit, where the value of the second frozen bit is a preset fixed value.
在本实施例中,该预设构造方法可以为GA构造方式或PW构造方式,本实施例对具体的构造方式不做特别限制,只要该构造方式可以构造Polar码,都属于本申请的保护范畴。在本实施例中为了便于说明,以该预设构造方式为PW构造方式为例进行说明。In this embodiment, the preset construction method may be a GA configuration mode or a PW construction manner. The specific configuration manner is not particularly limited in this embodiment, as long as the configuration manner can construct a Polar code, which belongs to the protection scope of the present application. . In the present embodiment, for convenience of description, the PW structure is preset as an example of the preset configuration.
请继续参照图3所示实施例,在图3所示实施例中,得到的矩阵B对应的速率匹配图样为满足码率无损原则的图样,因此本实施例以矩阵B对应的编码约束关系为例,来说明如何构造Polar码。Continuing to refer to the embodiment shown in FIG. 3, in the embodiment shown in FIG. 3, the rate matching pattern corresponding to the matrix B is a pattern that satisfies the code rate lossless principle. Therefore, the coding constraint relationship corresponding to the matrix B in this embodiment is For example, to explain how to construct a Polar code.
本实施例以预设的信息比特序列的长度K=4为例并结合图6进行说明。图6为本申请实 施例提供的Polar码的构造过程示意图。本实施例根据PW度量来获取每个极化子信道的可靠度,根据极化子信道的可靠度来确定信息比特和冻结比特。如图6所示,本实施例对极化子信道的可靠度进行了排序,随着排序的增大,极化子信道的可靠度降低,即排序为1的极化子信道的可靠度最高,排序为8的极化子信道的可靠度最低。In this embodiment, the length K=4 of the preset information bit sequence is taken as an example and described with reference to FIG. 6. FIG. 6 is a schematic diagram of a process of constructing a Polar code according to an embodiment of the present application. In this embodiment, the reliability of each polarized subchannel is obtained according to the PW metric, and the information bits and the freeze bits are determined according to the reliability of the polarized subchannel. As shown in FIG. 6, in this embodiment, the reliability of the polarized subchannels is ranked. As the ordering increases, the reliability of the polarized subchannels decreases, that is, the reliability of the polarized subchannels ranked 1 is the highest. The polarization subchannels sorted to 8 have the lowest reliability.
预设构造序列为u 8=(u 1,u 2,...,u 8),由图3实施例可知,矩阵B对应的编码约束关系为u 4=u 8=u 6和u 5=u 7,在图5中,位于同一约束关系中的约束位置采用相同的阴影来指示。确定信息比特(Data,简称D)和冻结比特(Frozen,简称F)的过程如下: The preset construction sequence is u 8 = (u 1 , u 2 , ..., u 8 ). As can be seen from the embodiment of Fig. 3, the coding constraint relationship corresponding to matrix B is u 4 = u 8 = u 6 and u 5 = u 7 , in Figure 5, the constraint positions in the same constraint relationship are indicated by the same shading. The process of determining information bits (Data, abbreviated as D) and frozen bits (Frozen, F for short) is as follows:
1)、针对每个编码约束关系的各约束位置对应的第一比特中确定极化子信道可靠度最高的第一比特为第一信息比特,将各约束位置对应的第一比特中除第一信息比特之外的第一比特确定为第一冻结比特;1) determining, in the first bit corresponding to each constraint position of each coding constraint relationship, that the first bit with the highest reliability of the polarization subchannel is the first information bit, and dividing the first bit corresponding to each constraint position by the first one The first bit other than the information bit is determined as the first frozen bit;
具体地,针对u 4=u 8=u 6的编码约束关系,在第一比特u 4、u 6、u 8中确定u 8为信息比特,将第一比特u 4、u 6确定为冻结比特。针对u 5=u 7的编码约束关系,在u 5和u 7中确定u 7为信息比特,将u 5确定为冻结比特。本领域技术人员可以理解,此处确定的冻结比特的取值并不是预设固定值,而是满足编码约束关系,即取值与信息比特的取值相同。 Specifically, a coding constraints u 4 = u 8 = u 6, in the first bit u 4, u 6, u 8 u. 8 is determined as the information bits, the first bit u 4, u 6 bits is determined as frozen . For the coding constraint relationship of u 5 = u 7 , it is determined in u 5 and u 7 that u 7 is an information bit and u 5 is determined as a frozen bit. A person skilled in the art can understand that the value of the frozen bit determined here is not a preset fixed value, but a coding constraint relationship is satisfied, that is, the value is the same as the value of the information bit.
2)、根据信息比特序列的长度和第一信息比特的数量的差值,确定预设构造序列中除第一比特至外的第二比特中第二信息比特的数量,根据预设构造方法和第二信息比特的数量,在第二比特中确定第二信息比特和第二冻结比特。2) determining, according to a difference between the length of the information bit sequence and the number of first information bits, the number of second information bits in the second bit except the first bit to the preset configuration sequence, according to a preset construction method and The number of second information bits, the second information bit and the second frozen bit being determined in the second bit.
其中,预设的信息比特序列的长度K=4,根据编码约束关系已确定了两个第一信息比特,还差两个信息比特,因此,在除第一比特之外的第二比特u 1、u 2、u 3中,根据极化子信道的可靠度,确定第二比特u 2、u 3为信息比特,第二比特u 1为冻结比特。本领域技术人员可以理解,此处确定的冻结比特不需要满足约束关系,取值可以为预设固定值,该预设固定值可以为0。 Wherein, the length of the preset information bit sequence is K=4, two first information bits have been determined according to the coding constraint relationship, and two information bits are still different. Therefore, the second bit u 1 except the first bit In u 2 , u 3 , according to the reliability of the polar subchannel, it is determined that the second bits u 2 and u 3 are information bits, and the second bit u 1 is a frozen bit. It can be understood by those skilled in the art that the frozen bit determined here does not need to satisfy the constraint relationship, and the value may be a preset fixed value, and the preset fixed value may be 0.
通过过程1)和过程2),以一个具体的示例,说明了确定预设构造序列中的信息比特和冻结比特的过程,对于其它的预设构造序列,也都可以采用上述的方法来确定信息比特和冻结比特,本实施例在此不再一一赘述。Through the process 1) and the process 2), the process of determining the information bits and the frozen bits in the preset configuration sequence is illustrated by a specific example. For other preset construction sequences, the above method may also be used to determine the information. Bits and freeze bits, this embodiment will not be repeated here.
本实施例先根据编码约束关系来构造Polar码,再对预设构造序列中的剩余比特进行构造,保证了冻结比特和信息比特可以符合编码约束关系,并且保证了预设构造序列中的信息比特序列的数量与信息比特序列的长度相同,从而实现了预设构造序列可以使用到Polar码的编译码过程中。In this embodiment, the Polar code is constructed according to the coding constraint relationship, and then the remaining bits in the preset structure sequence are constructed, so that the frozen bit and the information bit can conform to the coding constraint relationship, and the information bits in the preset structure sequence are guaranteed. The number of sequences is the same as the length of the information bit sequence, so that the preset construction sequence can be used in the encoding and decoding process of the Polar code.
由此,通过上述图3至图6所示的实施例,得到了编码约束关系和速率匹配图样。本领域技术人员可以理解,对于作为译码设备的接收设备而言,可以通过同样的方式来获取译码约束关系和速率匹配图样,其中译码约束关系与编码约束关系类似。对于译码侧获取译码约束关系和速率匹配图样的方式,本实施例此处不再赘述。本领域技术人员可以理解,还可以编码设备在获取到编码约束关系和速率匹配图样之后,将其发送给接收设备。或者, 还可以通过其他设备来确定编码约束关系和速率匹配图样,然后将该编码约束关系和速率匹配图样预先设定给编码设备和译码设备,即针对二者进行预先约定。本实施例对编码设备和译码设备获取编码约束关系和速率匹配图样的实现方式不做特别限制。下面针对已经得到的速率匹配图样和编码约束关系来详细说明速率匹配和解速率匹配的具体实现方式。Thus, through the above-described embodiments shown in FIGS. 3 to 6, the coding constraint relationship and the rate matching pattern are obtained. It will be understood by those skilled in the art that for a receiving device as a decoding device, a decoding constraint relationship and a rate matching pattern can be obtained in the same manner, wherein the decoding constraint relationship is similar to the encoding constraint relationship. The manner in which the decoding side obtains the decoding constraint relationship and the rate matching pattern is not described in this embodiment. Those skilled in the art can understand that the encoding device can also send the encoding constraint relationship and the rate matching pattern to the receiving device after acquiring the encoding constraint relationship. Alternatively, the coding constraint relationship and the rate matching pattern may also be determined by other devices, and then the coding constraint relationship and the rate matching pattern are preset to the encoding device and the decoding device, that is, pre-agreed for both. In this embodiment, the implementation manner of obtaining the coding constraint relationship and the rate matching pattern for the encoding device and the decoding device is not particularly limited. The specific implementation of rate matching and de-rate matching is described in detail below for the rate matching pattern and coding constraint relationship that have been obtained.
图7为本申请实施例提供的速率匹配和解速率匹配的信令流程图。如图7所示,该方法包括:FIG. 7 is a signaling flowchart of rate matching and de-rate matching provided by an embodiment of the present application. As shown in FIG. 7, the method includes:
S701、发送设备根据编码约束关系获取长度为N的待编码序列,并对待编码序列进行极化编码,得到编码后序列,编码约束关系用于指示待编码序列中的至少两个约束位置,以及位于至少两个约束位置的比特的取值相同。S701. The sending device acquires a sequence to be encoded of length N according to the coding constraint relationship, and performs polarization coding on the coded sequence to obtain a coded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be coded, and is located at The bits of at least two constraint positions have the same value.
本实施例为了便于说明,以上述图3至图6实施例确定的两个编码约束关系(编码约束关系u 4=u 8=u 6和编码约束关系u 5=u 7),以及上述图4所示的速率匹配图样为例来进行详细说明。其中,N=8,匹配位置的数量Q=3,信息比特序列的长度K=4。本实施例的编码约束关系对应的速率匹配图样满足码率无损原则。本领域技术人员可以理解,针对不同的传输需求,当码率可以小于1时,还可以采用不满足码率无损原则的速率匹配图样。 For convenience of explanation, the present embodiment has two coding constraint relationships (the coding constraint relationship u 4 =u 8 =u 6 and the coding constraint relationship u 5 =u 7 ) determined by the above embodiments of FIG. 3 to FIG. 6, and FIG. 4 above. The rate matching pattern shown is taken as an example for detailed description. Where N=8, the number of matching positions is Q=3, and the length of the information bit sequence is K=4. The rate matching pattern corresponding to the coding constraint relationship of this embodiment satisfies the code rate lossless principle. Those skilled in the art can understand that for different transmission requirements, when the code rate can be less than 1, a rate matching pattern that does not satisfy the principle of loss of rate can also be used.
在具体实现过程中,根据该编码约束关系、位于编码约束关系中的各约束位置的第一比特的属性以及位于编码约束关系之外的第二比特的属性,获取所述待编码序列。具体地,第一比特的属性和第二比特的属性可参见上述图6构造完成的Polar码。In a specific implementation process, the to-be-coded sequence is obtained according to the coding constraint relationship, the attribute of the first bit of each constraint position located in the coding constraint relationship, and the attribute of the second bit located outside the coding constraint relationship. Specifically, the attribute of the first bit and the attribute of the second bit can be referred to the Polar code constructed in FIG. 6 above.
假设信息比特为i 1、i 2、i 3以及i 4,根据编码约束关系以及图6所示的Polar码,得到待编码序列,然后对该待编码序列进行极化编码,得到编码后序列。待编码序列以及编码后序列的结构可如图8所示,其中0代表冻结比特,A代表0或1。 Assuming that the information bits are i 1 , i 2 , i 3 and i 4 , the sequence to be encoded is obtained according to the coding constraint relationship and the Polar code shown in FIG. 6, and then the sequence to be encoded is polar coded to obtain a coded sequence. The structure of the sequence to be encoded and the sequence after encoding can be as shown in FIG. 8, where 0 represents a frozen bit and A represents 0 or 1.
S702、发送设备根据速率匹配图样中的匹配位置和编码后序列,得到长度为M的速率匹配序列,其中,速率匹配图样中包括多个连续的匹配位置,编码后序列中匹配位置对应的编码比特为0,N和M为整数,M小于N。S702. The sending device obtains a rate matching sequence of length M according to the matching position and the encoded sequence in the rate matching pattern, where the rate matching pattern includes multiple consecutive matching positions, and the coding bits corresponding to the matching positions in the encoded sequence are obtained. 0, N and M are integers, and M is less than N.
其中,速率匹配图样可如图4所示,本领域技术人员可以理解,编码约束关系的确定是以匹配位置编码后的结果为0来设定的,因此,编码后序列中与匹配位置对应的位置编码结果必然为0。The rate matching pattern can be as shown in FIG. 4, and those skilled in the art can understand that the determination of the coding constraint relationship is set by the result of the matching position coding being 0, and therefore, the coded sequence corresponds to the matching position. The position code result must be 0.
在得到编码后序列之后,根据速率匹配图样中的匹配位置,对编码后序列进行打孔或缩短操作,得到长度为M的速率匹配序列,可参见图8。After obtaining the encoded sequence, according to the matching position in the rate matching pattern, the encoded sequence is punctured or shortened to obtain a rate matching sequence of length M, which can be seen in FIG. 8.
S703、发送设备向接收设备发送速率匹配序列。S703. The sending device sends a rate matching sequence to the receiving device.
S704、接收设备接收发送设备发送的长度为M的速率匹配序列。S704. The receiving device receives a rate matching sequence of length M transmitted by the sending device.
发送设备通过信道将该速率匹配序列发送给接收设备,接收设备接收发送设备发送的长度为M的速率匹配序列。本领域技术人员可以理解,当速率匹配序列经过信道传输后,接收设备接收到的接收信号序列为软信息,接收设备根据软信息得到每个待译码比特对应的对数似然比(Log likelihood Ratio,LLR),对于接收设备而言,该速率匹配序列可以理解为对数似然比序列。The sending device sends the rate matching sequence to the receiving device by using the channel, and the receiving device receives the rate matching sequence of length M transmitted by the sending device. A person skilled in the art can understand that after the rate matching sequence is transmitted through the channel, the received signal sequence received by the receiving device is soft information, and the receiving device obtains a log likelihood ratio corresponding to each bit to be decoded according to the soft information (Log likelihood). Ratio, LLR), for a receiving device, the rate matching sequence can be understood as a log likelihood ratio sequence.
S705、接收设备根据速率匹配图样对速率匹配序列进行解速率匹配,得到长度为N的待译码序列,速率匹配图样中包括多个连续的匹配位置,N和M为整数,M小于N;S705. The receiving device performs rate de-matching on the rate matching sequence according to the rate matching pattern to obtain a sequence to be decoded with a length of N. The rate matching pattern includes multiple consecutive matching positions, where N and M are integers, and M is less than N.
S706、接收设备根据译码约束关系对待译码序列进行译码,得到译码后序列,译码约束关系用于指示待译码序列中的至少两个约束位置,以及位于至少两个约束位置的比特的译码结果相同。S706. The receiving device decodes the sequence to be decoded according to a coding constraint relationship, to obtain a decoded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be decoded, and at least two constraint positions. The decoding result of the bits is the same.
接收设备在得到速率匹配序列后,根据速率匹配图样对该速率匹配序列进行解速率匹配。具体地,由于速率匹配图样中的匹配位置为打孔或缩短的位置,即匹配位置对应的比特为不传输的比特,在解速率匹配的过程中,对于打孔操作,则匹配位置对应的对数似然比设置为0,对于缩短操作,则匹配位置对应的对数似然比设置为一个比较大的值,例如可以设置为无穷大。通过设置匹配位置的对数似然比,并结合信道接收的对数似然比,可以得到码长为N的待译码序列。After receiving the rate matching sequence, the receiving device performs rate de-matching on the rate matching sequence according to the rate matching pattern. Specifically, since the matching position in the rate matching pattern is a punctured or shortened position, that is, the bit corresponding to the matching position is a bit that is not transmitted, in the process of de-rate matching, for the puncturing operation, the pair corresponding to the matching position The number likelihood ratio is set to 0. For the shortening operation, the log likelihood ratio corresponding to the matching position is set to a relatively large value, for example, it can be set to infinity. By setting the log likelihood ratio of the matching position and combining the log likelihood ratio of the channel reception, a sequence to be decoded with a code length of N can be obtained.
可选地,在本实施例中,由于匹配位置对应的编码后的比特为0,且其对于收发双端都是已知的,因此,在编码端可以对匹配位置进行缩短操作来实现速率匹配,在译码端可以将该匹配位置对应的对数似然比设置为一个比较大的值。Optionally, in this embodiment, since the coded bit corresponding to the matching position is 0, and it is known to both ends of the transmitting and receiving, the matching end can be shortened at the encoding end to achieve rate matching. At the decoding end, the log likelihood ratio corresponding to the matching position can be set to a relatively large value.
在得到待译码序列后,可以采用SC或SCL译码方式,并结合译码约束关系,对待译码序列进行译码,得到译码后序列。即针对同一译码约束关系,位于至少两个约束位置的比特的译码结果相同。After the sequence to be decoded is obtained, the SC or SCL decoding method may be used, and the decoding sequence is decoded in combination with the decoding constraint relationship to obtain a decoded sequence. That is, for the same decoding constraint relationship, the decoding results of the bits located in at least two constraint positions are the same.
本实施例通过发送设备根据编码约束关系获取长度为N的待编码序列,并对待编码序列进行极化编码,得到编码后序列,编码约束关系用于指示待编码序列中的至少两个约束位置,以及位于至少两个约束位置的比特的取值相同,发送设备根据速率匹配图样中的匹配位置和编码后序列,得到长度为M的速率匹配序列,其中,速率匹配图样中包括多个连续的匹配位置,编码后序列中匹配位置对应的编码比特为0,N和M为整数,M小于N,发送设备向接收设备发送速率匹配序列,接收设备接收发送设备发送的长度为M的速率匹配序列,接收设备根据速率匹配图样对速率匹配序列进行解速率匹配,得到长度为N的待译码序列,接收设备根据译码约束关系对待译码序列进行译码,得到译码后序列,译码约束关系用于指示待译码序列中的至少两个约束位置,以及位于至少两个约束位置的比特的译码结果相同。本实施例基于编码约束关系以及匹配位置连续来进行Polar码的速率匹配和解速率匹配,可以提高译码性能。In this embodiment, the transmitting device obtains a sequence to be encoded of length N according to the coding constraint relationship, and performs polarization coding on the coded sequence to obtain a coded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be coded. And the bits of the at least two constraint positions have the same value, and the sending device obtains a rate matching sequence of length M according to the matching position and the encoded sequence in the rate matching pattern, where the rate matching pattern includes multiple consecutive matches. Position, the coded bit corresponding to the matching position in the sequence is 0, N and M are integers, M is less than N, the transmitting device sends a rate matching sequence to the receiving device, and the receiving device receives the rate matching sequence of length M sent by the sending device, The receiving device performs rate de-matching on the rate matching sequence according to the rate matching pattern to obtain a sequence to be decoded with a length of N, and the receiving device decodes the sequence to be decoded according to the decoding constraint relationship to obtain a decoded sequence and a decoding constraint relationship. Used to indicate at least two constraint positions in the sequence to be decoded, and at least Same bit positions constraints decoding result. In this embodiment, rate matching and de-rate matching of the Polar code are performed based on the coding constraint relationship and the matching position consecutively, and the decoding performance can be improved.
下面采用一个详细的实施例,来说明如何根据编码约束关系进行译码。A detailed embodiment is used below to illustrate how to decode according to the encoding constraint relationship.
图9为本申请实施例提供的译码方法流程示意图,如图9所示,该方法包括:FIG. 9 is a schematic flowchart of a decoding method according to an embodiment of the present disclosure. As shown in FIG. 9, the method includes:
S901、初始化i=1;S901, initializing i=1;
S902、判断u i是否位于约束位; S902. Determine whether u i is located in a constraint bit.
S903、判断u i是否为信息位; S903. Determine whether u i is an information bit.
S904、判断与u i位于同一译码约束关系中的u j是否被译码; S904. Determine whether u j in the same decoding constraint relationship as u i is decoded.
S905、u i置为0,不进行路径扩展; S905, u i is set to 0, and path expansion is not performed;
S906、u i按信息位译码,进行路径扩展; S906, u i are decoded according to information bits, and path expansion is performed;
S907、u i=u j,不进行路径扩展; S907, u i =u j , no path expansion;
S908、u i按信息位译码,进行路径扩展; S908, u i are decoded according to information bits, and path expansion is performed;
S909、判断扩展后的路径是否大于搜索宽度L;S909. Determine whether the extended path is greater than a search width L.
S910、选择L条可靠度最高的路径;S910. Select the path with the highest reliability of L;
S911、判断i是否小于N;S911, determining whether i is less than N;
S912、i=i+1;S912, i=i+1;
S913、从L条路径中挑选能够通过CRC校验的路径作为译码后序列。S913. Select a path that can pass the CRC check from the L paths as a post-decoding sequence.
在Polar的SCL译码过程中,初始路径置为空路径,将所有路径按比特0或1扩展,并分别更新路径度量值,将路径按路径度量值排序,保留具有最大路径度量值的L条路径,删除其余的路径,在路径的长度达到母码长度N时,按路径度量值从大到小的顺序输出各路径对应的信息比特序列,按输出顺序逐一对各信息比特序列进行CRC校验,以获得译码结果。其中,L为搜索宽度,即最大保存路径数,L大于等于1,在每次进行路径扩展之后,可以根据该搜索宽度对路径进行删除处理。In Polar's SCL decoding process, the initial path is set to an empty path, all paths are expanded by bit 0 or 1, and the path metrics are updated separately, the paths are sorted by path metrics, and the L bars with the largest path metric are retained. Path, delete the remaining paths. When the length of the path reaches the length of the mother code N, the information bit sequence corresponding to each path is output in descending order of the path metric value, and the CRC check is performed one by one for each information bit sequence in the output order. To obtain the decoded result. Where L is the search width, that is, the maximum number of saved paths, and L is greater than or equal to 1. After each path expansion, the path can be deleted according to the search width.
本实施例针对位于译码约束关系中的u i和u j,若u j位于u i之前,则对u i进行译码时,置u i=u j,不进行路径扩展。在本实施例中,为了便于说明,假设两种情况进行说明。一种情况为u 3=u 4,路径扩展示意可如图10A所示,另一种情况为u 3=u 4,路径扩展可如图10B所示。本实施例给出了路径扩展的一种示意,对于其它的路径扩展示意,本实施例此处不再赘述。 When the present embodiment is directed to the constraints in the decoder u i and u j, u j is located before if u i, u i is to be coded, u i = u j is set, a route is not extended. In the present embodiment, for convenience of explanation, two cases will be described. One case is u 3 = u 4 , the path extension is shown in Figure 10A, the other is u 3 = u 4 , and the path extension can be as shown in Figure 10B. This embodiment provides a schematic diagram of path extension. For other path extensions, this embodiment will not be described here.
本实施例通过译码约束关系来进行译码,可以得到可靠的译码路径,提高译码性能。In this embodiment, decoding is performed by decoding a constraint relationship, and a reliable decoding path can be obtained, and decoding performance can be improved.
下面针对仿真结果,通过图11、图12以及图13对本申请实施例所达到的译码性能进行详细说明。具体地,将本实施例提出的基于编码约束关系的速率匹配方案与反序准均匀删余(Reversal Quasi Uniform Puncturing,RQUP)的速率匹配方案进行译码性能的对比。其中,表一列出了一些译码参数:The decoding performance achieved by the embodiment of the present application will be described in detail below with reference to FIG. 11 , FIG. 12 and FIG. 13 . Specifically, the coding matching scheme based on the coding constraint relationship and the rate matching scheme of the Reverse Quasi Uniform Puncturing (RQUP) proposed in this embodiment are compared. Among them, Table 1 lists some decoding parameters:
表一Table I
Figure PCTCN2019083883-appb-000023
Figure PCTCN2019083883-appb-000023
在图11至图13中,其中,RQUP为反序准均匀删余速率匹配方案对应的译码曲线,Pd(Proposed,简称Pd)为本申请实施例提出的基于编码约束关系的译码曲线的改进译码。横坐标Eb/N0为比特信噪比,纵坐标为误码率(Block Error Ratio,BLER),R为码率,K为信息序列长度。In FIG. 11 to FIG. 13 , wherein RQUP is a decoding curve corresponding to a reverse-order quasi-uniform puncturing rate matching scheme, and Pd (Proposed, Pd for short) is a decoding curve based on a coding constraint relationship proposed by the embodiment of the present application. Improved decoding. The abscissa Eb/N0 is the bit signal to noise ratio, the ordinate is the block error ratio (BLER), R is the code rate, and K is the length of the information sequence.
如图11至图13所示,针对相同的码率R和信息序列长度K,在比特信噪比Eb/N0的值相同时,本申请实施例的速率匹配方案对应的误码率明显小于RQUP方案的误码率,本申请实施例相对RQUP而言,有约0.2dB的性能增益。As shown in FIG. 11 to FIG. 13 , for the same code rate R and the information sequence length K, when the value of the bit signal to noise ratio Eb/N0 is the same, the bit error rate corresponding to the rate matching scheme of the embodiment of the present application is significantly smaller than that of the RQUP. The bit error rate of the scheme, the embodiment of the present application has a performance gain of about 0.2 dB with respect to RQUP.
图14为本申请实施例提供的发送设备的结构示意图。如图14所示,该发送设备140包括:编码模块1401、速率匹配模块1402以及发送模块1403。可选地,还包括:关系获取模块1404以及比特属性确定模块1405。FIG. 14 is a schematic structural diagram of a sending device according to an embodiment of the present disclosure. As shown in FIG. 14, the transmitting device 140 includes an encoding module 1401, a rate matching module 1402, and a sending module 1403. Optionally, the method further includes: a relationship obtaining module 1404 and a bit attribute determining module 1405.
编码模块1401,用于根据编码约束关系获取长度为N的待编码序列,并对所述待编码 序列进行极化编码,得到编码后序列,所述编码约束关系用于指示待编码序列中的至少两个约束位置,以及位于所述至少两个约束位置的比特的取值相同;The encoding module 1401 is configured to obtain a sequence to be encoded with a length of N according to a coding constraint relationship, and perform polarization coding on the sequence to be encoded to obtain a coded sequence, where the coding constraint relationship is used to indicate at least a sequence to be coded. Two constraint positions, and the bits at the at least two constraint positions have the same value;
速率匹配模块1402,用于根据速率匹配图样中的匹配位置和所述编码后序列,得到长度为M的速率匹配序列,其中,所述速率匹配图样中包括多个连续的匹配位置,所述编码后序列中所述匹配位置对应的编码比特为0,所述N和所述M为整数,所述M小于N;The rate matching module 1402 is configured to obtain a rate matching sequence of length M according to the matching position in the rate matching pattern and the encoded sequence, where the rate matching pattern includes multiple consecutive matching positions, and the encoding The coded bit corresponding to the matching position in the subsequent sequence is 0, the N and the M are integers, and the M is less than N;
发送模块1403,用于向接收设备发送所述速率匹配序列。The sending module 1403 is configured to send the rate matching sequence to the receiving device.
可选地,所述编码约束关系的数量为至少一个,所述至少一个编码约束关系对应的所有约束位置的数量与所述编码约束关系的数量的差值与所述匹配位置的数量相等。Optionally, the number of the coding constraint relationships is at least one, and a difference between the number of all constraint positions corresponding to the at least one coding constraint relationship and the number of the coding constraint relationships is equal to the number of the matching positions.
可选地,关系获取模块1404,用于在根据编码约束关系获取长度为N的待编码序列之前,根据所述速率匹配图样中的匹配位置从编码矩阵中获取匹配列,其中,所述匹配列在所述编码矩阵中的排序与所述匹配位置在所述速率匹配图样中的排序位置相同;Optionally, the relationship obtaining module 1404 is configured to obtain a matching column from the encoding matrix according to the matching position in the rate matching pattern before acquiring the sequence to be encoded with the length N according to the encoding constraint relationship, where the matching column is obtained. The ordering in the encoding matrix is the same as the sorting position of the matching position in the rate matching pattern;
根据预设构造序列以及与每个匹配位置的排序位置相同的匹配列,获取每个所述匹配位置对应的求解表达式,其中,所述预设构造序列为所述待编码序列的构造序列,所述求解表达式的值为0;Acquiring a solution expression corresponding to each of the matching positions according to a preset configuration sequence and a matching column that is the same as a sorting position of each matching position, where the preset structure sequence is a constructed sequence of the sequence to be encoded, The value of the solution expression is 0;
根据每个所述匹配位置对应的求解表达式,获取所述编码约束关系。And obtaining the coding constraint relationship according to a solution expression corresponding to each of the matching positions.
可选地,所述关系获取模块1404还具体用于:Optionally, the relationship obtaining module 1404 is further specifically configured to:
根据所述速率匹配图样中的匹配位置,从所述编码矩阵中提取初始矩阵;Extracting an initial matrix from the coding matrix according to a matching position in the rate matching pattern;
对所述初始矩阵中的元素1进行高斯消元处理,得到匹配矩阵,所述匹配矩阵中的列为所述匹配列。Gaussian elimination processing is performed on the element 1 in the initial matrix to obtain a matching matrix, and the columns in the matching matrix are the matching columns.
可选地,所述编码模块1401具体用于:Optionally, the encoding module 1401 is specifically configured to:
根据所述编码约束关系、位于所述编码约束关系中的各约束位置的第一比特的属性以及位于所述编码约束关系之外的第二比特的属性,获取所述待编码序列,其中,比特的属性为冻结比特或信息比特。Obtaining the to-be-coded sequence according to the coding constraint relationship, an attribute of a first bit of each constraint position located in the coding constraint relationship, and an attribute of a second bit located outside the coding constraint relationship, where the bit The attributes are frozen bits or information bits.
可选地,比特属性确定模块1404,用于在根据所述编码约束关系、位于所述编码约束关系中的各约束位置的第一比特的属性以及位于所述编码约束关系之外的第二比特的属性,获取所述待编码序列之前,确定预设构造序列中位于所述编码约束关系中的各约束位置的所述第一比特的属性,所述预设构造序列为所述待编码序列的构造序列;Optionally, the bit attribute determining module 1404 is configured to: in accordance with the encoding constraint relationship, an attribute of a first bit located in each constraint position in the encoding constraint relationship, and a second bit located outside the encoding constraint relationship An attribute of the first bit of each constraint position in the coding constraint relationship in the preset configuration sequence before the sequence to be coded is obtained, where the preset structure sequence is the sequence to be coded Construction sequence
确定所述预设构造序列中所述第二比特的属性,其中,所述第二比特为所述预设构造序列中除所述第一比特之外的比特,比特的属性为冻结比特或信息比特。Determining an attribute of the second bit in the preset configuration sequence, where the second bit is a bit other than the first bit in the preset configuration sequence, and the attribute of the bit is a frozen bit or information Bit.
可选地,所述比特属性确定模块1404具体用于:Optionally, the bit attribute determining module 1404 is specifically configured to:
根据预设构造方法在每个所述编码约束关系的各约束位置对应的所述第一比特中确定一个第一信息比特;Determining, according to a preset construction method, a first information bit in the first bit corresponding to each constraint position of each of the coding constraint relationships;
将各约束位置对应的第一比特中除所述第一信息比特之外的第一比特确定为第一冻结比特,其中,所述第一冻结比特的取值满足所述编码约束关系。Determining, in the first bit corresponding to each constraint position, a first bit other than the first information bit as a first frozen bit, wherein the value of the first frozen bit satisfies the coding constraint relationship.
可选地,所述比特属性模块1404具体用于:Optionally, the bit attribute module 1404 is specifically configured to:
根据预设信息比特序列的长度和所述第一信息比特的数量,确定所述第二比特中第二信息比特的数量;Determining, according to the length of the preset information bit sequence and the number of the first information bits, the number of second information bits in the second bit;
根据所述预设构造方法和所述第二信息比特的数量,在所述第二比特中确定所述第二信息比特和第二冻结比特,所述第二冻结比特的取值为预设固定值。Determining, according to the preset configuration method and the number of the second information bits, the second information bit and the second frozen bit in the second bit, where the value of the second frozen bit is preset fixed value.
本实施例提供的发送设备,可用于执行上述方法实施例中发送设备执行的速率匹配方法,其实现原理和技术效果类似,本实施例此处不再赘述。The sending device provided in this embodiment may be used to perform the rate matching method performed by the sending device in the foregoing method, and the implementation principle and the technical effect are similar.
图15为本申请实施例提供的接收设备的结构示意图。如图15所示,该接收设备150包括:接收模块1501、解速率匹配模块1502和译码模块1503。FIG. 15 is a schematic structural diagram of a receiving device according to an embodiment of the present disclosure. As shown in FIG. 15, the receiving device 150 includes: a receiving module 1501, a de-rate matching module 1502, and a decoding module 1503.
接收模块1501,用于接收发送设备发送的长度为M的速率匹配序列;The receiving module 1501 is configured to receive a rate matching sequence of length M sent by the sending device.
解速率匹配模块1502,用于根据速率匹配图样对所述速率匹配序列进行解速率匹配,得到长度为N的待译码序列,所述速率匹配图样中包括多个连续的匹配位置,所述N和所述M为整数,所述M小于N;The rate matching module 1502 is configured to perform rate de-matching on the rate matching sequence according to the rate matching pattern to obtain a sequence to be decoded of length N, where the rate matching pattern includes multiple consecutive matching positions, and the N And said M is an integer, and said M is less than N;
译码模块1503,用于根据译码约束关系对所述待译码序列进行译码,得到译码后序列,所述译码约束关系用于指示待译码序列中的至少两个约束位置,以及位于所述至少两个约束位置的比特的译码结果相同。The decoding module 1503 is configured to decode the to-be-decoded sequence according to a coding constraint relationship to obtain a decoded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be decoded. And the decoding results of the bits located at the at least two constraint positions are the same.
可选地,所述译码约束关系的数量为至少两个,至少两个所述译码约束关系对应的所有约束位置的数量与所述译码约束关系的数量的差值与所述匹配位置的数量相等。Optionally, the number of the coding constraint relationships is at least two, and the difference between the number of all constraint positions corresponding to at least two of the coding constraint relationships and the number of the coding constraint relationships and the matching position The number is equal.
可选地,若所述待译码序列中的第一待译码比特位于所述译码约束关系中的约束位置,所述译码模块1503具体用于:Optionally, if the first to-be-decoded bit in the to-be-decoded sequence is located in a constraint position in the coding constraint relationship, the decoding module 1503 is specifically configured to:
判断与所述第一待译码比特位于同一译码约束关系中的第二待译码比特是否被译码;Determining whether the second to-be-decoded bit in the same coding constraint relationship as the first to-be-decoded bit is decoded;
若是,则将所述第一待译码比特的值设置为与所述第二待译码比特的值相同;If yes, setting the value of the first to-be-decoded bit to be the same as the value of the second to-be-decoded bit;
若否,则对所述第一待译码比特进行译码,得到所述第一待译码比特的值。If not, decoding the first to-be-decoded bit to obtain a value of the first to-be-decoded bit.
本实施例提供的接收设备,可用于执行上述方法实施例中接收设备执行的解速率匹配方法,其实现原理和技术效果类似,本实施例此处不再赘述。The receiving device provided in this embodiment may be used to perform the de-rate matching method performed by the receiving device in the foregoing method embodiment, and the implementation principle and the technical effect are similar.
图16为本申请实施例提供的发送设备的硬件结构示意图。如图16所示,该发送设备160包括:处理器1601以及存储器1602;其中FIG. 16 is a schematic structural diagram of hardware of a sending device according to an embodiment of the present disclosure. As shown in FIG. 16, the transmitting device 160 includes: a processor 1601 and a memory 1602;
存储器1602,用于存储计算机程序;a memory 1602 for storing a computer program;
处理器1601,用于执行存储器存储的计算机程序,以实现上述实施例中发送设备所执行的速率匹配方法。具体可以参见前述方法实施例中的相关描述。The processor 1601 is configured to execute a computer program of the memory storage to implement the rate matching method performed by the transmitting device in the foregoing embodiment. For details, refer to the related description in the foregoing method embodiments.
可选地,存储器1602既可以是独立的,也可以跟处理器1601集成在一起。Alternatively, the memory 1602 can be either independent or integrated with the processor 1601.
当所述存储器1602是独立于处理器1601之外的器件时,所述发送设备160还可以包括:When the memory 1602 is a device other than the processor 1601, the sending device 160 may further include:
总线1603,用于连接所述存储器1602和处理器1601。A bus 1603 is provided for connecting the memory 1602 and the processor 1601.
图16所示的发送设备还可以进一步包括发送器1601,用于发送速率匹配序列等。The transmitting device shown in FIG. 16 may further include a transmitter 1601 for transmitting a rate matching sequence and the like.
可选地,图14所述的关系获取模块、编码模块、速率匹配模块以及比特属性确定模块可以被集成在处理器1601中实现,发送模块可以被集成在发送器1601中实现。Optionally, the relationship obtaining module, the encoding module, the rate matching module, and the bit attribute determining module described in FIG. 14 may be implemented by being integrated in the processor 1601, and the sending module may be implemented by being integrated in the transmitter 1601.
本实施例提供的发送设备,可用于执行上述方法实施例中发送设备执行的速率匹配方法,其实现原理和技术效果类似,本实施例此处不再赘述。The sending device provided in this embodiment may be used to perform the rate matching method performed by the sending device in the foregoing method, and the implementation principle and the technical effect are similar.
图17为本申请实施例提供的接收设备的硬件结构示意图。本实施例的接收设备170包括:处理器1701以及存储器1702;其中FIG. 17 is a schematic structural diagram of hardware of a receiving device according to an embodiment of the present disclosure. The receiving device 170 of this embodiment includes: a processor 1701 and a memory 1702; wherein
存储器1702,用于存储计算机程序;a memory 1702, configured to store a computer program;
处理器1701,用于执行存储器存储的计算机程序,以实现上述实施例中接收设备所执行的各个步骤。具体可以参见前述方法实施例中的相关描述。The processor 1701 is configured to execute a computer program of the memory storage to implement the steps performed by the receiving device in the above embodiment. For details, refer to the related description in the foregoing method embodiments.
可选地,存储器1702既可以是独立的,也可以跟处理器1701集成在一起。Alternatively, the memory 1702 can be either independent or integrated with the processor 1701.
当所述存储器1702是独立于处理器1701之外的器件时,所述接收设备170还可以包括:When the memory 1702 is a device other than the processor 1701, the receiving device 170 may further include:
总线1703,用于连接所述存储器1702和处理器1701。The bus 1703 is configured to connect the memory 1702 and the processor 1701.
图17所示的接收设备还可以进一步包括接收器1704,用于接收速率匹配序列等。The receiving device shown in FIG. 17 may further include a receiver 1704 for receiving a rate matching sequence and the like.
可选地,图15所述的接收模块可以被集成在接收器1704中实现,解速率匹配模块和译码模块可以被集成在处理器1701中实现。Alternatively, the receiving module described in FIG. 15 may be implemented in the receiver 1704, and the de-rate matching module and the decoding module may be implemented in the processor 1701.
本实施例提供的接收设备,可用于执行上述实例接收设备所执行的解速率匹配方法,其实现原理和技术效果类似,本实施例此处不再赘述。The receiving device provided in this embodiment may be used to perform the de-rate matching method performed by the receiving device in the foregoing example, and the implementation principle and the technical effect are similar.
本申请实施例还提供一种存储介质,所述存储介质包括计算机程序,所述计算机程序用于实现如上实施例中第一设备所执行的编码方式的指示方法。The embodiment of the present application further provides a storage medium, where the storage medium includes a computer program, and the computer program is used to implement an indication method of an encoding mode performed by the first device in the foregoing embodiment.
本申请实施例还提供一种存储介质,所述存储介质包括计算机程序,所述计算机程序用于实现如上实施例中第二设备所执行的编码方式的指示方法。The embodiment of the present application further provides a storage medium, where the storage medium includes a computer program, and the computer program is used to implement the indication method of the encoding mode performed by the second device in the above embodiment.
本申请实施例还提供一种计算机程序产品,所述计算机程序产品包括计算机程序代码,当所述计算机程序代码在计算机上运行时,使得计算机执行如上第一设备所执行的编码方式的指示方法。The embodiment of the present application further provides a computer program product, the computer program product comprising computer program code, when the computer program code is run on a computer, causing the computer to execute the indication method of the coding mode performed by the first device.
本申请实施例还提供一种芯片,包括存储器和处理器,所述存储器用于存储计算机程序,所述处理器用于从所述存储器中调用并运行所述计算机程序,使得安装有所述芯片的通信设备执行如上第一设备所执行的编码方式的指示方法。The embodiment of the present application further provides a chip, including a memory and a processor, the memory is used to store a computer program, and the processor is configured to call and run the computer program from the memory, so that the chip is installed The communication device performs the indication method of the encoding mode performed by the first device as above.
本申请实施例还提供一种计算机程序产品,所述计算机程序产品包括计算机程序代码,当所述计算机程序代码在计算机上运行时,使得计算机执行如上第二设备所执行的编码方式的指示方法。The embodiment of the present application further provides a computer program product, the computer program product comprising computer program code, when the computer program code is run on a computer, causing the computer to execute the indication method of the coding mode performed by the second device.
本申请实施例还提供一种芯片,包括存储器和处理器,所述存储器用于存储计算机程序,所述处理器用于从所述存储器中调用并运行所述计算机程序,使得安装有所述芯片的通信设备执行如上第二设备所执行的编码方式的指示方法。The embodiment of the present application further provides a chip, including a memory and a processor, the memory is used to store a computer program, and the processor is configured to call and run the computer program from the memory, so that the chip is installed The communication device performs the indication method of the encoding mode performed by the second device as above.
在本发明所提供的几个实施例中,应该理解到,所揭露的设备和方法,可以通过其它的方式实现。例如,以上所描述的设备实施例仅仅是示意性的,例如,所述模块的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个模块可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一点,所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或模块的间接耦合或通信连接,可以是电性,机械或其它的形式。In the several embodiments provided by the present invention, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the device embodiments described above are only illustrative. For example, the division of the modules is only a logical function division. In actual implementation, there may be another division manner. For example, multiple modules may be combined or integrated. Go to another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or module, and may be electrical, mechanical or otherwise.
所述作为分离部件说明的模块可以是或者也可以不是物理上分开的,作为模块显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。The modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
另外,在本发明各个实施例中的各功能模块可以集成在一个处理单元中,也可以是各个模块单独物理存在,也可以两个或两个以上模块集成在一个单元中。上述模块成的单元既可以采用硬件的形式实现,也可以采用硬件加软件功能单元的形式实现。In addition, each functional module in each embodiment of the present invention may be integrated into one processing unit, or each module may exist physically separately, or two or more modules may be integrated into one unit. The unit formed by the above module can be implemented in the form of hardware or in the form of hardware plus software functional units.
上述以软件功能模块的形式实现的集成的模块,可以存储在一个计算机可读取存储介质中。上述软件功能模块存储在一个存储介质中,包括若干指令用以使得一台计算机设备 (可以是个人计算机,服务器,或者网络设备等)或处理器(英文:processor)执行本申请各个实施例所述方法的部分步骤。The above-described integrated modules implemented in the form of software function modules can be stored in a computer readable storage medium. The software function module is stored in a storage medium, and includes a plurality of instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (English: processor) to perform the embodiments of the present application. Part of the steps of the method.
应理解,上述处理器可以是中央处理单元(英文:Central Processing Unit,简称:CPU),还可以是其他通用处理器、数字信号处理器(英文:Digital Signal Processor,简称:DSP)、专用集成电路(英文:Application Specific Integrated Circuit,简称:ASIC)等。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合发明所公开的方法的步骤可以直接体现为硬件处理器执行完成,或者用处理器中的硬件及软件模块组合执行完成。It should be understood that the foregoing processor may be a central processing unit (English: Central Processing Unit, CPU for short), or may be other general-purpose processors, digital signal processors (English: Digital Signal Processor, referred to as DSP), ASICs. (English: Application Specific Integrated Circuit, ASIC for short). The general purpose processor may be a microprocessor or the processor or any conventional processor or the like. The steps of the method disclosed in connection with the invention may be directly embodied by the execution of the hardware processor or by a combination of hardware and software modules in the processor.
存储器可能包含高速RAM存储器,也可能还包括非易失性存储NVM,例如至少一个磁盘存储器,还可以为U盘、移动硬盘、只读存储器、磁盘或光盘等。The memory may include high speed RAM memory, and may also include non-volatile memory NVM, such as at least one disk memory, and may also be a USB flash drive, a removable hard disk, a read only memory, a magnetic disk, or an optical disk.
总线可以是工业标准体系结构(Industry Standard Architecture,ISA)总线、外部设备互连(Peripheral Component,PCI)总线或扩展工业标准体系结构(Extended Industry Standard Architecture,EISA)总线等。总线可以分为地址总线、数据总线、控制总线等。为便于表示,本申请附图中的总线并不限定仅有一根总线或一种类型的总线。The bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus. The bus can be divided into an address bus, a data bus, a control bus, and the like. For ease of representation, the bus in the drawings of the present application is not limited to only one bus or one type of bus.
上述存储介质可以是由任何类型的易失性或非易失性存储设备或者它们的组合实现,如静态随机存取存储器(SRAM),电可擦除可编程只读存储器(EEPROM),可擦除可编程只读存储器(EPROM),可编程只读存储器(PROM),只读存储器(ROM),磁存储器,快闪存储器,磁盘或光盘。存储介质可以是通用或专用计算机能够存取的任何可用介质。The above storage medium may be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read only memory (EEPROM), erasable In addition to Programmable Read Only Memory (EPROM), Programmable Read Only Memory (PROM), Read Only Memory (ROM), Magnetic Memory, Flash Memory, Disk or Optical Disk. A storage medium may be any available media that can be accessed by a general purpose or special purpose computer.
一种示例性的存储介质耦合至处理器,从而使处理器能够从该存储介质读取信息,且可向该存储介质写入信息。当然,存储介质也可以是处理器的组成部分。处理器和存储介质可以位于专用集成电路(Application Specific Integrated Circuits,简称:ASIC)中。当然,处理器和存储介质也可以作为分立组件存在于电子设备或主控设备中。An exemplary storage medium is coupled to the processor to enable the processor to read information from, and write information to, the storage medium. Of course, the storage medium can also be an integral part of the processor. The processor and the storage medium may be located in an Application Specific Integrated Circuits (ASIC). Of course, the processor and the storage medium can also exist as discrete components in the electronic device or the master device.

Claims (29)

  1. 一种极化码的速率匹配方法,其特征在于,包括:A rate matching method for a polarization code, comprising:
    根据编码约束关系获取长度为N的待编码序列,并对所述待编码序列进行极化编码,得到编码后序列,所述编码约束关系用于指示待编码序列中的至少两个约束位置,以及位于所述至少两个约束位置的比特的取值相同;Obtaining a sequence to be coded with a length of N according to a coding constraint relationship, and performing polarization coding on the sequence to be coded to obtain a coded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be coded, and The bits located at the at least two constraint positions have the same value;
    根据速率匹配图样中的匹配位置和所述编码后序列,得到长度为M的速率匹配序列,其中,所述速率匹配图样中包括多个连续的匹配位置,所述编码后序列中所述匹配位置对应的编码比特为0,所述N和所述M为整数,所述M小于N;And obtaining, according to the matching position in the rate matching pattern and the encoded sequence, a rate matching sequence of length M, wherein the rate matching pattern includes a plurality of consecutive matching positions, and the matching position in the encoded sequence Corresponding coded bits are 0, the N and the M are integers, and the M is less than N;
    向接收设备发送所述速率匹配序列。The rate matching sequence is sent to the receiving device.
  2. 根据权利要求1所述的方法,其特征在于,所述编码约束关系的数量为至少一个,所述至少一个编码约束关系对应的所有约束位置的数量与所述编码约束关系的数量的差值与所述匹配位置的数量相等。The method according to claim 1, wherein the number of the encoding constraint relationships is at least one, and the difference between the number of all constraint positions corresponding to the at least one encoding constraint relationship and the number of the encoding constraint relationships is The number of matching locations is equal.
  3. 根据权利要求1或2所述的方法,其特征在于,所述根据编码约束关系获取长度为N的待编码序列之前,所述方法还包括:The method according to claim 1 or 2, wherein before the obtaining the sequence to be encoded of length N according to the coding constraint relationship, the method further comprises:
    根据所述速率匹配图样中的匹配位置从编码矩阵中获取匹配列,其中,所述匹配列在所述编码矩阵中的排序与所述匹配位置在所述速率匹配图样中的排序位置相同;And obtaining a matching column from the encoding matrix according to the matching position in the rate matching pattern, wherein the sorting of the matching column in the encoding matrix is the same as the sorting position of the matching position in the rate matching pattern;
    根据预设构造序列以及与每个匹配位置的排序位置相同的匹配列,获取每个所述匹配位置对应的求解表达式,其中,所述预设构造序列为所述待编码序列的构造序列,所述求解表达式的值为0;Acquiring a solution expression corresponding to each of the matching positions according to a preset configuration sequence and a matching column that is the same as a sorting position of each matching position, where the preset structure sequence is a constructed sequence of the sequence to be encoded, The value of the solution expression is 0;
    根据每个所述匹配位置对应的求解表达式,获取所述编码约束关系。And obtaining the coding constraint relationship according to a solution expression corresponding to each of the matching positions.
  4. 根据权利要求3所述的方法,其特征在于,所述根据所述速率匹配图样中的匹配位置从编码矩阵中获取匹配列,包括:The method according to claim 3, wherein the obtaining a matching column from the coding matrix according to the matching position in the rate matching pattern comprises:
    根据所述速率匹配图样中的匹配位置,从所述编码矩阵中提取初始矩阵;Extracting an initial matrix from the coding matrix according to a matching position in the rate matching pattern;
    对所述初始矩阵中的元素1进行高斯消元处理,得到匹配矩阵,所述匹配矩阵中的列为所述匹配列。Gaussian elimination processing is performed on the element 1 in the initial matrix to obtain a matching matrix, and the columns in the matching matrix are the matching columns.
  5. 根据权利要求1至4任一项所述的方法,其特征在于,所述根据编码约束关系获取长度为N的待编码序列,包括:The method according to any one of claims 1 to 4, wherein the acquiring the sequence to be encoded of length N according to the coding constraint relationship comprises:
    根据所述编码约束关系、位于所述编码约束关系中的各约束位置的第一比特的属性以及位于所述编码约束关系之外的第二比特的属性,获取所述待编码序列,其中,比特的属性为冻结比特或信息比特。Obtaining the to-be-coded sequence according to the coding constraint relationship, an attribute of a first bit of each constraint position located in the coding constraint relationship, and an attribute of a second bit located outside the coding constraint relationship, where the bit The attributes are frozen bits or information bits.
  6. 根据权利要求5所述的方法,其特征在于,所述根据所述编码约束关系、位于所述编码约束关系中的各约束位置的第一比特的属性以及位于所述编码约束关系之外的第二比特的属性,获取所述待编码序列之前,所述方法还包括:The method according to claim 5, wherein said attribute according to said coding constraint relationship, said first bit of each constraint position located in said coding constraint relationship, and said parameter other than said coding constraint relationship The method of the two-bit, before acquiring the sequence to be encoded, the method further includes:
    确定预设构造序列中位于所述编码约束关系中的各约束位置的所述第一比特的属性,所述预设构造序列为所述待编码序列的构造序列;Determining an attribute of the first bit of each constraint position in the encoding constraint relationship in a preset configuration sequence, where the preset construction sequence is a constructed sequence of the sequence to be encoded;
    确定所述预设构造序列中所述第二比特的属性,其中,所述第二比特为所述预设构造序列中除所述第一比特之外的比特,比特的属性为冻结比特或信息比特。Determining an attribute of the second bit in the preset configuration sequence, where the second bit is a bit other than the first bit in the preset configuration sequence, and the attribute of the bit is a frozen bit or information Bit.
  7. 根据权利要求6所述的方法,其特征在于,所述确定预设构造序列中位于所述编 码约束关系中的各约束位置的第一比特的属性,包括:The method according to claim 6, wherein the determining the attributes of the first bit of each constraint position in the coding constraint relationship in the preset configuration sequence comprises:
    根据预设构造方法在每个所述编码约束关系的各约束位置对应的所述第一比特中确定一个第一信息比特;Determining, according to a preset construction method, a first information bit in the first bit corresponding to each constraint position of each of the coding constraint relationships;
    将各约束位置对应的第一比特中除所述第一信息比特之外的第一比特确定为第一冻结比特,其中,所述第一冻结比特的取值满足所述编码约束关系。Determining, in the first bit corresponding to each constraint position, a first bit other than the first information bit as a first frozen bit, wherein the value of the first frozen bit satisfies the coding constraint relationship.
  8. 根据权利要求7所述的方法,其特征在于,所述确定所述预设构造序列中第二比特的属性,包括:The method according to claim 7, wherein the determining the attribute of the second bit in the preset configuration sequence comprises:
    根据预设信息比特序列的长度和所述第一信息比特的数量,确定所述第二比特中第二信息比特的数量;Determining, according to the length of the preset information bit sequence and the number of the first information bits, the number of second information bits in the second bit;
    根据所述预设构造方法和所述第二信息比特的数量,在所述第二比特中确定所述第二信息比特和第二冻结比特,所述第二冻结比特的取值为预设固定值。Determining, according to the preset configuration method and the number of the second information bits, the second information bit and the second frozen bit in the second bit, where the value of the second frozen bit is preset fixed value.
  9. 一种极化码的解速率匹配方法,其特征在于,包括:A method for de-rate matching of a polarization code, comprising:
    接收发送设备发送的长度为M的速率匹配序列;Receiving a rate matching sequence of length M sent by the sending device;
    根据速率匹配图样对所述速率匹配序列进行解速率匹配,得到长度为N的待译码序列,所述速率匹配图样中包括多个连续的匹配位置,所述N和所述M为整数,所述M小于N;The rate matching sequence is de-rate matched according to the rate matching pattern to obtain a sequence to be decoded of length N, where the rate matching pattern includes a plurality of consecutive matching positions, and the N and the M are integers. Said M is less than N;
    根据译码约束关系对所述待译码序列进行译码,得到译码后序列,所述译码约束关系用于指示待译码序列中的至少两个约束位置,以及位于所述至少两个约束位置的比特的译码结果相同。Decoding the sequence to be decoded according to a coding constraint relationship to obtain a decoded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be decoded, and at least two The decoding result of the bits of the constraint position is the same.
  10. 根据权利要求9所述的方法,其特征在于,所述译码约束关系的数量为至少两个,至少两个所述译码约束关系对应的所有约束位置的数量与所述译码约束关系的数量的差值与所述匹配位置的数量相等。The method according to claim 9, wherein the number of the decoding constraint relationships is at least two, and the number of all the constraint positions corresponding to at least two of the coding constraint relationships is related to the coding constraint relationship. The difference in the number is equal to the number of matching positions.
  11. 根据权利要求9或10所述的方法,其特征在于,若所述待译码序列中的第一待译码比特位于所述译码约束关系中的约束位置,所述根据所述译码约束关系对所述待译码序列进行译码,包括:The method according to claim 9 or 10, wherein if the first to-be-decoded bit in the sequence to be decoded is located at a constraint position in the coding constraint relationship, the decoding constraint is The relationship decodes the sequence to be decoded, including:
    判断与所述第一待译码比特位于同一译码约束关系中的第二待译码比特是否被译码;Determining whether the second to-be-decoded bit in the same coding constraint relationship as the first to-be-decoded bit is decoded;
    若是,则将所述第一待译码比特的值设置为与所述第二待译码比特的值相同;If yes, setting the value of the first to-be-decoded bit to be the same as the value of the second to-be-decoded bit;
    若否,则对所述第一待译码比特进行译码,得到所述第一待译码比特的值。If not, decoding the first to-be-decoded bit to obtain a value of the first to-be-decoded bit.
  12. 一种发送设备,其特征在于,包括:A transmitting device, comprising:
    编码模块,用于根据编码约束关系获取长度为N的待编码序列,并对所述待编码序列进行极化编码,得到编码后序列,所述编码约束关系用于指示待编码序列中的至少两个约束位置,以及位于所述至少两个约束位置的比特的取值相同;An encoding module, configured to obtain a sequence to be encoded with a length of N according to a coding constraint relationship, and perform polarization coding on the sequence to be coded to obtain a coded sequence, where the coding constraint relationship is used to indicate at least two of the sequences to be coded. Constrained positions, and the bits at the at least two constraint positions have the same value;
    速率匹配模块,用于根据速率匹配图样中的匹配位置和所述编码后序列,得到长度为M的速率匹配序列,其中,所述速率匹配图样中包括多个连续的匹配位置,所述编码后序列中所述匹配位置对应的编码比特为0,所述N和所述M为整数,所述M小于N;a rate matching module, configured to obtain a rate matching sequence of length M according to the matching position in the rate matching pattern and the encoded sequence, where the rate matching pattern includes multiple consecutive matching positions, after the encoding The coded bit corresponding to the matching position in the sequence is 0, the N and the M are integers, and the M is less than N;
    发送模块,用于向接收设备发送所述速率匹配序列。And a sending module, configured to send the rate matching sequence to the receiving device.
  13. 根据权利要求12所述的设备,其特征在于,所述编码约束关系的数量为至少一个,所述至少一个编码约束关系对应的所有约束位置的数量与所述编码约束关系的数量的差值与所述匹配位置的数量相等。The device according to claim 12, wherein the number of the coding constraint relationships is at least one, and the difference between the number of all constraint positions corresponding to the at least one coding constraint relationship and the number of the coding constraint relationships is The number of matching locations is equal.
  14. 根据权利要求12或13所述的设备,其特征在于,还包括:关系获取模块,用于 在根据编码约束关系获取长度为N的待编码序列之前,根据所述速率匹配图样中的匹配位置从编码矩阵中获取匹配列,其中,所述匹配列在所述编码矩阵中的排序与所述匹配位置在所述速率匹配图样中的排序位置相同;The device according to claim 12 or 13, further comprising: a relationship obtaining module, configured to match the matching position in the pattern according to the rate before acquiring the sequence to be encoded of length N according to the encoding constraint relationship Obtaining a matching column in the encoding matrix, wherein the sorting of the matching column in the encoding matrix is the same as the sorting position of the matching position in the rate matching pattern;
    根据预设构造序列以及与每个匹配位置的排序位置相同的匹配列,获取每个所述匹配位置对应的求解表达式,其中,所述预设构造序列为所述待编码序列的构造序列,所述求解表达式的值为0;Acquiring a solution expression corresponding to each of the matching positions according to a preset configuration sequence and a matching column that is the same as a sorting position of each matching position, where the preset structure sequence is a constructed sequence of the sequence to be encoded, The value of the solution expression is 0;
    根据每个所述匹配位置对应的求解表达式,获取所述编码约束关系。And obtaining the coding constraint relationship according to a solution expression corresponding to each of the matching positions.
  15. 根据权利要求14所述的设备,其特征在于,所述关系获取模块还具体用于:The device according to claim 14, wherein the relationship obtaining module is further configured to:
    根据所述速率匹配图样中的匹配位置,从所述编码矩阵中提取初始矩阵;Extracting an initial matrix from the coding matrix according to a matching position in the rate matching pattern;
    对所述初始矩阵中的元素1进行高斯消元处理,得到匹配矩阵,所述匹配矩阵中的列为所述匹配列。Gaussian elimination processing is performed on the element 1 in the initial matrix to obtain a matching matrix, and the columns in the matching matrix are the matching columns.
  16. 根据权利要求12至15任一项所述的设备,其特征在于,所述编码模块具体用于:The device according to any one of claims 12 to 15, wherein the encoding module is specifically configured to:
    根据所述编码约束关系、位于所述编码约束关系中的各约束位置的第一比特的属性以及位于所述编码约束关系之外的第二比特的属性,获取所述待编码序列,其中,比特的属性为冻结比特或信息比特。Obtaining the to-be-coded sequence according to the coding constraint relationship, an attribute of a first bit of each constraint position located in the coding constraint relationship, and an attribute of a second bit located outside the coding constraint relationship, where the bit The attributes are frozen bits or information bits.
  17. 根据权利要求16所述的设备,其特征在于,还包括:比特属性确定模块,用于在根据所述编码约束关系、位于所述编码约束关系中的各约束位置的第一比特的属性以及位于所述编码约束关系之外的第二比特的属性,获取所述待编码序列之前,确定预设构造序列中位于所述编码约束关系中的各约束位置的所述第一比特的属性,所述预设构造序列为所述待编码序列的构造序列;The apparatus according to claim 16, further comprising: a bit attribute determining module, configured to attribute and locate the first bit of each constraint position located in said encoding constraint relationship according to said encoding constraint relationship Attributes of the second bit other than the coding constraint relationship, before acquiring the to-be-coded sequence, determining attributes of the first bit of each constraint position in the coding constraint relationship in the preset configuration sequence, a preset construction sequence is a constructed sequence of the sequence to be encoded;
    确定所述预设构造序列中所述第二比特的属性,其中,所述第二比特为所述预设构造序列中除所述第一比特之外的比特,比特的属性为冻结比特或信息比特。Determining an attribute of the second bit in the preset configuration sequence, where the second bit is a bit other than the first bit in the preset configuration sequence, and the attribute of the bit is a frozen bit or information Bit.
  18. 根据权利要求17所述的设备,其特征在于,所述比特属性确定模块具体用于:The device according to claim 17, wherein the bit attribute determining module is specifically configured to:
    根据预设构造方法在每个所述编码约束关系的各约束位置对应的所述第一比特中确定一个第一信息比特;Determining, according to a preset construction method, a first information bit in the first bit corresponding to each constraint position of each of the coding constraint relationships;
    将各约束位置对应的第一比特中除所述第一信息比特之外的第一比特确定为第一冻结比特,其中,所述第一冻结比特的取值满足所述编码约束关系。Determining, in the first bit corresponding to each constraint position, a first bit other than the first information bit as a first frozen bit, wherein the value of the first frozen bit satisfies the coding constraint relationship.
  19. 根据权利要求18所述的设备,其特征在于,所述比特属性模块具体用于:The device according to claim 18, wherein the bit attribute module is specifically configured to:
    根据预设信息比特序列的长度和所述第一信息比特的数量,确定所述第二比特中第二信息比特的数量;Determining, according to the length of the preset information bit sequence and the number of the first information bits, the number of second information bits in the second bit;
    根据所述预设构造方法和所述第二信息比特的数量,在所述第二比特中确定所述第二信息比特和第二冻结比特,所述第二冻结比特的取值为预设固定值。Determining, according to the preset configuration method and the number of the second information bits, the second information bit and the second frozen bit in the second bit, where the value of the second frozen bit is preset fixed value.
  20. 一种接收设备,其特征在于,包括:A receiving device, comprising:
    接收模块,用于接收发送设备发送的长度为M的速率匹配序列;a receiving module, configured to receive a rate matching sequence of length M sent by the sending device;
    解速率匹配模块,用于根据速率匹配图样对所述速率匹配序列进行解速率匹配,得到长度为N的待译码序列,所述速率匹配图样中包括多个连续的匹配位置,所述N和所述M为整数,所述M小于N;a rate matching module, configured to perform rate de-matching on the rate matching sequence according to the rate matching pattern, to obtain a sequence to be decoded of length N, where the rate matching pattern includes multiple consecutive matching positions, where the N and The M is an integer, and the M is less than N;
    译码模块,用于根据译码约束关系对所述待译码序列进行译码,得到译码后序列,所述译码约束关系用于指示待译码序列中的至少两个约束位置,以及位于所述至少两个约束 位置的比特的译码结果相同。a decoding module, configured to decode the to-be-decoded sequence according to a coding constraint relationship, to obtain a decoded sequence, where the coding constraint relationship is used to indicate at least two constraint positions in the sequence to be decoded, and The decoding results of the bits located at the at least two constraint positions are the same.
  21. 根据权利要求20所述的设备,其特征在于,所述译码约束关系的数量为至少两个,至少两个所述译码约束关系对应的所有约束位置的数量与所述译码约束关系的数量的差值与所述匹配位置的数量相等。The apparatus according to claim 20, wherein the number of the decoding constraint relationships is at least two, and the number of all the constraint positions corresponding to at least two of the coding constraint relationships is related to the coding constraint relationship. The difference in the number is equal to the number of matching positions.
  22. 根据权利要求20或21所述的设备,其特征在于,若所述待译码序列中的第一待译码比特位于所述译码约束关系中的约束位置,所述译码模块具体用于:The device according to claim 20 or 21, wherein if the first to-be-decoded bit in the sequence to be decoded is located at a constraint position in the coding constraint relationship, the decoding module is specifically used for :
    判断与所述第一待译码比特位于同一译码约束关系中的第二待译码比特是否被译码;Determining whether the second to-be-decoded bit in the same coding constraint relationship as the first to-be-decoded bit is decoded;
    若是,则将所述第一待译码比特的值设置为与所述第二待译码比特的值相同;If yes, setting the value of the first to-be-decoded bit to be the same as the value of the second to-be-decoded bit;
    若否,则对所述第一待译码比特进行译码,得到所述第一待译码比特的值。If not, decoding the first to-be-decoded bit to obtain a value of the first to-be-decoded bit.
  23. 一种发送设备,其特征在于,包括:存储器和处理器,所述存储器用于存储计算机程序,所述处理器用于从所述存储器中调用并运行所述计算机程序,使得所述处理器运行所述计算机程序执行如权利要求1至8任一项所述的速率匹配方法。A transmitting device, comprising: a memory for storing a computer program, the processor for calling and running the computer program from the memory, such that the processor operates The computer program performs the rate matching method according to any one of claims 1 to 8.
  24. 一种接收设备,其特征在于,包括:存储器、处理器以及计算机程序,所述计算机程序存储在所述存储器中,所述处理器运行所述计算机程序执行如权利要求9至11任一项所述的解速率匹配方法。A receiving device, comprising: a memory, a processor, and a computer program, wherein the computer program is stored in the memory, the processor running the computer program to perform as claimed in any one of claims 9 to The solution rate matching method described.
  25. 一种存储介质,其特征在于,所述存储介质包括计算机程序,所述计算机程序用于实现如权利要求1至8任一项所述的速率匹配方法,或者,所述计算机程序用于实现如权利要求9至11任一项所述的解速率匹配方法。A storage medium, characterized in that the storage medium comprises a computer program for implementing the rate matching method according to any one of claims 1 to 8, or the computer program is used to implement The de-rate matching method according to any one of claims 9 to 11.
  26. 一种计算机程序产品,其特征在于,所述计算机程序产品包括计算机程序代码,当所述计算机程序代码在计算机上运行时,使得计算机执行如权利要求1至8任一项所述的速率匹配方法,或者,执行如权利要求9至11任一项所述的解速率匹配方法。A computer program product, comprising: computer program code, causing a computer to perform the rate matching method according to any one of claims 1 to 8 when the computer program code is run on a computer Or, the de-rate matching method according to any one of claims 9 to 11 is performed.
  27. 一种芯片,其特征在于,包括存储器和处理器,所述存储器用于存储计算机程序,所述处理器用于从所述存储器中调用并运行所述计算机程序,使得所述处理器执行如权利要求1至8任一项所述的速率匹配方法,或者,执行如权利要求9至11任一项所述的解速率匹配方法。A chip, comprising: a memory for storing a computer program, the processor for calling and running the computer program from the memory, such that the processor executes the claim The rate matching method according to any one of claims 1 to 8, or the de-rate matching method according to any one of claims 9 to 11.
  28. 一种编码装置,其特征在于,所述装置用于执行权利要求1-8任意一项所述的方法。An encoding device for performing the method of any of claims 1-8.
  29. 一种译码装置,其特征在于,所述装置用于执行权利要求9-11任意一项所述的方法。A decoding device for performing the method of any one of claims 9-11.
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