WO2014153861A1 - Coa阵列基板的制备方法、阵列基板及显示装置 - Google Patents

Coa阵列基板的制备方法、阵列基板及显示装置 Download PDF

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WO2014153861A1
WO2014153861A1 PCT/CN2013/077492 CN2013077492W WO2014153861A1 WO 2014153861 A1 WO2014153861 A1 WO 2014153861A1 CN 2013077492 W CN2013077492 W CN 2013077492W WO 2014153861 A1 WO2014153861 A1 WO 2014153861A1
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array substrate
layer
hole
color filter
substrate
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PCT/CN2013/077492
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English (en)
French (fr)
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齐永莲
舒适
惠官宝
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京东方科技集团股份有限公司
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Priority to US14/351,639 priority Critical patent/US9893129B2/en
Publication of WO2014153861A1 publication Critical patent/WO2014153861A1/zh
Priority to US15/861,002 priority patent/US20180130860A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • Embodiments of the present invention relate to the field of liquid crystal display technologies, and in particular, to a method for fabricating a COA (color filter on array) array substrate, an array substrate, and a display device.
  • a COA color filter on array
  • the COA array substrate is formed by forming the color filter layer 13 on the TFT substrate 1 including the substrate 111 and the thin film transistor (TFT) 112. With this design, the width of the black matrix can be reduced, and the aperture ratio of the display region can be improved.
  • the structure of the existing COA array substrate is as shown in FIG. 1, and FIG. 2 is a schematic view of an exposure process for forming the via 15.
  • the method of fabricating the color filter layer on the TFT substrate is mainly through a patterning process or an inkjet printing method.
  • the inkjet printing method used separately requires a separate wall structure, and the color filter layer 13 is formed (color filter)
  • Embodiments of the present invention provide a method of fabricating an array substrate, an array substrate, and a display device that can reduce manufacturing processes, reduce costs, and improve production efficiency.
  • a method of fabricating a COA array substrate comprising a TFT substrate and a color filter layer disposed on the TFT substrate, the method comprising the steps of: forming a protection on the TFT substrate Coating a photoresist layer on the protective layer, the photoresist layer simultaneously serving as a planarization layer, wherein the TFT substrate comprises a substrate and a thin film transistor; forming a color film receiving hole in the photoresist layer by a photolithography process ; Make a color filter layer in the color film receiving hole.
  • the fluidity of the photoresist layer is good, so the step difference is small, so the photoresist layer can simultaneously serve as a planarization layer, and the photoresist layer is exposed and developed by a patterning process to form a pattern including the color film receiving hole.
  • the process steps are single, while saving costs.
  • a COA array substrate comprising a photoresist layer 21 on a protective layer 12, wherein the photoresist layer 21 serves as a planarization layer simultaneously, and is formed in the photoresist layer.
  • the color film accommodating hole 32 is formed with a color filter layer 13 formed in the color film accommodating hole 32.
  • the photoresist layer of the array substrate of the present invention not only forms a color film receiving hole therein but also serves as a planarization layer, the cost of the array substrate is low.
  • a display device comprising the above COA array substrate. Since the display device includes the above array substrate, the cost is low, and the manufacturing process steps are completed.
  • 1 is a schematic view of a conventional COA array substrate
  • FIG. 2 is a schematic view showing exposure of a photoresist layer of a COA array substrate in the method for fabricating an array substrate according to Embodiment 1 of the present invention
  • FIG. 3 is a schematic view showing exposure of a photoresist layer of a COA array substrate in a method for preparing a COA array substrate according to Embodiment 1 of the present invention
  • FIG. 4 is a schematic diagram of fabricating a color filter layer of a COA array substrate in a method for preparing a COA array substrate according to Embodiment 1 of the present invention
  • FIG. 5 is a schematic view showing a via hole formed on a COA array substrate in a method for fabricating a COA array substrate according to Embodiment 1 of the present invention.
  • the reference numerals are: 11, TFT substrate; 111, substrate; 112, thin film transistor; 12, protective layer; 13, color filter layer; 14, planarization layer; 15, via; 21, photoresist layer; 22, a mask; 31, a first through hole; 32, a color film receiving hole.
  • this embodiment provides a method for preparing a COA array substrate, including:
  • Step 1 First, a thin film transistor 112, a metal wire, and the like are fabricated on the substrate 111, and the TFT substrate 11 is fabricated. A protective layer 12 is formed on the TFT substrate 11 to protect the substrate.
  • Step 2 Applying a photoresist layer 21 on the protective layer 12, and exposing the photoresist layer 21 by using a mask 22 by a patterning process, the exposed region is a color pixel region, and the color pixel region is developed after exposure, and then baked.
  • the color film receiving hole 32 is formed, and the photoresist layer 21 serves as the planarization layer 14 at the same time.
  • Step 3 Add a dye to the color film receiving hole 32 to form a color filter layer 13.
  • the photoresist layer 21 can simultaneously serve as the planarization layer 14, and thus the planarization layer 14 is not required, so that the fabrication process is tubular, the production efficiency is improved, and the cost is reduced.
  • the forming the color filter layer in the color film receiving hole 32 comprises: forming a color filter layer 13 in the color film receiving hole 32 by an inkjet method.
  • the color film receiving hole 32 is formed by exposing and developing the photoresist layer 21 by a patterning process, and a positive photoresist is used for the color film receiving hole 32, and after the other portions are developed.
  • the photoresist still exists (if the negative photoresist is used, the area where the color film receiving hole 32 is located is not illuminated, the other parts are illuminated, and the other portions are developed after the development, and the photolithography still exists), so the remaining photolithography
  • the glue layer 21 actually forms a retaining wall.
  • the color filter layer 13 is formed by the inkjet method, and the retaining wall is not separately produced. Compared with the existing preparation method, the step of making the retaining wall is omitted, and the production can be greatly improved. Efficiency, reducing production costs.
  • the COA array substrate is an OLED array substrate
  • the step 2 includes: forming a color film receiving hole 32 and a first through hole 31 by using a patterning process, the first through hole 31 penetrating the flat layer 14, see FIG. ;
  • the protective layer 12 of the first via hole 31 is etched to form a via 15 exposing the drain on the thin film transistor 112. See FIG. 5;
  • the method further includes: forming an OLED anode on the color filter layer 13, wherein the OLED anode is connected to the drain of the thin film transistor 112 through the via hole 15.
  • the anode of the OLED can also be fabricated on the TFT substrate 11, and the anode of the OLED can be Directly connected to the drain of the thin film transistor 112, it is not necessary to form the via 15 by a patterning process.
  • the array substrate is a TFT-LCD array substrate, and the step 2 includes: forming a color film receiving hole 32 and a first through hole 31 by using a patterning process, the first through hole 31 penetrating through the flat layer 14, see image 3;
  • the protective layer 12 of the first via hole 31 is etched to form a via 15 exposing the drain of the thin film transistor 112. See FIG. 5;
  • the method further includes: forming a pixel electrode on the color filter layer 13, and the pixel electrode is connected to the drain of the thin film transistor 112 through the via hole 15.
  • the pixel electrode can also be formed on the TFT substrate 11, and the pixel electrode can be directly connected to the drain of the thin film transistor 112, so that the via hole 15 does not need to be formed by a patterning process.
  • Example 2
  • the present invention provides an array substrate including a photoresist layer 21 on the protective layer 12, the photoresist layer 21 serves as a planarization layer 14 at the same time, and a color film receiving hole 32 is formed in the photoresist 21.
  • a color filter layer 13 is formed in the color film receiving hole 32.
  • the photoresist acts as a planarization layer 14 at the same time as it saves cost.
  • the array substrate is an OLED substrate
  • the COA array substrate is further provided with a via 15 penetrating through the photoresist layer 14 and the protective layer 12, and the OLED anode passes through the via 15 and the thin film transistor on the OLED substrate.
  • the drain of 112 is connected.
  • the OLED can also be disposed on the TFT substrate 11.
  • the OLED anode is directly connected to the drain of the thin film transistor 112, and the array substrate is not provided with the via hole 15.
  • the array substrate is a TFT-LCD array substrate
  • the COA array substrate is further provided with a via 15 penetrating through the photoresist layer 14 and the protective layer 12, and the pixel electrode passes through the via 15 and the TFT-LCD.
  • the drains of the thin film transistors 112 on the array substrate are connected.
  • the pixel electrode can also be disposed on the TFT substrate 11, and the pixel electrode is directly connected to the drain of the thin film transistor 112, and the array substrate is not provided with the via hole 15.
  • the COA array substrate of the present embodiment can be prepared by the method described in Embodiment 1, and the planarization layer 14 and the barrier wall are not required. The detailed description will not be repeated, so the array substrate has high production efficiency and low cost.
  • Example 3
  • the present embodiment provides a display device, which includes the above array substrate, and of course, a structure such as a frame of a conventional display device.
  • An example of the display device is a liquid crystal display device in which an array substrate and a counter substrate are opposed to each other to form a liquid crystal cell in which a liquid crystal material is filled.
  • the opposite substrate is, for example, a color film substrate.
  • the pixel electrode of each pixel unit of the array substrate is used to apply an electric field to control the degree of rotation of the liquid crystal material to perform a display operation.
  • the liquid crystal display device further includes a backlight that provides backlighting for the array substrate.
  • OLED organic electroluminescence display device
  • an organic light emitting material stack is formed on the array substrate, and a pixel electrode of each pixel unit is used as an anode or a cathode for driving the organic light emitting material to emit light. Perform the display operation.
  • the manufacturing process is simple and low in cost.
  • the above is only an exemplary embodiment of the present invention, and is not intended to limit the scope of the present invention.
  • the scope of the present invention is defined by the appended claims.

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Abstract

一种COA阵列基板的制备方法、阵列基板及显示装置。该制备方法包括以下步骤：在TFT基底（11）上形成保护层（12）；在所述保护层（12）上涂光刻胶层（21），所述光刻胶层（21）同时作为平坦化层（14），其中TFT基底（11）包括基底（111）和薄膜晶体管（112）；通过光刻工艺在光刻胶层（21）中形成彩膜容纳孔（32）；在彩膜容纳孔（32）中制作彩色滤光层（31）。上述制备方法可以降低现有的阵列基板在制备方法上的复杂性和成本。

Description

COA阵列基板的制备方法、 阵列基板及显示装置 技术领域
本发明的实施例涉及液晶显示技术领域，具体涉及一种 COA ( color filter on array ) 阵列基板的制备方法、 阵列基板及显示装置。 背景技术
COA阵列基板是指将彩色滤光层 13制作在 TFT基底 1 TFT基底包括 基底 111、 薄膜晶体管 （TFT ) 112 )上方， 通过该设计， 可以减小黑矩阵的 宽度， 提高显示区域的开口率， 现有的 COA阵列基板的结构如图 1所示， 图 2为形成过孔 15的曝光过程的示意图。
目前将彩色滤光层制作在 TFT基底上的方法主要通过构图工艺或喷墨 打印法， 目前采用的喷墨打印法均需要单独制作挡墙结构， 在制作完彩色滤 光层 13 (彩色滤光层制作需要在 TFT基底上涂覆保护层 12后通过构图工艺 形成）后再将挡墙去除， 之后制作平坦化层 14, 形成 COA阵列基板结构， 同时还需要单独的构图工艺形成过孔 15,因此该工艺过程复杂，生产效率低， 成本较高。 发明内容
本发明的实施例提供一种可以减少制造工艺、 降低成本， 提高生产效率 的阵列基板的制备方法、 阵列基板及显示装置。
根据本发明的第一方面，提供一种 COA阵列基板的制备方法，所述 COA 阵列基板包括 TFT基底和设置在 TFT基底上的彩色滤光层， 该方法包括如 下步骤： 在 TFT基底上形成保护层； 在所述保护层上涂光刻胶层， 所述光刻 胶层同时作为平坦化层， 其中 TFT基底包括基底和薄膜晶体管； 通过光刻工 艺在光刻胶层中形成彩膜容纳孔； 在彩膜容纳孔中制作彩色滤光层。
本发明中光刻胶层的流动性好， 故段差很小， 所以光刻胶层可以同时作 为平坦化层， 通过构图工艺， 将光刻胶层曝光、 显影， 形成包括彩膜容纳孔 的图形， 与现有的阵列基板的制备方法相比较不用单独制作平坦化层， 故其 工艺步骤筒单， 同时节约成本。
根据本发明的第二方面， 提供一种 COA阵列基板， 包括位于保护层 12 上的光刻胶层 21 , 所述光刻胶层 21 同时作为平坦化层， 且在光刻胶层中形 成有彩膜容纳孔 32, 彩膜容纳孔 32中形成有彩色滤光层 13。
由于本发明的阵列基板的光刻胶层不仅在其中形成彩膜容纳孔， 同时又 作为平坦化层， 所以该阵列基板的成本低。
根据本发明的第三方面， 提供一种显示装置， 包括上述 COA阵列基板。 由于该显示装置包括上述阵列基板， 所以成本低， 制作工艺步骤筒化。 附图说明
为了更清楚地说明本发明实施例的技术方案， 下面将对实施例的附图作 筒单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例， 而非对本发明的限制。
图 1为现有的 COA阵列基板的示意图；
图 2为本发明实施例 1的阵列基板制备方法中对 COA阵列基板的光刻 胶层曝光的示意图；
图 3为本发明实施例 1的 COA阵列基板制备方法中对 COA阵列基板的 光刻胶层曝光后的示意图；
图 4为本发明实施例 1的 COA阵列基板制备方法中制作 COA阵列基板 彩色滤光层的示意图； 以及，
图 5为本发明实施例 1的 COA阵列基板制备方法中制作 COA阵列基板 上过孔的示意图。
其中附图标记为： 11、 TFT基底； 111、 基底； 112、 薄膜晶体管； 12、 保护层； 13、 彩色滤光层； 14、 平坦化层； 15、 过孔； 21、 光刻胶层； 22、 掩模板； 31、 第一通孔； 32、 彩膜容纳孔。 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚， 下面将结合本发 明实施例的附图，对本发明实施例的技术方案进行清楚、 完整地描述。显然， 所描述的实施例是本发明的一部分实施例， 而不是全部的实施例。 基于所描 述的本发明的实施例， 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例， 都属于本发明保护的范围。 实施例 1:
结合图 3、 图 4、 图 5以及图 6, 本实施例提供一种 COA阵列基板的制 备方法， 包括：
步骤 1、 首先在基底 111上制作薄膜晶体管 112、 金属线等元器件， 完成 TFT基底 11的制作， 在 TFT基底 11上做一层保护层 12, 用于保护基底。
步骤 2、 在保护层 12上涂上光刻胶层 21 , 通过构图工艺， 用掩模板 22 对光刻胶层 21进行曝光，曝光区域为彩色像素区，曝光后对彩色像素区进行 显影， 后烘制作出彩膜容纳孔 32, 所述光刻胶层 21同时作为平坦化层 14。
步骤 3、 为彩膜容纳孔 32中添加染料， 形成彩色滤光层 13。 其中， 由于 光刻胶层 21的段差很小， 所以光刻胶层 21同时可以作为平坦化层 14, 进而 无需制作平坦化层 14, 使得制作工艺筒化， 生产效率提高， 成本降低。
优选地，所述在彩膜容纳孔 32中制作彩膜滤光层包括：采用喷墨法在所 述彩膜容纳孔 32中制作彩色滤光层 13。 由于， 本实施例的方法中， 通过构 图工艺在对光刻胶层 21曝光、 显影制作彩膜容纳孔 32, 在制作彩膜容纳孔 32出采用正性光刻胶， 而在其他部分显影后光刻胶依然存在（若采用负性光 刻胶对彩膜容纳孔 32所在区域不进行光照，对其他部分经行光照，显影后其 他部分显影后光刻交依然存在）， 故剩余的光刻胶层 21实际形成了挡墙， 此 时， 采用喷墨法将制作彩色滤光层 13, 不用再单独制作挡墙， 和现有的制备 方法比较省去制作挡墙的步骤， 可以大大提高生产效率、 降低生产成本。
优选地， 该 COA阵列基板为 OLED阵列基板， 在步骤 2中包括： 采用一次构图工艺形成彩膜容纳孔 32和第一通孔 31 , 所述第一通孔 31 贯穿平坦层 14, 见图 3;
对第一通孔 31区域的保护层 12进行刻蚀， 形成露出薄膜晶体管 112上 的漏极的过孔 15, 见图 5;
在步骤 3形成彩色滤光层 13后，还包括：在彩色滤光层 13上制作 OLED 阳极， 所述 OLED阳极通过所述过孔 15与薄膜晶体管 112的漏极连接。
当然也可以将 OLED的阳极制作在 TFT基底 11上， OLED的阳极可以 直接与薄膜晶体管 112的漏极连接,此时就不需要通过构图工艺形成过孔 15。 优选地， 所述阵列基板为 TFT-LCD阵列基板， 在步骤 2中包括： 采用一次构图工艺形成彩膜容纳孔 32和第一通孔 31 , 所述第一通孔 31 贯穿平坦层 14, 见图 3;
对第一通孔 31区域的保护层 12进行刻蚀， 形成露出薄膜晶体管 112的 漏极的过孔 15, 见图 5;
在步骤 3形成彩色滤光层 13后， 还包括： 在彩色滤光层 13上制作像素 电极， 所述像素电极通过所述过孔 15与薄膜晶体管 112的漏极连接。
当然也可以将像素电极制作在 TFT基底 11上， 像素电极可直接与薄膜 晶体管 112的漏极连接， 这样也无需通过构图工艺形成过孔 15。 实施例 2:
本实施例提供一种阵列基板， 包括位于保护层 12上的光刻胶层 21 , 所 述光刻胶层 21同时作为平坦化层 14, 且光刻胶 21中形成有彩膜容纳孔 32, 彩膜容纳孔 32中形成有彩色滤光层 13。 光刻胶同时作为平坦化层 14, 在制 作时可以节约成本。
优选地， 所述阵列基板为 OLED基板， 所述 COA阵列基板上还设置有 贯穿光刻胶层 14、保护层 12的过孔 15, OLED阳极通过所述过孔 15与 OLED 基板上的薄膜晶体管 112的漏极连接。 当然 OLED也可以设在 TFT基底 11 上， OLED阳极直接与薄膜晶体管 112的漏极连接， 该阵列基板就不用设有 过孔 15。
优选地， 所述阵列基板为 TFT-LCD阵列基板， 所述 COA阵列基板上还 设置有贯穿光刻胶层 14、 保护层 12的过孔 15, 像素电极通过所述过孔 15 与 TFT-LCD阵列基板上的薄膜晶体管 112的漏极连接。当然像素电极也可以 设在 TFT基底 11上， 像素电极直接与薄膜晶体管 112的漏极连接， 该阵列 基板就不用设有过孔 15。
本实施例的 COA阵列基板可以通过实施例 1所述的方法制备， 不用制 作平坦化层 14和挡墙，具体说明就不再重复追述，所以该阵列基板的生产效 率高， 成本低。 实施例 3
本实施例提供一种显示装置， 该显示装置， 包括上述阵列基板， 当然也 包括常规显示装置的外框等结构。
该显示装置的一个示例为液晶显示装置， 其中， 阵列基板与对置基板彼 此对置以形成液晶盒， 在液晶盒中填充有液晶材料。 该对置基板例如为彩膜 基板。 阵列基板的每个像素单元的像素电极用于施加电场对液晶材料的旋转 的程度进行控制从而进行显示操作。 在一些示例中， 该液晶显示装置还包括 为阵列基板提供背光的背光源。
该显示装置的另一个示例为有机电致发光显示装置（OLED ), 其中， 阵 列基板上形成有有机发光材料叠层， 每个像素单元的像素电极作为阳极或阴 极用于驱动有机发光材料发光以进行显示操作。
由于该显示装置包括上述阵列基板， 故其制作工艺筒单、 成本低。 以上所述仅是本发明的示范性实施方式， 而非用于限制本发明的保护范 围， 本发明的保护范围由所附的权利要求确定。

Claims

权利要求书
1、 一种 COA阵列基板的制备方法， 所述 COA阵列基板包括 TFT基底 和设置在 TFT基底上的彩色滤光层， 该方法包括如下步骤：
在 TFT基底上形成保护层；
在所述保护层上涂光刻胶层，所述光刻胶层同时作为平坦化层，其中 TFT 基底包括基底和薄膜晶体管；
通过光刻工艺在光刻胶层中形成彩膜容纳孔；
在彩膜容纳孔中制作彩色滤光层。
2、 根据权利要求 1所述的 COA阵列基板的制备方法， 其中所述在彩膜 容纳孔中制作彩色滤光层的方法为喷墨打印法。
3、 根据权利要求 1所述的 COA阵列基板的制备方法， 还包括： 在形成 彩膜容纳孔的同时形成过孔。
4、 根据权利要求 3所述的 COA阵列基板的制备方法， 其中所述 COA 阵列基板为 OLED阵列基板， 所述在形成彩膜容纳孔的同时形成过孔包括： 采用一次构图工艺形成彩膜容纳孔和第一通孔， 所述第一通孔贯穿平坦 层；
对第一通孔区域的保护层进行刻蚀， 形成露出薄膜晶体管漏极的过孔； 在彩色滤光层上制作 OLED阳极，所述 OLED阳极通过所述过孔与薄膜 晶体管的漏极电连接。
5、根据权利要求 3所述的制备方法，其中所述 COA阵列基板为 TFT-LCD 阵列基板， 所述在形成彩膜容纳孔的同时形成过孔包括：
采用一次构图工艺形成彩膜容纳孔和第一通孔， 所述第一通孔贯穿平坦 层；
对第一通孔区域的保护层进行刻蚀， 形成露出薄膜晶体管漏极的过孔； 在彩色滤光层上制作像素电极， 所述像素电极通过所述过孔与像素 TFT 的漏极电连接。
6、 一种 COA阵列基板， 包括位于保护层上的光刻胶层， 所述光刻胶层 同时作为平坦化层， 且在光刻胶层中形成有彩膜容纳孔， 彩膜容纳孔中形成 有彩色滤光层。
7、 根据权利要求 6所述的 COA阵列基板， 其中所述 COA阵列基板为 OLED基板， 所述 COA阵列基板上还设置有贯穿光刻胶层和保护层的过孔， OLED阳极通过所述过孔与 OLED基板上的薄膜晶体管的漏极电连接。
8、 根据权利要求 6所述的 COA阵列基板， 其中所述 COA阵列基板为 TFT-LCD阵列基板， 所述 COA阵列基板上还设置有贯穿光刻胶层和保护层 的过孔， 像素电极通过所述过孔与 TFT-LCD 阵列基板上的薄膜晶体管的漏 极电连接。
9、 一种显示装置， 包括权利要求 6~8任一所述的 COA阵列基板。
PCT/CN2013/077492 2013-03-29 2013-06-19 Coa阵列基板的制备方法、阵列基板及显示装置 WO2014153861A1 (zh)

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CN103489893A (zh) 2013-09-29 2014-01-01 京东方科技集团股份有限公司 Coa基板、显示装置及该coa基板的制造方法
CN104465510A (zh) * 2014-12-11 2015-03-25 京东方科技集团股份有限公司 一种阵列基板及其制作方法和显示面板
KR102418492B1 (ko) * 2015-06-30 2022-07-06 엘지디스플레이 주식회사 플렉서블 유기발광표시패널
CN105097883A (zh) * 2015-08-03 2015-11-25 京东方科技集团股份有限公司 一种显示面板及其制备方法和显示装置
CN105679763A (zh) * 2016-01-05 2016-06-15 深圳市华星光电技术有限公司 一种阵列基板及其制作方法、显示面板
CN106206426B (zh) * 2016-08-01 2019-03-01 京东方科技集团股份有限公司 阵列基板及其制造方法、显示装置
CN106783883B (zh) 2016-12-27 2023-11-10 京东方科技集团股份有限公司 显示基板及其制备方法
CN106816558B (zh) * 2017-04-14 2019-09-03 京东方科技集团股份有限公司 顶发射有机电致发光显示面板、其制作方法及显示装置
CN109065595B (zh) * 2018-08-15 2020-08-25 京东方科技集团股份有限公司 一种显示装置及其制备方法
CN111584563B (zh) * 2020-05-08 2023-05-09 武汉华星光电半导体显示技术有限公司 一种oled显示面板及显示装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101030586A (zh) * 2006-06-05 2007-09-05 友达光电股份有限公司 薄膜晶体管阵列基板结构及其制造方法
CN101661204A (zh) * 2009-09-24 2010-03-03 友达光电股份有限公司 彩色滤光片形成于薄膜晶体管阵列基板上的制造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6692983B1 (en) * 2002-08-01 2004-02-17 Chih-Chiang Chen Method of forming a color filter on a substrate having pixel driving elements
TWI382253B (zh) * 2008-02-04 2013-01-11 Au Optronics Corp 主動陣列基板、液晶顯示面板及其製作方法
CN102707357B (zh) * 2012-02-29 2016-05-11 京东方科技集团股份有限公司 彩色滤光片及其制造方法
CN202837751U (zh) * 2012-10-19 2013-03-27 京东方科技集团股份有限公司 一种彩膜基板、液晶显示面板

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101030586A (zh) * 2006-06-05 2007-09-05 友达光电股份有限公司 薄膜晶体管阵列基板结构及其制造方法
CN101661204A (zh) * 2009-09-24 2010-03-03 友达光电股份有限公司 彩色滤光片形成于薄膜晶体管阵列基板上的制造方法

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