WO2014139292A1 - 一种晶体硅太阳电池的制备方法 - Google Patents

一种晶体硅太阳电池的制备方法 Download PDF

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WO2014139292A1
WO2014139292A1 PCT/CN2013/087247 CN2013087247W WO2014139292A1 WO 2014139292 A1 WO2014139292 A1 WO 2014139292A1 CN 2013087247 W CN2013087247 W CN 2013087247W WO 2014139292 A1 WO2014139292 A1 WO 2014139292A1
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solar cell
dielectric film
crystalline silicon
silicon
preparing
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PCT/CN2013/087247
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English (en)
French (fr)
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王栩生
张春华
周剑
辛国军
章灵军
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苏州阿特斯阳光电力科技有限公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0236Special surface textures
    • H01L31/02363Special surface textures of the semiconductor body itself, e.g. textured active layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/02168Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells

Definitions

  • the invention relates to a preparation method of a crystalline silicon solar cell, and belongs to the technical field of solar energy.
  • a solar cell also called a photovoltaic cell, is a semiconductor device that directly converts the solar light energy into electrical energy. Because it is a green product, it does not cause environmental pollution, and it is a renewable resource. Therefore, in today's energy shortage, solar cells are a new type of energy with broad development prospects.
  • the existing methods for resisting potential-induced attenuation mainly include the following: (1) Avoiding a negative potential difference (front n-type emitter) and positive potential difference (front p-type emitter) between the solar module frame and the solar cells included in the solar module For example, the grounding method is adopted.
  • the object of the present invention is to provide a method for preparing a crystalline silicon solar cell.
  • a method for preparing a crystalline silicon solar cell comprising the following steps:
  • a crystalline silicon solar cell can be obtained by plating anti-reflection film, screen printing, and sintering.
  • the silicon dioxide dielectric film in the step (2) can pass dry oxygen, wet oxygen, PECVD. It can be realized by liquid phase growth, spin coating or the like, or by diffusion of a phosphosilicate glass layer.
  • the above scheme belongs to a conventional battery.
  • the thickness of the silicon dioxide dielectric film in the step (2) is 1.5 to 4.5 nm.
  • a crystalline silicon solar cell can be obtained by plating anti-reflection film, punching, screen printing, and sintering.
  • the silicon dioxide dielectric film in the step (2) can pass dry oxygen, wet oxygen, PECVD. It can be realized by liquid phase growth, spin coating or the like, or by diffusion of a phosphosilicate glass layer.
  • the above scheme belongs to the back contact battery.
  • the thickness of the silicon dioxide dielectric film in the step (2) is 1.5 to 4.5 nm.
  • the silica dielectric film has a good blocking effect on ion migration, shielding its damage to the PN junction, and completely solving the PID. Effect.
  • the present invention has the following advantages compared with the prior art:
  • the invention develops a method for manufacturing a crystalline silicon solar cell resistant to potential-induced attenuation, which is optimized by using existing equipment and conditions to form a silicon dioxide dielectric film. It has a good blocking effect on ion migration, shielding its damage to the PN junction, effectively suppressing the PID effect, and meeting the requirements of the PID Free cell.
  • the invention realizes the optimization of the battery terminal anti-potential induced attenuating dielectric film, so the component end can adopt the conventional packaging material, which saves the cost of the component end, improves the output power of the component end, and effectively suppresses. PID effect.
  • the preparation method of the invention is simple and easy, low in cost and suitable for industrial production.
  • the experiment proves that the power of the conventional battery obtained by the preparation method of the present invention is about 2%, MWT.
  • the battery attenuation is less than 1%, and the attenuation is greatly reduced compared to the existing conventional battery attenuation of 30% and the MWT battery attenuation of 58.02%, and unexpected technical effects have been achieved.
  • a method for preparing a crystalline silicon solar cell which is an example of preparing a conventional conventional battery, comprising the following steps:
  • the silicon wafer is subjected to texturing, diffusion, and edge etching;
  • a silicon dioxide dielectric film is formed by PECVD on the light-receiving surface of the silicon wafer, and the thickness of the silicon oxide is 2.2 nm;
  • a method for preparing a crystalline silicon solar cell which is an example of preparing a conventional conventional battery, comprising the following steps:
  • the silicon wafer is subjected to texturing, diffusion, and edge etching;
  • a silicon dioxide dielectric film is formed by PECVD on both sides of the silicon wafer, and the thickness of the silicon dioxide is 2.2 nm;
  • the battery strings are interconnected, packaged, and laminated using the same efficiency file and the conventional packaging materials as in the first embodiment.
  • the silicon wafer is subjected to texturing, diffusion, and edge etching;
  • the battery strings are interconnected, packaged, and laminated using the same efficiency file and the conventional packaging materials as in the first embodiment.
  • the conventional battery component PID produced by the present invention The test effect is obvious. Whether the silicon dioxide dielectric film is formed on one side or the silicon dioxide dielectric film is formed on both sides, the power of the battery is only attenuated by nearly 2% after PID, compared with the first comparison (the power attenuation of the battery after PID is 30%). ) achieved unexpected technical results and met the requirements of the PID Free cell (power attenuation is less than 5%).
  • a method for preparing a crystalline silicon solar cell which is an example of preparing a MWT battery, comprising the following steps:
  • the silicon wafer is subjected to texturing, diffusion, and edge etching;
  • a silicon dioxide dielectric film is formed by PECVD on the light-receiving surface of the silicon wafer, and the thickness of the silicon oxide is 2.5 nm;
  • a method for preparing a crystalline silicon solar cell which is an example of preparing a conventional conventional battery, comprising the following steps:
  • the silicon wafer is subjected to texturing, diffusion, and edge etching;
  • a silicon dioxide dielectric film is formed by PECVD on both sides of the silicon wafer, and the thickness of the silicon dioxide is 2.5 nm;
  • the battery strings are interconnected, packaged, and laminated using the same efficiency file and the conventional packaging materials as in the third embodiment.
  • the silicon wafer is subjected to texturing, diffusion, and edge etching;
  • the battery strings are interconnected, packaged, and laminated using the same efficiency file and the conventional packaging materials as in the third embodiment.
  • the MWT battery component PID produced by the present invention The test effect is obvious. Whether the silicon dioxide dielectric film is formed on one side or the silicon dioxide dielectric film is formed on both sides, the power attenuation of the battery after PID is less than 1%, compared with the comparison example 2 (power attenuation after battery PID) 58.02%) achieved unexpected technical results, meeting the requirements of the PID Free cell (power attenuation is less than 5%).

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Sustainable Development (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Life Sciences & Earth Sciences (AREA)
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Abstract

公开了一种晶体硅太阳能电池的制备方法,包括如下步骤:(1)将硅片进行表面清洗及织构化、扩散制结、边缘刻蚀;(2)在上述硅片的受光面或双面形成一层二氧化硅介质膜,其厚度为1.0~10nm;(3)镀减反膜、丝网印刷、烧结,即可得到晶体硅太阳能电池。由此开发了一种抗电位诱发衰减的晶体硅太阳能电池的制备方法,形成的二氧化硅介质膜对于离子迁移有很好的阻挡作用,屏蔽了其对于PN结的破坏,有效抑制了PID效应,能满足PID Free电池片的要求。

Description

一种晶体硅太阳电池的制备方法
技术领域
本发明涉及一种晶体硅太阳电池的制备方法,属于太阳能技术领域。
背景技术
太阳能电池,也称光伏电池,是一种将太阳的光能直接转化为电能的半导体器件。由于它是绿色环保产品,不会引起环境污染,而且是可再生资源,所以在当今能源短缺的情形下,太阳能电池是一种有广阔发展前途的新型能源。
众所周知,当一个由一或多个太阳能组件构成的太阳能组件串中的太阳能组件工作时,太阳能电池和框架之间会形成电位。如果太阳能组件中的太阳能电池采用串联连接,太阳能电池和框架之间的电位就会沿着该串联线路上升。工业上针对这个电位提出的限值通常约为 1000 伏,也即,沿该串联线路允许存在 1000 伏左右的电位,而且背膜一般也是为此设计的。如果其中一个太阳能电池相对于框架具有负电位或正电位,玻璃板和塑料膜中就相应会有正离子 ( 例如钠离子、钙离子或镁离子 ) 或负离子 ( 例如氢氧根离子 ) 沿电场朝该太阳能电池方向迁移。这会在玻璃板与塑料膜之间的界面和 / 或塑料膜与抗反射层之间的界面上引起载流子累积,从而导致太阳能电池发生故障。此外,并联电阻也会因此而减小,从而导致相关太阳能电池的部分或完全故障。这种基于组件框架和太阳能电池之间的诱发性电位差的衰退效应称为'电位诱发衰退' (PID) 。该现象大多数最容易在潮湿的条件下发生,且其活跃程度与潮湿程度相关;同时组件表面被导电性、酸性、碱性以及带有离子的物体的污染程度,也与上述衰减现象发生有关。在实际的应用场合,晶体硅光伏组件的 PID 现象已经被观察到,基于其电池结构和其他构成组件的材料以及设计形式的不同, PID 现象可能是在其电路与金属接地边框成正向电压偏置的条件下发生,也可能是成反向偏置的条件下发生。
针对上述问题,现有的 抗电位诱发衰减的方法主要有以下几种: (1) 避免太阳能组件框架与该太阳能组件所包含的太阳能电池之间形成负电位差 ( 正面 n 型发射极 ) 和正电位差 ( 正面 p 型发射极 ) ,例如采用接地的方式,但是,相关的接地措施有可能极其复杂,此外还会使逆变器的选择受到限制,对统效率产生不良影响; (2) 使用由硼硅玻璃构成的玻璃板,因为硼硅玻璃中会促进电荷聚集的离子成分相对较少,然而,这会增加太阳能组件的成本,从经济角度看是不可接受的解决方案; (3) 尝试用比 EVA 更合适的材料来制造塑料膜,例如有机硅 ( 如 blacker 公司的 Tectosil) 、 PVB 聚乙烯醇缩丁醛或热塑性塑料 ( 如 Dupont 公司的 Surlyn) ,因为 EVA 中所含的乙酸以及 EVA 的高透水透湿性可能会产生不良影响;但是, EVA 薄膜出于各方面原因非常适合用于太阳能组件,这是上述其他材料薄膜无法达到的。
因此,开发一种 晶体硅太阳电池的制备方法,以避免 电位诱发衰减的影响,具有积极的现实意义。
发明内容
本发明目的是提供一种晶体硅太阳电池的制备方法。
为达到上述目的,本发明采用的技术方案是: 一种 晶体硅太阳电池的制备方法, 包括如下步骤:
(1) 将硅片进行表面清洗及织构化、扩散制结、边缘刻蚀;
(2) 在上述硅片的受光面或双面形成一层二氧化硅介质膜,其厚度为 1.0~10 nm ;
(3) 镀减反膜、丝网印刷、烧结,即可得到 晶体硅太阳电池。
上文中,所述步骤 (2) 中的二氧化硅介质膜可以通过干氧、湿氧、 PECVD 、液相生长、旋涂等方式实现,也可以通过扩散形成的磷硅玻璃层来实现。
上述方案属于常规电池。
优选的,所述步骤 (2) 中的二氧化硅介质膜的厚度为 1.5~4.5 nm 。
与之相应的另一种技术方案,一种 晶体硅太阳电池的制备方法, 包括如下步骤:
(1) 将硅片进行表面清洗及织构化、扩散制结、边缘刻蚀;
(2) 在上述硅片的受光面或双面形成一层二氧化硅介质膜,其厚度为 1.0~10 nm ;
(3) 镀减反膜、打孔、丝网印刷、烧结,即可得到 晶体硅太阳电池。
上文中,所述步骤 (2) 中的二氧化硅介质膜可以通过干氧、湿氧、 PECVD 、液相生长、旋涂等方式实现,也可以通过扩散形成的磷硅玻璃层来实现。
上述方案属于背接触电池。
优选的,所述步骤 (2) 中的二氧化硅介质膜的厚度为 1.5~4.5 nm 。
所述二氧化硅介质膜对于离子迁移有很好的阻挡作用,屏蔽了其对于 PN 结的破坏,可以完全解决 PID 效应。
由于上述技术方案的采用,与现有技术相比,本发明具有如下优点:
1 .本发明开发了一种抗电位诱发衰减的晶体硅太阳电池的制造方法,利用现有设备和条件对太阳电池进行了优化,形成的二氧化硅介质膜 对于离子迁移有很好的阻挡作用,屏蔽了其对于 PN 结的破坏, 有效抑制了 PID 效应,能 满足 PID Free 电池片的要求 。
2 .与传统的方法相比,本发明实现了电池端抗电位诱发衰减介质膜的优化,因此组件端可以采用常规的封装材料,节约了组件端成本,提高了组件端的输出功率,有效抑制了 PID 效应。
3 .本发明 的制备方法简单易行,成本低,适于工业化生产。
4 .实验证明:采用本发明的制备方法得到 的常规 电池 PID 后功率衰减 2% 左右, MWT 电池衰减小于 1% ,相对于现有的常规电池衰减 30% 和 MWT 电池衰减 58.02% 而言,衰减大大降低,取得了意想不到的技术效果。
具体实施方式
下面 结合实施例对本发明作进一步描述:
实施例一
一种 晶体硅太阳电池的制备方法,以制备现有的常规电池为例, 包括如下步骤:
(1) 将硅片进行 制绒、扩散、边缘刻蚀 ;
(2) 在硅片的受光面上通过 PECVD 形成二氧化硅介质膜,氧化硅厚度为 2.2 nm ;
(3) 镀减反膜、 通过丝网印刷印刷电极,并烧结形成欧姆接触;
(4) 采用常规封装材料,对电池串进行互联、封装、层压制作组件。
实施例二
一种 晶体硅太阳电池的制备方法,以制备现有的常规电池为例, 包括如下步骤:
(1) 将硅片进行 制绒、扩散、边缘刻蚀 ;
(2) 在硅片的双面上通过 PECVD 形成二氧化硅介质膜,二氧氧化硅厚度为 2.2 nm ;
(3) 镀减反膜、 通过丝网印刷印刷电极,并烧结形成欧姆接触;
(4) 采用与实施例一相同效率档的电池片和常规封装材料,对电池串进行互联、封装、层压制作组件。
对比例一
以制备现有的常规电池为例,步骤如下:
(1) 将硅片进行 制绒、扩散、边缘刻蚀 ;
(2) 在硅片的受光面上通过 PECVD 形成氮化硅减反膜;
(3) 通过丝网印刷印刷电极,并烧结形成欧姆接触;
(4) 采用与实施例一相同效率档的电池片和常规封装材料,对电池串进行互联、封装、层压制作组件。
在 60 ℃的 温度、 85 的相对湿度、 -1000V 的偏压下进行 96h 的 PID 后,测试实施例一、实施例二和对比例一的功率衰减数据,结果如下:
衰减条件 功率衰减后百分比
对比例一 -1000V PID 96h 后 30%
实施例一 -1000V PID 96h 后 2.1%
实施例二 -1000V PID 96h 后 2.31%
由上表可见, 本发明制得的常规电池组件 PID 试验效果明显,不管是单面形成二氧化硅介质膜还是双面形成二氧化硅介质膜,电池 PID 后功率只衰减将近 2% ,相对于对比例一(电池 PID 后功率衰减 30% )来说取得了意想不到的技术效果, 满足 PID Free 电池片的要求(功率衰减都小于 5% )。
实施例三
一种 晶体硅太阳电池的制备方法,以制备 MWT 电池为例, 包括如下步骤:
(1) 将硅片进行 制绒、扩散、边缘刻蚀 ;
(2) 在硅片的受光面上通过 PECVD 形成二氧化硅介质膜,氧化硅厚度为 2.5 nm ;
(3) 镀减反膜、打孔、 通过丝网印刷印刷电极,并烧结形成欧姆接触;
(4) 采用常规封装材料,对电池串进行互联、封装、层压制作组件。
实施例四
一种 晶体硅太阳电池的制备方法,以制备现有的常规电池为例, 包括如下步骤:
(1) 将硅片进行 制绒、扩散、边缘刻蚀 ;
(2) 在硅片的双面上通过 PECVD 形成二氧化硅介质膜,二氧氧化硅厚度为 2.5 nm ;
(3) 镀减反膜、打孔、 通过丝网印刷印刷电极,并烧结形成欧姆接触;
(4) 采用与实施例三相同效率档的电池片和常规封装材料,对电池串进行互联、封装、层压制作组件。
对比例二
以制备现有的常规 MWT 电池为例,步骤如下:
(1) 将硅片进行 制绒、扩散、边缘刻蚀 ;
(2) 在硅片的受光面上通过 PECVD 形成氮化硅减反膜、打孔;
(3) 通过丝网印刷印刷电极,并烧结形成欧姆接触;
(4) 采用与实施例三相同效率档的电池片和常规封装材料,对电池串进行互联、封装、层压制作组件。
在 60 ℃的 温度、 85 的相对湿度、 -1000V 的偏压下进行 96h 的 PID 后,测试实施例三、实施例四和对比例二的功率衰减数据,结果如下:
衰减条件 功率衰减后百分比
对比例二 -1000V PID 96h 后 58.02%
实施例三 -1000V PID 96h 后 0.82%
实施例四 -1000V PID 96h 后 0.57%
由上表可见, 本发明制得的 MWT 电池组件 PID 试验效果明显,不管是单面形成二氧化硅介质膜还是双面形成二氧化硅介质膜,电池 PID 后功率衰减小于 1% ,相对于对比例二(电池 PID 后功率衰减 58.02% )来说取得了意想不到的技术效果, 满足 PID Free 电池片的要求(功率衰减都小于 5% )。

Claims (4)

1. 一种 晶体硅太阳电池的制备方法, 其特征在于,包括如下步骤:
(1) 将硅片进行表面清洗及织构化、扩散制结、边缘刻蚀;
(2) 在上述硅片的受光面或双面形成一层二氧化硅介质膜,其厚度为 1.0~10 nm ;
(3) 镀减反膜、丝网印刷、烧结,即可得到 晶体硅太阳电池。
2. 根据权利要求 1 所述的 晶体硅太阳电池的制备方法, 其特征在于:所述步骤 (2) 中的二氧化硅介质膜的厚度为 1.5~4.5 nm 。
3. 一种 晶体硅太阳电池的制备方法, 其特征在于,包括如下步骤:
(1) 将硅片进行表面清洗及织构化、扩散制结、边缘刻蚀;
(2) 在上述硅片的受光面或双面形成一层二氧化硅介质膜,其厚度为 1.0~10 nm ;
(3) 镀减反膜、打孔、丝网印刷、烧结,即可得到 晶体硅太阳电池。
4. 根据权利要求 3 所述的 晶体硅太阳电池的制备方法, 其特征在于:所述步骤 (2) 中的二氧化硅介质膜的厚度为 1.5~4.5 nm 。
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