WO2014125862A1 - Semiconductor device including clamp element - Google Patents

Semiconductor device including clamp element Download PDF

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Publication number
WO2014125862A1
WO2014125862A1 PCT/JP2014/050672 JP2014050672W WO2014125862A1 WO 2014125862 A1 WO2014125862 A1 WO 2014125862A1 JP 2014050672 W JP2014050672 W JP 2014050672W WO 2014125862 A1 WO2014125862 A1 WO 2014125862A1
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voltage
clamp
diode
clamp element
semiconductor device
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PCT/JP2014/050672
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French (fr)
Japanese (ja)
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智光 理崎
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セイコーインスツル株式会社
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/0802—Resistors only
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes

Definitions

  • the present invention relates to a semiconductor device.
  • the present invention relates to a semiconductor device on which a clamp element is mounted.
  • FIG. 7 is a diagram showing a conventional clamp circuit.
  • the clamp circuit includes a diode 51 and a control circuit 52 arranged in the opposite direction in normal operation.
  • the control circuit 52 includes a resistor and a current source. With these resistors and current sources, the control circuit 52 generates a voltage at the anode of the diode 51 and controls the clamp voltage at the cathode of the diode 51 by causing a constant current to flow through the diode 51.
  • the circuit is designed so that these resistors and current sources do not have temperature dependency so that the clamp voltage does not have temperature dependency. (For example, refer to Patent Document 1).
  • This invention is made in view of the said subject, and provides the semiconductor device provided with the clamp element with which a clamp voltage is hard to depend on temperature and an area is small.
  • the present invention provides a clamp element mounted on a semiconductor device in which a predetermined number of forward diodes and one diode connected in series between a clamped node and a power supply voltage supply terminal.
  • a semiconductor device including a clamp element, characterized in that a reverse diode is provided, and polysilicon is used for the forward diode.
  • FIG. 1 It is a figure which shows a clamp element, (A) is sectional drawing, (B) is a circuit diagram. It is a figure which shows the voltage with respect to temperature, (A) is a figure regarding the forward drop voltage of the forward diode 10, (B) is a figure regarding the breakdown voltage of the reverse diode 20, (C) is It is a figure regarding the clamp voltage of a clamp element. It is a figure which shows a clamp element, (A) is sectional drawing, (B) is a circuit diagram. It is a figure which shows a clamp element, (A) is sectional drawing, (B) is a circuit diagram. It is a figure which shows a clamp element, (A) is sectional drawing, (B) is a circuit diagram. It is a figure which shows a clamp element, (A) is sectional drawing, (B) is a circuit diagram. It is a figure which shows a clamp element, (A) is sectional drawing, (B) is a circuit diagram. It is a figure which shows
  • FIG. 1 is a diagram illustrating a semiconductor device including a clamp element
  • FIG. 1A is a cross-sectional view.
  • a LOCOS (Local Oxidation of Silicon) oxide film 13 is grown on the surface of the semiconductor substrate 24 by a conventional semiconductor manufacturing process.
  • P-type polysilicon 11 and N-type polysilicon 12 are formed on LOCOS oxide film 13.
  • a P-type well 23 is formed on the surface of the semiconductor substrate 24.
  • a P-type diffusion layer 21 and an N-type diffusion layer 22 are formed on the surface of the P-type well 23.
  • the P-type polysilicon 11 and the N-type polysilicon 12 constitute a forward diode 10, the P-type polysilicon 11 functions as an anode electrode, and the N-type polysilicon 12 functions as a cathode electrode.
  • the P-type well 23 and the N-type diffusion layer 22 constitute a reverse diode 20, the P-type diffusion layer 21 functions as an anode electrode, and the N-type diffusion layer 22 functions as a cathode electrode.
  • the withstand voltage of the clamp element is determined by the impurity concentration of the P-type well 23 and the N-type diffusion layer 22.
  • the impurity concentration of the P-type well 23 is lower than the impurity concentration of the P-type diffusion layer 21.
  • the withstand voltage of the clamp element is increased accordingly. Therefore, the withstand voltage of the clamp element can be easily adjusted by a normal semiconductor manufacturing process.
  • FIG. 1 is a diagram showing a clamp element
  • (B) is a circuit diagram.
  • the anode electrode of the forward diode 10 is connected to the node to be clamped, and the cathode electrode is connected to the cathode electrode of the reverse diode 20.
  • the anode electrode of the reverse diode 20 is connected to the ground terminal. That is, between the clamped node and the ground terminal, the forward diode 10 is connected in the forward direction, the reverse diode 20 is connected in the reverse direction, and the forward diode 10 and the reverse diode 20 are serially connected in order. Connected.
  • the area is small.
  • the clamp voltage is the total voltage of the forward drop voltage of the forward diode 10 and the breakdown voltage of the reverse diode 20.
  • the clamp circuit does not malfunction.
  • FIGS. 2A and 2B are diagrams illustrating voltage with respect to temperature
  • FIG. 2A is a diagram regarding a forward drop voltage of the forward diode 10
  • FIG. 2B is a diagram regarding a breakdown voltage of the reverse diode 20
  • (C) is a figure regarding the clamp voltage of a clamp element.
  • the forward voltage drop of the forward diode 10 has a negative temperature coefficient as shown in FIG.
  • the breakdown voltage of the reverse diode 20 has a positive temperature coefficient as shown in FIG.
  • the clamp voltage is the total voltage of the forward drop voltage of the forward diode 10 having a negative temperature coefficient and the breakdown voltage of the reverse diode 20 having a positive temperature coefficient.
  • the positive temperature coefficient of the clamp voltage becomes smaller by the negative temperature coefficient of the forward voltage of the forward diode 10, The temperature dependence of the clamp voltage is reduced.
  • a plurality of forward diodes 10 are provided in series, so that the clamp voltage can be reduced.
  • the positive temperature coefficient is further reduced, and the temperature dependence of the clamp voltage can be further reduced, that is, flattened.
  • the reverse diode 20 using the diffusion layer in the semiconductor substrate 24 is used.
  • a reverse diode 30 using polysilicon may be used.
  • the P-type polysilicon 31 and the N-type polysilicon 12 constitute a reverse diode 30, the P-type polysilicon 32 functions as an anode electrode, and the N-type polysilicon 12 functions as a cathode electrode.
  • the breakdown voltage of the clamp element is determined by the impurity concentration of the P-type polysilicon 31 and the N-type polysilicon 12.
  • the impurity concentration of the P-type polysilicon 31 is lower than the impurity concentration of the P-type polysilicon 32. When the impurity concentration of the P-type polysilicon 31 is reduced, the withstand voltage of the clamp element is increased accordingly.
  • the P-type polysilicon 32 and the N-type polysilicon 33 constitute a reverse diode 30a
  • the P-type polysilicon 32 functions as an anode electrode
  • the N-type polysilicon 12 serves as a cathode electrode. May function.
  • the P-type polysilicon 31 and the N-type polysilicon 33 constitute a reverse diode 30b
  • the P-type polysilicon 32 functions as an anode electrode
  • the N-type polysilicon 12 serves as a cathode electrode. May function.
  • the reverse diode 30b since the reverse diode 30b has two of the P-type polysilicon 31 and the N-type polysilicon 33 as the low concentration region, the reverse diode 30b has a higher breakdown voltage.
  • the P-type polysilicon 32 and the N-type polysilicon 12 constitute a reverse diode 30c
  • the P-type polysilicon 32 functions as an anode electrode
  • the N-type polysilicon 12 serves as a cathode electrode. May function.
  • the reverse diode 30c does not have a low concentration region, and thus has a low breakdown voltage.
  • forward diode 10 and the reverse diode 20 are connected in series in order between the clamped node and the ground terminal, they may be connected in series in the reverse order.
  • the forward diode 10 is formed on the LOCOS oxide film 13, it may be formed on another insulating means in the semiconductor substrate 24 such as a gate insulating film or STI (Shallow Trench Isolation).
  • the node to be clamped is clamped based on the ground terminal (power supply voltage supply terminal), it may be clamped based on the power supply terminal (power supply voltage supply terminal).
  • the forward diode 10 and the reverse diode 20 are similarly connected in series between the power supply terminal and the node to be clamped.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

In order to provide a semiconductor device that includes a clamp element having a clamp voltage hardly dependent on temperature and having a small area, the clamp voltage of the clamp element is a voltage obtained by summing a forward drop voltage of a forward diode (10) made of polysilicon having a negative temperature coefficient and a breakdown voltage of a reverse diode (20) having a positive temperature coefficient. The positive temperature coefficient of the reverse diode is decreased for the negative temperature coefficient of the forward voltage of the forward diode (10), whereby the temperature dependency of the clamp voltage is decreased and flattened.

Description

クランプ素子を備えた半導体装置Semiconductor device having a clamp element
　本発明は、半導体装置に関する。特に、クランプ素子が搭載された半導体装置に関する。 The present invention relates to a semiconductor device. In particular, the present invention relates to a semiconductor device on which a clamp element is mounted.
　従来のクランプ回路について説明する。図７は、従来のクランプ回路を示す図である。 A conventional clamp circuit will be described. FIG. 7 is a diagram showing a conventional clamp circuit.
　クランプ回路は、通常動作においては逆方向となる向きに配置されたダイオード５１及び制御回路５２を備える。制御回路５２は、図示しないが、抵抗及び電流源を備える。これらの抵抗及び電流源により、制御回路５２は、ダイオード５１のアノードに電圧を発生させ、且つ、ダイオード５１に定電流を流すことにより、ダイオード５１のカソードのクランプ電圧を制御する。この時、クランプ電圧が温度依存性を持たないように、これらの抵抗及び電流源が温度依存性を持たないように回路設計する。（例えば、特許文献１参照）。 The clamp circuit includes a diode 51 and a control circuit 52 arranged in the opposite direction in normal operation. Although not shown, the control circuit 52 includes a resistor and a current source. With these resistors and current sources, the control circuit 52 generates a voltage at the anode of the diode 51 and controls the clamp voltage at the cathode of the diode 51 by causing a constant current to flow through the diode 51. At this time, the circuit is designed so that these resistors and current sources do not have temperature dependency so that the clamp voltage does not have temperature dependency. (For example, refer to Patent Document 1).
特開２００８－１０９２３９号公報JP 2008-109239 A
　しかし、特許文献１によって開示された技術では、クランプ回路のクランプ電圧を制御する制御回路５２が存在するので、その分、回路の面積が大きくなってしまう。 However, in the technique disclosed in Patent Document 1, since there is a control circuit 52 that controls the clamp voltage of the clamp circuit, the area of the circuit increases accordingly.
　本発明は、上記課題に鑑みてなされ、クランプ電圧が温度に依存しにくく、面積が小さいクランプ素子を備えた半導体装置を提供する。 This invention is made in view of the said subject, and provides the semiconductor device provided with the clamp element with which a clamp voltage is hard to depend on temperature and an area is small.
　本発明は、上記課題を解決するため、半導体装置に搭載されるクランプ素子において、クランプされるノードと電源電圧供給端子との間で直列接続される、所定数個の順方向ダイオード及び１個の逆方向ダイオード、を備え、順方向ダイオードに、ポリシリコンが用いられる、ことを特徴とするクランプ素子を備えた半導体装置を提供する。 In order to solve the above-described problems, the present invention provides a clamp element mounted on a semiconductor device in which a predetermined number of forward diodes and one diode connected in series between a clamped node and a power supply voltage supply terminal. There is provided a semiconductor device including a clamp element, characterized in that a reverse diode is provided, and polysilicon is used for the forward diode.
　本発明では、クランプ素子において、クランプ電圧を制御する制御回路が存在しないので、面積を小さくすることが可能である。 In the present invention, since there is no control circuit for controlling the clamp voltage in the clamp element, the area can be reduced.
クランプ素子を示す図であり、（Ａ）は、断面図であり、（Ｂ）は、回路図である。It is a figure which shows a clamp element, (A) is sectional drawing, (B) is a circuit diagram. 温度に対する電圧を示す図であり、（Ａ）は、順方向ダイオード１０の順方向降下電圧に関する図であり、（Ｂ）は、逆方向ダイオード２０のブレークダウン電圧に関する図であり、（Ｃ）は、クランプ素子のクランプ電圧に関する図である。It is a figure which shows the voltage with respect to temperature, (A) is a figure regarding the forward drop voltage of the forward diode 10, (B) is a figure regarding the breakdown voltage of the reverse diode 20, (C) is It is a figure regarding the clamp voltage of a clamp element. クランプ素子を示す図であり、（Ａ）は、断面図であり、（Ｂ）は、回路図である。It is a figure which shows a clamp element, (A) is sectional drawing, (B) is a circuit diagram. クランプ素子を示す図であり、（Ａ）は、断面図であり、（Ｂ）は、回路図である。It is a figure which shows a clamp element, (A) is sectional drawing, (B) is a circuit diagram. クランプ素子を示す図であり、（Ａ）は、断面図であり、（Ｂ）は、回路図である。It is a figure which shows a clamp element, (A) is sectional drawing, (B) is a circuit diagram. クランプ素子を示す図であり、（Ａ）は、断面図であり、（Ｂ）は、回路図である。It is a figure which shows a clamp element, (A) is sectional drawing, (B) is a circuit diagram. 従来のクランプ回路を示す図である。It is a figure which shows the conventional clamp circuit.
　以下、本発明の実施形態について、図面を参照して説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
　まず、クランプ素子の断面構造について説明する。図１は、クランプ素子を備えた半導体装置を示す図であり、（Ａ）は、断面図である。 First, the cross-sectional structure of the clamp element will be described. FIG. 1 is a diagram illustrating a semiconductor device including a clamp element, and FIG. 1A is a cross-sectional view.
　従来の半導体製造プロセスにより、半導体基板２４の表面に、ＬＯＣＯＳ（Local Oxidation of Silicon）酸化膜１３を成長させる。ＬＯＣＯＳ酸化膜１３の上に、Ｐ型ポリシリコン１１及びＮ型ポリシリコン１２を形成する。また、半導体基板２４の表面に、Ｐ型ウェル２３を形成する。Ｐ型ウェル２３の表面に、Ｐ型拡散層２１及びＮ型拡散層２２を形成する。Ｐ型ポリシリコン１１及びＮ型ポリシリコン１２は順方向ダイオード１０を構成し、Ｐ型ポリシリコン１１はアノード電極として機能し、Ｎ型ポリシリコン１２はカソード電極として機能する。Ｐ型ウェル２３及びＮ型拡散層２２は逆方向ダイオード２０を構成し、Ｐ型拡散層２１はアノード電極として機能し、Ｎ型拡散層２２はカソード電極として機能する。 A LOCOS (Local Oxidation of Silicon) oxide film 13 is grown on the surface of the semiconductor substrate 24 by a conventional semiconductor manufacturing process. P-type polysilicon 11 and N-type polysilicon 12 are formed on LOCOS oxide film 13. Further, a P-type well 23 is formed on the surface of the semiconductor substrate 24. A P-type diffusion layer 21 and an N-type diffusion layer 22 are formed on the surface of the P-type well 23. The P-type polysilicon 11 and the N-type polysilicon 12 constitute a forward diode 10, the P-type polysilicon 11 functions as an anode electrode, and the N-type polysilicon 12 functions as a cathode electrode. The P-type well 23 and the N-type diffusion layer 22 constitute a reverse diode 20, the P-type diffusion layer 21 functions as an anode electrode, and the N-type diffusion layer 22 functions as a cathode electrode.
　次に、クランプ素子の耐圧について説明する。 Next, the breakdown voltage of the clamp element will be described.
　クランプ素子の耐圧は、Ｐ型ウェル２３及びＮ型拡散層２２の不純物濃度によって決定される。Ｐ型ウェル２３の不純物濃度は、Ｐ型拡散層２１の不純物濃度よりも低い。Ｐ型ウェル２３の不純物濃度が低くなると、その分、クランプ素子の耐圧が高くなる。よって、このクランプ素子の耐圧は、通常の半導体製造プロセスにより、容易に調整可能となっている。 The withstand voltage of the clamp element is determined by the impurity concentration of the P-type well 23 and the N-type diffusion layer 22. The impurity concentration of the P-type well 23 is lower than the impurity concentration of the P-type diffusion layer 21. When the impurity concentration of the P-type well 23 is lowered, the withstand voltage of the clamp element is increased accordingly. Therefore, the withstand voltage of the clamp element can be easily adjusted by a normal semiconductor manufacturing process.
　次に、クランプ素子の回路構成について説明する。図１は、クランプ素子を示す図であり、（Ｂ）は、回路図である。 Next, the circuit configuration of the clamp element will be described. FIG. 1 is a diagram showing a clamp element, and (B) is a circuit diagram.
　順方向ダイオード１０のアノード電極は、クランプされるノードに接続され、カソード電極は、逆方向ダイオード２０のカソード電極に接続される。逆方向ダイオード２０のアノード電極は、接地端子に接続される。つまり、クランプされるノードと接地端子との間で、順方向ダイオード１０は順方向に接続され、逆方向ダイオード２０は逆方向に接続され、順方向ダイオード１０と逆方向ダイオード２０とは順番に直列接続される。ここで、クランプ素子において、ダイオードが２個だけ使用され、クランプ電圧を制御する制御回路は存在しないので、面積が小さい。 The anode electrode of the forward diode 10 is connected to the node to be clamped, and the cathode electrode is connected to the cathode electrode of the reverse diode 20. The anode electrode of the reverse diode 20 is connected to the ground terminal. That is, between the clamped node and the ground terminal, the forward diode 10 is connected in the forward direction, the reverse diode 20 is connected in the reverse direction, and the forward diode 10 and the reverse diode 20 are serially connected in order. Connected. Here, since only two diodes are used in the clamp element and there is no control circuit for controlling the clamp voltage, the area is small.
　次に、クランプ素子の動作について説明する。 Next, the operation of the clamp element will be described.
　クランプされるノードの電圧が高くなり、クランプ電圧になると、逆方向ダイオード２０のブレークダウン動作により、そのクランプ電圧でクランプされる。クランプ電圧は、順方向ダイオード１０の順方向降下電圧と、逆方向ダイオード２０のブレークダウン電圧と、の合計電圧である。 When the voltage of the node to be clamped becomes high and becomes the clamp voltage, the reverse diode 20 is clamped by the clamp voltage by the breakdown operation. The clamp voltage is the total voltage of the forward drop voltage of the forward diode 10 and the breakdown voltage of the reverse diode 20.
　また、クランプ回路において半導体基板２４の中の拡散層を用いたダイオードが複数個使用されてしまうと、これらのダイオードの間やダイオードと半導体基板２４との間の寄生素子が動作してしまい、クランプ回路が誤動作してしまう可能性がある。しかし、本発明では、半導体基板２４の中の拡散層を用いたダイオードは１個だけ使用されるので、クランプ回路は誤動作しない。 In addition, if a plurality of diodes using the diffusion layer in the semiconductor substrate 24 are used in the clamp circuit, parasitic elements between these diodes or between the diode and the semiconductor substrate 24 operate, and the clamp The circuit may malfunction. However, in the present invention, since only one diode using the diffusion layer in the semiconductor substrate 24 is used, the clamp circuit does not malfunction.
　次に、クランプ電圧の温度依存性について説明する。図２は、温度に対する電圧を示す図であり、（Ａ）は、順方向ダイオード１０の順方向降下電圧に関する図であり、（Ｂ）は、逆方向ダイオード２０のブレークダウン電圧に関する図であり、（Ｃ）は、クランプ素子のクランプ電圧に関する図である。 Next, the temperature dependence of the clamp voltage will be described. 2A and 2B are diagrams illustrating voltage with respect to temperature, FIG. 2A is a diagram regarding a forward drop voltage of the forward diode 10, and FIG. 2B is a diagram regarding a breakdown voltage of the reverse diode 20. (C) is a figure regarding the clamp voltage of a clamp element.
　順方向ダイオード１０の順方向降下電圧は、図２の（Ａ）に示すように、負の温度係数を有する。逆方向ダイオード２０のブレークダウン電圧は、図２の（Ｂ）に示すように、正の温度係数を有する。ここで、クランプ電圧は、正の温度係数を有する逆方向ダイオード２０のブレークダウン電圧と等しいとすると、図２の（Ｃ）の“０個の順方向ダイオード１０”に示すように、正の温度係数を有してしまう。しかし、本発明では、クランプ電圧は、負の温度係数を有する順方向ダイオード１０の順方向降下電圧と、正の温度係数を有する逆方向ダイオード２０のブレークダウン電圧と、の合計電圧である。すると、順方向ダイオード１０の順方向電圧の負の温度係数の分、図２の（Ｃ）の“１個の順方向ダイオード１０”に示すように、クランプ電圧の正の温度係数が小さくなり、クランプ電圧の温度依存性は低くなる。 The forward voltage drop of the forward diode 10 has a negative temperature coefficient as shown in FIG. The breakdown voltage of the reverse diode 20 has a positive temperature coefficient as shown in FIG. Here, assuming that the clamp voltage is equal to the breakdown voltage of the reverse diode 20 having a positive temperature coefficient, as shown in “0 forward diodes 10” in FIG. It has a coefficient. However, in the present invention, the clamp voltage is the total voltage of the forward drop voltage of the forward diode 10 having a negative temperature coefficient and the breakdown voltage of the reverse diode 20 having a positive temperature coefficient. Then, as shown in “one forward diode 10” in FIG. 2C, the positive temperature coefficient of the clamp voltage becomes smaller by the negative temperature coefficient of the forward voltage of the forward diode 10, The temperature dependence of the clamp voltage is reduced.
　なお、図２の（Ｃ）の“２個の順方向ダイオード１０”及び“３個の順方向ダイオード１０”に示すように、複数個の順方向ダイオード１０が直列に設けることにより、クランプ電圧の正の温度係数がさらに小さくなり、クランプ電圧の温度依存性をさらに低く、即ち、平坦にすることが可能である。 As shown in “two forward diodes 10” and “three forward diodes 10” in FIG. 2C, a plurality of forward diodes 10 are provided in series, so that the clamp voltage can be reduced. The positive temperature coefficient is further reduced, and the temperature dependence of the clamp voltage can be further reduced, that is, flattened.
　また、図１では、半導体基板２４の中の拡散層を用いた逆方向ダイオード２０を使用しているが、図３に示すように、ポリシリコンを用いた逆方向ダイオード３０を使用しても良い。この時、Ｐ型ポリシリコン３１及びＮ型ポリシリコン１２は逆方向ダイオード３０を構成し、Ｐ型ポリシリコン３２はアノード電極として機能し、Ｎ型ポリシリコン１２はカソード電極として機能する。また、クランプ素子の耐圧は、Ｐ型ポリシリコン３１及びＮ型ポリシリコン１２の不純物濃度によって決定される。Ｐ型ポリシリコン３１の不純物濃度は、Ｐ型ポリシリコン３２の不純物濃度よりも低い。Ｐ型ポリシリコン３１の不純物濃度が低くなると、その分、クランプ素子の耐圧が高くなる。 In FIG. 1, the reverse diode 20 using the diffusion layer in the semiconductor substrate 24 is used. However, as shown in FIG. 3, a reverse diode 30 using polysilicon may be used. . At this time, the P-type polysilicon 31 and the N-type polysilicon 12 constitute a reverse diode 30, the P-type polysilicon 32 functions as an anode electrode, and the N-type polysilicon 12 functions as a cathode electrode. The breakdown voltage of the clamp element is determined by the impurity concentration of the P-type polysilicon 31 and the N-type polysilicon 12. The impurity concentration of the P-type polysilicon 31 is lower than the impurity concentration of the P-type polysilicon 32. When the impurity concentration of the P-type polysilicon 31 is reduced, the withstand voltage of the clamp element is increased accordingly.
　また、図４に示すように、Ｐ型ポリシリコン３２及びＮ型ポリシリコン３３は逆方向ダイオード３０ａを構成し、Ｐ型ポリシリコン３２はアノード電極として機能し、Ｎ型ポリシリコン１２はカソード電極として機能しても良い。 As shown in FIG. 4, the P-type polysilicon 32 and the N-type polysilicon 33 constitute a reverse diode 30a, the P-type polysilicon 32 functions as an anode electrode, and the N-type polysilicon 12 serves as a cathode electrode. May function.
　また、図５に示すように、Ｐ型ポリシリコン３１及びＮ型ポリシリコン３３は逆方向ダイオード３０ｂを構成し、Ｐ型ポリシリコン３２はアノード電極として機能し、Ｎ型ポリシリコン１２はカソード電極として機能しても良い。この時、逆方向ダイオード３０ｂは、低濃度領域として、Ｐ型ポリシリコン３１及びＮ型ポリシリコン３３の２つを有するので、より高耐圧になる。 Further, as shown in FIG. 5, the P-type polysilicon 31 and the N-type polysilicon 33 constitute a reverse diode 30b, the P-type polysilicon 32 functions as an anode electrode, and the N-type polysilicon 12 serves as a cathode electrode. May function. At this time, since the reverse diode 30b has two of the P-type polysilicon 31 and the N-type polysilicon 33 as the low concentration region, the reverse diode 30b has a higher breakdown voltage.
　また、図６に示すように、Ｐ型ポリシリコン３２及びＮ型ポリシリコン１２は逆方向ダイオード３０ｃを構成し、Ｐ型ポリシリコン３２はアノード電極として機能し、Ｎ型ポリシリコン１２はカソード電極として機能しても良い。この時、逆方向ダイオード３０ｃは、低濃度領域を有さないので、低耐圧になる。 Further, as shown in FIG. 6, the P-type polysilicon 32 and the N-type polysilicon 12 constitute a reverse diode 30c, the P-type polysilicon 32 functions as an anode electrode, and the N-type polysilicon 12 serves as a cathode electrode. May function. At this time, the reverse diode 30c does not have a low concentration region, and thus has a low breakdown voltage.
　また、順方向ダイオード１０と逆方向ダイオード２０とは、クランプされるノードと接地端子との間で、順番に直列接続されているが、逆の順番で直列接続されても良い。 Further, although the forward diode 10 and the reverse diode 20 are connected in series in order between the clamped node and the ground terminal, they may be connected in series in the reverse order.
　また、順方向ダイオード１０は、ＬＯＣＯＳ酸化膜１３の上に形成しているが、ゲート絶縁膜やＳＴＩ（Shallow TrenchIsolation）などの半導体基板２４における他の絶縁手段の上に形成しても良い。 Further, although the forward diode 10 is formed on the LOCOS oxide film 13, it may be formed on another insulating means in the semiconductor substrate 24 such as a gate insulating film or STI (Shallow Trench Isolation).
　また、クランプするノードは、接地端子（電源電圧供給端子）基準でクランプしているが、電源端子（電源電圧供給端子）基準でクランプしても良い。この時、順方向ダイオード１０と逆方向ダイオード２０とを、電源端子とクランプされるノードとの間で、同様に直列接続する。 Further, although the node to be clamped is clamped based on the ground terminal (power supply voltage supply terminal), it may be clamped based on the power supply terminal (power supply voltage supply terminal). At this time, the forward diode 10 and the reverse diode 20 are similarly connected in series between the power supply terminal and the node to be clamped.
１０　順方向ダイオード
１１　Ｐ型ポリシリコン
１２　Ｎ型ポリシリコン
１３　ＬＯＣＯＳ酸化膜
２０　逆方向ダイオード
２１　Ｐ型拡散層
２２　Ｎ型拡散層
２３　Ｐ型ウェル
２４　半導体基板 DESCRIPTION OF SYMBOLS 10 Forward direction diode 11 P type polysilicon 12 N type polysilicon 13 LOCOS oxide film 20 Reverse direction diode 21 P type diffusion layer 22 N type diffusion layer 23 P type well 24 Semiconductor substrate

Claims (4)

  1. 　半導体基板と、
    　前記半導体基板の上であって、クランプされるノードと電源電圧供給端子との間に配置された、直列接続された所定個数の順方向ダイオード、及び１個の逆方向ダイオードと、
    を有し、
    　前記所定個数の順方向ダイオードはポリシリコンから形成されていることを特徴とするクランプ素子を備えた半導体装置。     A semiconductor substrate;
    A predetermined number of forward diodes and one reverse diode connected in series on the semiconductor substrate and disposed between a node to be clamped and a power supply voltage supply terminal;
    Have
    The semiconductor device having a clamp element, wherein the predetermined number of forward diodes are made of polysilicon.
  2. 　前記所定個数の順方向ダイオードにより、前記逆方向ダイオードのみの温度係数よりも、平坦な温度係数を有していることを特徴とする請求項１記載のクランプ素子を備えた半導体装置。 The semiconductor device having a clamp element according to claim 1, wherein the predetermined number of forward diodes has a flat temperature coefficient rather than a temperature coefficient of only the reverse diode.
  3. 　前記逆方向ダイオードは、半導体基板の中の拡散層から形成されていることを特徴とする請求項２記載のクランプ素子を備えた半導体装置。 3. The semiconductor device having a clamp element according to claim 2, wherein the reverse diode is formed of a diffusion layer in a semiconductor substrate.
  4. 　前記逆方向ダイオードは、ポリシリコンから形成されていることを特徴とする請求項２記載のクランプ素子を備えた半導体装置。 3. The semiconductor device having a clamp element according to claim 2, wherein the reverse diode is made of polysilicon.
PCT/JP2014/050672 2013-02-12 2014-01-16 Semiconductor device including clamp element WO2014125862A1 (en)

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Citations (6)

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JPS57180156A (en) * 1981-04-30 1982-11-06 Nec Corp Hybrid integrated circuit
JPS63146459A (en) * 1986-07-15 1988-06-18 Nec Corp Semiconductor integrated circuit device
JPH04184978A (en) * 1990-11-20 1992-07-01 Nec Corp Manufacture of semiconductor device
JP2009527120A (en) * 2006-02-17 2009-07-23 エヌエックスピー ビー ヴィ Electrostatic discharge protection circuit and method in an integrated circuit
JP2010129663A (en) * 2008-11-26 2010-06-10 Toshiba Corp Semiconductor device
JP2013030091A (en) * 2011-07-29 2013-02-07 Mitsubishi Electric Corp Semiconductor device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180156A (en) * 1981-04-30 1982-11-06 Nec Corp Hybrid integrated circuit
JPS63146459A (en) * 1986-07-15 1988-06-18 Nec Corp Semiconductor integrated circuit device
JPH04184978A (en) * 1990-11-20 1992-07-01 Nec Corp Manufacture of semiconductor device
JP2009527120A (en) * 2006-02-17 2009-07-23 エヌエックスピー ビー ヴィ Electrostatic discharge protection circuit and method in an integrated circuit
JP2010129663A (en) * 2008-11-26 2010-06-10 Toshiba Corp Semiconductor device
JP2013030091A (en) * 2011-07-29 2013-02-07 Mitsubishi Electric Corp Semiconductor device

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