WO2014101719A1 - 像素电路、显示装置及其驱动方法 - Google Patents

像素电路、显示装置及其驱动方法 Download PDF

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Publication number
WO2014101719A1
WO2014101719A1 PCT/CN2013/090103 CN2013090103W WO2014101719A1 WO 2014101719 A1 WO2014101719 A1 WO 2014101719A1 CN 2013090103 W CN2013090103 W CN 2013090103W WO 2014101719 A1 WO2014101719 A1 WO 2014101719A1
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Prior art keywords
transistor
electrode
pixel circuit
power source
coupled
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Application number
PCT/CN2013/090103
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English (en)
French (fr)
Inventor
朱晖
邱勇
黄秀颀
高孝裕
胡思明
韩珍珍
Original Assignee
昆山工研院新型平板显示技术中心有限公司
昆山国显光电有限公司
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Application filed by 昆山工研院新型平板显示技术中心有限公司, 昆山国显光电有限公司 filed Critical 昆山工研院新型平板显示技术中心有限公司
Priority to US14/758,403 priority Critical patent/US10339863B2/en
Priority to KR1020157020583A priority patent/KR101678333B1/ko
Priority to EP13869147.2A priority patent/EP2940682B1/en
Priority to JP2015549967A priority patent/JP6035434B2/ja
Publication of WO2014101719A1 publication Critical patent/WO2014101719A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0814—Several active elements per pixel in active matrix panels used for selection purposes, e.g. logical AND for partial update
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD

Definitions

  • the present invention relates to a pixel circuit, a display device, and a method of driving the same, and more particularly to a pixel circuit, a display device, and a method of driving the organic light emitting diode capable of compensating for a threshold voltage of a driving transistor. Background technique
  • an active matrix organic light emitting display device having a TFT (Thin Film Transistor) backplane uses a self-luminous organic light emitting diode (OELD) to display an image, it generally has a short response time and uses low power. Since the characteristics of driving, relatively better brightness, and color purity are consumed, the organic light-emitting display device has become the focus of next-generation display devices.
  • TFT Thin Film Transistor
  • OELD self-luminous organic light emitting diode
  • Fig. 1 schematically shows a circuit diagram of a conventional active matrix organic light emitting display device 100.
  • the active matrix organic light emitting display device 100 includes a data driver and a scan driver (not shown), the data driver is used to control a plurality of horizontally arranged data lines DAD DAm, and the scan driver is used to control a plurality of scans arranged in the longitudinal direction.
  • a line SCl SCn in which an intersection area of the plurality of data lines DA1 to DAm and the scan lines SCI to SCn forms a plurality of pixel circuits 110.
  • the pixel circuit 110 includes an organic light emitting diode OLED1, a storage capacitor C11, a switching transistor T11 and a driving transistor T12, a first power source ELVDD1, and a second power source ELVSS1.
  • the transistors T11 and T12 are PMOS transistors (P communication metal oxide semiconductor transistors).
  • the gate of the switching transistor T11 is connected to one of the scan lines SC1, the source thereof is connected to one of the data lines DA1, and the drain thereof is connected to the gate of the second transistor T12; the source of the driving transistor T12 is connected to the high voltage power supply.
  • ELVDD1 has a drain connected to the anode of the light emitting diode OLED1; a cathode of the light emitting diode OLED1 is connected to the low voltage power source ELVSS1; a first terminal of the storage capacitor C11 is connected to the first power source ELVDD1, and a second terminal is connected to the second transistor T12 The gate.
  • the scan driver sequentially applies scan signals to the scan lines SC1 to SCn, and the data driver applies corresponding data signals via the data lines DA1 to DAm according to the image data to be displayed.
  • the pixel circuit 100 located in its intersection region provides a drive current flowing through the organic light emitting diode in accordance with signals of the scan lines and data lines connected thereto.
  • the switching transistor Til when the scan driver applies a scan signal to the scan line SC1 At this time, the switching transistor Til is turned on, and at this time, the voltage of the data signal on the data line DAI is stored in the storage capacitor C11 through the switching transistor T11.
  • the driving transistor T12 supplies the driving current I Q L ED1 according to the voltage stored by the storage capacitor C11 to drive the organic light emitting diode OLED1 to emit light of a corresponding brightness.
  • the formula for driving current is as follows: ⁇ OLED1— 1/2 ⁇ 12 XC OXL2 XW 12 /L 12 (V GS12 -VTHI2 ) 2 (Formula 1)
  • ⁇ 12 is the carrier mobility of the driving transistor T12
  • C. Xl2 is the capacitance of the control surface oxide layer of the driving transistor T12
  • W 12 is the channel width of the driving transistor T12
  • L 12 is the channel length of the driving transistor T12
  • V QS12 is between the gate and the source of the driving transistor T12.
  • the voltage difference, V TH12 is the threshold voltage of the driving transistor T12. That is, according to the magnitude of the data voltage from the data line DA1, the driving current flowing through the organic light emitting diode OLED1 can be controlled to display a predetermined gray level.
  • the main object of the present invention is to provide a novel pixel circuit structure that can compensate for variations in threshold voltages of driving transistors.
  • the present invention provides a pixel circuit capable of generating a desired luminance and an active matrix organic light emitting display device using the pixel circuit, the pixel circuit capable of improving response characteristics of an active matrix organic light emitting diode, and displaying uniform image quality image.
  • the technical solution of the present invention is implemented as follows: The present invention provides a pixel circuit including a first power source, a second power source, an organic light emitting diode, a first capacitor, a first transistor, and a second transistor.
  • a third transistor wherein a cathode of the organic light emitting diode is combined with the second power source; the first capacitor is coupled between a node and the second power source; the first transistor and the second transistor
  • the third transistor has a control terminal, a first electrode, and Second electrode
  • the first transistor has a control terminal coupled to the node, a first electrode thereof for receiving a data signal, a second transistor having a control terminal for receiving a first scan signal, and a first electrode thereof a second electrode of the first transistor is coupled; a second electrode thereof is coupled to the node;
  • the third transistor has a control end coupled to the node; a first electrode coupled to the first power source and a second electrode coupled to an anode of the light emitting diode;
  • the first transistor is configured to compensate a threshold voltage of the third transistor.
  • the first transistor and the third transistor have a channel width close to each other; and they are disposed at a close distance in the pixel circuit.
  • the pixel circuit is disposed on the TFT backplane
  • the first transistor and the third transistor are symmetrically disposed on a TFT backplane.
  • the fourth transistor further includes: a control transistor configured to receive a second scan signal, a first electrode coupled to the second electrode of the third transistor, a second electrode thereof The anode of the light emitting diode is combined.
  • the fifth transistor further includes a fifth transistor and a third power source; the fifth transistor has a control terminal for receiving a third scan signal, a first electrode combined with the node, and a third power source Second electrode.
  • the voltage of the third power source is less than or equal to the voltage of the second power source. Also included is a sixth transistor having a control terminal for receiving the third scan signal, a first electrode coupled to the anode of the light emitting crystal diode, and a second electrode coupled to the second power source.
  • the method further includes a second capacitor coupled between the control terminal of the second transistor and the node.
  • the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are P-transistor MOS transistors.
  • the present invention further provides a method of driving a pixel circuit, wherein the pixel circuit includes a transistor, a second transistor, a third transistor, a storage capacitor, and an organic light emitting diode, wherein the pixel circuit is driven by a signal from a data line or a scan line, the method comprising:
  • the data signal is supplied to the light emitting diode via the third transistor;
  • the light emitting diode emits light of a brightness corresponding to the data signal.
  • the pixel circuit further includes a fourth transistor
  • the method also includes
  • the second scan signal is supplied to a second scan line for turning on the fourth transistor, thereby supplying the data signal to the light emitting diode via the third transistor.
  • the pixel circuit further includes a fifth transistor
  • a third scan signal is applied prior to applying the first scan signal for turning on the fifth transistor to initialize the node.
  • the first transistor and the third transistor have a channel width that is close to each other and is disposed at a close distance in the pixel circuit.
  • the pixel circuit is disposed on the TFT backplane
  • the first transistor and the third transistor are symmetrically disposed on the TFT backplane.
  • a scan driver is configured to apply a scan signal to the scan line
  • a data driver for applying a data signal to the data line
  • the pixel circuit includes: a first power source, a second power source, an organic light emitting diode, a first capacitor, a first transistor, a second transistor, and a third Transistor, characterized by:
  • the organic light emitting diode has an anode and a cathode, the cathode of which is connected to the second power source; the first capacitor is coupled between a node and the second power source;
  • the first transistor, the second transistor, and the third transistor respectively have a control end, a first electrode, and a second electrode;
  • the first transistor has a control end coupled to the node, and a first electrode thereof is coupled to the data line;
  • the second transistor has a control terminal coupled to a first scan line; a first electrode coupled to the second electrode of the first transistor; a second electrode coupled to the node; a transistor having a control terminal coupled to the node; a first electrode coupled to the first power source and a second electrode coupled to an anode of the light emitting diode;
  • the first transistor is configured to compensate a threshold voltage of the third transistor.
  • the first transistor and the third transistor have a channel width that is close to each other and is disposed at a close distance in the pixel circuit.
  • the display device further includes a TFT backplane, and the pixel circuit is disposed on the TFT backplane;
  • the first transistor and the third transistor are symmetrically disposed on the TFT backplane.
  • the fourth transistor further includes a control terminal coupled to a second scan line, a first electrode coupled to the second electrode of the third transistor, and a second electrode coupled to the anode of the LED A mouth.
  • the fifth transistor further includes a fifth transistor and a third power source; the fifth transistor has a control terminal combined with a third scan line, a first electrode combined with the node, and a third power source Second electrode.
  • the voltage of the third power source is less than or equal to the voltage of the second power source.
  • a sixth transistor having a control terminal commonly associated with the third scan line, a first electrode coupled to the anode of the light emitting crystal diode, and a second electrode coupled to the second power source.
  • the method further includes a second capacitor coupled between the control terminal of the second transistor and the node.
  • the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are p-transistor metal oxide semiconductor transistors.
  • FIG. 1 is a circuit diagram of a pixel of a conventional active matrix organic light emitting display device
  • FIG. 2 is a schematic diagram of a pixel circuit in accordance with a first embodiment of the present invention
  • FIG. 3 is a signal timing chart according to the driving method of the pixel circuit shown in FIG. 2;
  • FIG. 4 is a schematic diagram of a pixel circuit according to a second embodiment of the present invention
  • FIG. 5 is a timing chart of signals according to the driving method of the pixel circuit shown in FIG.
  • FIG. 6 is a schematic diagram of a pixel circuit according to a third embodiment of the present invention.
  • FIG. 7 is a signal timing diagram of a driving method of the pixel circuit shown in FIG.
  • FIG. 8 is a schematic diagram of a pixel circuit according to a fourth embodiment of the present invention.
  • FIG. 9 is a schematic diagram of a pixel circuit in accordance with a fifth embodiment of the present invention.
  • FIG. 10 is a schematic diagram of an active matrix organic light emitting display device of the present invention.
  • FIG. 2 is a schematic diagram of a pixel circuit 200 in accordance with a first embodiment of the present invention.
  • the pixel circuit 200 includes: a first transistor T1, a second transistor T2, a third transistor T3, a capacitor C1, and an organic light emitting diode OLED.
  • the transistors T1 to T3 each include a control terminal, a first electrode 1 and a second electrode 2.
  • the first electrode of the transistor T1 is coupled to the data line Dm, the control terminal is coupled to a node N1, and the second electrode is coupled to the first electrode of the second transistor T2; the control terminal of the second transistor T2 is coupled to the first scan line Sn1, Receiving a first scan signal from the first scan line Sn1,
  • the first electrode is coupled to the second electrode of the second transistor T1; the second electrode is coupled to the node N1; the first terminal of the capacitor C1 is coupled to the node N1, the second terminal is coupled to the second power source ELVSS; and the third transistor T3
  • the control terminal is coupled to the node N1, the first electrode thereof is coupled to the first power source ELVDD, the second electrode is coupled to the anode of the light emitting diode OLED, and the cathode of the light emitting diode OLED is coupled to the second power source ELVSS.
  • control terminal may be the gate of the transistors T1-T3, the first electrode may be the source of the transistors T1-T3, and the second electrode may be the drain of the transistors T1-T3.
  • control terminals of the transistors T4, ⁇ 5, and ⁇ 6 as described below may be the gates of the transistors ⁇ 4- ⁇ 6, the first electrodes may be the drains of the transistors T1-T3, and the second electrodes may be the sources of the transistors T1-T3. .
  • Fig. 3 is a timing chart showing the signal according to the driving method of the pixel circuit 200 shown in Fig. 2.
  • the signal timing shown in FIG. 3 includes the first phase and the second phase.
  • the first phase t1 is the data writing phase
  • the second phase t2 is the normal lighting phase. Since the transistors T1-T3 in the pixel circuit 200 shown in Fig. 2 are all exemplified by a PMOS transistor, the transistor is turned on when a low level signal is applied to its control terminal.
  • the first transistor T1 and the second transistor T2 are turned on in response to the scan signal Sn1 of the low level. Therefore, the data signal Vdata from the data line Dm is supplied to the node N1 via the first transistor T1 and the second transistor T2.
  • the voltage value at the node N1 is a voltage corresponding to the difference between the data signal Vdata and the threshold voltage of the first transistor T1, that is, Vdata ⁇
  • the voltage at node N1 is also stored in capacitor C1.
  • the data signal Vdata on the data line Dm is read into the pixel circuit 200.
  • the light-emitting diode OLED enters a normal light-emitting phase.
  • the current of the first power source ELVDD flows into the anode of the light emitting diode OLED through the third transistor T3.
  • the driving current flowing into the OLED is as follows: l/2 3 XC OX3 XW 3 /L 3 X (V GS3 - VT H3 ) 2 (Formula 2).
  • ⁇ 3 is the carrier mobility of the third transistor T3; C. X3 is the capacitance of the third transistor T3 controlling the terminal oxide layer, W 3 is the channel width of the third transistor T3, and L 3 is the channel length of the third transistor T3.
  • ⁇ is the gate-source voltage difference of the third transistor, and VTH3 is the threshold voltage of the third transistor T3.
  • V QS3 is the voltage at the node N1 (ie, Vdata+V TH1 ), and the difference between the first power supply voltage Vdd and ⁇ Vdata+V TH1 -Vdd.
  • the above formula can be further calculated by calculation: 3 XC OX3 XW 3 / L 3 X (V DATA + V TH1 -V DD -V TH3) 2 ( Formula 3). It can be seen that the effect of the threshold voltage of the third transistor T3 on the drive current of the OLED is reduced by setting the first transistor T1 of suitable electrical characteristics. Preferably, if the transistors T1 and T3 whose electrical characteristics are as close as possible are disposed, the threshold voltage of the third transistor T3 can be cancelled to be almost zero, so that the driving current flowing into the OLED can be not affected by the threshold voltage of the third transistor T3. .
  • the first transistor T1 and the third transistor T3 whose electrical characteristics are set as close as possible can be disposed in the pixel circuit 200 by setting two transistors whose channel width and length are as close as possible.
  • the first transistor T1 and the third transistor T3 may also be symmetrically disposed when the pixel circuit 200 is disposed on the TFT backplane such that its threshold voltage is as close as possible.
  • 4 is a schematic diagram of a pixel circuit 300 in accordance with a second embodiment of the present invention. The difference from the pixel circuit shown in FIG.
  • FIG. 2 further includes a fourth transistor T4 whose control terminal is coupled to the second scan line Sn2 for receiving the second scan signal from the second scan line Sn2; the first electrode thereof Bonded to the second electrode of the third transistor T3, its second electrode is coupled to the anode of the light emitting diode OLED.
  • FIG. 5 is a signal timing chart for driving the driving method of the pixel circuit 300 shown in FIG. The difference from the signal timing chart shown in FIG. 3 is that, in the second phase t2, the scan signal is supplied to the second scan line Sn2. At this time, the third transistor T3 and the fourth transistor T4 are turned on in common, thereby supplying the data signal to the light emitting diode OLED through the third transistor T3 and the fourth transistor T4.
  • the light emitting diode OLED enters a normal light emitting stage. It can be understood that, since the fourth transistor T4 is disposed in the pixel circuit 300, the time of turning on and off of the fourth transistor T4 can be controlled by the second scan line Sn2, so that the light emitting diode can be controlled by the fourth transistor T4. The time of luminescence of the OLED. ⁇ ⁇ , when the transistor T4 is turned off, the light-emitting diode OLED does not emit light; when the transistor T4 is turned on, the light-emitting diode OLED emits light.
  • FIG. 6 shows a schematic diagram of a pixel circuit 400 in accordance with a third embodiment of the present invention.
  • the difference from the pixel circuit 300 shown in FIG. 4 further includes a fifth transistor T5 whose control end is coupled to the third scan line Sn3 for receiving the third scan signal from the third scan line Sn3;
  • the electrode is coupled to node N1 and its second electrode is coupled to a third power source.
  • Fig. 7 is a timing chart showing the driving of the pixel circuit 400 shown in Fig. 6. It further includes an initialization phase prior to the first phase.
  • FIG. 8 is a schematic diagram of a pixel circuit 500 in accordance with a fourth embodiment of the present invention. It differs from the circuit shown in FIG.
  • the sixth transistor T6 in that it further includes a sixth transistor T6.
  • the sixth transistor ⁇ 6 is coupled between the anode of the OLED and the second power source ELVSS.
  • the control terminal of the sixth transistor T6 and the control terminal of the fifth transistor T5 are commonly coupled to the scan line Sn3 for receiving the third scan signal; the first electrode and the second electrode are respectively combined with the anode and the cathode of the OLED.
  • the sixth transistor T6 is turned on during a period in which the low-level scan signal is supplied to the scan line Sn3. Since the first electrode and the second electrode are respectively combined with the anode and the cathode of the OLED, it is possible to prevent the driving current from being supplied to the organic light emitting diode OLED.
  • FIG. 9 is a schematic diagram of a pixel circuit 600 in accordance with a fifth embodiment of the present invention. It differs from the circuit shown in FIG. 7 in that it further includes a second capacitor C2.
  • the second capacitor C2 is coupled between the control terminal of the second transistor T2 and the node N1. It can be understood that, during a period in which the scan signal of the scan line Sn1 transitions from a low level to a high level, since Vdata has been stored in the node N1, when the voltage of the scan line Sn1 becomes a high level, the Voltage across the second capacitor C2 coupling the potential of the node N1 increases, a corresponding increase in the control voltage Vdata + V TH1 third transistor T3, and the corresponding voltage is stored in the second capacitor C2.
  • the first transistor T1, the second transistor T2, the third transistor ⁇ 3, the fourth transistor ⁇ 4, the fifth transistor ⁇ 5, and the sixth transistor ⁇ 6 communicate with each other as a metal oxide semiconductor.
  • the transistor is described as an example.
  • the transistors T1-T6 in the pixel circuit of the present invention can also be implemented using germanium communication metal oxide semiconductor transistors.
  • 10 is an active matrix organic light emitting display device including a pixel circuit of an embodiment of the present invention.
  • the display device 700 includes: a first power source ELVDD, a second power source ELVSS, a scan driver 702, a data driver 703, and intersections disposed in a matrix form on the scan lines Sn1, Sn2, and Sn3, and the data lines D1 to Dm.
  • the first power source ELVDD and the second power source ELVSS supply respective power supply voltages to the plurality of pixel circuits 701 through respective row lines (n) and column lines (m).
  • Each of the pixel circuits 701 is coupled to a corresponding scan line (e.g., Sn2, Sn2, and Sn3) and a data line, respectively.
  • the pixel circuits 701 located in the i-th row and the j-th column are coupled to the scan lines Sil, Si2, and Si3 of the i-th row and the j-th row data line Dj.
  • the scan driver 702 generates a scan signal corresponding to a scan signal externally supplied (for example, supplied from a certain time control unit).
  • the scan signals generated by the scan controller 702 are sequentially supplied to the pixel circuits 701 through the scan lines Sil to Sin, respectively.
  • the data driver 703 generates a data signal corresponding to data and data control signals externally supplied (for example, supplied from a certain time control unit).
  • the data signal generated by the data driver 703 is supplied to the pixel circuit 701 in synchronization with the scan signal through the data lines D1 to Dm.
  • the pixel circuit 701 can be a pixel circuit as shown in any of the above embodiments. It can be understood that the number of scan lines of each row can also be set differently according to the embodiment of the pixel circuit.

Abstract

一种像素电路、显示装置及其驱动方法，所述像素电路包括第一电源（ELVDD）、第二电源（ELVSS）、有机发光二极管（OLED）、第一电容（C1）、第一晶体管（T1）、第二晶体管（T2）、第三晶体管（T3），所述第一晶体管（T1）用于补偿所述第三晶体管（T3）的阈值电压。所述像素电路驱动方法通过依次在扫描线（Sn1，Sn2，Sn3）上施加扫描信号到像素电路上以驱动像素电路发光。所述像素电路及其驱动方法能够改善有源矩阵有机发光二极管的响应特性，使得显示装置显示具有均匀图像质量的图像。

Description

像素电路、 显示装置及其驱动方法
技术领域
本发明涉及一种像素电路、 显示装置及其驱动方法， 尤其涉及一种能够补 偿驱动晶体管阈值电压的有机发光二极管的像素电路、 显示装置及其驱动方法。 背景技术
近年来， 己经开发出相比阴极射线管（CRT)来说重量轻且体积小的各种类 型的平板显示装置。 在各种类型的平板显示装置中， 由于具有 TFT (薄膜晶体 管） 背板的有源矩阵有机发光显示装置使用自发光的有机发光二极管 （OELD) 来显示图像， 通常具有响应时间短、 使用低功耗进行驱动、 相对更好的亮度和 颜色纯度的特性， 所以有机发光显示装置己经成为下一代显示装置的焦点。
图 1示意性示出了传统的有源矩阵有机发光显示装置 100的电路图。 其中， 有源矩阵有机发光显示装置 100包括数据驱动器和扫描驱动器 （图中未示出）， 数据驱动器用于控制横向排列的多条数据线 DAl DAm， 扫描驱动器用于控制 纵向排列的多条扫描线 SCl SCn，其中多条数据线 DAl DAm和扫描线 SCI— SCn的交叉区域形成多个像素电路 110。
参见图 1， 像素电路 110包括有机发光二极管 0LED1、 存储电容 Cll、 开 关晶体管 T11和驱动晶体管 T12、 第一电源 ELVDDl和第二电源 ELVSS1。 其 中， 晶体管 T11和 T12均为 PMOS晶体管 （P沟通金属氧化物半导体晶体管）。 其中， 开关晶体管 T11 的栅极连接至其中一条扫描线 SC1， 其源极连接至其中 一条数据线 DA1， 其漏极连接至第二晶体管 T12的栅极； 驱动晶体管 T12的源 极连接至高电压电源 ELVDDl , 其漏极连接至发光二级管 OLED1的阳极； 发光 二极管 OLED1的阴极连接至低电压电源 ELVSS1 ; 存储电容 C11的第一端子连 接至第一电源 ELVDDl , 第二端子连接至第二晶体管 T12的栅极。 扫描驱动器依次序施加扫描信号至扫描线 SC1到 SCn， 数据驱动器根据待 显示的图像数据， 经数据线 DA1到 DAm施加对应的数据信号。 从而， 位于其 交叉区域内的像素电路 100根据与其连接的扫描线和数据线的信号提供流过有 机发光二级管的驱动电流。 如图 1所示的像素电路 110为例，当扫描驱动器施加扫描信号到扫描线 SC1 时， 开关晶体管 Til导通， 且此时数据线 DAI上的数据信号的电压通过开关晶 体管 T11被存储到存储电容 C11中。 驱动晶体管 T12根据存储电容 C11所存储 的电压提供驱动电流 IQLED1来驱动有机发光二级管 OLED1发出对应亮度的光。 其中， 驱动电流的公式如下所示： 丄 OLED1— 1/2 μ 12 X COXL2 X W12/L12 (VGS12-VTHI2 ) 2 (式 1 )
其中， μ 12为驱动晶体管 T12的载流子迁移率， C。xl2为驱动晶体管 T12的 单位面积控制端氧化层的电容， W12为驱动晶体管 T12的沟道宽度， L12为驱动 晶体管 T12的沟道长度， VQS12为驱动晶体管 T12栅极和源极之间的电压差， VTH12 为驱动晶体管 T12的阈值电压。 也就是说， 根据来自数据线 DA1上的数据电压 的大小，可以控制流过有机发光二极管 OLED1的驱动电流以显示预定的灰度级。 对于大型有源矩阵有机发光显示装置， 由于其包括很多个像素电路， 且每 个像素电路都需要包含驱动晶体管， 而不同的驱动晶体管之间的电气差异造成 其上的阈值电压不同。 因此根据上述公式 1可知， 当提供给像素电路 110的数 据电压相同时， 被提供给有机发光二极管处的驱动电流因驱动晶体管的阈值电 压的不同也会有所不同。 这样， 会造成多个像素电路显示的图像的质量均匀性 和一致性较差的问题。
发明内容
有鉴于此， 本发明的主要目的在于提供一种新型的像素电路结构， 可以补 偿驱动晶体管阈值电压的差异。 本发明提供了一种能够产生期望亮度的像素电 路和使用所述像素电路的有源矩阵有机发光显示装置， 所述像素电路能够改善 有源矩阵有机发光二极管的响应特性， 显示具有均匀图像质量的图像。 为达到上述目的， 本发明的技术方案是这样实现的： 本发明提供了一种像素电路， 包括第一电源、 第二电源、 有机发光二级管、 第一电容、 第一晶体管、 第二晶体管、 第三晶体管， 其中， 所述有机发光二极管的阴极与所述第二电源相结合； 所述第一电容结合在一节点和所述第二电源之间； 所述第一晶体管、 第二晶体管、 第三晶体管分别具有控制端、 第一电极和 第二电极；
所述第一晶体管， 其控制端与所述节点相结合， 其第一电极用于接收一数 据信号； 所述第二晶体管， 其控制端用于接收一第一扫描信号； 其第一电极与所述 第一晶体管的第二电极相结合； 其第二电极与所述节点相结合；
所述第三晶体管， 其控制端与所述节点相结合； 其第一电极与所述第一电 源相结合， 其第二电极与所述发光二级管的阳极相结合；
所述第一晶体管用于补偿所述第三晶体管的阈值电压。
其中， 所述第一晶体管与所述第三晶体管的沟道宽度相近； 且其在所述像 素电路中近距离设置。
其中， 所述像素电路被设置在 TFT背板上；
所述第一晶体管和所述第三晶体管在 TFT背板上对称设置。
其中， 还包括第四晶体管； 所述第四晶体管， 其控制端用于接收一第二扫描信号， 其第一电极与所述 第三晶体管的第二电极相结合， 其第二电极与所述发光二极管的阳极相结合。
其中， 还包括第五晶体管及第三电源； 所述第五晶体管具有用于接收一第三扫描信号的控制端、 与所述节点相结 合的第一电极和与所述第三电源相结合的第二电极。
其中， 所述第三电源的电压小于或等于所述第二电源的电压。 其中， 还包括第六晶体管， 具有接收所述第三扫描信号的控制端、 与所述 发光晶体二极管阳极相结合的第一电极以及与所述第二电源相结合的第二电 极。
其中， 还包括第二电容， 结合在所述第二晶体管的控制端和所述节点之间。 其中， 所述第一晶体管、 第二晶体管、 第三晶体管、 第四晶体管、 第五晶 体管、 第六晶体管是 P沟通金属氧化物半导体晶体管。 本发明进一步提供了一种驱动像素电路的方法， 其中所述像素电路包括第 一晶体管、 第二晶体管、 第三晶体管、 存储电容和有机发光二极管， 所述像素 电路通过来自数据线、 扫描线上的信号被驱动， 所述方法包括：
将第一扫描信号施加至第一扫描线， 用于导通所述第二晶体管， 从而使得 来自数据线的数据信号经所述第一晶体管和所述第二晶体管提供给一节点， 并 且所述节点处的电压被存储在所述存储电容中； 其中所述第一晶体管的控制端 和所述存储电容的一端子共同与所述节点相结合；
所述数据信号经所述第三晶体管提供给所述发光二极管；
所述发光二级管发出与所述数据信号相应亮度的光。
其中， 所述像素电路还包括第四晶体管；
所述方法还包括，
将第二扫描信号提供给一第二扫描线， 用于导通所述第四晶体管， 从而将 所述数据信号经所述第三晶体管提供给所述发光二极管。
其中， 所述像素电路还包括第五晶体管；
在施加第一扫描信号之前施加第三扫描信号， 用于导通所述第五晶体管， 从而初始化所述节点。
其中， 所述第一晶体管与所述第三晶体管的沟道宽度相近， 且其在像素电 路中近距离设置。
其中， 所述像素电路设置在 TFT背板上；
且所述第一晶体管和第三晶体管在 TFT背板上对称设置。
其中， 扫描驱动器， 用于向扫描线施加扫描信号；
数据驱动器， 用于向数据线施加数据信号；
像素电路， 被连接在所述数据线和扫描线之间； 所述像素电路包括： 第一电源、 第二电源、 有机发光二级管、 第一电容、 第一晶体管、 第二晶体管、 第三晶体管， 其特征在于：
所述有机发光二极管， 具有阳极和阴极， 其阴极连接至所述第二电源； 所述第一电容， 结合在一节点和所述第二电源之间； 所述第一晶体管、 第二晶体管、 第三晶体管分别具有控制端、 第一电极和 第二电极；
所述第一晶体管， 其控制端与所述节点相结合， 其第一电极与所述数据线 相结合；
所述第二晶体管， 其控制端与一第一扫描线相结合； 其第一电极与所述第 一晶体管的第二电极相结合； 其第二电极与所述节点相结合； 所述第三晶体管， 其控制端与所述节点相结合； 其第一电极与所述第一电 源相结合， 其第二电极与所述发光二级管的阳极相结合；
所述第一晶体管用于补偿所述第三晶体管的阈值电压。
其中， 所述第一晶体管与所述第三晶体管的沟道宽度相近， 且其在所述像 素电路中近距离设置。
其中， 所述显示装置还包括 TFT背板， 所述像素电路被设置在所述 TFT背 板上；
第一晶体管和第三晶体管在 TFT背板上对称设置。 其中， 还包括第四晶体管， 其控制端与一第二扫描线相结合， 其第一电极 与所述第三晶体管的第二电极相结合， 其第二电极与所述发光二极管的阳极相 士 A口 。 其中， 还包括第五晶体管及第三电源； 所述第五晶体管具有与一第三扫描线相结合的控制端、 与所述节点相结合 的第一电极和与所述第三电源相结合的第二电极。
其中， 所述第三电源的电压小于或等于所述第二电源的电压。
其中， 还包括第六晶体管， 具有共同与所述第三扫描线相结合的控制端、 与所述发光晶体二极管阳极相结合的第一电极以及与所述第二电源相结合的第 二电极。
其中， 还包括第二电容， 结合在所述第二晶体管的控制端和所述节点之间。 其中， 所述第一晶体管、 第二晶体管、 第三晶体管、 第四晶体管、 第五晶 体管、 第六晶体管是 p沟通金属氧化物半导体晶体管。 附图说明
图 1为传统的有源矩阵有机发光显示装置的像素电路图；
图 2为根据本发明第一实施例的像素电路示意图；
图 3为根据图 2所示的像素电路的驱动方法的信号时序图；
图 4为根据本发明第二实施例的像素电路示意图； 图 5为根据图 4所示的像素电路的驱动方法的信号时序图；
图 6为根据本发明第三实施例的像素电路示意图； 图 7为根据图 6所示的像素电路的驱动方法的信号时序图；
图 8为根据本发明第四实施例的像素电路示意图；
图 9为根据本发明第五实施例的像素电路示意图；
图 10为本发明有源矩阵有机发光显示装置示意图。
具体实施方式
下面结合附图及本发明的实施例对本发明的像素电路及其驱动方法作进一 步详细的说明。
需要说明的是， 本发明中所称的"结合"，包括元件与元件之间的直接连接， 也包括元件与元件之间通过其他元器件相连接。
为了方便说明， 将结合图 2和图 3对本发明的一个实施例的像素电路及其 驱动方法。
图 2所示为根据本发明第一实施例的像素电路 200的示意图。
参照图 2， 像素电路 200包括： 第一晶体管 Tl、 第二晶体管 Τ2、 第三晶体 管 Τ3、电容 Cl、有机发光二极管 OLED。其中， 晶体管 T1至 T3均包括控制端、 第一电极 1和第二电极 2。 晶体管 T1的第一电极结合至数据线 Dm， 控制端结 合至一节点 Nl， 第二电极结合至第二晶体管 T2的第一电极； 第二晶体管 T2的 控制端结合至第一扫描线 Snl， 用于接收来自第一扫描线 Snl的第一扫描信号， 其第一电极与第二晶体管 Tl 的第二电极相结合； 其第二电极结合至节点 N1 ; 电容 C1的第一端子结合至节点 Nl， 第二端子结合至第二电源 ELVSS; 第三晶 体管 T3的控制端结合至节点 Nl， 其第一电极结合至第一电源 ELVDD, 第二电 极结合至发光二级管 OLED的阳极； 发光二级管 OLED的阴极结合至第二电源 ELVSS。 优选地， 控制端可以是晶体管 T1-T3 的栅极， 第一电极可以为晶体管 T1-T3 的源极， 第二电极可以为晶体管 T1-T3 的漏极。 同理， 如下述的晶体管 T4、 Τ5、 Τ6的控制端可以是晶体管 Τ4-Τ6的栅极，第一电极可以为晶体管 T1-T3 的漏极， 第二电极可以为晶体管 T1-T3的源极。
图 3所示为根据图 2所示的像素电路 200的驱动方法的信号时序图。 其中， 图 3所示的信号时序包括第一阶段和第二阶段。其中第一阶段 tl为写数据阶段， 第二阶段 t2为正常发光阶段。 由于图 2所示的像素电路 200中的晶体管 T1-T3 均以 PMOS晶体管为例， 因此在其控制端施加为低电平信号时晶体管导通。
如图 3所示， 在第一阶段， 即将扫描信号施加到扫描线 Snl的时间段 tl期 间， 第一晶体管 T1和第二晶体管 T2响应于低电平的扫描信号 Snl而导通。 因 此， 经第一晶体管 T1和第二晶体管 T2将来自数据线 Dm的数据信号 Vdata提 供给节点 Nl。 可以理解， 此时， 节点 N1处的电压值为数据信号 Vdata和第一 晶体管 T1 的阈值电压之间的差值相应的电压， 即 Vdata-|VTH1|， 即等于 Vdata+VTH1。 并且节点 N1处的电压也被存储在电容 C1中。 也就是说， 数据线 Dm上的数据信号 Vdata被读入到像素电路 200中。 在第二阶段 t2， 也就是第一扫描线 Snl 的电压跃迁到高电平后， 发光二级 管 OLED进入正常发光阶段。 此时， 第一电源 ELVDD的电流经过第三晶体管 T3流入发光二极管 OLED的阳极。 其中， 流入 OLED的驱动电流为下式所示： l/2 3 X COX3 X W3/L3 X (VGS3-VTH3 ) 2 (式 2)。
其中， μ 3为第三晶体管 Τ3的载流子迁移率； C。x3为第三晶体管 T3的单位 面积控制端氧化层的电容， W3为第三晶体管 T3的沟道宽度， L3为第三晶体管 T3的沟道长度。 ^^为第三晶体管栅源极电压差， VTH3为第三晶体管 T3的阈 值电压。 此时， 由于的第三晶体管导通， 因此其栅源极电压 VQS3为节点 N1处的电 压 （即 Vdata+VTH1 )， 与第一电源电压 Vdd之间的差， §卩 Vdata+VTH1-Vdd。 因 此， 上式可以通过计算进一步得出：
Figure imgf000010_0001
3 X COX3 X W3/L3 X (VDATA + V TH1-VDD -VTH3) 2 (式 3 )。 由此可见， 通过设置合适电气特性的第一晶体管 T1 以减小第三晶体管 T3 的阈值电压对 OLED的驱动电流的影响。 优选地， 如果设置电气特性尽可能相近的晶体管 T1 和 T3， 则可以将第三 晶体管 Τ3的阈值电压抵消为几乎为零，从而流入 OLED的驱动电流可以不受到 第三晶体管 Τ3的阈值电压的影响。 §Ρ， 其电流值如下所示： l/2 3 X Cox3 X W3/L3 X (Vdata -Vdd ) 2 (式 4)。 其中， 设置电气特性尽可能相近的第一晶体管 T1和第三晶体管 T3可以通 过设置沟道宽度和长度尽可能相近的两个晶体管， 且将其近距离设置在像素电 路 200中。 优选地， 还可以在将像素电路 200设置在 TFT背板上时， 将第一晶体管 T1 和第三晶体管 T3对称地设置， 以使得其阈值电压尽可能地接近。 图 4所示为根据本发明的第二实施例的像素电路 300的示意图。 与图 2所 示的像素电路不同之处在于， 进一步包括第四晶体管 T4， 其控制端结合至第二 扫描线 Sn2，用于接收来自第二扫描线 Sn2的第二扫描信号；其第一电极结合至 第三晶体管 T3的第二电极， 其第二电极结合至发光二级管 OLED的阳极。 图 5所示为驱动图 4所示的像素电路 300的驱动方法的信号时序图。与图 3 所示的信号时序图不同之处在于， 在第二阶段 t2， 将扫描信号提供给第二扫描 线 Sn2。 这时， 第三晶体管 T3和第四晶体管 T4共同导通， 从而将数据信号通 过第三晶体管 T3和第四晶体管 T4提供给发光二级管 OLED。 进而， 发光二级 管 OLED进入正常发光阶段。 可以理解的是， 由于在像素电路 300中设置了第四晶体管 T4， 就可以通过 第二扫描线 Sn2控制第四晶体管 T4的导通和关断的时间，从而通过第四晶体管 T4可以控制发光二极管 OLED的发光的时间。 §Ρ， 在晶体管 T4关断时， 发光 二级管 OLED不发光； 在晶体管 T4导通时， 发光二级管 OLED发光。 而图 2 所示的像素电路 200中的发光二级管 OLED因第三晶体管 T3持续导通一直处于 发光状态。 因此， 像素电路 300的发光效果变得更稳定。 图 6所示为根据本发明的第三实施例的像素电路 400的示意图。 与图 4所 示的像素电路 300不同之处在于， 进一步包括第五晶体管 T5， 其控制端结合至 第三扫描线 Sn3，用于接收来自第三扫描线 Sn3的第三扫描信号；其第一电极结 合至节点 N1，其第二电极结合至第三电源。其中，第三电源的电压 Vinit<=VELVSS。 本领域技术人员可以理解， 当 Vinit的值等于 VELVSS时， 所述第五晶体管的 源极可以结合至第二电源 ELVSS。
图 7所示为驱动图 6所示的像素电路 400的信号时序图。 其进一步包括在 第一阶段之前的初始化阶段。
在初始化阶段， 即将扫描信号提供给扫描线 Sn3的 t0时间段期间， 第五晶 体管 T5导通， 从而将第三电源 Vinit的电压提供给节点 N1和 OLED的阳极。 即， 第五晶体管 T5初始化时间段期间向节点 N1和 OLED的阳极提供恒定 的电压。 从而， 节点 N1和电容 C1的电压被初始化为 Vinit。 优选地， 可以将初始化电压 Vinit设置为第二电源 ELVSS的电压相同。 图 8所示为根据本发明第四实施例的像素电路 500的示意图。 其与图 6所 示的电路不同之处在于， 进一步包括第六晶体管 T6。 第六晶体管 Τ6结合在 OLED的阳极和第二电源 ELVSS之间。 第六晶体管 T6的控制端和第五晶体管 T5的控制端共同结合至扫描线 Sn3，用于接收第三扫 描信号； 其第一电极和第二电极分别与 OLED的阳极和阴极相结合。 在将低电 平扫描信号提供给扫描线 Sn3的时间段， 第六晶体管 T6导通。 由于其第一电极 和第二电极分别与 OLED的阳极和阴极相结合， 因此可以防止驱动电流被提供 给有机发光二极管 OLED。 图 9所示为根据本发明第五实施例的像素电路 600的示意图。 其与图 7所 示电路的不同之处在于， 进一步包括第二电容 C2。 第二电容 C2结合在第二晶 体管 T2的控制端和节点 N1之间。 可以理解的是， 在扫描线 Snl的扫描信号从低电平跃迁到高电平的时间段， 由于 Vdata己经被存储在节点 N1中， 因此当扫描线 Snl电压变成高电平后， 该 电压通过第二电容 C2的耦合作用将节点 N1的电位提高， 相应地提高了第三晶 体管 T3的控制端电压 Vdata+VTH1， 且相应的电压被存储在第二电容器 C2中。 由于 Vdata<Vdd， 因此由式 4可知， 第三晶体管 T3的控制端电压值的提高使得 其与 Vdd之间的差值减小。 这样当读入到像素电路 600的数据信号的电压很小 时， 即发光灰度级很低时， 就使得流过有机发光二极管 OLED的驱动电流进一 步减小， 从而提高了像素电路不同灰度级之间的对比度。
需要说明的是，以上实施例的像素电路中的第一晶体管 T1、第二晶体管 T2、 第三晶体管 Τ3、 第四晶体管 Τ4、 第五晶体管 Τ5、 第六晶体管 Τ6均以 Ρ沟通金 属氧化物半导体晶体管为例进行了说明。 本领域技术人员可以理解， 本发明的 像素电路中的晶体管 T1-T6还可以采用 Ν沟通金属氧化物半导体晶体管实现。
图 10所示为包含本发明的实施例的像素电路的有源矩阵有机发光显示装置
600 参见图 10， 显示装置 700包括： 第一电源 ELVDD、 第二电源 ELVSS、 扫 描驱动器 702、 数据驱动器 703以及位于以矩阵形式布置在扫描线 Snl、 Sn2和 Sn3、 以及数据线 Dl至 Dm的交叉区域的多个像素电路 701。 其中， 第一电源 ELVDD和第二电源 ELVSS通过相应的行线（n条）和列线（m条） 向多个像素 电路 701提供相应的电源电压。 每个像素电路 701分别结合到相应的扫描线 （例如， Sn2、 Sn2和 Sn3 ) 和 数据线。例如，将位于第 i行和第 j列的像素电路 701结合到第 i行的扫描线 Sil、 Si2和 Si3以及第 j行数据线 Dj。 扫描驱动器 702产生与外部提供 （例如， 从一定时控制单元提供） 的扫描 信号相应的扫描信号。将由扫描控制器 702产生的扫描信号分别通过扫描线 Sil 至 Sin顺序地提供给像素电路 701。 数据驱动器 703 产生与外部提供 （例如， 从一定时控制单元提供） 的数据 和数据控制信号相应的数据信号。 将由数据驱动器 703 产生的数据信号通过数 据线 D1至 Dm与扫描信号同步地提供给像素电路 701。 其中， 像素电路 701可 为上述任何一个实施例所示的像素电路。 可以理解的是， 根据像素电路的实施 例的不同， 各行扫描线的数量也可以相应地不同设置。 尽管结合特定示例性实施例描述了本发明， 但应该理解， 本发明不限于公 开的实施例， 而是相反， 本发明意在覆盖权利要求及其等同物的精神和范围内 包括的各种修改和等同布置。
以上实施例仅用以说明本发明的技术方案而非限制， 尽管参照较佳实施例 对本发明进行了详细说明， 任何所属技术领域中具有通常知识者， 在不脱离本 发明的精神和范围内， 当可作些许的更动与润饰， 因此本发明的保护范围当视 权利要求范围所界定者为准。

Claims

权利要求书
1.一种像素电路， 包括第一电源、 第二电源、 有机发光二级管、 第一电容、 第一晶体管、 第二晶体管、 第三晶体管， 其特征在于：
所述有机发光二极管的阴极与所述第二电源相结合；
所述第一电容结合在一节点和所述第二电源之间；
所述第一晶体管、 第二晶体管、 第三晶体管分别具有控制端、 第一电极和 第二电极；
所述第一晶体管， 其控制端与所述节点相结合， 其第一电极用于接收一数 据信号；
所述第二晶体管， 其控制端用于接收一第一扫描信号； 其第一电极与所述 第一晶体管的第二电极相结合； 其第二电极与所述节点相结合；
所述第三晶体管， 其控制端与所述节点相结合； 其第一电极与所述第一电 源相结合， 其第二电极与所述发光二级管的阳极相结合；
所述第一晶体管用于补偿所述第三晶体管的阈值电压。
2. 根据权利要求 1所述的像素电路， 其特征在于： 所述第一晶体管与所述 第三晶体管的沟道宽度相近； 且其在所述像素电路中近距离设置。
3. 根据权利要求 2所述的像素电路， 其特征在于： 所述像素电路被设置在 TFT背板上；
所述第一晶体管和所述第三晶体管在 TFT背板上对称设置。
4. 根据权利要求 1所述的像素电路， 其特征在于： 还包括第四晶体管；
所述第四晶体管， 其控制端用于接收一第二扫描信号， 其第一电极与所述 第三晶体管的第二电极相结合， 其第二电极与所述发光二极管的阳极相结合。
5. 根据权利要求 1所述的像素电路， 其特征在于： 还包括第五晶体管及第三电源；
所述第五晶体管具有用于接收一第三扫描信号的控制端、 与所述节点相结 合的第一电极和与所述第三电源相结合的第二电极。
6. 根据权利要求 5所述的像素电路， 其特征在于： 所述第三电源的电压小于或等于所述第二电源的电压。
7. 根据权利要求 5所述的像素电路， 其特征在于： 还包括第六晶体管， 具有接收所述第三扫描信号的控制端、 与所述发光晶 体二极管阳极相结合的第一电极以及与所述第二电源相结合的第二电极。
8. 根据权利要求 1所述的像素电路， 其特征在于： 还包括第二电容， 结合在所述第二晶体管的控制端和所述节点之间。
9. 根据权利要求 1-8之一所述的像素电路， 其特征在于： 所述第一晶体管、 第二晶体管、 第三晶体管、 第四晶体管、 第五晶体管、 第六晶体管是 P沟通金属氧化物半导体晶体管。
10. 一种驱动像素电路的方法， 其中所述像素电路包括第一晶体管、第二晶 体管、 第三晶体管、 存储电容和有机发光二极管， 所述像素电路通过来自数据 线、 扫描线上的信号被驱动， 所述方法包括： 将第一扫描信号施加至第一扫描线， 用于导通所述第二晶体管， 从而使得 来自数据线的数据信号经所述第一晶体管和所述第二晶体管提供给一节点， 并 且所述节点处的电压被存储在所述存储电容中； 其中所述第一晶体管的控制端 和所述存储电容的一端子共同与所述节点相结合；
所述数据信号经所述第三晶体管提供给所述发光二极管； 所述发光二级管发出与所述数据信号相应亮度的光。
11. 根据权利要求 10所述的方法， 其特征在于： 所述像素电路还包括第四晶体管；
所述方法还包括， 将第二扫描信号提供给一第二扫描线， 用于导通所述第四晶体管， 从而将 所述数据信号经所述第三晶体管提供给所述发光二极管。
12. 根据权利要求 11所述的方法， 其特征在于： 所述像素电路还包括第五晶体管；
在施加第一扫描信号之前施加第三扫描信号， 用于导通所述第五晶体管， 从而初始化所述节点。
13. 根据权利要求 10所述的方法， 其特征在于： 所述第一晶体管与所述第三晶体管的沟道宽度相近， 且其在像素电路中近 距离设置。
14. 根据权利要求 13所述的方法， 其特征在于： 所述像素电路设置在 TFT背板上；
且所述第一晶体管和第三晶体管在 TFT背板上对称设置。
15. 一种显示装置， 包括： 扫描驱动器， 用于向扫描线施加扫描信号；
数据驱动器， 用于向数据线施加数据信号； 像素电路， 被连接在所述数据线和扫描线之间； 所述像素电路包括： 第一电源、 第二电源、 有机发光二级管、 第一电容、 第一晶体管、 第二晶体管、 第三晶体管， 其特征在于：
所述有机发光二极管， 具有阳极和阴极， 其阴极连接至所述第二电源； 所述第一电容， 结合在一节点和所述第二电源之间； 所述第一晶体管、 第二晶体管、 第三晶体管分别具有控制端、 第一电极和 第二电极； 所述第一晶体管， 其控制端与所述节点相结合， 其第一电极与所述数据线 相结合；
所述第二晶体管， 其控制端与一第一扫描线相结合； 其第一电极与所述第 一晶体管的第二电极相结合； 其第二电极与所述节点相结合；
所述第三晶体管， 其控制端与所述节点相结合； 其第一电极与所述第一电 源相结合， 其第二电极与所述发光二级管的阳极相结合；
所述第一晶体管用于补偿所述第三晶体管的阈值电压。
16. 根据权利要求 15所述的显示装置， 其特征在于： 所述第一晶体管与所述第三晶体管的沟道宽度相近， 且其在所述像素电路 中近距离设置。
17. 根据权利要求 16所述的显示装置， 其特征在于： 所述显示装置还包括 TFT背板， 所述像素电路被设置在所述 TFT背板上； 所述第一晶体管和所述第三晶体管在 TFT背板上对称设置。
18. 根据权利要求 15所述的显示装置， 其特征在于： 还包括第四晶体管， 其控制端与一第二扫描线相结合， 其第一电极与所述 第三晶体管的第二电极相结合， 其第二电极与所述发光二极管的阳极相结合。
19. 根据权利要求 15所述的显示装置， 其特征在于： 还包括第五晶体管及第三电源； 所述第五晶体管具有与一第三扫描线相结合的控制端、 与所述节点相结合 的第一电极和与所述第三电源相结合的第二电极。
20. 根据权利要求 19所述的显示装置， 其特征在于： 所述第三电源的电压小于或等于所述第二电源的电压。
21. 根据权利要求 19所述的显示装置， 其特征在于： 还包括第六晶体管， 具有共同与所述第三扫描线相结合的控制端、 与所述 发光晶体二极管阳极相结合的第一电极以及与所述第二电源相结合的第二电 极。
22. 根据权利要求 15所述的显示装置， 其特征在于： 还包括第二电容， 结合在所述第二晶体管的控制端和所述节点之间。
23. 根据权利要求 15-22之一所述的显示装置， 其特征在于： 所述第一晶体管、 第二晶体管、 第三晶体管、 第四晶体管、 第五晶体管、 第六晶体管是 P沟通金属氧化物半导体晶体管。
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